Method and circuit for controlling synchronous rectifier diodes in a dual-clamp converter

Abstract

This invention discloses a method and circuit for controlling the synchronous rectifier diodes in a dual-clamp converter. The method obtains the total equivalent resonant inductance and clamping capacitor on the primary side by constructing a simplified model of the equivalent circuit during the power transfer stage; it designs the total equivalent damping resistance to be greater than the critical damping resistance, enabling the converter to operate in an overdamped state; it designs the minimum on-time of the synchronous rectifier drive to be greater than the critical damping rise time; and it calculates the turn-off compensation voltage based on the rated output voltage, transformer turns ratio, and magnetizing inductance, and sets the turn-off threshold voltage accordingly. This invention effectively suppresses inductive voltage component interference caused by package parasitic inductance, avoids premature turn-off of the synchronous rectifier diodes, reduces conduction losses, and improves converter efficiency and output voltage control accuracy. It also has advantages such as simple parameter adjustment and strong versatility.

Description

Technical Field

[0001] This invention belongs to the field of synchronous control technology, specifically a method and circuit for controlling the synchronous rectifier tube of a dual-clamp converter. Background Technology

[0002] Figure 1 The dual-clamp converter shown features a simple circuit structure and electrical isolation between input and output. It can also recover transformer leakage inductance energy, effectively suppress voltage spikes, and achieve zero-voltage turn-on of the switching transistors, making it particularly suitable for power conversion applications requiring high power density.

[0003] like Figure 1 As shown, the dual-clamp converter mainly consists of the primary-side switching transistor S. P1 ~S P4 Power transformer T1 (including magnetizing inductor L) m Equivalent leakage inductance L of the original edge r Clamping capacitor C L Secondary-side synchronous rectifier tube S R1 and output filter capacitor C o Composition, in which S P3 It is an active clamping transistor. The typical operating waveform of the converter is as follows: Figure 2 As shown, the converter mainly operates in three phases within one switching cycle: the input energy storage phase (t0~t1), the power transfer phase (t1~t2), and the current clamping phase (t2~t3). During the input energy storage phase (t0~t1), the primary-side switch S... P1 and S P4 On, input voltage V in The leakage inductance L is applied to the primary side of power transformer T1. r Far small magnetizing inductor L m Magnetizing inductor current i Lm Linear increase, slope V in / L m At time t1, S P1 and S P4 The input energy storage phase ends upon shutdown, after which the primary-side switch S... P2 and S P3 and secondary side synchronous rectifier S R1 When the converter is turned on, it enters the power transmission phase (t1~t2), and the magnetizing inductor L... m Energy is transferred to the load, and the magnetizing inductor current i Lm Linear descent with a slope of -V CL / L m Because of L r Much smaller than L m Then V CL / n=V oWhere n is the ratio of the number of turns on the primary side to the number of turns on the secondary side of the power transformer T1, i.e., the clamping capacitor voltage V of the converter. CL and output voltage V o The relationship is proportional, therefore the clamping capacitor voltage V can be sampled. CL This achieves closed-loop control of the output voltage without the need for signal isolation circuits, simplifying implementation and improving the power density of the converter; simultaneously, the clamping capacitor C L With leakage L r Resonance and absorption of its energy, avoiding voltage spikes, and because leakage inductance energy is not transferred to the secondary side, the design ensures L r Much smaller than L m And with clamping capacitor C L The resonant frequency is much higher than the switching frequency of the converter (clamping C). L It also requires a relatively small current (i.e., a small current) to achieve high-precision output voltage regulation and efficient power conversion. The magnetizing inductor current i at time t2... Lm To zero, S P3 and S R1 Turn-off, the power transfer phase ends, and then the primary-side switch S... P4 When the converter is turned on, it enters the current clamping stage (t2~t3). The voltage across the primary side of the transformer is zero, and the magnetizing inductor current i Lm Remaining unchanged, its negative current is due to S P3 S P4 and S R1 Parasitic capacitance and magnetizing inductance L m Resonance generation ( Figure 2 (a) shows t2~t 2a stage).

[0004] The secondary side of the dual-clamp converter employs synchronous rectification control to reduce rectifier diode conduction losses and improve converter efficiency. The synchronous rectification driver samples the synchronous rectifier diode S... R1 The drain-source voltage is used to determine zero-voltage turn-on and zero-current turn-off to generate S. R1 drive control signal v GSR1 That is, when the drain-source voltage is lower than the turn-off threshold voltage V th_on At that time, S was opened R1 When the drain-source voltage is higher than the turn-off threshold voltage V th_off When, turn off S R1 As the foregoing analysis shows, the design of a dual-clamp converter will ensure the leakage inductance L. r and clamping capacitor C L The resonant frequency is much higher than the switching frequency of the converter, so as to achieve high-precision output voltage regulation and efficient power conversion. Figure 2As shown in (b), the current flowing through the secondary-side synchronous rectifier will include a high-frequency resonant component, and the inductive voltage component L introduced by the parasitic inductance of the synchronous rectifier's package. S ×(di SR1 / dt), will lead to premature turn-off, increasing the conduction time of the body diode, thereby degrading converter efficiency and output voltage control accuracy, etc. S This relates to the parasitic inductance of the switching transistor package. To address this issue, the literature "D. Fu, etc. A Novel Driving Scheme for Synchronous Rectifiers in LLC Resonant Converters. IEEE Trans. on PowerElectron., vol. 24, no. 5, pp. 1321-1329, May, 2009" proposes an RC-based compensation circuit. However, the compensation effect is easily affected by factors such as parameter tolerance and temperature, and the device parameters of the compensation circuit need to be adjusted according to the selection of the switching transistor, the number of series and parallel connections, and the PCB layout, resulting in poor versatility. Summary of the Invention

[0005] The purpose of this invention is to address the defects or deficiencies of the existing technology by providing a method and circuit for controlling the synchronous rectifier tube of a dual-clamp converter.

[0006] The technical solution to achieve the objective of this invention is as follows: On one hand, a method for controlling the synchronous rectifier diodes of a dual-clamp converter is provided, the method comprising:

[0007] Step 1: Construct a current characteristic model of the dual-clamp converter in the power transmission stage to obtain equivalent parameters reflecting the primary side resonance characteristics, including at least equivalent inductance parameters and capacitance parameters.

[0008] Step 2: Configure the loop damping characteristics of the converter according to the equivalent parameters so that the dual-clamp converter operates in an overdamped state during the power transmission stage.

[0009] Step 3: Set the minimum on-time limit of the synchronous rectification drive circuit to avoid inductive voltage interference caused by the rapid drop in secondary current;

[0010] Step 4: Calculate and set the turn-off threshold compensation voltage to compensate for the inductive voltage component generated by the parasitic inductance of the synchronous rectifier tube package, so as to achieve precise turn-off control of the synchronous rectifier tube.

[0011] Furthermore, step 1 involves constructing a current characteristic model, specifically including:

[0012] Obtain the primary side total equivalent resonant inductance L r_totIt includes the equivalent leakage inductance L on the primary side of transformer T1. r and secondary-side synchronous rectifier S R1 The equivalent value n of the encapsulated parasitic inductance converted to the primary side 2 ·L S , is represented as:

[0013]

[0014] In the formula, n is the transformer turns ratio. For the secondary side synchronous rectifier tube S R1 The parasitic feeling of encapsulation;

[0015] Obtain the clamping capacitor C L The capacitance value.

[0016] Furthermore, step 2 involves configuring the circuit damping characteristics of the converter, specifically including:

[0017] Determine the critical damping resistance value R d_C The calculation formula is:

[0018]

[0019] Configure the total equivalent damping resistance R d_tot Make it satisfy R d_tot >R d_C .

[0020] Furthermore, the adjustment of the total equivalent damping resistance is achieved through at least one of the following means:

[0021] Select the primary-side second switch S with a specific target on-resistance. P2 and the third switch S P3 ;

[0022] A damping resistor R is connected in series in the clamping capacitor branch. d And adjust its resistance value.

[0023] Furthermore, the total equivalent damping resistance R d_tot Including: with clamping capacitor C L series damping resistor R d On-resistance of the first primary-side switch and the second primary-side switch The equivalent resistance of the primary and secondary windings of the transformer , and secondary-side synchronous rectifier S R1 On resistance , is represented as:

[0024] .

[0025] Furthermore, step 3 sets a conduction time limit for the synchronous rectification drive circuit, specifically including:

[0026] The critical damping rise time t is calculated based on the current characteristic model. r_C The calculation formula is:

[0027]

[0028] Set the minimum on-time t of the synchronous rectification drive circuit on_min And satisfy t on_min >t r_C .

[0029] Further, step 4 involves calculating and setting the turn-off threshold compensation voltage, specifically including:

[0030] Obtain the rated output voltage V oN Transformer turns ratio n and magnetizing inductance L m ;

[0031] Calculate the package parasitic inductance L based on the decreasing slope of the magnetizing inductor current on the secondary side. S The generated inductive voltage component That is, the turn-off compensation voltage V th_VoN ;

[0032] The turn-off threshold voltage V of the synchronous rectifier diode th_off Set to: V th_off equals V th_VoN .

[0033] Furthermore, the shutdown compensation voltage V th_VoN The calculation formula is:

[0034]

[0035] in, The current i flowing through the secondary-side synchronous rectifier during the power transmission stage SR1 The falling edge slope of the secondary synchronous rectifier tube S R1 Encapsulated parasitic sense L S The inductive voltage component generated on it.

[0036] On the other hand, a dual-clamp converter synchronous rectifier control circuit is provided. The control circuit includes a synchronous rectifier driver chip, which samples the drain-source voltage of the synchronous rectifier and outputs a drive signal. The synchronous rectifier driver chip implements the dual-clamp converter synchronous rectifier control method through peripheral circuit parameter configuration.

[0037] Furthermore, the pin for drain-source sampling of the synchronous rectification driver chip is connected to the drain of the synchronous rectifier tube through a resistor compensation network.

[0038] The synchronous rectification driver chip has a pin connected to a resistor-capacitor timing network for configuring the minimum conduction time, which is used to set the conduction duration to avoid interference.

[0039] Compared with the prior art, the significant advantages of this invention are:

[0040] (1) Effectively eliminates the problem of early turn-off: Through the comprehensive application of overdamping design, minimum conduction time setting and turn-off compensation voltage, the phenomenon of early turn-off of synchronous rectifier caused by inductive voltage component generated by package parasitic inductance is effectively suppressed.

[0041] (2) Significantly improve converter efficiency: Since the body diode is kept on for a long time due to the early turn-off of the synchronous rectifier, the conduction loss can be effectively reduced, thereby improving the power conversion efficiency.

[0042] (3) Improve voltage control accuracy: By suppressing the high-frequency interference generated by the resonance of leakage inductance and clamping capacitor, and correcting the turn-off threshold, the voltage regulation accuracy of the output voltage under primary-side sampling control is improved.

[0043] (4) The parameter design has universality and accuracy: Based on the constructed simplified model (including DC and AC equivalent circuits), it can accurately describe the current information in the power transmission stage, making the calculation of damping resistance and compensation voltage more theoretically supported and reducing the reliance on experience debugging.

[0044] (5) The circuit is simple to implement and low in cost: This solution only requires adjusting the resistance value of the external resistor (such as R). on_min and R CS It can adapt to different switching transistors and transformer parameters without the need for complex signal isolation or expensive compensation auxiliary circuits.

[0045] The present invention will now be described in further detail with reference to the accompanying drawings. Attached Figure Description

[0046] Figure 1 This is a schematic diagram of a dual-clamp converter.

[0047] Figure 2 (a) in the diagram is a typical operating waveform diagram of a dual-clamp converter. Figure 2 (b) is a waveform diagram of the problem of premature turn-off of the synchronous rectifier tube on the secondary side of the dual-clamp converter.

[0048] Figure 3 This is an equivalent circuit of a dual-clamp converter in the power transmission stage in one embodiment.

[0049] Figure 4 Here is a simplified model of a dual-clamp converter in the power transfer stage of one embodiment, wherein Figure 4(a) in the model is a simplified model. Figure 4 (b) in the diagram represents the DC equivalent circuit of the simplified model. Figure 4 (c) in the simplified model is the AC equivalent circuit.

[0050] Figure 5 This is a schematic diagram comparing a simplified model and simulation results in one embodiment.

[0051] Figure 6 This is a schematic diagram of the secondary current waveforms under different damping coefficients in one embodiment, where... Figure 6 (a) in the diagram shows different damping coefficients. Figure 6 (b) is a schematic diagram comparing the secondary current and the excitation inductor current under overdamped conditions.

[0052] Figure 7 This is a flowchart of a synchronous rectifier control method in one embodiment.

[0053] Figure 8 This is a schematic diagram of the synchronous rectifier control circuit in one embodiment.

[0054] Figure 9 The following is a diagram showing the operating waveforms of a synchronous rectifier under different damping states in one embodiment. Figure 9 (a) represents the underdamped state: premature turn-off occurs. Figure 9 (b) represents the overdamped state: there is no premature turn-off problem. Detailed Implementation

[0055] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0056] It should be noted that if the embodiments of the present invention involve directional indicators (such as up, down, left, right, front, back, etc.), the directional indicators are only used to explain the relative positional relationship and movement of the components in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicators will also change accordingly.

[0057] Furthermore, if the embodiments of this invention involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. If the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed by this invention.

[0058] In one embodiment, a method for controlling the synchronous rectifier diodes of a dual-clamp converter is provided, the method comprising:

[0059] Step 1: Construct a current characteristic model of the dual-clamp converter in the power transmission stage to obtain equivalent parameters reflecting the primary side resonance characteristics, including at least equivalent inductance parameters and capacitance parameters.

[0060] Step 2: Configure the loop damping characteristics of the converter according to the equivalent parameters so that the dual-clamp converter operates in an overdamped state during the power transmission stage.

[0061] Step 3: Set the minimum on-time limit of the synchronous rectification drive circuit to avoid inductive voltage interference caused by the rapid drop in secondary current;

[0062] Step 4: Calculate and set the turn-off threshold compensation voltage to compensate for the inductive voltage component generated by the parasitic inductance of the synchronous rectifier tube package, so as to achieve precise turn-off control of the synchronous rectifier tube.

[0063] Furthermore, in one embodiment, step 1, constructing the current characteristic model, specifically includes:

[0064] Obtain the primary side total equivalent resonant inductance L r_tot It includes the equivalent leakage inductance L on the primary side of transformer T1. r and secondary-side synchronous rectifier S R1 The equivalent value n of the encapsulated parasitic inductance converted to the primary side 2 ·L S , is represented as:

[0065]

[0066] In the formula, n is the transformer turns ratio. For the secondary side synchronous rectifier tube S R1 The parasitic feeling of encapsulation;

[0067] Obtain the clamping capacitor C L The capacitance value.

[0068] Furthermore, in one embodiment, configuring the loop damping characteristics of the converter in step 2 specifically includes:

[0069] Determine the critical damping resistance value R d_C The calculation formula is:

[0070]

[0071] Configure the total equivalent damping resistance R d_tot Make it satisfy R d_tot >R d_C .

[0072] Furthermore, in one embodiment, the adjustment of the total equivalent damping resistance is achieved by at least one of the following means:

[0073] Select the primary-side second switch S with a specific target on-resistance. P2 and the third switch S P3 ;

[0074] A damping resistor R is connected in series in the clamping capacitor branch. d And adjust its resistance value.

[0075] Preferably, in some embodiments, the total equivalent damping resistance R d_tot Including: with clamping capacitor C L series damping resistor R d On-resistance of the first primary-side switch and the second primary-side switch The equivalent resistance of the primary and secondary windings of the transformer , and secondary-side synchronous rectifier S R1 On resistance , is represented as:

[0076] .

[0077] Furthermore, in one embodiment, step 3 sets a minimum on-time limit for the synchronous rectification drive circuit, specifically including:

[0078] The critical damping rise time t is calculated based on the current characteristic model. r_C The calculation formula is:

[0079]

[0080] Set the minimum on-time t of the synchronous rectification drive circuit on_min And satisfy t on_min >t r_C .

[0081] Furthermore, in one embodiment, step 4, calculating and setting the turn-off threshold compensation voltage, specifically includes:

[0082] Obtain the rated output voltage V oN Transformer turns ratio n and magnetizing inductance L m ;

[0083] Calculate the package parasitic inductance L based on the decreasing slope of the magnetizing inductor current on the secondary side. S The generated inductive voltage component That is, the turn-off compensation voltage V th_VoN ;

[0084] The turn-off threshold voltage V of the synchronous rectifier diode th_off Set to: V th_off equals V th_VoN .

[0085] Preferably, in some embodiments, the shutdown compensation voltage V th_VoN The calculation formula is:

[0086]

[0087] in, The current i flowing through the secondary-side synchronous rectifier during the power transmission stage SR1 The falling edge slope of the secondary synchronous rectifier tube S R1 Encapsulated parasitic sense L S The inductive voltage component generated on it.

[0088] In one embodiment, a dual-clamp converter synchronous rectifier control circuit is provided. The control circuit includes a synchronous rectifier driver chip, which samples the drain-source voltage of the synchronous rectifier and outputs a drive signal. The synchronous rectifier driver chip implements the dual-clamp converter synchronous rectifier control method through peripheral circuit parameter configuration.

[0089] Preferably, in some embodiments, the pin for drain-source sampling of the synchronous rectification driver chip is connected to the drain of the synchronous rectifier tube through a resistor compensation network;

[0090] The synchronous rectification driver chip has a pin connected to a resistor-capacitor timing network for configuring the minimum conduction time, which is used to set the conduction duration to avoid interference.

[0091] More preferably, in some embodiments, the synchronous rectification driver chip is an NCP43080, wherein:

[0092] By adjusting the resistor R connected between the CS pin and the drain of the synchronous rectifier diode... CS To achieve the control of the turn-off threshold voltage V th_off Compensation settings;

[0093] By adjusting the resistor R connected between the MIN_TON pin and ground on_min To achieve the minimum conduction time t on_min The settings.

[0094] Preferably, in some embodiments, the control circuit includes a transformer, a primary-side switching transistor, a clamping capacitor, and a secondary-side synchronous rectifier transistor; and,

[0095] The damping branch, whose total equivalent damping resistance is configured to make the circuit overdamped during the power transmission phase;

[0096] The synchronous rectification driver chip is used to sample the drain-source voltage of the synchronous rectifier tube and output a drive signal.

[0097] Furthermore, in some embodiments, the synchronous rectification driver chip is configured with the following parameters via an external resistor:

[0098] Through the first configuration resistor R on_min Set a minimum on-time to avoid the rapid current drop slope under underdamped or critically damped conditions;

[0099] Through the second configuration resistor R CS A bias is introduced into the voltage sampling path to achieve dynamic compensation of the turn-off threshold.

[0100] In one embodiment, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the computer program, implements:

[0101] Step 1: Construct a current characteristic model of the dual-clamp converter in the power transmission stage to obtain equivalent parameters reflecting the primary side resonance characteristics, including at least equivalent inductance parameters and capacitance parameters.

[0102] Step 2: Configure the loop damping characteristics of the converter according to the equivalent parameters so that the dual-clamp converter operates in an overdamped state during the power transmission stage.

[0103] Step 3: Set the minimum on-time limit of the synchronous rectification drive circuit to avoid inductive voltage interference caused by the rapid drop in secondary current;

[0104] Step 4: Calculate and set the turn-off threshold compensation voltage to compensate for the inductive voltage component generated by the parasitic inductance of the synchronous rectifier tube package, so as to achieve precise turn-off control of the synchronous rectifier tube.

[0105] For specific limitations on each step, please refer to the limitations on the control method of the synchronous rectifier tube of the dual-clamp converter mentioned above, which will not be repeated here.

[0106] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, the computer program being implemented when executed by a processor:

[0107] Step 1: Construct a current characteristic model of the dual-clamp converter in the power transmission stage to obtain equivalent parameters reflecting the primary side resonance characteristics, including at least equivalent inductance parameters and capacitance parameters.

[0108] Step 2: Configure the loop damping characteristics of the converter according to the equivalent parameters so that the dual-clamp converter operates in an overdamped state during the power transmission stage.

[0109] Step 3: Set the minimum on-time limit of the synchronous rectification drive circuit to avoid inductive voltage interference caused by the rapid drop in secondary current;

[0110] Step 4: Calculate and set the turn-off threshold compensation voltage to compensate for the inductive voltage component generated by the parasitic inductance of the synchronous rectifier tube package, so as to achieve precise turn-off control of the synchronous rectifier tube.

[0111] For specific limitations on each step, please refer to the limitations on the control method of the synchronous rectifier tube of the dual-clamp converter mentioned above, which will not be repeated here.

[0112] As a specific example, in one embodiment, the present invention will be further described and verified in conjunction with the accompanying drawings.

[0113] Figure 3 This is the equivalent circuit of a dual-clamp converter in the power transfer stage, where the first primary-side switch S... P2 Second primary-side switch S P3 and secondary side synchronous rectifier S R1 On, R in the diagram onP2 and R onP3 S P2 and S P3 The on-resistance, R Tp and R Ts These are the equivalent resistances of the primary and secondary windings of the transformer, R. d It is related to the clamping capacitor C L Series damping resistor, R onSR1 For S R1 The on-resistance, L S For S R1 The encapsulation parasitics, the turns ratio of the primary and secondary windings of the transformer is N p :N s =n:1, where N p and N s These represent the number of turns in the primary and secondary windings, respectively.

[0114] Figure 4 (a) in the middle is Figure 3 A simplified model of the equivalent circuit, where L r_tot Let be the total equivalent resonant inductance, and we have:

[0115] (1)

[0116] R d_tot Let be the total equivalent damping resistance, and we have:

[0117] (2)

[0118] L r_tot And excitation inductance L m The initial value of during the power transfer phase is i. peak , and i peak ≈V in ·(t1-t0) / L m Clamping capacitor C L DC voltage component V CL_DC =n·V o .

[0119] For direct current, there is R d_tot < <s·L m (Insensitivity), while L r_tot < <L m , can be obtained Figure 4 The DC equivalent circuit of the simplified model in (a) is as follows: Figure 4 As shown in (b) above. According to Figure 4 In (b), the excitation inductor current i during the power transfer phase. Lm The following relationship must be satisfied:

[0120] (3)

[0121] According to formula (3), the DC equivalent circuit of this simplified model can well represent the excitation inductor current information during the power transmission stage.

[0122] L r and C L The resonant frequency is very high. For high-frequency alternating current, the inductive reactance s·L is... m Approximate short circuit, resulting in the AC equivalent circuit as follows: Figure 4 As shown in (c), this is an RLC series circuit, and the inductor L... r_tot With initial current value i peak The damping coefficient ζ of an RLC series circuit Rd for:

[0123] (4)

[0124] ζRd When <1, the primary current i of the transformer during the power transmission stage pri_ac for:

[0125] (5)

[0126] Where f r For L r_tot and C L The resonant frequency.

[0127] ζ Rd When =1, i pri_ac for:

[0128] (6)

[0129] Where λ1=R d_tot / 2L r_tot .

[0130] ζ Rd When >1, i pri_ac for:

[0131] (7)

[0132] Where λ2 and λ3 are respectively:

[0133] (8)

[0134] Figure 5 The primary current i is obtained from the simplified model. pri_ac With simulation results i pri_sim The comparison shows that the simplified model has good accuracy and can well represent the primary current information in the power transmission stage.

[0135] Based on the excitation inductor current and primary current information, the current i flowing through the secondary synchronous rectifier during the power transmission stage can be obtained. SR1 for:

[0136] (9)

[0137] Based on the simplified model and formulas (3) to (9), different damping coefficients ζ can be obtained. Rd time i SR1 The waveform is as follows Figure 6 As shown. According to Figure 6 In (a), during the current-decreasing phase, the underdamped state (ζ) Rd The current drop slope at ζ = 0.5 is much greater than that in the overdamped state (ζ = 0.5). Rd =1.5), and the rate of decrease varies greatly. Meanwhile, the synchronous rectifier S... R1 drain-source voltage v DSR1for:

[0138] (10)

[0139] According to formula (10), i SR1 The falling edge causes the inductive voltage L S ×(di SR1 / dt)<0, while the faster i SR1 The falling edge will cause the inductive voltage L S ×(di SR1 The amplitude of / dt) is more likely to be greater than the resistive voltage i. SR1 ×R onSR1 This leads to v DSR1 The voltage changes from negative to positive and is greater than the turn-off threshold voltage V of the synchronous rectification drive circuit. th_off This led to the premature shutdown.

[0140] like Figure 6 As shown, in the overdamped state, during the current decrease phase, i SR1 The falling edge slope is relatively fixed and close to the falling edge slope of the magnetizing inductor current on the secondary side. Therefore, the introduced inductive voltage component is relatively small and easy to compensate for.

[0141] Figure 7 The implementation steps of the proposed dual-clamp converter synchronous rectifier control method are given, specifically including:

[0142] (1) Step S101: Obtain the primary side equivalent resonant inductance L r_tot and clamping capacitor C L .

[0143] L r_tot As shown in formula (1), the equivalent leakage inductance L of the primary side of transformer T1 is included. r and secondary side synchronous rectifier S R1 The equivalent value n of the encapsulated parasitic inductance converted to the primary side 2 ·L S .

[0144] C L This is the capacitance value of the clamping capacitor.

[0145] (2) Step S102: Calculate the critical damping resistance value R d_C Design the total damping resistance R d_tot >R d_C .

[0146] Critical damping resistance value R d_C for:

[0147] (11)

[0148] Rd_tot As shown in formula (2), including the primary-side switch S P2 and S P3 On-resistance R onP2 and R onP3 The equivalent resistance R of the primary and secondary windings of the transformer Tp and R Ts Clamping capacitor C L series damping resistor R d and S R1 On-resistance R onSR1 R Tp During the input energy storage phase (t0~t1), the current flowing through the magnetizing inductor, R Ts and R onSR1 During the power transmission phase (t1~t2), the current flowing through the magnetizing inductor should be minimized during design to reduce the converter's conduction losses and improve efficiency. R d_tot Mainly composed of R onP2 R onP3 and R d The size is determined by.

[0149] By selecting a suitable MOSFET as the primary-side switch S P2 and S P3 and R d The resistance value makes R d_tot >R d_C This allows the converter to operate in an overdamped state during the power transfer phase. Generally, R is required. d_tot ≥1.2R d_C You can choose R d_tot =1.2~1.6R d_C .

[0150] (3) Step S103: Calculate the critical damping rise time t r_C Design the minimum on-time t of the synchronous rectification drive circuit. on_min >t r_C .

[0151] according to Figure 6 As shown in (b), in the initial stage of the current decrease, i SR1 The falling edge slope will be relatively fast. This segment has a relatively large inductive voltage component introduced by package parasitic inductance, which may also cause premature turn-off. The design incorporates minimum on-time control, within the minimum on-time t... on_min Even within a time period, v DSR1 The voltage changes from negative to positive and exceeds the turn-off threshold voltage V. th_off It will not shut down S R1 .

[0152] Critical damping rise time t r_C for:

[0153] (12)

[0154] Design a synchronous rectification drive circuit with a minimum on-time t. on_min >t r_C Generally, t is required. on_min ≥1.5t r_C You can select t on_min =1.5~3t r_C .

[0155] (4) Step S104: Obtain the rated output voltage V oN Transformer turns ratio n and magnetizing inductance L m .

[0156] During the power transfer phase, the slope of the decreasing current in the magnetizing inductor on the secondary side is:

[0157] (13)

[0158] At rated output V oN When, it is (-n) 2 ·V oN ) / L m .

[0159] (5) Step S105: Calculate the turn-off compensation voltage V th_VoN Design the turn-off threshold voltage V th_off =V th_VoN .

[0160] according to Figure 6 As shown in (b), in the middle and later stages of the current decrease, i SR1 The falling edge slope is close to the falling edge slope of the magnetizing inductor current on the secondary side (-n). 2 ·V oN ) / L m The slope in S R1 Encapsulated parasitic sense L S The inductive voltage component v generated on DSR1_L for:

[0161] (14)

[0162] That is, the compensation voltage V th_VoN =v DSR1_L =(L S ·n 2 ·V o ) / L m Set the shutdown threshold voltage V. th_off =V th_VoN .

[0163] Figure 8 A specific implementation circuit of the proposed control method is given. Specifically, the synchronous rectification driver chip is ON Semiconductor's NCP43080, and the chip's GND pin is connected to the synchronous rectifier transistor S. R1 The source (also the secondary output ground SG) is connected, and the drive output pin DRV is connected to the synchronous rectifier S. R1 The gate, CS pin series resistor R CS To synchronous rectifier tube S R1 The drain of the MIN_TON pin is connected to a resistor R. on_min Connect capacitor C1 to SG and VCC pins. VCC can be connected to the converter output V. o Powering the NCP43080, the MIN_TOFF, LLD, and NC pins are left floating (the chip's GND pin is connected to the secondary-side synchronous rectifier S). R1 The source, i.e., the secondary output ground SG, is connected, and the drive output pin DRV is connected to the secondary synchronous rectifier S. R1 The gate, CS pin series resistor R CS Rear connection to secondary synchronous rectifier tube S R1 The drain of the MIN_TON pin is connected to resistor R. on_min Connected to SG, the VCC pin is connected to SG via capacitor C1, and simultaneously connected to the converter output V. o (MIN_TOFF, LLD, and NC pins are left floating).

[0164] Based on the NCP43080 chip, the minimum on-time t on_min =100pF×R on_min According to t on_min Demand, R on_min It can be set to t on_min / 100pF, which is 1.5t r_C / 100pF~3t r_C / 100pF.

[0165] According to the NCP43080 chip, the turn-off threshold voltage is V. th_off =V th_off0 -R CS ·i CS , where i CS <0, typical value is 100μA, V th_off0 This is the default turn-off threshold voltage, typically -0.5mV. Let V... th_off =V th_VoN R can be obtained CS =(V th_off0 -V th_VoN ) / i CS .

[0166] It should be noted that, Figure 8 This only provides one specific implementation circuit. Other synchronous rectification driver chips can also be used, and the minimum on-time and turn-off threshold compensation voltage can be designed similarly.

[0167] Figure 9 The operating waveforms using the proposed control method are presented. For example... Figure 9 As shown in (a), in the underdamped state, because the slope of the current drop edge is very fast for a long time during the current drop phase, even if the voltage is designed to compensate for the slope of the magnetizing inductor current on the secondary side, the problem of premature turn-off will still occur.

[0168] like Figure 9 As shown in (b), by using overdamped design, minimum conduction time design, and compensation voltage design, the problem of premature turn-off can be effectively avoided, the conduction loss of synchronous rectifier tubes can be reduced, and the converter efficiency can be improved.

[0169] In summary, this invention can effectively suppress inductive voltage component interference caused by package parasitic inductance, avoid premature turn-off of synchronous rectifier tubes, reduce conduction losses, and improve converter efficiency and output voltage control accuracy. It also has the advantages of simple parameter adjustment and strong versatility.

[0170] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of the invention. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present invention without departing from its spirit and scope should be included within the protection scope of the present invention.

Claims

1. A method for controlling the synchronous rectifier diodes of a dual-clamp converter, characterized in that, The method includes: Step 1: Construct a current characteristic model of the dual-clamp converter in the power transmission stage to obtain equivalent parameters reflecting the primary side resonance characteristics, including at least equivalent inductance parameters and capacitance parameters. Step 2: Configure the loop damping characteristics of the converter according to the equivalent parameters so that the dual-clamp converter operates in an overdamped state during the power transmission stage. Step 3: Set the minimum on-time limit of the synchronous rectification drive circuit to avoid inductive voltage interference caused by the rapid drop in secondary current; Step 4: Calculate and set the turn-off threshold compensation voltage to compensate for the inductive voltage component generated by the parasitic inductance of the synchronous rectifier tube package, so as to achieve precise turn-off control of the synchronous rectifier tube.

2. The method for controlling the synchronous rectifier diode of a dual-clamp converter according to claim 1, characterized in that, Step 1 involves constructing the current characteristic model, specifically including: Obtain the primary side total equivalent resonant inductance L r_tot It includes the equivalent leakage inductance L on the primary side of transformer T1. r and secondary-side synchronous rectifier S R1 The equivalent value n of the encapsulated parasitic inductance converted to the primary side 2 ·L S , is represented as: In the formula, n is the transformer turns ratio. For the secondary side synchronous rectifier tube S R1 The parasitic feeling of encapsulation; Obtain the clamping capacitor C L The capacitance value.

3. The method for controlling the synchronous rectifier diode of a dual-clamp converter according to claim 1, characterized in that, Step 2 involves configuring the converter's loop damping characteristics, specifically including: Determine the critical damping resistance value R d_C The calculation formula is: Configure the total equivalent damping resistance R d_tot Make it satisfy R d_tot >R d_C .

4. The method for controlling the synchronous rectifier diode of a dual-clamp converter according to claim 3, characterized in that, The adjustment of the total equivalent damping resistance is achieved by at least one of the following means: Select the primary-side second switch S with a specific target on-resistance. P2 and the third switch S P3 ; A damping resistor R is connected in series in the clamping capacitor branch. d And adjust its resistance value.

5. The method for controlling the synchronous rectifier diode of a dual-clamp converter according to claim 4, characterized in that, The total equivalent damping resistance R d_tot Including: with clamping capacitor C L series damping resistor R d On-resistance of the first primary-side switch and the second primary-side switch The equivalent resistance of the primary and secondary windings of the transformer , and secondary-side synchronous rectifier S R1 On resistance , is represented as: 。 6. The method for controlling the synchronous rectifier diode of a dual-clamp converter according to claim 1, characterized in that, Step 3 sets the minimum on-time limit for the synchronous rectification drive circuit, specifically including: The critical damping rise time t is calculated based on the current characteristic model. r_C The calculation formula is: Set the minimum on-time t of the synchronous rectification drive circuit on_min And satisfy t on_min >t r_C .

7. The method for controlling the synchronous rectifier diode of a dual-clamp converter according to claim 1, characterized in that, Step 4 involves calculating and setting the turn-off threshold compensation voltage, specifically including: Obtain the rated output voltage V oN Transformer turns ratio n and magnetizing inductance L m ; Calculate the package parasitic inductance L based on the decreasing slope of the magnetizing inductor current on the secondary side. S The generated inductive voltage component That is, the turn-off compensation voltage V th_VoN ; The turn-off threshold voltage V of the synchronous rectifier diode th_off Set to: V th_off equals V th_VoN .

8. The method for controlling the synchronous rectifier diode of a dual-clamp converter according to claim 7, characterized in that, The turn-off compensation voltage V th_VoN The calculation formula is: in, The current i flowing through the secondary-side synchronous rectifier during the power transmission stage SR1 The falling edge slope of the secondary synchronous rectifier tube S R1 Encapsulated parasitic sense L S The inductive voltage component generated on it.

9. A synchronous rectifier control circuit for a dual-clamp converter, characterized in that, The control circuit includes a synchronous rectification driver chip, which samples the drain-source voltage of the synchronous rectifier tube and outputs a drive signal; the synchronous rectification driver chip implements the method of any one of claims 1 to 8 through the configuration of peripheral circuit parameters.

10. The synchronous rectifier control circuit for the dual-clamp converter according to claim 9, characterized in that, The pin for drain-source sampling of the synchronous rectification driver chip is connected to the drain of the synchronous rectifier tube through a resistor compensation network. The synchronous rectification driver chip has a pin connected to a resistor-capacitor timing network for configuring the minimum conduction time, which is used to set the conduction duration to avoid interference.

Images