Start-up control method and system for voltage conversion circuit, and power supply device

Abstract

This application provides a startup control method, system, and power supply equipment for a voltage conversion circuit, relating to the field of circuit control technology. The method includes: acquiring a loop enable signal and power supply status information from the previous control cycle; when the loop enable signal is valid, determining whether the current bus energy meets the fast / slow start requirements based on the power supply status information or the detected bus voltage; if the current bus energy meets the fast / slow start requirements, controlling the voltage conversion circuit to start fast / slowly; if the current bus energy does not meet the fast / slow start requirements, controlling the voltage conversion circuit to start slowly. This application resolves the contradiction between the need for rapid switching response between mains power and battery power and preventing overcurrent protection triggered by bus capacitor surges, thus improving the reliability and stability of UPS system control.

Description

Technical Field

[0001] This application relates to the field of circuit control technology, and in particular to a start-up control method, system and power supply equipment for a voltage conversion circuit. Background Technology

[0002] One of the core functions of an Uninterruptible Power Supply (UPS) is to charge and discharge batteries, a function performed by a DC / DC module. A DC / DC module is a voltage conversion circuit (such as an LLC converter). When the mains power is normal, the AC power is rectified and power factor corrected (PFC) by the AC / DC module, converting it into high-voltage DC power. This high-voltage DC power is then transmitted to the DC / AC module via the high-voltage DC bus for inversion, outputting stable AC power. Simultaneously, the power from the high-voltage DC bus is stepped down by the voltage conversion circuit to charge the battery. When the mains power is interrupted, the battery output voltage is boosted to a suitable high-voltage DC power by the voltage conversion circuit and transmitted to the bus to stabilize the bus voltage, continuing to provide a stable voltage to downstream loads.

[0003] In related technologies, due to the large number of drive pins in a UPS, two Digital Signal Processors (DSPs) are typically used for system control. The main DSP is responsible for controlling the main power topology of the UPS (such as PFC topology and inverter topology), while the secondary DSP is mainly responsible for the charging and discharging control of the voltage conversion circuit and follows the control commands of the main DSP. When switching between mains power and battery power is required, the main DSP generates a corresponding Boost loop enable signal and sends it to the secondary DSP through input / output (IN / OUT, IO) pins. After receiving the Boost loop enable signal, the secondary DSP controls the voltage conversion circuit to start working.

[0004] However, when the bus capacitor is at zero or very low voltage, a rapid start of the voltage conversion circuit can easily trigger overcurrent protection, leading to damage to the bus capacitor or even equipment shutdown. Therefore, slow start control of the voltage conversion circuit is necessary. However, if the voltage conversion circuit is controlled to start slowly during the switching process between mains power and battery power, it may cause the bus capacitor voltage to drop, resulting in a power outage. Therefore, to ensure uninterrupted power supply, the switching time between mains power and battery power needs to be controlled to 0ms, that is, the voltage conversion circuit needs to start quickly to achieve uninterrupted switching and rapid power supply connection. Therefore, there is a contradiction between the slow start of the voltage conversion circuit and the rapid switching response of the UPS to ensure continuous and stable power supply, resulting in insufficient UPS power supply stability and low reliability. Summary of the Invention

[0005] This application provides a startup control method, system, and power supply equipment for a voltage conversion circuit, in order to solve the problem in the prior art that there is a contradiction between the slow startup of the voltage conversion circuit and the fast switching response of the UPS to ensure continuous and stable power supply, resulting in insufficient UPS power supply stability and low reliability.

[0006] In a first aspect, embodiments of this application provide a startup control method for a voltage conversion circuit, comprising: Acquire the loop enable signal and the power supply status information of the previous control cycle; When the loop enable signal is valid, determine whether the current bus energy meets the fast start-up requirements based on the power supply status information or the detected bus voltage. If it is determined that the current bus energy meets the fast / slow start requirements, then the voltage conversion circuit is controlled to start fast / slowly. If it is determined that the current bus energy does not meet the requirements for fast start-up, then the voltage conversion circuit is controlled to start slowly.

[0007] In one possible implementation, the voltage conversion circuit is located in the battery-powered branch of the uninterruptible power supply system; The step of determining whether the current bus energy meets the fast / slow start requirements based on the energy supply status information includes: If the power supply status information indicates PFC power supply status, then it is determined that the current bus energy meets the fast / slow start requirements. If the power supply status information indicates a combined power supply status, and the duration of the combined power supply status is less than a first preset duration, then it is determined that the current bus power meets the fast and slow start requirements. The PFC power supply state refers to the state in which the mains power supplies the bus through the PFC circuit; the combined power supply state refers to the state in which the mains power and the battery jointly supply the bus.

[0008] In one possible implementation, the voltage conversion circuit is an LLC converter, and the LLC converter is located in the rectifier module of the uninterruptible power supply system. The step of determining whether the current bus energy meets the fast / slow start requirements based on the energy supply status information includes: If the power supply status information indicates the battery power supply status, then it is determined that the current bus power meets the fast / slow start requirements.

[0009] In one possible implementation, determining whether the current bus energy meets the fast / slow start requirements based on the detected bus voltage includes: Determine whether the bus voltage is greater than or equal to a preset voltage threshold; If the bus voltage is greater than or equal to the preset voltage threshold, then the current bus energy is determined to meet the fast / slow start requirements.

[0010] In one possible implementation, if the current bus energy meets the fast / slow start requirement based on the bus voltage, then before controlling the fast / slow start of the voltage conversion circuit, the method further includes: Determine if the current slow start flag is invalid; If the current slow start flag is invalid, then control the voltage conversion circuit to start fast or slow. If the current slow start flag is valid, then control the voltage conversion circuit to start slowly. The slow start flag is used to indicate whether the voltage conversion circuit is in the slow start process. When the slow start flag is valid, it indicates that the voltage conversion circuit is in the slow start process; when the slow start flag is invalid, it indicates that the voltage conversion circuit is not in the slow start process.

[0011] In one possible implementation, controlling the fast / slow start of the voltage conversion circuit includes: According to the preset first slow-start step size, the bus voltage setpoint in the control loop of the voltage conversion circuit is gradually increased to the target voltage value, so that the bus voltage slowly starts to the target voltage value; The method further includes: When controlling the voltage conversion circuit to start up quickly or slowly, the fast start flag is set to valid and the slow start flag is set to invalid. Record the duration of the fast start-up process. When the duration of the fast start-up process is greater than or equal to the second preset duration, set the fast start-up flag to invalid. The fast-start flag is used to indicate whether the voltage conversion circuit is in the fast-start process. When the fast-start flag is valid, it indicates that the voltage conversion circuit is in the fast-start process; when the fast-start flag is invalid, it indicates that the voltage conversion circuit is not in the fast-start process.

[0012] In one possible implementation, controlling the slow start-up of the voltage conversion circuit includes: According to a preset second slow-start step size, the bus voltage setpoint in the control loop of the voltage conversion circuit is gradually increased to the target voltage value, so that the bus voltage slowly starts to the target voltage value; wherein, the first slow-start step size is larger than the second slow-start step size; The method further includes: when controlling the voltage conversion circuit to start slowly, setting the fast start flag bit to invalid and the slow start flag bit to valid.

[0013] In one possible implementation, the method further includes: during the slow start-up process of the voltage conversion circuit, when the bus voltage setpoint in the control loop of the voltage conversion circuit is greater than or equal to the target voltage value, setting the slow start-up flag bit to invalid.

[0014] Secondly, embodiments of this application provide a startup control system for a voltage conversion circuit, comprising: a voltage conversion circuit, a main DSP, and a secondary DSP; the voltage conversion circuit is connected to the DC bus in an uninterruptible power supply system; the main DSP is connected to a rectifier module and an inverter module in the uninterruptible power supply system, and is used to generate a corresponding loop enable signal based on the power supply status information of the input switching state machine, and send the loop enable signal to the secondary DSP through an IO interface, and send the power supply status information of the input switching state machine of the previous control cycle to the secondary DSP through an SCI interface; the secondary DSP is connected to the voltage conversion circuit and the main DSP, and is used to execute the startup control method of the voltage conversion circuit according to any one of the first aspects above.

[0015] Thirdly, embodiments of this application provide a power supply device including a start-up control system for the voltage conversion circuit described in the second aspect above.

[0016] In this embodiment, two start-up control modes, fast start-up and slow start-up, are set, and the switching condition between slow start-up and fast start-up is determined by the power supply status or bus voltage of the previous control cycle. By acquiring the loop enable signal and the power supply status information of the previous control cycle; when the loop enable signal is valid, it indicates that the voltage conversion circuit needs to be started to ensure uninterrupted power supply. Then, based on the power supply status information or bus voltage, it is determined whether the current bus energy meets the fast start-up requirements. Since the functional status information represents the power supply mode of the UPS system (such as PFC power supply, battery power supply, combined battery and PFC power supply, etc.), and the power supply mode of the previous control cycle or the current bus voltage can determine whether the current bus has basic energy. If it has basic energy, it means that the current bus capacitor has a certain amount of power to meet the fast start-up requirements. At this time, even if the voltage changes... The rapid start-up of the switching circuit avoids overcurrent surges to circuit components (such as bus capacitors). Therefore, the voltage conversion circuit can be controlled to start up quickly and smoothly to rapidly respond to stabilize the bus voltage and achieve uninterrupted power supply. This avoids bus voltage drops caused by untimely battery power supply, achieving a balance between rapid response to power supply and short-term overcurrent surges. If the current bus does not have basic energy (bus capacitors are in a zero-voltage or low-voltage state), it means that the current bus energy does not meet the requirements for rapid start-up. In this case, rapid start-up may damage the bus capacitors due to overcurrent surges. Therefore, it is necessary to control the voltage conversion circuit to start up slowly, so that the bus capacitor voltage rises gradually, prioritizing the smooth voltage build-up of the bus. This embodiment of the application determines whether the current bus energy meets the requirements for rapid start-up by using the power supply status or bus voltage of the previous control cycle. This can cover a variety of power supply scenarios, enabling the voltage conversion circuit to reliably and efficiently establish DC bus voltage in different scenarios, improving the stability and reliability of UPS power supply.

[0017] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this specification. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of an application scenario provided by an embodiment of this application; Figure 2 This is a schematic flowchart of the start-up control method for a voltage conversion circuit provided in an embodiment of this application; Figure 3 This is a flowchart illustrating the start-up control method for a voltage conversion circuit provided in another embodiment of this application; Figure 4 This is a schematic diagram of the start-up control system of a voltage conversion circuit provided in an embodiment of this application; Figure 5 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0020] The present application will be described more clearly below with reference to specific embodiments. These embodiments will help those skilled in the art to further understand the function of the present application, but do not limit the present application in any way. It should be noted that those skilled in the art can make several modifications and improvements without departing from the concept of the present application. These all fall within the protection scope of the present application.

[0021] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.

[0022] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0023] In the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0024] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0025] Furthermore, the term "multiple" mentioned in the embodiments of this application should be interpreted as two or more.

[0026] Currently, the PFC topology, inverter topology, and voltage conversion circuit in a UPS are all controlled by a DSP. However, due to the large number of drive pins in the entire UPS, two DSPs are typically used to implement UPS system control. The main DSP controls the PFC and inverter topologies, undertaking the control of the UPS's main power topology. Input switching state machines and other core logic are implemented in the main DSP. The secondary DSP is mainly responsible for the charging and discharging control of the voltage conversion circuit, obeying the control commands of the main DSP. The two DSPs typically communicate via I / O pins to exchange emergency control signals (such as loop enable signals) and via a serial communication interface (SCI) to exchange non-emergency status information (such as input switching state machine status), using a polling method. When it is necessary to control the voltage conversion circuit to start, the corresponding DSP controls the voltage conversion circuit to start working based on the loop enable signal.

[0027] However, when the bus capacitor is at zero or very low voltage, a rapid start of the voltage conversion circuit can easily trigger overcurrent protection, leading to damage to the bus capacitor or even equipment shutdown. Therefore, slow start control of the voltage conversion circuit is necessary. However, if the voltage conversion circuit is controlled to start slowly during the switch between mains power and battery power, the bus capacitor may not charge in time, potentially causing a voltage drop in the bus and resulting in a power outage. Therefore, to ensure uninterrupted power supply to the load, the switching time between mains power and battery power needs to be controlled to 0ms, requiring a rapid start of the voltage conversion circuit to achieve seamless switching and quick power connection. Thus, there is a contradiction between the slow start of the voltage conversion circuit and the rapid switching response of the UPS to ensure continuous and stable power supply. A rapid start is needed to connect the power supply, but overcurrent protection cannot be triggered due to a rapid start, leading to insufficient UPS power supply stability and low reliability.

[0028] To address the aforementioned technical problems, this application proposes the following technical concept: The voltage conversion circuit has two start-up control modes: fast start-up and slow start-up, and the switching condition is determined by the state of the input switching state machine or the bus voltage of the previous control cycle. Since the input switching state machine records the UPS system's power supply mode at each moment (such as PFC power supply, battery power supply, and combined battery and PFC power supply), the UPS power supply mode of the previous control cycle determines whether the current bus has basic energy, and the current bus voltage can also directly reflect whether the bus has basic energy. Therefore, it is possible to determine whether the current bus energy meets the fast and slow start requirements based on the power supply status or bus voltage of the previous control cycle. If the current bus has a certain amount of basic energy (i.e., the bus capacitor has a certain amount of electrical energy), it means that the fast and slow start requirements are met. At this time, the fast start voltage conversion circuit will not cause a large current surge to the bus capacitor. If the current bus does not have basic energy (i.e., the bus capacitor is in a state of zero voltage or very low voltage), the fast start voltage conversion circuit will cause a surge to the bus capacitor. It is necessary to control the voltage conversion circuit to start slowly, so that the bus capacitor charges slowly and prioritizes the smooth voltage build-up of the bus.

[0029] First refer to Figure 1 , Figure 1 The illustration shows an application scenario diagram provided according to an embodiment of this application, which is a UPS architecture.

[0030] like Figure 1 As shown, this UPS includes a rectifier module (PFC loop), an inverter module, and a DC / DC module. The rectifier module rectifies the AC input from the mains into DC and performs power factor correction. The DC power is transmitted to the inverter module through the high-voltage DC bus (BUS+ and BUS-), and the inverter module inverts the high-voltage DC power into AC power for output to the downstream load. Simultaneously, the high-voltage DC bus can supply power to the battery through the DC / DC module. When the mains power is interrupted, the DC / DC module needs to be activated to convert the low-voltage DC power output from the battery into high-voltage DC power, which is then transmitted to the high-voltage DC bus and inverted by the inverter module to continue supplying AC power to the load. When the mains power is normal, if the bus voltage continues to drop, the DC / DC module is activated to provide power through a combination of mains power and battery power to ensure stable bus voltage, thereby providing a stable voltage to the downstream load.

[0031] The voltage conversion circuit in this application embodiment can be a DC / DC module located in the battery-powered branch, such as an LLC converter. When switching from mains power to battery power, the method provided in this application embodiment can be used to control the voltage conversion circuit (such as the LLC converter) to start, thereby resolving the contradiction between the large current surge of the bus capacitor and the rapid switching response from mains power to battery power. In another possible case, if the PFC loop in the UPS integrates a voltage conversion circuit (such as an LLC converter), the method provided in this application embodiment can also be used to resolve the contradiction between the large current surge of the bus capacitor and the rapid switching response from battery to mains power.

[0032] It should be noted that the above application scenarios are shown only to facilitate understanding of the spirit and principles of this application, and the implementation of this application is not limited in any way. On the contrary, the implementation of this application can be applied to any applicable scenario.

[0033] It should be noted that the execution subject of the method provided in this application embodiment can be a digital signal processor or other devices with the same power supply.

[0034] Figure 2 This is a flowchart illustrating the start-up control method of a voltage conversion circuit provided in one embodiment of this application.

[0035] like Figure 2 As shown, the start-up control method for the voltage conversion circuit in this embodiment may include the following steps: Step S201: Obtain the loop enable signal and the power supply status information of the previous control cycle.

[0036] It should be noted that the voltage conversion circuit in this embodiment is a DC / DC module (such as an LLC converter) on the battery power supply branch, used to control the charging and discharging of the battery.

[0037] In this step, the DSP determines whether battery power needs to be started based on the actual operating status of the UPS and generates a loop enable signal for the voltage conversion circuit. If battery power needs to be started (for example, when the mains power is interrupted), the loop enable signal is valid; if battery power does not need to be started, the loop enable signal is invalid.

[0038] In this step, the input switching state machine in the DSP records the power supply mode of the UPS system at each moment (such as PFC power supply, battery power supply, and combined power supply of battery and PFC).

[0039] In one possible implementation, due to the large number of drive pins in the entire UPS, two digital signal processors (DSPs) are typically used to control the UPS system. (See reference...) Figure 4The main DSP controls the PFC and inverter topologies, and is responsible for controlling the main power topology of the UPS. The input switching state machine and core logic are all implemented in the main DSP. The secondary DSP is mainly responsible for the charging and discharging control of the voltage conversion circuit, and follows the control commands of the main DSP. When switching from mains power to battery is required, the main DSP sends a Boost loop enable signal to the secondary DSP through I / O pins. Simultaneously, it transmits the power supply status information recorded by the input switching state machine of the previous control cycle to the secondary DSP through the SCI interface. After receiving the Boost loop enable signal, the secondary DSP determines whether to perform a fast or slow start-up of the voltage conversion circuit based on the state of the input switching state machine of the previous control cycle.

[0040] Step S202: When the loop enable signal is valid, determine whether the current bus energy meets the fast start-up requirements based on the power supply status information or the detected bus voltage.

[0041] In this step, the prerequisite for starting the voltage conversion circuit is that the secondary DSP receives the loop enable signal sent by the primary DSP. After receiving the loop enable signal, the secondary DSP first determines whether the loop enable signal is valid. If it is valid, it proceeds to the subsequent process of determining the start-up mode based on the power supply status information and the bus voltage.

[0042] The power supply status information of the previous control cycle determines whether the current bus has basic energy. For example, if the previous control cycle was in PFC power supply status, it means that the current bus has established basic energy through the PFC loop, that is, the bus capacitor has a certain amount of electrical energy, and the fast start voltage conversion circuit will not cause an impact on the bus capacitor. If the previous control cycle was in low-energy start, it means that the current bus capacitor is in a state of zero voltage or very low voltage, and does not meet the requirements for fast start-up. It is more suitable for slow start-up to allow the bus to gradually increase voltage.

[0043] It should be noted that although the power supply status information from the previous control cycle can accurately determine whether the current fast / slow start requirement is met under most power supply conditions, the Boost loop enable signal is transmitted to the secondary DSP in real time via I / O pins, while the power supply status information from the input switching state machine is transmitted to the secondary DSP via SCI communication in a polling manner, resulting in poor timeliness. When the off state of the mains circuit breaker fluctuates in a short period of time, the state recorded by the input switching state machine will also change in a short time. The state information of the input switching state machine of the main DSP cannot be transmitted to the secondary DSP in real time via SCI. Therefore, the secondary DSP may not receive the true power supply status information from the previous control cycle in a timely manner due to the delay in state transmission. However, the Boost loop enable signal is received and responded to in real time. Therefore, the secondary DSP's determination of the voltage conversion circuit's start mode based on the power supply status information from the previous control cycle and the Boost loop enable signal can easily lead to misjudgment, causing bus voltage fluctuations (such as misjudging a scenario that should be fast / slow start as slow / slow start, resulting in a drop in bus voltage), and even triggering UPS shutdown protection issues.

[0044] For example, during battery inversion, the battery switch is closed and the mains circuit breaker is open. If the mains power is restored and then quickly interrupted, the mains circuit breaker will immediately disconnect after closing (e.g., the mains circuit breaker closing time is only 700ms, equivalent to a brief 700ms restoration of mains power followed by an interruption), and the system will re-enter battery power supply mode. The corresponding power supply state change process recorded by the input switching state machine is: battery power supply → PFC power supply (lasting 700ms) → battery power supply. Since the loop enable signal is transmitted to the secondary DSP in real time, the loop enable signal received by the secondary DSP will quickly undergo the change process of TRUE → FALSE → TRUE (i.e., valid → invalid → valid). Because the power supply state information cannot be transmitted to the secondary DSP in a timely manner... When the loop enable signal received by the secondary DSP quickly goes through the above-mentioned change process, the power supply status information received by the secondary DSP may still be stuck in the initial battery power supply state. This causes the secondary DSP to always believe that the input switching state machine is in the battery power supply state. When the loop enable signal changes to "TRUE" for the second time, since the secondary DSP has not yet received the "PFC power supply" state from the previous control cycle, the voltage conversion circuit enters a slow start-up process (theoretically, if the loop enable signal received by the secondary DSP is valid and the previous control cycle was in the PFC power supply state, the voltage conversion circuit should enter a fast start-up process). The slow start-up process takes a long time, which leads to a drop in bus voltage, output voltage clipping, and ultimately triggers the UPS shutdown protection problem.

[0045] Therefore, this step adds a condition to determine whether the fast / slow start requirement is met based on the bus voltage to cover the above operating conditions. Specifically, it determines whether the current bus energy meets the fast / slow start requirement based on the detected bus voltage. The bus voltage can be obtained in real time through a voltage sampling circuit, and its availability can be quickly determined based on this voltage.

[0046] Step S203: If it is determined that the current bus energy meets the fast / slow start requirements, then control the voltage conversion circuit to start fast / slowly.

[0047] Step S204: If it is determined that the current bus energy does not meet the fast start-up requirements, then control the voltage conversion circuit to start slowly.

[0048] In steps S203 and S204, if the current bus has a certain basic energy based on the power supply status information or bus voltage of the previous control cycle, it indicates that the conditions for fast response are met. The fast start-up of the control voltage conversion circuit will not cause an impact on the bus capacitor, thus meeting the fast start-up requirements. In this way, the control voltage conversion circuit enters the slow start-up process. If it is determined that the current bus does not have basic energy (the bus capacitor has zero voltage or low voltage), then fast start-up is not suitable. It is necessary to enter the slow start-up process to slowly raise the bus voltage and avoid large current impact damaging components such as the bus capacitor.

[0049] It should be noted that the startup time of fast start is shorter than that of slow start.

[0050] In one possible implementation, fast start-up refers to gradually raising the bus voltage to the target voltage value within a first time period, while slow start-up refers to gradually raising the bus voltage to the target voltage value within a second time period, where the first time period is shorter than the second time period.

[0051] In this embodiment, the switching condition between slow start and fast start is determined by the power supply status or bus voltage of the previous control cycle. Since the power supply mode of the previous control cycle or the current bus voltage can determine whether the current bus has basic energy, if it does, even if the voltage conversion circuit starts quickly, it will not cause overcurrent surges to circuit components (such as bus capacitors). The voltage conversion circuit can be controlled to start quickly and stably to stabilize the bus voltage and achieve uninterrupted power supply, avoiding a drop in bus voltage due to untimely battery power supply. This achieves a balance between rapid response and short-term overcurrent surges. If the current bus does not have basic energy, a rapid start may damage the bus capacitors due to overcurrent surges. Therefore, the voltage conversion circuit needs to start slowly to allow the bus capacitor voltage to rise gradually, prioritizing stable bus voltage build-up. Determining whether the current bus energy meets the fast start requirements based on the power supply status or bus voltage of the previous control cycle can cover various power supply conditions, reliably and efficiently establishing DC bus voltage in various scenarios, improving the stability and reliability of UPS power supply.

[0052] Figure 3 This is a flowchart illustrating the start-up control method of a voltage conversion circuit provided in another embodiment of this application. In this embodiment, the voltage conversion circuit is located in the battery power supply branch of the uninterruptible power supply system and is used to control the charging and discharging of the battery. This embodiment takes the switching from mains power to battery power supply as an example to describe the start-up control process of the voltage conversion circuit.

[0053] In one possible implementation, the voltage conversion circuit can be, but is not limited to, an LLC converter.

[0054] like Figure 3 As shown, after obtaining the loop enable signal, it is determined whether the loop enable signal is valid (loop enable signal = TRUE?). If so, it is determined whether the current bus energy meets the fast start-up requirements based on the power supply status information or the detected bus voltage.

[0055] In one possible implementation, determining whether the current bus energy meets the fast / slow start requirement based on the power supply status information includes: if the power supply status information indicates a PFC power supply status, then the current bus energy meets the fast / slow start requirement; if the power supply status information indicates a combined power supply status, and the duration of the combined power supply status is less than a first preset duration, then the current bus energy meets the fast / slow start requirement; wherein, the PFC power supply status indicates a state where the mains power supplies the bus through the PFC circuit; the combined power supply status indicates a state where the mains power and the battery jointly supply power to the bus.

[0056] In this embodiment, there are two situations where the current bus energy meets the fast / slow start requirements based on the power supply status information of the previous control cycle. The first situation is: the power supply status information of the previous control cycle is PFC power supply (refer to...). Figure 3 The first criterion for determining whether to proceed with a fast / slow start is: if the power supply status of the previous control cycle equals PFC power supply, then the current bus has established basic energy through the PFC loop, meaning the bus capacitor has a certain amount of power, and the fast start voltage conversion circuit will not impact the bus capacitor, allowing it to enter the fast / slow start process. The second scenario is: if the power supply status information of the previous control cycle indicates joint power supply and the duration of joint power supply is less than the first preset duration (refer to...). Figure 3The second condition for determining whether to start fast or slow is: (Power supply status of the previous control cycle = Combined power supply) && (counter < first preset duration)). Combined power supply means that mains power supply alone is not enough to ensure that the bus voltage does not drop. It is necessary to supply power together with the battery to ensure the stability of the bus voltage. Therefore, in order to ensure that the bus voltage is stable in the combined power supply status of the previous cycle, it is necessary to add a constraint on the duration of the combined power supply status. When the previous control cycle is combined power supply and the duration of combined power supply is less than the first preset duration (e.g., 400ms), it means that the bus voltage has been stable in the previous control cycle. At this time, the bus has a certain amount of energy and can enter the fast or slow start process.

[0057] It should be noted that the duration of the combined power supply state is recorded by a counter.

[0058] In one possible implementation, determining whether the current bus energy meets the fast / slow start requirement based on the detected bus voltage includes: determining whether the bus voltage is greater than or equal to a preset voltage threshold; if the bus voltage is greater than or equal to the preset voltage threshold (U1), then determining that the current bus energy meets the fast / slow start requirement.

[0059] In this embodiment, the bus voltage refers to the total bus voltage. The total bus voltage can be acquired by the voltage detection circuit and transmitted to the secondary DSP. When the detected total bus voltage is greater than or equal to the preset threshold, it indicates that the bus voltage is already high. There is no need to slowly increase the voltage, and the voltage conversion circuit can be quickly started for a fast response.

[0060] It should be noted that the preset voltage threshold value can be determined based on the actual debugging results. For example, if the value is 650V, the voltage conversion circuit will start quickly when the total bus voltage is greater than or equal to 650V. At this time, the input inrush current amplitude is controllable, and there will be no overcurrent protection or UPS shutdown issues.

[0061] In one possible implementation, if the current bus energy is determined to meet the fast / slow start requirement based on the bus voltage, then before controlling the voltage conversion circuit to start fast / slowly, the method further includes: determining whether the current slow / slow start flag is invalid; if the current slow / slow start flag is invalid, controlling the voltage conversion circuit to start fast / slowly; if the current slow / slow start flag is valid, controlling the voltage conversion circuit to start slowly / slowly; wherein, the slow / slow start flag is used to identify whether the voltage conversion circuit is in a slow / slow start process; when the slow / slow start flag is valid, it indicates that the voltage conversion circuit is in a slow / slow start process; when the slow / slow start flag is invalid, it indicates that the voltage conversion circuit is not in a slow / slow start process.

[0062] The third criterion for determining whether to enable fast or slow start in this embodiment is as follows: Figure 3The third judgment condition is: (total bus voltage) U1) && (slow start = FALSE).

[0063] In this embodiment, a slow start flag is added to identify the slow start process, such as... Figure 3 As shown, if the detected total bus voltage is greater than or equal to the preset voltage threshold (e.g., total bus voltage ≥ 650V) and the slow start flag is invalid (slow start = FALSE), it indicates that the voltage conversion circuit is not currently in the slow start process. In this case, fast start will not cause overcurrent impact on the bus capacitor, thus the fast start of the voltage conversion circuit can be controlled. If the total bus voltage is greater than or equal to the preset voltage threshold (e.g., total bus voltage ≥ 650V), the voltage conversion circuit will not be in the slow start process. (650V), but the slow start flag is valid, indicating that the voltage conversion circuit is currently in the slow start process (e.g., the total bus voltage slowly starts from 0V to 650V). Although the bus voltage is at a high level at this time, because the circuit is in the slow start process, if it suddenly switches to fast start, overcurrent surges may still occur, triggering overcurrent protection. Therefore, when the total bus voltage meets the preset voltage threshold but is in the slow start process, it does not enter fast start and continues to complete the start-up of the voltage conversion circuit according to the original slow start process.

[0064] In this embodiment, the stability of the slow start-up process is ensured by a slow start-up flag, and the bus voltage is used to ensure stability. The preset voltage threshold (e.g., 650V) bypasses the limitation of SCI communication delay. In scenarios where the mains circuit breaker closes and then immediately disconnects during battery inverter operation, even if the state of the main DSP's input switching state machine is not promptly transmitted to the secondary DSP via SCI, as long as the total bus voltage... With a preset voltage threshold and not in a slow start state, the secondary DSP can directly trigger a fast start, enabling the secondary DSP2 to independently and accurately determine the start level in critical switching scenarios. This ultimately solves the UPS protection problem caused by poor information interaction timeliness and ensures the stability and reliability of the switching process.

[0065] It should be noted that the reference Figure 3 The flowchart shown above defines the three conditions for determining whether to enable fast or slow start as follows: Condition 1: Power supply status of the previous control cycle = PFC power supply; Condition 2: (Power supply status of the previous control cycle = Combined power supply) && (Counter < First preset duration); Condition 3: (Total bus voltage) U1) && (slow start = FALSE); satisfying any one of these conditions will control the voltage conversion circuit to start fast or slow.

[0066] In this embodiment, by setting three fast and slow start judgment conditions, various operating conditions in actual power supply scenarios are covered. During UPS startup and normal switching between mains power and battery, the power supply status of the previous control can be used to determine whether to start fast or slow. When the mains power is briefly restored and then interrupted during battery inverter operation, the bus voltage can be used to determine whether to start fast or slow. This allows the voltage conversion circuit to achieve fast switching control under various operating conditions to ensure a balance between uninterrupted power supply and prevention of overcurrent surges, greatly improving the stability and reliability of UPS operation.

[0067] In one possible implementation, controlling the fast / slow start of the voltage conversion circuit includes: gradually increasing the bus voltage setpoint in the control loop of the voltage conversion circuit to a target voltage value according to a preset first slow start step size, so that the bus voltage slowly starts to the target voltage value.

[0068] In this embodiment, reference Figure 3 The first slow start step size = target voltage value / t1, where t1 represents the first duration required for the fast start-up process. Typically, fast start-up requires the bus voltage setpoint to rise rapidly to the target voltage value within a short time; therefore, the first duration is usually small. For example, if the first duration t1 = 4ms and the target voltage value is 700V, then the first slow start step size = 700 / 4 = 175V / ms. This means the bus voltage setpoint in the control loop increases in steps of 175V per millisecond, and it takes 4ms to rise from 0V to the target voltage value (700V).

[0069] In one possible implementation, when controlling the voltage conversion circuit to start up quickly or slowly, the quick-start flag is set to valid and the slow-start flag is set to invalid; and the duration of the quick-start process is recorded. When the duration of the quick-start process is greater than or equal to a second preset duration, the quick-start flag is set to invalid. The quick-start flag is used to identify whether the voltage conversion circuit is in a quick-start process. When the quick-start flag is valid, it indicates that the voltage conversion circuit is in a quick-start process; when the quick-start flag is invalid, it indicates that the voltage conversion circuit is not in a quick-start process.

[0070] In this embodiment, as Figure 3 As shown, the start-up state is indicated by a slow start flag and a fast start flag. When the voltage conversion circuit is controlled to start fast or slow, the fast start flag is set to valid (i.e., fast start = TRUE), and the slow start flag is set to invalid (slow start = FALSE). The start-up duration of fast or slow start is recorded by a counter (counter++). When the fast start-up process duration is greater than or equal to a second preset duration (e.g., a counter...), the start-up status is determined. At 400ms, the fast / slow start process stops and enters the final stage of "slow start to the target voltage value based on the bus voltage setpoint of the control loop" (this final stage waits for the actual bus voltage to reach the target voltage value). The fast / slow start flag is set to invalid (fast / slow start = FALSE), and the counter value is limited to the second preset duration (400ms), thus completing the fast / slow start process. If the duration of the fast / slow start process recorded by the counter is less than the second preset duration (400ms), the fast / slow start process continues until the fast / slow start duration reaches the second preset duration. The second preset duration can be equal to the first preset duration mentioned above.

[0071] In this embodiment, when the fast-start condition is met, the voltage conversion circuit is directly controlled to start up quickly and slowly, so as to achieve rapid voltage boosting of the bus voltage and timely response; and by limiting the fast-start duration, the impact of long-term rapid voltage boost can be avoided, thereby improving the reliability of the circuit.

[0072] In one possible implementation, controlling the voltage conversion circuit to start slowly includes: gradually increasing the bus voltage setpoint in the control loop of the voltage conversion circuit to a target voltage value according to a preset second slow-start step size, so that the bus voltage starts slowly to the target voltage value; wherein the first slow-start step size is greater than the second slow-start step size.

[0073] In this embodiment, reference Figure 3 The second slow-start step size = target voltage value / t2, where t2 represents the second time required for the slow-start process. Slow-start requires the bus voltage setpoint to rise slowly to the target voltage value over a relatively long period, with a small step size. Therefore, the second time size is usually larger than the first time size of the fast-start process. For example, if the second time size t2 = 5s and the target voltage value is 700V, then the second slow-start step size = 700 / 5 = 140V / s. This means the bus voltage setpoint in the control loop increases at a step size of 140V per second, taking 5 seconds to rise from 0V to the target voltage value (700V). The slow rise rate of the bus voltage setpoint significantly reduces current surges.

[0074] In one possible implementation, such as Figure 3 As shown, when controlling the voltage conversion circuit to start slowly, the fast start flag is set to invalid (fast start = FALSE), and the slow start flag is set to valid (slow start = TRUE); and the counter is reset (counter = 0). The slow start flag and fast start flag indicate that the current voltage conversion circuit is in a slow start state. Then, the final stage of "slowly starting to the target voltage value according to the bus voltage setpoint of the control loop" is entered, so that the actual bus voltage reaches the target voltage value.

[0075] In one possible implementation, the method further includes: during the slow start-up process of the voltage conversion circuit, when the bus voltage setpoint in the control loop of the voltage conversion circuit is greater than or equal to the target voltage value, setting the slow start-up flag bit to invalid.

[0076] In this embodiment, reference Figure 3 By comparing the bus voltage setpoint and the target voltage value, it is determined whether the slow start process is complete. When the bus voltage setpoint in the control loop is greater than or equal to the target voltage setpoint, it indicates that the slow start process has been completed. The slow start flag is then set to invalid (slow start = FALSE), thus exiting the slow start process. Then, the power supply status information of the previous control cycle is updated to the current power supply status, completing one slow start cycle and providing a basis for the start strategy judgment of the next control cycle.

[0077] In this embodiment, two startup modes, slow start and fast start, are configured. Slow start is suitable for scenarios where the bus has no base energy or low energy. Slow start smoothly establishes the bus voltage during the low-energy stage or the initial startup phase of the UPS, avoiding high current surges to components such as capacitors. Fast start is suitable for scenarios where the bus has a certain base energy. Fast start improves the switching response speed between mains power and battery when the bus energy is sufficient, ensuring the bus voltage does not drop and continuously providing a stable voltage to the load. Furthermore, determining whether to use fast or slow start based on the power supply status or bus voltage of the previous control cycle covers various scenarios such as PFC power supply, combined functions, and rapid disconnection after the mains circuit breaker closes. This effectively balances the startup speed and system stability requirements of the voltage conversion circuit in various scenarios, improving the reliability and stability of the UPS during startup and mains / battery switching while ensuring continuous and stable power supply.

[0078] In one possible implementation, such as Figure 3 As shown, when the loop enable signal is invalid, the bus voltage setpoint of the control loop of the voltage conversion circuit is set to 0 (loop setpoint = 0), the fast start flag is set to invalid (fast start = FALSE), the slow start flag is set to invalid (slow start = FALSE), and the counter is reset to 0. This means the voltage conversion circuit is not operating, and it ensures that the logic for starting the voltage conversion circuit next time starts is from the initial state, avoiding the influence of historical flags on the start strategy judgment of the next control cycle. Finally, the process "Power supply status information of the previous control cycle = current power supply status" is executed to update the historical state, providing a basis for the start strategy judgment of the next control cycle.

[0079] In other possible embodiments, the voltage conversion circuit is located in the rectifier module of the uninterruptible power supply system (such as integrated into the PFC loop) to rectify the mains power into high voltage DC power and transmit it to the bus. This embodiment takes the switching from battery to mains power as an example to describe the start-up control process of the voltage conversion circuit.

[0080] Specifically, the startup control method for the voltage conversion circuit provided in this embodiment may include the following steps: Step 1: Obtain the loop enable signal and the power supply status information from the previous control cycle.

[0081] Step 2: Determine if the loop enable signal is valid (loop enable signal = TRUE?); if yes, proceed to step 3; if no, proceed to step 6.

[0082] Step 3: When the power supply status information indicates the battery power supply status, or when the detected bus voltage is greater than or equal to the preset voltage threshold (U1) and the slow start flag is invalid, determine that the current bus energy meets the fast start requirement and proceed to Step 4. Otherwise, determine that the current bus energy does not meet the fast start requirement and proceed to Step 5.

[0083] In this step, the two conditions for determining whether to start quickly or slowly are OR logic: Condition 1: Power supply status in the previous control cycle = battery power supply; Condition 2: (Total bus voltage) U1) && (slow start = FALSE); satisfying any one of these conditions will control the voltage conversion circuit to start fast or slow.

[0084] Step 4: Control the voltage conversion circuit to start up quickly or slowly.

[0085] Step 5: Control the voltage conversion circuit to start slowly.

[0086] It should be noted that the process of controlling the voltage conversion circuit to start up quickly / slowly in steps four and five is different from that in steps five. Figure 3 Similar examples are shown in the embodiments, and will not be repeated here.

[0087] Step 6: Reset the slow start flag.

[0088] In this step, the bus voltage setpoint of the control loop of the voltage conversion circuit is set to 0 (loop setpoint = 0), and the fast start flag is set to invalid (fast start = FALSE), and the slow start flag is set to invalid (slow start = FALSE).

[0089] In this step, when the loop enable signal is invalid, both the slow start flag and the fast start flag are set to invalid, and the counter is reset to 0. This means the voltage conversion circuit is not working, and it ensures that the logic starts from the initial state when the voltage conversion circuit starts next time, avoiding the influence of historical flags on the start strategy judgment of the next control cycle. Finally, the process "Power supply status information of the previous control cycle = current power supply status" is executed to update the historical state and provide a basis for the start strategy judgment of the next control cycle.

[0090] It should be noted that under normal circumstances, when the bus has no energy base or low energy, the voltage conversion circuit in the rectifier module (such as LLC topology) needs to start slowly to gradually build up the bus voltage and avoid the UPS shutdown caused by a large current surge. However, when the battery switches to AC power, the voltage conversion circuit in the rectifier module needs to respond quickly to stabilize the bus voltage and prevent the bus voltage drop from causing a power outage to the load.

[0091] It is understandable that the specific implementation methods for the parts not explained in detail in steps one through five above can be found by referring to... Figure 4 The relevant descriptions in the illustrated embodiments will not be repeated here.

[0092] This embodiment provides a startup control method for the voltage conversion circuit in the rectifier module when the battery switches to mains power. It sets two startup modes: slow start and fast start. Slow start is suitable for scenarios where the bus has no base energy or low energy. Slow start smoothly establishes the bus voltage during the low-energy stage or the initial startup phase of the UPS, avoiding high current surges to components such as capacitors. Fast start is suitable for scenarios where the bus has some base energy. Fast start improves the switching response speed when the bus has sufficient energy, ensuring the bus voltage does not drop and continuously providing a stable voltage to the load. Furthermore, the power supply status or bus voltage of the previous control cycle determines whether fast or slow start is appropriate. If the previous control cycle was battery-powered, it indicates the bus has some energy, allowing for fast or slow start. When the bus voltage is greater than or equal to a preset voltage threshold and not in the slow start process, it indicates the bus has a high voltage, allowing for fast or slow start. This method balances the startup speed of the voltage conversion circuit with the system stability requirements, improving the reliability and stability of the UPS during startup and battery-to-mains switching while ensuring continuous and stable power supply.

[0093] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0094] Figure 4 This is a schematic diagram of the start-up control system of a voltage conversion circuit provided in an embodiment of this application.

[0095] like Figure 4 As shown, the system provided in this application includes: a voltage conversion circuit, a main DSP, and a secondary DSP; the voltage conversion circuit is connected to the DC bus (BUS+ and BUS-) in the uninterruptible power supply system, and the input terminal of the voltage conversion circuit is connected to the battery (BAT+ and BAT-); the main DSP is connected to the rectifier module and the inverter module in the uninterruptible power supply system, and is used to generate a corresponding loop enable signal according to the power supply status information of the input switching state machine, and send the loop enable signal to the secondary DSP through the IO interface, and send the power supply status information of the input switching state machine of the previous control cycle to the secondary DSP through the SCI interface; the secondary DSP is connected to the voltage conversion circuit and the main DSP, and is used to execute the start-up control method of the voltage conversion circuit according to the embodiments of this application.

[0096] refer to Figure 4 The main DSP controls the PFC and inverter topologies, and is responsible for controlling the main power topology of the UPS. The input switching state machine and core logic are all implemented in the main DSP. The secondary DSP is mainly responsible for the charging and discharging control of the voltage conversion circuit, and follows the control commands of the main DSP. When switching from mains power to battery is required, the main DSP sends a Boost loop enable signal to the secondary DSP through I / O pins. Simultaneously, it transmits the power supply status information recorded by the input switching state machine of the previous control cycle to the secondary DSP through the SCI interface. After receiving the Boost loop enable signal, the secondary DSP determines whether to perform a fast or slow start-up of the voltage conversion circuit based on the status of the input switching state machine or the bus voltage of the previous control cycle.

[0097] It should be noted that in practical scenarios, the execution entity of the above method can be a secondary DSP, a primary DSP, or other electronic devices with relevant power supply capabilities. Figure 4 This is merely an example to illustrate that a UPS system requires two DSPs for control, and is not a limitation.

[0098] This application embodiment also provides a power supply device, characterized in that it includes, as follows: Figure 5 The start-up control system of the voltage conversion circuit shown.

[0099] It should be noted that the detailed implementation process of the above system embodiments can be found in the relevant method embodiments section, and will not be repeated here.

[0100] Figure 5 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. For example... Figure 5As shown, the device 500 of this embodiment includes a processor 510 and a memory 520, wherein the memory 520 stores a computer program 521 that can run on the processor 510. When the processor 510 executes the computer program 521, it implements the steps in any of the above method embodiments. Alternatively, when the processor 510 executes the computer program 521, it implements the functions of each module / unit in the above device embodiments.

[0101] For example, computer program 521 may be divided into one or more modules / units, one or more of which are stored in memory 520 and executed by processor 510 to complete this application. The one or more modules / units may be a series of computer program instruction segments capable of performing a specific function, which describe the execution process of computer program 521 in device 500.

[0102] Those skilled in the art will understand that ​ This is merely an example of a device and does not constitute a limitation on the device. It may include more or fewer components than shown, or combinations of certain components, or different components, such as input / output devices, network access devices, buses, etc.

[0103] The processor 510 can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor.

[0104] The memory 520 can be an internal storage unit of the device, such as a hard disk or RAM, or an external storage device, such as a plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, etc. The memory 520 can also include both internal and external storage units. The memory 520 is used to store computer programs and other programs and data required by the device. The memory 520 can also be used to temporarily store data that has been output or will be output.

[0105] For the sake of simplicity and clarity, only the above-described functional modules / units are used as examples. In practical applications, the functions described above can be assigned to different functional modules / units as needed. These modules / units can be implemented in hardware, software, or a combination of both.

[0106] An embodiment of this application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the methods described in the above-described method embodiments.

[0107] This invention also provides a computer program product, including a computer program. When the computer program is executed by a processor, it implements the methods described in the above-described method embodiments.

[0108] Computer programs include computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. Computer-readable media can include: any entity or device capable of carrying computer program code, recording media, USB flash drives, portable hard drives, magnetic disks, optical disks, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signals, telecommunication signals, and software distribution media, etc.

[0109] In the above embodiments, the descriptions of each embodiment have their own emphasis. Parts not detailed or described in a particular embodiment can be referred to in the relevant descriptions of other embodiments. Unless otherwise specified or in conflict with logic, the terminology and / or descriptions between different embodiments are consistent and can be referenced interchangeably. Technical features in different embodiments can be combined to form new embodiments based on their inherent logical relationships.

[0110] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A start-up control method for a voltage conversion circuit, characterized in that, include: Acquire the loop enable signal and the power supply status information of the previous control cycle; When the loop enable signal is valid, determine whether the current bus energy meets the fast start-up requirements based on the power supply status information or the detected bus voltage. If it is determined that the current bus energy meets the fast / slow start requirements, then the voltage conversion circuit is controlled to start fast / slowly. If it is determined that the current bus energy does not meet the requirements for fast start-up, then the voltage conversion circuit is controlled to start slowly.

2. The start-up control method for the voltage conversion circuit according to claim 1, characterized in that, The voltage conversion circuit is located in the battery power supply branch of the uninterruptible power supply system; The step of determining whether the current bus energy meets the fast / slow start requirements based on the energy supply status information includes: If the power supply status information indicates PFC power supply status, then it is determined that the current bus energy meets the fast / slow start requirements. If the power supply status information indicates a combined power supply status, and the duration of the combined power supply status is less than a first preset duration, then it is determined that the current bus power meets the fast and slow start requirements. The PFC power supply state refers to the state in which the mains power supplies the bus through the PFC circuit; the combined power supply state refers to the state in which the mains power and the battery jointly supply the bus.

3. The start-up control method for the voltage conversion circuit according to claim 1, characterized in that, The voltage conversion circuit is an LLC converter, and the LLC converter is located in the rectifier module of the uninterruptible power supply system. The step of determining whether the current bus energy meets the fast / slow start requirements based on the energy supply status information includes: If the power supply status information indicates the battery power supply status, then it is determined that the current bus power meets the fast / slow start requirements.

4. The start-up control method for the voltage conversion circuit according to claim 1, characterized in that, The step of determining whether the current bus energy meets the fast / slow start requirements based on the detected bus voltage includes: Determine whether the bus voltage is greater than or equal to a preset voltage threshold; If the bus voltage is greater than or equal to the preset voltage threshold, then the current bus energy is determined to meet the fast / slow start requirements.

5. The start-up control method for the voltage conversion circuit according to claim 4, characterized in that, If the current bus energy meets the fast / slow start requirement based on the bus voltage, then before controlling the fast / slow start of the voltage conversion circuit, the method further includes: Determine if the current slow start flag is invalid; If the current slow start flag is invalid, then control the voltage conversion circuit to start fast or slow. If the current slow start flag is valid, then control the voltage conversion circuit to start slowly. The slow start flag is used to indicate whether the voltage conversion circuit is in the slow start process. When the slow start flag is valid, it indicates that the voltage conversion circuit is in the slow start process; when the slow start flag is invalid, it indicates that the voltage conversion circuit is not in the slow start process.

6. The start-up control method for the voltage conversion circuit according to claim 1, characterized in that, The control of the voltage conversion circuit for fast or slow start includes: According to the preset first slow-start step size, the bus voltage setpoint in the control loop of the voltage conversion circuit is gradually increased to the target voltage value, so that the bus voltage slowly starts to the target voltage value; The method further includes: When controlling the voltage conversion circuit to start up quickly or slowly, the fast start flag is set to valid and the slow start flag is set to invalid. Record the duration of the fast start-up process. When the duration of the fast start-up process is greater than or equal to the second preset duration, set the fast start-up flag to invalid. The fast-start flag is used to indicate whether the voltage conversion circuit is in the fast-start process. When the fast-start flag is valid, it indicates that the voltage conversion circuit is in the fast-start process; when the fast-start flag is invalid, it indicates that the voltage conversion circuit is not in the fast-start process.

7. The start-up control method for the voltage conversion circuit according to claim 6, characterized in that, The control of the voltage conversion circuit to start slowly includes: According to a preset second slow-start step size, the bus voltage setpoint in the control loop of the voltage conversion circuit is gradually increased to the target voltage value, so that the bus voltage slowly starts to the target voltage value; wherein, the first slow-start step size is larger than the second slow-start step size; The method further includes: When controlling the voltage conversion circuit to start slowly, the fast start flag is set to invalid and the slow start flag is set to valid.

8. The start-up control method for the voltage conversion circuit according to any one of claims 1 to 7, characterized in that, Also includes: During the slow start-up process of the voltage conversion circuit, when the bus voltage setpoint in the control loop of the voltage conversion circuit is greater than or equal to the target voltage value, the slow start-up flag is set to invalid.

9. A start-up control system for a voltage conversion circuit, characterized in that, include: Voltage conversion circuit, main DSP and sub-DSP; The voltage conversion circuit is connected to the DC bus of the uninterruptible power supply system; The main DSP is connected to the rectifier module and inverter module in the uninterruptible power supply system. It is used to generate a corresponding loop enable signal based on the power supply status information of the input switching state machine, and send the loop enable signal to the secondary DSP through the IO interface, and send the power supply status information of the input switching state machine of the previous control cycle to the secondary DSP through the SCI interface. The secondary DSP is connected to the voltage conversion circuit and the main DSP, and is used to execute the start-up control method of the voltage conversion circuit according to any one of claims 1 to 8.

10. A power supply device, characterized in that, include: The start-up control system for the voltage conversion circuit as described in claim 9.

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