Multilayer electronic component and method for manufacturing the same

Abstract

The present application provides a laminated electronic component in which not only the withstand voltage as a laminated electronic component is improved, but also the insulation resistance between each internal electrode in the inside of the element main body is also uniformly high. The outer packaging region (15) is a laminated electronic component continuously having, in the stacking direction, a first outer packaging region (15a) containing more RB than RA, which is different from RA, and a second outer packaging region (15b) containing more RA than the first outer packaging region. In the inner packaging region (13), the concentration of RA contained in the inner dielectric layer is higher than the concentration of RA in the first outer packaging region, the second outer packaging region is adjacent to the inner packaging region in the stacking direction, and the thickness of the second outer packaging region is 2 to 50 μm.

Description

Technical Field

[0001] This invention relates to a laminated electronic component, such as a laminated ceramic capacitor, and a method for manufacturing the same. Background Technology

[0002] For example, the following patent document 1 has been developed. According to the laminated electronic components described in this document, it has been confirmed that it is possible to simultaneously improve moisture resistance and reduce the generation of cracks when high voltage is applied.

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 2024-76784 Summary of the Invention

[0006] The technical problem that the invention aims to solve

[0007] In view of the actual situation, the present invention aims to provide a laminated electronic component that not only improves the voltage withstand capability as a laminated electronic component, but also has a uniformly high insulation resistance between the internal electrodes inside the component body.

[0008] Means for solving technical problems

[0009] To achieve the above objectives, one embodiment of the present invention relates to a stacked electronic component having:

[0010] The component body has an inner mounting region with alternating layers of inner dielectric layers and inner electrode layers; and an outer mounting region located outside the stacking direction of the inner mounting region; and

[0011] A pair of external electrodes are connected to the internal electrode layer on the surface of the component body.

[0012] The outer casing region has the following characteristics continuously in the stacking direction:

[0013] The first outer casing area includes a second rare earth element that is different from the first rare earth element; and

[0014] The second outer casing region contains more of the first rare earth elements than the first outer casing region.

[0015] In the internal region, the concentration of the first rare earth element in the inner dielectric layer is higher than the concentration of the first rare earth element in the first external region.

[0016] The second outer casing area and the inner casing area are adjacent in the stacking direction.

[0017] The thickness of the second outer casing area is 2–50 μm.

[0018] According to the stacked electronic component, the outer casing region continuously comprises, in the stacking direction: a first outer casing region containing more second rare earth elements different from the first rare earth element than the first rare earth element; and a second outer casing region containing more first rare earth elements than the first outer casing region. Furthermore, the second outer casing region is adjacent to the inner casing region in the stacking direction.

[0019] The second outer casing region prevents the diffusion of the second rare earth elements, such as Y, contained in a large quantity in the first outer casing region into the inner casing region. Therefore, the concentration of the first rare earth elements near the boundary between the second outer casing region and the inner casing region can be maintained at substantially the same level as the concentration of the first rare earth elements in the inner dielectric layer of the inner casing region.

[0020] As a result, the insulation resistance of the inner dielectric layer at the end of the stacking direction in the inner region (inner IR at the outermost stacked end) is the same as that of the inner dielectric layer near the center of the stacking direction in the inner region. Therefore, it is possible to provide a stacked electronic component that not only improves the voltage withstand capability as a stacked electronic component, but also has a uniformly high insulation resistance between the internal electrodes inside the component body.

[0021] Alternatively, the interior areas may have continuous features in the stacking direction:

[0022] The concentration of the second rare earth element in the inner dielectric layer is uniformly lower along the stacking direction than the concentration of the second rare earth element in the second outer packaging region in the first inner packaging region; and

[0023] The concentration of the second rare earth element contained in the inner dielectric layer of the second inner packaging region gradually increases towards the outer packaging region compared to the concentration of the second rare earth element contained in the inner dielectric layer of the first inner packaging region.

[0024] Preferably, the second outer casing area and the second inner casing area are adjacent in the stacking direction.

[0025] The concentration of the second rare earth element contained in the inner dielectric layer of the second inner packaging region is lower than the concentration of the second rare earth element contained in the second outer packaging region.

[0026] Preferably, the concentration of the second rare earth element in the first outer packaging region is higher than the concentration of the second rare earth element in the second outer packaging region. Alternatively, the concentration of the first rare earth element in the second inner packaging region may be lower than the concentration of the first rare earth element in the first inner packaging region.

[0027] For example, the boundary between the first outer casing region and the second outer casing region is defined as the position of the concentration of the first rare earth element along the stacking direction of the outer casing region, which is an average value of the peak intensity corresponding to the concentration of the first rare earth element in the inner dielectric layer near the center of the stacking direction of the component body in the inner casing region and the peak intensity corresponding to the concentration of the first rare earth element near the end of the stacking direction in the outer casing region.

[0028] Preferably, the first rare earth element is selected from at least one of Dy, Yb, Ho, Tb, Gd, and Eu, and the second rare earth element is Y.

[0029] One aspect of the present invention relates to a method for manufacturing a stacked electronic component, comprising a step of forming a component body having: an inner mounting region having an inner dielectric layer and an inner electrode layer alternately stacked, and an outer mounting region located on the outer side of the stacking direction of the inner mounting region.

[0030] The outer casing region is formed by continuously stacking a first outer casing green sheet and a second outer casing green sheet in the stacking direction and then firing them.

[0031] The first outer casing corresponds to a first outer casing region containing more second rare earth elements different from the first rare earth element than the first rare earth element.

[0032] The second outer casing corresponds to a second outer casing region containing more of the first rare earth element than the first outer casing region.

[0033] The inner packaging region is formed by stacking an inner packaging green sheet containing more of the first rare earth element than the first outer packaging green sheet together with an electrode paste film for the inner electrode layer, and then firing it together with the first and second outer packaging green sheets.

[0034] According to the manufacturing method of this stacked electronic component, the stacked electronic component involved in one aspect of the present invention described above can be manufactured extremely easily.

[0035] Preferably, the thickness of the single or multiple sheets constituting the second outer green sheet is 0.5 to 5 times the thickness of the single or multiple sheets constituting the inner green sheet located between adjacent electrode paste films. Attached Figure Description

[0036] Figure 1A This is a rough cross-sectional view of a multilayer ceramic capacitor.

[0037] Figure 1B It is along Figure 1A A rough cross-sectional view of a multilayer ceramic capacitor with IB-IB lines.

[0038] Figure 2A This is a mapped image of Dy from the embodiment.

[0039] Figure 2B It means Figure 2A A graph showing the changes in Dy content.

[0040] Figure 3A This is a mapping image of Y in the embodiment.

[0041] Figure 3B It means Figure 3A A graph showing the changes in the content of Y.

[0042] Explanation of reference numerals in the attached figures:

[0043] 2…Laminated ceramic capacitors

[0044] 4…Component Body

[0045] 13…Interior area

[0046] 10…Inner dielectric layer

[0047] 12…Inner Electrode Layer

[0048] 13a…First Interior Area

[0049] 13b…Second Interior Area

[0050] 15…Exterior area

[0051] 11…Outer dielectric layer

[0052] 15a…First Exterior Area

[0053] 15b…Second Exterior Area

[0054] 6…External Electrode Detailed Implementation

[0055] The implementation method will be described below.

[0056] Overall structure of multilayer ceramic capacitor

[0057] like Figure 1A as well as Figure 1B As shown, a stacked ceramic capacitor 2, which is an example of a stacked electronic component in this embodiment, has a component body 4, which has an inner region 13 and an outer region 15.

[0058] The inner region 13 has an inner dielectric layer 10 and an inner electrode layer 12 that are substantially parallel to a plane including the X and Y axes, and the inner dielectric layer 10 and the inner electrode layer 12 are alternately stacked in the Z-axis direction. The outer region 15 is located outside the stacking direction (Z-axis direction) of the inner region 13. In the inner region 13, the inner electrode layer 12 at the stacked end is located at the outer end (stacked end) in the stacking direction. In this embodiment, the surface along the outer surface of the inner electrode layer 12 at the stacked end forms the boundary between the inner region 13 and the outer region 15. In addition, the X-axis, Y-axis, and Z-axis are perpendicular to each other.

[0059] In addition, "inner side" refers to the side closer to the center of the multilayer ceramic capacitor 2, and "outer side" refers to the side further away from the center of the multilayer ceramic capacitor 2.

[0060] Furthermore, "substantially parallel" means that most of the parts are parallel, but there may also be slightly non-parallel parts. The inner dielectric layer 10 and the inner electrode layer 12 may also be slightly uneven or tilted.

[0061] like Figure 1A As shown, in this embodiment, the X-axis end face of the component body 4 is planar, and it is stacked such that the X-axis end face of the outer mounting region 15 is flush with the X-axis end face of the inner dielectric layer 10 and the X-axis end face of the inner electrode layer 12. However, the X-axis end face of the component body 4 does not necessarily need to be planar, and may have a non-planar portion. Alternatively, the X-axis end face of the inner dielectric layer 10 and the X-axis end face of the inner electrode layer 12 may not be flush; for example, a portion of the X-axis end face of the inner dielectric layer 10 may be cut off, or the inner electrode layer 12 may be stacked with a portion protruding.

[0062] The outer casing region 15 is composed of an outer dielectric layer 11. The outer casing region 15 can be a single-layer structure composed of only one outer dielectric layer 11, or it can be a stacked structure with multiple outer dielectric layers 11. In this embodiment, a stacked structure with multiple outer dielectric layers 11 is preferred.

[0063] A pair of external electrodes 6 are formed at both ends of the component body 4 along the X-axis, respectively communicating with the internal electrode layers 12 alternately arranged inside the component body 4. The shape of the component body 4 is not particularly limited, and it is typically cuboid. Furthermore, the size of the component body 4 is not particularly limited; it can be set to an appropriate size according to the application.

[0064] In this embodiment, the longitudinal dimension L0 of the component body 4 (refer to...) Figure 1A It can also be 7.5–0.4 mm. The width W0 of the component body 4 (refer to...) Figure 1BIt can also be 6.3–0.2 mm. The height H0 of the main body 4 of the component (refer to...) Figure 1B It can also be 6.3 to 0.05 mm.

[0065] For the specific dimensions of the main body 4 of component, examples of L0×W0 include (7.5±0.4)mm×(6.3±0.4)mm, (5.7±0.4)mm×(5.0±0.4)mm, (4.5±0.4)mm×(3.2±0.4)mm, (3.2±0.3)mm×(2.5±0.2)mm, (3.2±0.3)mm×(1.6±0.2)mm, (2.0±0.2)mm×(1.2±0.1)mm, (1.6±0.2)mm×(0.8±0.1)mm, (1.0±0.1)mm×(0.5±0.05)mm, (0.6±0.06)mm×(0.3±0.03)mm, and (0.4±0.04)mm×(0.2±0.02)mm. In addition, H0 is not specifically defined, for example, it can be a degree equal to or below W0.

[0066] Internal electrode layer

[0067] In this embodiment, the internal electrode layer 12 is stacked in such a way that each end of the internal electrode layer 12 is alternately exposed on the surfaces of two opposite end faces of the component body 4 in the X-axis direction.

[0068] The conductive material contained in the internal electrode layer 12 is not particularly limited. Examples of noble metals used as conductive materials include Pd, Pt, and Ag-Pd alloys. Examples of base metals used as conductive materials include Ni, Ni-based alloys, Cu, and Cu-based alloys. Furthermore, Ni, Ni-based alloys, Cu, or Cu-based alloys may contain trace amounts of P and / or S, approximately 0.1% by mass or less. The internal electrode layer 12 can also be formed using commercially available electrode paste. The thickness of the internal electrode layer 12 can be appropriately determined based on the application and other factors.

[0069] external electrodes

[0070] The conductive material contained in the external electrode 6 is not particularly limited. For example, known conductive materials such as Ni, Cu, Sn, Ag, Pd, Pt, Au or their alloys, and conductive resins can be used. The thickness of the external electrode 6 can be appropriately determined according to the application.

[0071] Dielectric layer

[0072] In this embodiment, the "inner dielectric layer 10" and the "outer dielectric layer 11" are sometimes collectively referred to as the "dielectric layer".

[0073] The thickness of each layer of the inner dielectric layer 10 (interlayer thickness) is not particularly limited and can be arbitrarily set according to desired characteristics, applications, etc. Typically, the interlayer thickness can be less than 20 μm, less than 10 μm, or less than 5 μm. In addition, the number of layers of the inner dielectric layer 10 is preferably 10 or more, for example, it can also be 50 or more, 100 or more, or 200 or more.

[0074] The thickness (interlayer thickness) of each layer of the outer dielectric layer 11 is not particularly limited; for example, it can be equal to the interlayer thickness of the inner dielectric layer 10. According to this embodiment, the multilayer ceramic capacitor 2 exhibits moisture resistance even when the thickness of the outer dielectric layer 11 is reduced, and can suppress cracking when high voltage is applied. Furthermore, the number of layers of the outer dielectric layer 11 is not particularly limited; for example, it can be 5 or more layers, or 20 or more layers.

[0075] The dielectric layer (inner dielectric layer 10 and outer dielectric layer 11) of this embodiment includes main phase particles (dielectric particles).

[0076] The main phase particles of this embodiment contain a compound having a perovskite-type crystal structure represented by ABO3 as the main component. Furthermore, the main component of the main phase particles is a component comprising 80 to 100 parts by mass relative to 100 parts by mass of the main phase particles, preferably 90 to 100 parts by mass. Additionally, the main phase particles may also contain components other than the aforementioned main component. For example, they may contain barium (Ba) compounds.

[0077] The A element in ABO3, i.e., the element at the A site, is selected from at least one of Ba, Sr (Sr), and calcium (Ca). A can also be selected from at least one of Ba and Sr. Relative to 100 moles of A, it can contain more than 80 moles of Ba, or more than 90 moles of Ba relative to 100 moles of A. A can also be only Ba.

[0078] The B element in ABO3, i.e., the element at the B site, is selected from at least one of titanium (Ti), zirconium (Zr), and hafnium (Hf). B can be selected from at least one of Ti and Zr. Relative to 100 moles of B, it can contain more than 70 moles of Ti, or more than 80 moles of Ti relative to 100 moles of B. B can also be only Ti.

[0079] A is selected from at least one of Ba, Sr, and Ca, and B is selected from at least one of Ti and Zr. If the composition of the principal components is specifically recorded, then it is {(Ba 1-x-y Ca x Sr y )O} u(Ti 1-z Zr z ) v O2.

[0080] x is preferably 0 ≤ x ≤ 0.10, more preferably 0 ≤ x ≤ 0.05. y is preferably 0 ≤ y ≤ 0.10, more preferably 0 ≤ y ≤ 0.05. z is preferably 0 ≤ z ≤ 0.30, more preferably 0 ≤ z ≤ 0.15. u / v is preferably 1.000 ≤ u / v ≤ 1.030, more preferably 1.000 ≤ u / v ≤ 1.015. When u / v is within the above range, compared to cases exceeding the above range, sintering can be sufficiently achieved, thus tending to improve the relative permittivity and reliability of the dielectric composition. When u / v is within the above range, compared to cases below the above range, sintering stability is less likely to deteriorate, leading to further improvements in the relative permittivity, reliability, and temperature characteristics of the multilayer ceramic capacitor 2.

[0081] The dielectric layer, as a secondary component, includes RE, M, and silicon (Si). In addition to the above, Fe, Al, and / or Zr may also be included as secondary components.

[0082] As mentioned above, secondary components can exist in solid solution within the main phase particles. These secondary components can form the shell of a core-shell structure by solid solution within the main phase particles, or they can be completely dissolved within the main phase particles to form fully dissolved main phase particles. Furthermore, secondary components can also form segregated particles or exist at the grain boundaries of the main phase particles.

[0083] RE is selected from at least one of ytterbium (Yb), yttrium (Y), holmium (Ho), dysprosium (Dy), terbium (Tb), gadolinium (Gd) and europium (Eu), preferably Dy, Ho, Yb and / or Y.

[0084] Dy, Tb, Gd, and Eu have relatively large ionic radii among the aforementioned rare earth elements. On the other hand, Yb, Y, and Ho have relatively small ionic radii. The larger the ionic radius of a rare earth element (RE), the more readily it tends to dissolve in the host phase particles.

[0085] Furthermore, when REs with relatively large ionic radii are dissolved in the host phase particles, they tend to primarily replace A-site elements in the host component. Conversely, when REs with relatively small ionic radii are dissolved in the host phase particles, they tend to primarily replace B-site elements in the host component.

[0086] M is selected from at least two of magnesium (Mg), manganese (Mn), vanadium (V), and chromium (Cr). M is mainly contained in the dielectric layer as an oxide of M. In addition, M sometimes substitutes for the B site element in the main component.

[0087] The composition range of the main components constituting the main phase particles of the inner dielectric layer 10 may be the same as or different from the composition range of the main components constituting the main phase particles of the outer dielectric layer 11. Furthermore, the composition range of the secondary components of the inner dielectric layer 10, excluding RE, may be the same as or different from the composition range of the secondary components of the outer dielectric layer 11, excluding RE.

[0088] like Figure 1A As shown, the distance from the outermost surface 120 of the inner electrode layer 12 to the outer surface 40 of the component body 4, i.e., the outer surface of the outer mounting region 15, is defined as Tde. Furthermore, the outer surface 40 of the component body 4 is a surface perpendicular to the stacking direction. Tde is not particularly limited, but is 10 μm or more and 500 μm or less.

[0089] In this embodiment, the outer side of the outer casing region 15 in the stacking direction is designated as the first outer casing region 15a. The range of the first outer casing region 15a is not particularly limited; for example, it can be defined as the portion of the outer casing region 15 other than the second outer casing region 15b determined by the method described later.

[0090] The region inside the stacking direction of the outer casing region 15 is designated as the second outer casing region 15b. The thickness of the second outer casing region 15b in the stacking direction is preferably 2 μm or more and 50 μm or less, more preferably 2 μm or more and 20 μm or less.

[0091] The center of the internal packaging region 13 in the stacking direction is designated as the first internal packaging region 13a, and the internal packaging region 13 located on the outer side of the first internal packaging region 13a along the stacking direction is designated as the second internal packaging region 13b. That is, the second internal packaging region 13b is a region contained within the internal packaging region 13. The range of the second internal packaging region 13b is not particularly limited, but is preferably a region from the first to the fifth layers along the Z-axis from the inner dielectric layer 10 located at the stacking end toward the center. The range of the first internal packaging region 13a is not particularly limited, and can be, for example, the portion of the internal packaging region 13 other than the second internal packaging region 13b.

[0092] Furthermore, in this embodiment, the outermost inner dielectric layer 10, i.e., the outermost (stack end) inner dielectric layer 10 in the stacking direction, is designated as the first layer, and as it moves inward in the stacking direction, it is designated as the second layer, the third layer, and so on. Therefore, the outermost inner dielectric layer 10 in the stacking direction is designated as the "first layer," and the other outermost inner dielectric layers 10 in the stacking direction are also designated as the "first layer." In addition, the first internal region 13a and the second internal region 13b are regions that also include the internal electrode layer 12.

[0093] The rare earth element with the highest molar ratio in the RE contained in the inner dielectric layer 10 of the first inner region 13a is designated as the first rare earth element RA, and the rare earth element with the highest molar ratio in the RE contained in the first outer region 15a is designated as the second rare earth element RB.

[0094] In this embodiment, RA is any one of Yb, Ho, Dy, Tb, Gd, and Eu, and RB is Y.

[0095] In the first outer packaging region 15a, the content of RA (DRAa) relative to 100 moles of the main component, converted to RA₂O₃, can also have a portion that varies along the stacking direction and a substantially constant portion (along the outer side of the stacking direction) (e.g., refer to...). Figure 2B However, in the outer portion of the stacking direction, it may be less than 1.0 molar part, more preferably less than 0.5 molar part, or substantially 0. In this embodiment, the first outer casing region 15a preferably contains more RBs different from RA than RA.

[0096] In the second outer packaging region 15b, the content of RA (DRAb) relative to 100 moles of the main component, converted from RA₂O₃, varies in a manner that decreases towards the outer side of the stacking direction (e.g., refer to...). Figure 2B The amount of RA is preferably 0.4 moles or more and 7.0 moles or less. In this embodiment, the second outer casing region 15b preferably contains more RA than the first outer casing region 15a.

[0097] In the inner dielectric layer 10 of the second inner packaging region 13b, the content of RA (DRAc) relative to 100 molar parts of the main component, converted from RA₂O₃, can vary along the stacking direction, but preferably remains substantially unchanged (e.g., refer to...). Figure 2B ( ), preferably 0.4 moles or more and 7.0 moles or less.

[0098] In the inner dielectric layer 10 of the first internal region 13a, the content of RA (DRAd) converted from RA2O3 relative to 100 molar parts of the main component can vary along the stacking direction, but preferably remains substantially unchanged (e.g., refer to...). Figure 2B ( ), preferably 4 moles or more and 7.0 moles or less.

[0099] In the first outer packaging region 15a, the content of RB (DRBa) relative to 100 moles of the main component, converted from RB₂O₃, can also have a portion that varies along the stacking direction and a portion that is approximately constant (along the outer side of the stacking direction) (e.g., refer to...). Figure 3B However, in the outer portion of the stacking direction, it is preferably 0.4 moles or more and 7.0 moles or less.

[0100] In the second outer packaging region 15b, the content of RB (DRBb) relative to 100 moles of the main component, calculated as RB₂O₃, can also vary in a manner that increases towards the outer side of the stacking direction (e.g., refer to...). Figure 3B ( ), preferably 0.4 moles or more and 7.0 moles or less.

[0101] In the inner dielectric layer 10 of the second internal region 13b, the content of RB (DRBb) relative to 100 molar parts of the main component, converted from RB₂O₃, can also vary in a manner that increases outward toward the stacking direction (e.g., refer to...). Figure 3B However, the variation is preferably very small, less than 1.0 molar parts, more preferably less than 0.5 molar parts, or it can be substantially 0.

[0102] In the inner dielectric layer 10 of the first inner packaging region 13a, the content of RB (DRBc) converted from RB2O3 relative to 100 molar parts of the main component preferably varies very little along the stacking direction (e.g., refer to...). Figure 3B The content is 1.0 moles or less, more preferably 0.5 moles or less, or it can be substantially 0.

[0103] The aforementioned DRAa, DRAb, DRAC, and DRAd satisfy the relationship DRAa < DRAb < DRAc ≤ DRAd. Furthermore, DRBa, DRBb, DRBc, and DRBd satisfy the relationship DRBa > DRBb > DRBc ≥ DRBd.

[0104] Furthermore, in this embodiment, such as Figure 2B As shown, the concentrations DAc and DRAd of the first rare earth element RA contained in the inner dielectric layer are higher than the concentration DRAab of the first rare earth element RA at the boundary between the first outer casing region 15a and the second outer casing region 15b. Furthermore, in this embodiment, the concentration of RA or RB refers to the content converted to oxides relative to 100 moles of the aforementioned main component, or... Figure 2B or Figure 3B The peak intensity shown is used for the same purpose.

[0105] Furthermore, the concentration DRAbc of the first rare earth element RA in the vicinity of the boundary between the second outer casing region 15b and the inner casing region 13 (the second inner casing region 13b) (within a range of 0.5 μm on the side of the second outer casing region near the boundary / the same applies below) is substantially the same as the concentration (DRAc and DRAd) of the first rare earth element RA in the inner dielectric layer of the inner casing region 13. Moreover, "substantially the same" means that... Figure 2B At the peak intensity shown, the range of DRAd-DRAa is set to 100%, and the difference between the two is within ±10%.

[0106] In addition, in this embodiment, such as Figure 3B As shown, the concentrations of the second rare earth element RBs DRBc and DRBd contained in the inner dielectric layer are lower than the concentration of the second rare earth element RBs DRBab at the boundary between the first outer casing region 15a and the second outer casing region 15b.

[0107] Furthermore, the concentration of the second rare earth element RB (DRBbc) near the boundary between the second outer packaging region 15b and the inner packaging region 13 (second inner packaging region 13b) is substantially close to the concentration of the first rare earth element RB (DRBc and DRBd) in the inner dielectric layer of the inner packaging region 13. Additionally, "substantially close to the same level" means that... Figure 3B At the peak intensity shown, the range of DRBa-DRBd is set to 100%, and the difference between the two is within ±10%.

[0108] Figure 2A This is a mapping image of RA(Dy) obtained by STEM-EDS for the field of view including the first outer casing region 15a, the second outer casing region 15b, the second inner casing region 13b, and the first inner casing region 13a. Additionally, Figure 2B Indicates from along Figure 2A The change in contrast intensity from point S to point E. Figure 2B In the diagram, the horizontal axis represents contrast intensity, and the vertical axis represents distance, with the unit of the vertical axis being μm. The boundary between the internal electrode layer and the outer assembly region 15 is set to 0.

[0109] Figure 3A In the context of Figure 2A Element mapping images of RB(Y) obtained by STEM-EDS in the same field of view. Figure 3B It means along from Figure 3A A graph showing the change in contrast intensity from point S to point E. Figure 3B In the diagram, the horizontal axis represents contrast intensity, and the vertical axis represents distance, with the unit of the vertical axis being μm. The boundary between the internal electrode layer and the outer assembly region 15 is set to 0.

[0110] In this embodiment, as Figure 2B and Figure 3B As shown, the concentrations of RA and RB gradually change from the first outer packaging region 15a to the second outer packaging region 15b.

[0111] In this embodiment, DRAa and DRBa can also be calculated as average values ​​obtained by analyzing the region within 50 μm of the outer surface in the stacking direction of the outer packaging region 15. DRAc and DRBc can also be calculated as average values ​​obtained by analyzing the region from the first to the fifth layer in the inner packaging region 13. DRAd and DRBd can also be calculated as average values ​​obtained by analyzing the region within 5 layers from the center of the substrate in the inner packaging region 13.

[0112] Furthermore, when calculating DRAc, DRBc, DRAd and DRBd of the second inner-mounted region and the first inner-mounted region, the average contrast intensity of the region excluding the inner electrode layer in the measurement range, i.e., the inner dielectric layer in the measurement range, is used.

[0113] Furthermore, in this embodiment, as Figure 2B As shown, the location where the intensity of RA(Dy) is the average of DRAa and DRAd is set as the boundary between the first outer casing region 15a and the second outer casing region 15b. Furthermore, the distance from the outer side of the stacking direction of the inner electrode layer to the boundary, i.e., the thickness T of the second outer casing region 15b, is preferably 2–50 μm, 2–20 μm, or 4–15 μm. Additionally, when only the point where the average of DRAa and DRAd is observed on the inner casing region 13 side is observed, the thickness T is 0, indicating that the second outer casing region does not exist. Then, based on the average value obtained by analyzing the range of the second outer casing region 15b thus determined, DRAb and DRBb can be calculated.

[0114] When the first outer packaging region 15a is set to 100 parts by mass, the content of "RE" in the first outer packaging region 15a, converted to RE2O3, is defined as CREa. As described above, in this embodiment, "RE" is at least one selected from Yb, Y, Ho, Dy, Tb, Gd, and Eu. Therefore, "RE" sometimes includes both RA and RB. CREa is preferably 0.4 parts by mass or more and 7.0 parts by mass or less.

[0115] In the first outer packaging region 15a, the content of RB (DRBa) converted to RE2O3, relative to 100 moles of the main component, is preferably 0.7 moles or more. In the second inner packaging region 13b, the content of RA (DRAc) converted to RE2O3, relative to 100 moles of the main component, is preferably 0.7 moles or more. DRAc and DRAa preferably satisfy the relationship DRAc / DRAa≥3.

[0116] Manufacturing method of multilayer ceramic capacitors

[0117] Next, the following is about Figure 1A An example of the manufacturing method of the stacked ceramic capacitor 2 shown will be explained.

[0118] The multilayer ceramic capacitor 2 of this embodiment is manufactured in the same manner as conventional multilayer ceramic capacitors, by using a conventional paste printing method or sheet method to produce a green chip, and after firing it, printing or transferring external electrodes and firing it. The manufacturing method will be described in detail below.

[0119] First, prepare the dielectric material for forming the first internal region 13a, coat it, and prepare the first internal paste.

[0120] As dielectric raw materials, raw materials containing ABO3 as the main component and other various oxides are prepared. As these raw materials, oxides of the above-mentioned components or mixtures thereof, composite oxides, etc., can be used. In addition, various compounds that become the above-mentioned oxides or composite oxides by firing, such as carbonates, oxalates, nitrates, hydroxides, organometallic compounds, etc., can be appropriately selected and mixed for use.

[0121] The particle size of the raw material powder, which is the main component ABO3, is not particularly limited, for example, it is 150-300 nm.

[0122] In this embodiment, a mixture in which the oxides of the aforementioned components are uniformly dispersed relative to the main component is preferably used, but a dielectric material in which the main component is coated with the aforementioned components may also be used. Furthermore, in addition to the raw material of the main component, for example, oxides of RE, oxides of M, and compounds of Si may also be used.

[0123] In addition, the raw materials for ABO3, the main component, can be substances manufactured by various methods, including those manufactured by solid-phase methods, liquid-phase methods (such as oxalate method, hydrothermal synthesis method, alkoxide method, sol-gel method, etc.).

[0124] Alternatively, the BaCO3 powder may contain more than 0.1 moles and less than 2.0 moles of BaCO3 relative to 100 moles of the main component.

[0125] The raw materials of any two or more of the aforementioned various oxides can be mixed and calcined before being mixed with the main component. For example, the raw materials of RE oxide, Si oxide, and oxides of A that are separately contained from the main component (e.g., Ba oxide) can be mixed before calcined. The calcination temperature is below 1100°C. Then, the compound powder obtained by calcination can be mixed with the main component and the raw materials of various uncalcined oxides. As a result, the ease of solid solution of RE into the main phase particles changes.

[0126] In the first internal paste, the RE2O3 equivalent content of the compound that becomes RA after firing is greater than the RE2O3 equivalent content of rare earth compounds other than RA after firing. Additionally, the first internal paste may contain RB(Y), but it is preferable that it does not substantially contain RB(Y). The content of each compound of elements other than RE in the first internal paste can be determined by the composition of the dielectric layer after firing.

[0127] The first internal coating can be an organic coating made by mixing dielectric raw materials with an organic carrier, or it can be a water-based coating.

[0128] Organic carriers are organic carriers formed by dissolving adhesives in organic solvents. Both the adhesives and solvents can be well-known substances.

[0129] Furthermore, when the first internal coating is a water-based paint, it can be made by mixing a water-based carrier, which is formed by dissolving water-soluble binders and dispersants in water, with the dielectric raw material. There are no particular limitations on the water-soluble binder; for example, polyvinyl alcohol, cellulose, or water-soluble acrylic resin can be used.

[0130] Prepare a second filling paste simultaneously or before or after the first filling paste. The second filling paste may preferably be exactly the same as the first filling paste, or it may be different.

[0131] The first outer coating is prepared simultaneously or before / after the first inner coating. The first outer coating may be the same as the first inner coating except for the following: The first outer coating contains more second rare earth element RB than the first rare earth element RA, and preferably does not contain the first rare earth element RA substantially. The dielectric materials of the main and secondary components (additives) other than rare earth elements in the first outer coating are preferably the same as those in the first inner coating, but may also be different.

[0132] A second outer coating paste is prepared simultaneously or before / after the first outer coating paste. The second outer coating paste may be identical to the first outer coating paste except for the following: The second outer coating paste contains more first rare earth element RA than second rare earth element RB, and preferably contains no second rare earth element RB. The second outer coating green sheet formed from the second outer coating paste has the function of preventing the RB contained in the first outer coating green sheet formed from the first outer coating paste from diffusing into the inner packaging region 13 during heat treatment.

[0133] The paste for the internal electrode layer can be prepared by mixing a conductive material composed of Ni or Ni alloys as described above, or various oxides, organometallic compounds, resin salts, etc., that become Ni or Ni alloys as described above after firing, with the organic carrier described above. Additionally, the paste for the internal electrode layer may also contain a common material. There are no particular restrictions on the common material, but it may have the same composition as the main component.

[0134] The paste for the external electrode uses conductive materials such as Cu or Cu alloys as inorganic components, and can be prepared in the same manner as the paste for the internal electrode layer.

[0135] There are no particular restrictions on the content of organic carriers in the above-mentioned pastes; a typical content is assumed to be approximately 1-15% by mass for the binder and approximately 10-60% by mass for the solvent. Additionally, each paste may contain additives selected from various dispersants, plasticizers, dielectrics, insulators, etc., as needed. Their total content may also be less than 10% by mass.

[0136] A first outer coating green sheet is formed by applying a first outer coating paste to a substrate film (substrate) such as PET, and then peeled off from the substrate. A second outer coating green sheet is formed by applying a second outer coating paste to the substrate and then peeled off from the substrate. After laminating the first outer coating green sheet, the second outer coating green sheet is laminated, and pressure is applied in the lamination direction to obtain an outer coating green sheet laminate. The first and second outer coating green sheets may each be composed of a single sheet or multiple sheets.

[0137] The thickness of the single or multiple sheets constituting the second outer packing sheet is preferably thinner than the thickness of the single or multiple sheets constituting the first outer packing sheet. In addition, the thickness of the single or multiple sheets constituting the second outer packing sheet is preferably 0.5 to 5 times the thickness of the single or multiple sheets constituting the inner packing sheet located between adjacent inner electrode paste films.

[0138] Simultaneously or before and after, a green sheet is formed on a substrate using a second infill paste, an internal electrode pattern layer is formed thereon using paste through an internal electrode layer, and the green sheet is peeled off from the substrate, thereby producing a second infill green sheet having an internal electrode pattern layer.

[0139] Simultaneously or before and after, a green sheet is formed on a substrate using a first infill paste, an internal electrode pattern layer is formed thereon using paste through an internal electrode layer, and the green sheet is peeled off from the substrate, thereby producing a first infill green sheet having an internal electrode pattern layer.

[0140] There are no particular limitations on the method for forming the internal electrode pattern layer. In addition to printing and transfer methods, it can also be formed by thin film formation methods such as vapor deposition and sputtering.

[0141] Next, multiple second inner-pack green sheets with internal electrode pattern layers are stacked on the substrate, multiple first inner-pack green sheets with internal electrode pattern layers are stacked on top of the substrate, and multiple second inner-pack green sheets with internal electrode pattern layers are stacked on top of the substrate. They are then bonded together under pressure as needed to obtain an inner-pack green sheet laminate.

[0142] Next, the inner green blank stack is clamped by an outer green blank stack and pressure is applied in the stacking direction to obtain the green blank stack of the component body 4. In addition, when the inner green blank stack is clamped by an outer green blank stack, the second outer green sheet side of the outer green blank stack is brought into contact with each end of the inner green blank stack in the stacking direction.

[0143] In addition, in the above example, an outer green blank stack and an inner green blank stack are formed and combined, but it is not limited to this. Alternatively, after forming the outer green blank stack, the inner green blank stack can be formed continuously, and then the outer green blank stack can be formed continuously.

[0144] After the green stack of the component body 4 is cut into a specified shape, it is peeled off from the substrate to become a green chip.

[0145] Before firing, the green die is subjected to a binder removal process. There are no particular limitations on the binder removal conditions; however, the preferred heating rate is 5–300°C / hour, the preferred binder removal temperature is 180–900°C, and the preferred holding time is 0.5–48 hours. Furthermore, the atmosphere used in the binder removal process is air or a reducing atmosphere (e.g., a humidified N2 gas atmosphere or a humidified N2+H2 mixed gas atmosphere).

[0146] After the binder is removed, the green chip is fired. There are no particular limitations on the firing conditions. For example, the heating rate can be set to 200-20000℃ / hour, the firing temperature to 1150-1350℃, and the holding time to 0.1-10 hours.

[0147] There are no particular limitations on the firing atmosphere. It can be set to air or a reducing atmosphere. For example, a humidified mixture of N2 and H2 can be used as the atmosphere gas when setting it to a reducing atmosphere. Alternatively, the oxygen partial pressure can be set to 1.0 × 10⁻⁶. -14 ~1.0 -9 MPa.

[0148] In this embodiment, it is preferable to perform annealing treatment (oxidation treatment of the dielectric layer) on the fired component body 4. Specifically, the annealing temperature can be set to 950–1100°C. The holding time can be set to 0.1–20 hours. The atmosphere during the oxidation treatment can be set to humidified N2 gas (oxygen partial pressure: 1.0 × 10⁻⁶). -9 ~1.0×10 -6 MPa).

[0149] In the aforementioned debinding, firing, and annealing processes, humidification of the gas (such as N2 gas or a gas mixture) can be performed, for example, using a humidifier. In this case, the water temperature is preferably around 5–75°C.

[0150] Debinding, firing, and annealing can be performed continuously or independently.

[0151] The component body 4 obtained as described above is subjected to end face grinding, such as by tumbling or sandblasting, and then coated with an external electrode paste and fired to form an external electrode 6. Then, as needed, a coating layer is formed on the surface of the external electrode 6 by plating or the like.

[0152] The multilayer ceramic capacitor 2 manufactured in this embodiment is mounted on a printed circuit board by means of soldering or the like, and is used in various electronic devices, etc.

[0153] In existing multilayer ceramic capacitors, there is a tendency for voids to form more easily in the outer casing region compared to the inner casing region. The reason given is that, unlike the inner casing region which contains an internal electrode layer with high thermal conductivity, the outer casing region lacks an internal electrode layer, thus making sintering in the outer casing region more difficult.

[0154] In contrast, the multilayer ceramic capacitor 2 of this embodiment can fully fire the outer casing region 15 by making the composition of the inner dielectric layer and the outer dielectric layer, especially the type and content of RE, meet the above conditions. This can reduce the porosity of the outer casing region 15 and achieve densification of the outer casing region 15, thereby improving its moisture resistance.

[0155] Furthermore, in the multilayer ceramic capacitor 2 of this embodiment, the concentrations of RA and RB gradually change from the outer casing region 15 to the inner casing region 13, satisfying the relationships DRAa<DRAb<DRAc≤DRAd and DRBa>DRBb>DRBc≥DRBd. As a result, the sintering behavior gradually changes from the outer casing region 15 to the inner casing region 13, thus reducing the stress difference between the outer casing region 15 and the inner casing region 13, thereby reducing electrostrictive cracking.

[0156] Furthermore, in this embodiment, the outer casing region 15 continuously comprises, in the stacking direction: a first outer casing region 15a, which includes more second rare earth elements RB that are different from the first rare earth element RA than the first rare earth element RA; and a second outer casing region 15b, which includes more first rare earth elements RA than the first outer casing region 15a. Moreover, the second outer casing region 15b is adjacent to the inner casing region 13 in the stacking direction.

[0157] The second outer casing region 15b prevents the diffusion of the second rare earth element RB, composed of Y and the like, contained in the first outer casing region 15a into the inner casing region 13. Therefore, for example, as... Figure 2BAs shown, the concentration DRAbc of the first rare earth element RA near the boundary between the second outer region 15b and the inner region 13 can be maintained to be substantially the same as the concentration DRAd of the first rare earth element RA in the inner dielectric layer of the inner region 13. Additionally, as... Figure 3B As shown, the concentration DRBbc of the second rare earth element RB near the boundary between the second outer region 15b and the inner region 13 can be maintained to be substantially the same as the concentration DRBd of the second rare earth element RB in the inner dielectric layer of the inner region 13.

[0158] As a result, the insulation resistance of the inner dielectric layer at the end of the stacking direction in the inner region 13 (IR at the outermost stacked end) is the same as the insulation resistance of the inner dielectric layer near the center in the stacking direction in the inner region 13. Therefore, it is possible to provide a multilayer ceramic capacitor that not only improves the withstand voltage as a multilayer ceramic capacitor, but also has a uniformly high insulation resistance between the internal electrodes inside the element body.

[0159] [ Variations ]

[0160] The embodiments of the present invention have been described above, but the present invention is not limited to the above embodiments, and various modifications can be made within the scope of the present invention.

[0161] For example, a portion of the inorganic component of the inner electrode layer paste can be replaced with RA or RB. By including RA or RB components in the inner electrode layer paste to a less excessive degree, the content of RA and RB contained in the inner dielectric layer 10 of the inner packaging region 13 can be controlled, and the relationships DRAa<DRAb<DRAc≤DRAd and DRBa>DRBb>DRBc≥DRBd can be easily satisfied.

[0162] For example, in the above embodiments, the case where the stacked electronic component of the present invention is a stacked ceramic capacitor has been described, but the stacked electronic component of the present invention is not limited to a stacked ceramic capacitor, and may also be a stacked electronic component having the above structure.

[0163] Example

[0164] The present invention will now be described in more detail through examples and comparative examples. However, the present invention is not limited to the following examples.

[0165] Example 1

[0166] Prepare the first inner tube of ointment as follows.

[0167] First, BaTiO3 powder was prepared as the main raw material powder. The Ba / Ti ratio of the BaTiO3 powder was 1.000. As secondary raw material powders, SiO2, BaO3, MgO powder, MnCO3 powder, V2O5 powder, and oxide powders of the first rare earth element (Dy) were prepared.

[0168] The prepared raw material powders were weighed relative to 100 moles of the main component, with each oxide conversion being 1.0 mole for SiO2, 1.0 mole for BaCO3, and 0.7 moles for the mixture of MgO powder / MnCO3 powder / V2O5 powder. Additionally, the RE raw material powders were weighed relative to 100 moles of the main component, converted to oxides as shown in Table 1. The weighed raw material powders were wet-mixed and pulverized in a ball mill for 20 hours, and then dried to obtain the dielectric raw material.

[0169] Next, relative to 100 parts by mass of dielectric raw material, 10 parts by mass of polyvinyl butyral resin, 5 parts by mass of dioctyl phthalate (DOP) as plasticizer, and 100 parts by mass of ethanol as solvent are mixed in a ball mill to form a paste, thereby obtaining the first internal paste.

[0170] Except for changing the type and content of the raw material powder of the RE oxide as described in Table 1, a second inner paste, a first outer paste, and a second outer paste were prepared in the same manner as the first inner paste.

[0171] Ni powder, terpineol, ethyl cellulose, and benzotriazole were prepared in a mass ratio of 44.6:52.0:3.0:0.4. They were then mixed using a three-roll mill to form a paste for the internal electrode layer.

[0172] Using the first coating paste prepared above, a first outer coating green sheet is formed on a PET film to a dried thickness of 6.0 μm. Additionally, using the second coating paste, a second outer coating green sheet is formed on a PET film to a dried thickness of 2.0 μm. After stacking multiple first outer coating green sheets, a single second outer coating green sheet is stacked on top, and pressure is applied in the stacking direction to obtain an outer coating green sheet laminate.

[0173] Simultaneously or before and after, a green sheet is formed by using the first inner packaging paste prepared above to achieve a thickness of 4.0 μm after drying. An inner electrode layer paste is then applied to the green sheet, and an electrode layer is printed with a specified pattern. The sheet is then peeled off from the PET film to produce a first inner packaging green sheet with an inner electrode pattern layer.

[0174] In addition, using the second encapsulation paste prepared above, a green sheet is formed with a dried thickness of 4.0 μm. An internal electrode layer paste is then applied to the sheet, and an electrode layer is printed with a specified pattern. The sheet is then peeled off from the PET film to produce a second encapsulation green sheet with an internal electrode pattern layer.

[0175] Next, five second inner blanks are stacked on the second outer blank of the aforementioned outer blank stack, followed by 30 first inner blanks, and then five second inner blanks. The aforementioned outer blank stack is then stacked on the second inner blanks with the second outer blanks in contact with the second inner blanks. The blank stack of the component body 4 is obtained by pressure bonding. This blank stack is then cut to a specified size to obtain a green chip blank.

[0176] Next, the obtained green chip is subjected to debinding, sintering and oxidation to obtain the component body as a sintered body.

[0177] Regarding the adhesive removal treatment conditions, the heating rate was set to 25℃ / hour, the adhesive removal temperature was set to 235℃, the holding time was set to 8 hours, and the atmosphere was set to air.

[0178] Regarding the firing conditions, the heating rate was set to 200℃ / hour, the holding temperature to 1280℃, the holding time to 2 hours, and the cooling rate to 200℃ / hour. The atmosphere was set to a humidified N2+H2 mixture. The oxygen partial pressure was set to 5.0 × 10⁻⁶. -11 Around MPa.

[0179] Regarding the oxidation treatment conditions, the heating and cooling rates were set to 200℃ / hour, the oxidation temperature to 1050℃, the holding time to 3 hours, the atmosphere to a humidified N2 gas atmosphere, and the oxygen partial pressure to 1.0 × 10⁻⁶. - 7 MPa. A humidifier was used to humidify the atmosphere during firing and oxidation processes.

[0180] Next, the end face of the obtained component body is tumble ground, then coated with Cu paste as an external electrode, and sintered in a reducing atmosphere to obtain... Figure 1A and Figure 1B The sample of the multilayer ceramic capacitor shown is 3.2 mm × 1.6 mm × 0.7 mm. The thickness of the inner dielectric layer is 3.0 μm, the thickness of the inner electrode layer is 1.0 μm, and the thickness (Tde) of the outer casing region is 270 μm. Furthermore, the number of inner dielectric layers is set to 40.

[0181] (STEM-EDS analysis)

[0182] The main body 4 of the component was cut along the stacking direction, and the cut surface was ground to obtain a polished surface. Then, the polished surface was thinned using a focused ion beam (FIB). For the thinned sample, mapping analysis was performed using a scanning transmission electron microscope (STEM) equipped with an energy-dispersive X-ray analyzer (EDS). Based on the mapping analysis results, RA was confirmed as Dy and RB as Y. Then, as shown... Figure 2B The data for the intensity of RA along the stacking direction are shown, and as follows: Figure 3B The intensity data of RB is shown.

[0183] Based on the obtained data, DRAa and DRBa are calculated. Similarly, DRAc and DRBc, DRAd and DRBd are calculated. The position where the intermediate intensity of DRAa and DRAd is assigned is set as the boundary between the first outer casing region 15a and the second outer casing region 15b. The thickness T of the second outer casing region 15b is determined, and DRAb and DRBb are calculated. Furthermore, the intensity data of RA near the boundary between the second outer casing region 15b and the inner casing region 13 (second inner casing region 13b) are also calculated.

[0184] In Table 2, for each relation “DRAa<DRBa”, “DRAa<DRAb”, “DRAa<DRAc”, “DRAbc≈DRAd (whether they are actually equal)”, “DRAa<DRAb<DRAc≤DRAd”, and “DRBa>DRBb>DRBc≥DRBd”, the case that satisfies the relation is marked as “Y”, and the case that does not satisfy the relation is marked as “N”.

[0185] (Voltage withstand)

[0186] A DC voltage was applied to the obtained multilayer ceramic capacitor samples, and the short-circuit voltage at which the applied voltage was increased was defined as the withstand voltage. Samples with a withstand voltage (VB) less than 150 were rated "NG", samples with a withstand voltage greater than 150V but less than 200V were rated "B", and samples with a withstand voltage greater than 200V were rated "A". A higher withstand voltage indicates a greater effect in reducing electrostrictive cracking. The results are shown in Table 2.

[0187] (IR is installed in the outermost stack)

[0188] For the obtained multilayer ceramic capacitor samples, the outer electrodes were ground to expose the inner electrodes. Using a probe, the pair of inner electrodes adjacent to the inner dielectric layer located on the outer side of the stacking direction were brought into contact with the terminals, thereby measuring the resistance (IR). Specifically, at room temperature (20°C), a 50V DC voltage was applied to the capacitor sample for 30 seconds, and the resistance (Ω) of the outermost layer of the capacitor sample was measured using an insulation resistance meter. This measurement was performed on 10 capacitor samples under various conditions, and the average value of the measurement results (average resistance value) was calculated as the IR (Ω) of the outermost layer terminal. Additionally, for these capacitor samples, the pair of inner electrodes adjacent to the inner dielectric layer located closest to the center of the stacking direction were brought into contact with the probe, and the resistance at the center was measured similarly. At this time, based on the average resistance value at the center of the same chip, samples with a resistance value less than 80% were designated as "NG", and samples with a resistance value greater than 80% were designated as "A". The results are shown in Table 2.

[0189] (determination)

[0190] The multilayer ceramic capacitor sample (comparative example) that was rated "NG" for at least one of "voltage withstand capability" and "IR charging at the outermost layer end" was rated "NG". The multilayer ceramic capacitor sample (example) that was rated "B" for "voltage withstand capability" and "IR charging at the outermost layer end" was rated "A" was rated "A".

[0191] The multilayer ceramic capacitor sample (example) rated "A" for "voltage withstand capability" and "IR charge inside the outermost layer" is rated "AA". The results are shown in Table 2.

[0192] Comparative Example 1

[0193] Except that, as shown in Table 1, the types and contents of REs in the first outer coating paste were the same as those in the first inner coating paste, multilayer ceramic capacitor samples were obtained in the same manner as in Example 1, and the same evaluation was performed as in Example 1. The results are shown in Table 2.

[0194] Comparative Example 2

[0195] Except that a green sheet with the same composition as the first green sheet was used as the second outer packing green sheet, multilayer ceramic capacitor samples were obtained in the same manner as in Example 1, and were evaluated in the same manner as in Example 1. The results are shown in Table 2.

[0196] Examples 2-6, Comparative Example 3

[0197] Except for adjusting the interlayer ratio of the sheets shown in Table 1, i.e., the number of layers of the second outer green sheet relative to the first inner green sheet, and adjusting the thickness T of the second outer region to the value recorded in Table 2, multilayer ceramic capacitor samples were obtained in the same manner as in Example 1, and evaluated in the same way as in Example 1. The results are shown in Table 2.

[0198] Comparative Example 4

[0199] Except for changing the type of RE from Dy to Tb and replacing Dy2O3 with Tb7O4 as shown in Table 1, multilayer ceramic capacitor samples were obtained in the same manner as in Comparative Example 1, and the same evaluation was performed as in Example 1. The results are shown in Table 2.

[0200] Example 7

[0201] Except for replacing Dy2O3 with Tb7O4 as shown in Table 1, the multilayer ceramic capacitor samples were obtained in the same manner as in Example 2, and were evaluated in the same way as in Example 1. The results are shown in Table 2.

[0202] [Table 1]

[0203]

[0204] [Table 2]

[0205]

[0206] Based on the results shown in Tables 1 and 2, it can be confirmed that the embodiments satisfying the relationships DRAa < DRBa, DRAa < DRAb, and DRAa < DRAc, and with the thickness T of the second outer casing region 15b within the specified range, exhibit good voltage withstand and IR characteristics. Alternatively, it can be confirmed that the embodiments satisfying the relationships DRAa < DRAb < DRAc ≤ DRAd and DRBa > DRBb > DRBc ≥ DRBd, and with the thickness T of the second outer casing region 15b within the specified range, exhibit good voltage withstand and IR characteristics (IR inside the outermost stack).

[0207] like Figure 2A , Figure 2B , Figure 3A and Figure 3B As shown, particularly in Example 3, it was confirmed that the concentrations of RA (Dy) and RB (Y) gradually changed from the first outer casing region 15a to the second outer casing region 15b in a manner that corresponds to the above-described relationship.

[0208] In addition, such as Figure 2BAs shown, it can be confirmed that the concentration DRAbc of the first rare earth element RA near the boundary between the second exterior region 15b and the interior region 13 remains substantially the same as the concentration DRAd of the first rare earth element RA in the inner dielectric layer in the interior region 13 (DRAbc ≈ DRAd). Furthermore, as Figure 3B shown, it can be confirmed that the concentration DRbc of the second rare earth element RB near the boundary between the second exterior region 15b and the interior region 13 remains substantially the same as the concentration DRBd of the second rare earth element RB in the inner dielectric layer in the interior region 13. It can be confirmed that the same results can be obtained in other Examples 1, 2, and 4 to 7.

[0209] In Examples 1 to 7, since the sintering behavior gradually changes from the first exterior region 15a to the second exterior region 15b, the stress difference between the exterior region 15 and the interior region 13 can be reduced. As a result, it is considered that the withstand voltage is good, that is, electrostrictive cracks can be reduced. In addition, in the examples, the diffusion of Y into the interior region 13 is prevented, and it is considered that the IR characteristics (outermost stacked end interior IR) can be maintained at a high level.

[0210] In Comparative Example 1, the element type equivalent to RA and the element type equivalent to RB are both Dy. In Comparative Example 1, as a result, no concentration gradient of RA and RB is formed from the exterior region to the interior region, and the difference in sintering behavior between the exterior region and the interior region cannot be reduced. Therefore, it is considered that stress remains in the chip, and as a result, the withstand voltage characteristics become "NG".

[0211] In Comparative Example 2, the relationship of DRAa < DRAb < DRAc ≤ DRAd and DRBa > DRBb > DRBc ≥ DRBd is satisfied, and the thickness T of the second exterior region becomes smaller. In Comparative Example 2, Y in the first exterior paste diffuses into the second interior region 13b. As a result, it is considered that the outermost stacked end interior IR deteriorates. In addition, in Comparative Example 2, DRAbc is substantially different from DRAd.

[0212] In Comparative Example 3, the relationship of DRAa < DRAb < DRAc ≤ DRAd and DRBa > DRBb > DRBc ≥ DRBd is satisfied, and the thickness T of the second exterior region becomes larger. In Comparative Example 3, similar to Comparative Example 1, no concentration gradient of RA and RB is formed from the exterior region to the interior region, and the difference in sintering behavior between the exterior region and the interior region cannot be reduced. Therefore, it is considered that stress remains in the chip, and as a result, the withstand voltage characteristics become "NG".

[0213] In Comparative Example 4, the element type corresponding to RA and the element type corresponding to RB are both Tb. Therefore, in Comparative Example 4, similar to Comparative Example 1, no concentration gradient of RA and RB is formed from the outer packaging region to the inner packaging region, and the difference in sintering behavior between the outer packaging region and the inner packaging region cannot be reduced. Therefore, it is considered that the voltage withstand capability is "NG" due to residual stress inside the chip.

[0214] As can be seen from the results of Example 7, when RA is Tb, it is similar to the example where RA is Dy, and can take into account both high voltage withstand characteristics and IR characteristics.

Claims

1. A stacked electronic component, wherein, The stacked electronic components have: The component body comprises: an inner mounting region having alternating layers of inner dielectric layers and inner electrode layers; and an outer mounting region located outside the stacking direction of the inner mounting region; and A pair of external electrodes are connected to the internal electrode layer on the surface of the component body. The outer casing region has the following characteristics continuously in the stacking direction: The first outer casing area contains more second rare earth elements that are different from the first rare earth element than the first rare earth element; as well as The second outer casing region contains more of the first rare earth elements than the first outer casing region. In the internal region, the concentration of the first rare earth element in the inner dielectric layer is higher than the concentration of the first rare earth element in the first external region. The second outer casing area and the inner casing area are adjacent in the stacking direction. The thickness of the second outer casing area is 2–50 μm.

2. The stacked electronic component according to claim 1, wherein, The internal region has the following characteristics continuously in the stacking direction: The concentration of the second rare earth element in the inner dielectric layer is uniformly lower along the stacking direction than the concentration of the second rare earth element in the second outer packaging region in the first inner packaging region; and The concentration of the second rare earth element in the inner dielectric layer of the second inner packaging region gradually increases towards the outer packaging region compared to the concentration of the second rare earth element in the inner dielectric layer of the first inner packaging region. The second outer casing area and the second inner casing area are adjacent in the stacking direction. The concentration of the second rare earth element contained in the inner dielectric layer of the second inner packaging region is lower than the concentration of the second rare earth element contained in the second outer packaging region.

3. The stacked electronic component according to claim 2, wherein, The concentration of the second rare earth element in the first outer packaging area is higher than the concentration of the second rare earth element in the second outer packaging area. The concentration of the first rare earth element in the second internal area is lower than the concentration of the first rare earth element in the first internal area.

4. The stacked electronic component according to any one of claims 1 to 3, wherein, The boundary between the first outer casing region and the second outer casing region is defined as the position of the concentration of the first rare earth element along the stacking direction of the outer casing region, which is an average value. The average value is the average of the peak intensity corresponding to the concentration of the first rare earth element in the inner dielectric layer near the center of the stacking direction of the component body in the inner casing region and the peak intensity corresponding to the concentration of the first rare earth element near the end of the stacking direction in the outer casing region.

5. The stacked electronic component according to any one of claims 1 to 3, wherein, The first rare earth element is at least one selected from Dy, Yb, Ho, Tb, Gd, and Eu. The second rare earth element is Y.

6. A method for manufacturing a stacked electronic component, wherein, The manufacturing method of the stacked electronic component includes a step of forming a component body, the component body having: an inner mounting region on which inner dielectric layers and inner electrode layers are alternately stacked, and an outer mounting region located on the outer side of the stacking direction of the inner mounting region. The outer casing region is formed by continuously stacking a first outer casing green sheet and a second outer casing green sheet in the stacking direction and then firing them. The first outer casing corresponds to a first outer casing region containing more second rare earth elements different from the first rare earth element than the first rare earth element. The second outer casing corresponds to a second outer casing region containing more of the first rare earth element than the first outer casing region. The inner packaging region is formed by stacking an inner packaging green sheet containing more of the first rare earth element than the first outer packaging green sheet together with an electrode paste film for the inner electrode layer, and then firing it together with the first and second outer packaging green sheets.

7. The method for manufacturing a stacked electronic component according to claim 6, wherein, The thickness of the single or multiple sheets constituting the inner green sheet located between adjacent electrode paste films is 0.5 to 5 times the thickness of the single or multiple sheets constituting the second outer green sheet.

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