Storage device and storage operation method thereof, electronic device

Abstract

This application discloses a storage device, its storage operation method, and an electronic device. The storage device includes a first storage area and a second storage area. The first storage area includes n high-frequency sub-storage areas, and the second storage area includes n cache sub-storage areas. The n cache sub-storage areas correspond one-to-one with the n high-frequency sub-storage areas. The storage operation method includes: when the storage space of the target cache sub-storage area corresponding to the target high-frequency sub-storage area is sufficient, performing a write operation on the target cache sub-storage area; when the storage space of the target cache sub-storage area is insufficient, reading the most recent valid data cached in the target cache sub-storage area and writing the valid data to the target high-frequency sub-storage area; performing an erase operation on the target cache sub-storage area; and performing a write operation on the target cache sub-storage area to write the data to be written to the target high-frequency sub-storage area, thereby reducing the number of erase / write cycles of the high-frequency sub-storage area and increasing its service life.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, specifically to a storage device and its storage operation method, and an electronic device. Background Technology

[0002] Flash memory technology features non-volatile storage, high storage density, and fast read speed, making it widely used in security chips. However, its large page capacity and the requirement to erase pages before writing also bring problems such as write cycles and load balancing.

[0003] Conventional flash-based storage management systems must consider data integrity, chip durability, and system reliability. These requirements are crucial for the application of security chips, which need to promptly alert and handle problems when they are detected.

[0004] Currently, for flash-based storage management systems, flash memory with a lifespan of only about 100,000 erase cycles cannot meet the needs of applications requiring 1 million or more erase cycles. Summary of the Invention

[0005] This application was filed to address the aforementioned problems. Therefore, one object of the present invention is to provide a storage operation method for a storage device, the storage device comprising:

[0006] The first storage area includes n high-frequency sub-storage areas, which are used to store data that has been erased and rewritten more than or equal to a predetermined number of times, where n is a positive integer.

[0007] The second storage area includes n cache sub-storage areas, each of which corresponds one-to-one with a high-frequency sub-storage area. The cache sub-storage areas are used to cache the data in their corresponding high-frequency sub-storage areas.

[0008] The storage operation method includes:

[0009] When the storage space of the target cache sub-storage area corresponding to the target high-frequency sub-storage area is sufficient, a write operation is performed on the target cache sub-storage area;

[0010] When the storage space of the target cache sub-storage area is insufficient, the most recent valid data cached in the target cache sub-storage area is read and the valid data is written to the target high-frequency sub-storage area; an erase operation is performed on the target cache sub-storage area; and a write operation is performed on the target cache sub-storage area to write the data that is scheduled to be written to the target high-frequency sub-storage area into the target cache sub-storage area.

[0011] In one example, the first storage area further includes a non-high-frequency sub-storage area, which is used to store data that has been erased and rewritten less than a predetermined number of times;

[0012] The storage operation method further includes:

[0013] If the write operation performed on the target non-high frequency sub-storage area of ​​the non-high frequency sub-storage area is not a transaction operation, and the random access memory does not save the data of the target non-high frequency sub-storage area, then the data of the storage block corresponding to the target non-high frequency sub-storage area is backed up, and a write operation is performed on the target non-high frequency sub-storage area after the backup is completed.

[0014] Copy the target data page in the storage block corresponding to the target non-high frequency sub-storage area to the random access memory, and write the data to be written to the target non-high frequency sub-storage area into the random access memory to obtain the written data. Then erase the data in the storage block corresponding to the target non-high frequency sub-storage area, and write the written data into the target non-high frequency sub-storage area.

[0015] If the write operation performed on the target non-high frequency sub-storage area of ​​the non-high frequency sub-storage area is not a transaction operation, and the random access memory stores the data of the target non-high frequency sub-storage area, then the data to be written to the target non-high frequency sub-storage area is written to the random access memory to obtain the written data. Then, the data of the corresponding storage block of the target non-high frequency sub-storage area is erased, and the written data is written to the target non-high frequency sub-storage area.

[0016] In one example, the storage device further includes:

[0017] The third storage area includes a first sub-storage area and a second sub-storage area. The first sub-storage area is used to provide backup protection for the storage blocks of the first storage area, and the second sub-storage area is used to provide transaction operations for the first storage area.

[0018] The process of backing up the data of the storage block corresponding to the target non-high-frequency sub-storage area and performing write operations on the target non-high-frequency sub-storage area after the backup is completed includes:

[0019] When a data write instruction is received for the target non-high-frequency sub-storage area of ​​the first storage area, an atomic operation of the storage block of the first sub-storage area is initiated, and it is determined whether to restore the data of the target non-high-frequency sub-storage area.

[0020] If restored, the restoration operation of the target first sub-storage area of ​​the first sub-storage area is performed to restore the data of the target non-high-frequency sub-storage area;

[0021] If not restored, the data of the target non-high-frequency sub-storage area is backed up in the first sub-storage area;

[0022] Once the backup is complete, write new data to the target non-high-frequency sub-storage area of ​​the first storage area.

[0023] In one example, the storage operation method further includes:

[0024] If the write operation performed on the target non-high frequency sub-storage area of ​​the non-high frequency sub-storage area is a transaction operation, then the second sub-storage area is used to provide a transaction operation on the target storage area of ​​the first storage area, and the target storage area includes the non-high frequency sub-storage area.

[0025] The step of writing the valid data into the target high-frequency sub-storage area includes providing a transaction operation to the target storage area of ​​the first storage area using the second sub-storage area, wherein the target storage area includes the target high-frequency sub-storage area.

[0026] In one example, providing transaction operations to the target storage area of ​​the first storage area using the second sub-storage area includes:

[0027] Step 1: Check the data in the second sub-storage area to determine whether the last transaction operation has ended. If the last transaction operation has not ended, perform a rollback operation on the second sub-storage area to restore the data in the target storage area of ​​the first storage area.

[0028] Step 2: If the previous transaction operation has been completed, then start the new transaction operation;

[0029] Step 3: Back up the old data currently stored in the target storage area where the data to be written is to be backed up in the second sub-storage area;

[0030] Step 4: Write new data into the target storage area, wherein when the target storage area is the high-frequency sub-storage area, the new data is the valid data;

[0031] Step 5: When there is still data to be written to the first storage area, repeat steps 3 and 4 until all target addresses that need to be written to have completed the write operation.

[0032] Step 6: End the transaction operation.

[0033] In one example, the storage operation method further includes:

[0034] Step 1: When a read instruction for the non-high-frequency sub-memory area is received, initiate a read operation on the non-high-frequency sub-memory area;

[0035] Step 2: Determine whether the target data to be read is cached in the random access memory. If so, perform a read operation on the random access memory to read the target data. If not, cache the target data to be read in the non-high-frequency sub-storage area into the random access memory, and then perform a read operation on the random access memory to read the target data.

[0036] In one example, the storage operation method further includes:

[0037] Performing a read operation on the data in the target high-frequency sub-storage area among the n high-frequency sub-storage areas includes: first determining whether the data in the cache sub-storage area corresponding to the target high-frequency sub-storage area is valid; if the data is valid, then reading the data in the cache sub-storage area corresponding to the target high-frequency sub-storage area; if the data is invalid, then reading the data in the target high-frequency sub-storage area.

[0038] In one example, the storage capacity of the cache sub-storage area is more than twice the storage capacity of the high-frequency sub-storage area.

[0039] In another aspect, this application also provides a storage device, the storage device comprising:

[0040] The first storage area includes n high-frequency sub-storage areas, which are used to store data that has been erased and rewritten more than or equal to a predetermined number of times, where n is a positive integer.

[0041] The second storage area includes n cache sub-storage areas, each of which corresponds one-to-one with a high-frequency sub-storage area. The cache sub-storage areas are used to cache the data in their corresponding high-frequency sub-storage areas.

[0042] A controller, which is used to execute the aforementioned storage operation method.

[0043] This application also provides an electronic device, which includes the aforementioned storage device.

[0044] According to the storage device and storage operation method of the present invention, by setting n cache sub-storage areas in the second storage area and corresponding the n high-frequency sub-storage areas with the n cache sub-storage areas one by one, each cache sub-storage area is used to cache data that is to be written to its corresponding high-frequency sub-storage area. When performing a write operation on the target storage area among the n high-frequency sub-storage areas, the data that is to be written to its corresponding high-frequency sub-storage area is written to the corresponding cache sub-storage area for caching, thereby reducing the number of erase and write operations on the high-frequency sub-storage areas, thereby increasing the service life of the high-frequency sub-storage areas, and also meeting the high-frequency read and write operation requirements of data, and adapting to various application scenarios to meet different application performance requirements. Attached Figure Description

[0045] The above and other objects, features, and advantages of this application will become more apparent from the more detailed description of the embodiments thereof in conjunction with the accompanying drawings. The drawings are provided to further illustrate the embodiments of this application and form part of the specification. They are used together with the embodiments of this application to explain the application and do not constitute a limitation thereof. In the drawings, the same reference numerals generally represent the same components or steps.

[0046] Figure 1 A schematic diagram of a storage device according to one embodiment of this application is shown.

[0047] Figure 2 A schematic diagram of a storage device according to another embodiment of this application is shown.

[0048] Figure 3 A schematic flowchart illustrating a storage operation method of a storage device according to one embodiment of this application is shown.

[0049] Figure 4 A schematic flowchart illustrating a storage operation method of a storage device according to another embodiment of this application is shown. Detailed Implementation

[0050] To make the objectives, technical solutions, and advantages of this application more apparent, exemplary embodiments according to this application will be described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are merely a part of the embodiments of this application, and not all of the embodiments of this application. It should be understood that this application is not limited to the exemplary embodiments described herein. Based on the embodiments of the present invention described in this application, all other embodiments obtained by those skilled in the art without inventive effort should fall within the protection scope of this application.

[0051] The following description provides numerous specific details to offer a more thorough understanding of this application. However, it will be apparent to those skilled in the art that this application can be practiced without one or more of these details. In other instances, certain technical features well-known in the art have not been described to avoid confusion with this application.

[0052] It should be understood that this application can be implemented in various forms and should not be construed as being limited to the embodiments set forth herein. Rather, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of this application to those skilled in the art.

[0053] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. When used herein, the singular forms “a,” “an,” and “ / the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “compose” and / or “comprising,” when used in this specification, identify the presence of features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0054] To fully understand this application, detailed structures and methods will be presented in the following description to illustrate the technical solutions proposed in this application. Optional embodiments of this application are described in detail below; however, in addition to these detailed descriptions, this application may have other implementation methods.

[0055] Flash memory technology is widely used in security chips due to its non-volatile storage, high storage density, and fast read speed. However, its large page capacity and the requirement to erase pages before writing also bring problems such as write cycles and load balancing, posing challenges when facing applications with high capacity requirements and frequent write operations.

[0056] Flash-based storage management systems must consider data integrity, chip durability, and system reliability. These requirements are crucial for the application of security chips, and the system needs to promptly alert and handle any issues detected. To address these needs, the following technologies have been primarily adopted in recent hardware, software, and hardware-software co-operation technologies.

[0057] Technique 1: Improve data stability by detecting and correcting single or multiple bit errors using ECC methods such as Hamming code, BCH code, and Reed-Solomon code.

[0058] Technology 2: By uniformly distributing erase and write operations, excessive wear in certain areas is reduced, extending the overall lifespan of the Flash memory.

[0059] Technology 3: Provides a lightweight management method, reducing file system overhead and flash write / erase operations.

[0060] Technology 4: Provides a software-based power-loss protection mechanism to ensure the integrity of flash data.

[0061] However, each of these technologies has its applicable scenarios and limitations. Security chip designers need to choose the most suitable storage operation method based on specific application requirements and resource constraints. For example, applications requiring high reliability and data integrity may require more advanced ECC checksums and bad block management technologies, even if this increases cost and complexity. For cost-sensitive and resource-constrained embedded systems, lightweight management methods may be preferred to reduce resource consumption.

[0062] Different solutions were developed only for different application needs, lacking a technical solution that could meet all needs at the same time. Moreover, there was no effective method to meet the needs of applications that require 1 million or more erase cycles, given that the flash memory only has a lifespan of 100,000 erase cycles.

[0063] To address the above problems, this application provides a storage device and its storage operation method. The storage device and its storage operation method of this application will be described below with reference to the accompanying drawings. Without conflict, the technical features of the various embodiments of this application can be combined with each other.

[0064] First, such as Figure 1 As shown, in one embodiment of this application, the storage device includes a flash memory, which may be NOR flash memory or NAND flash memory.

[0065] Flash memory includes multiple storage areas, including a first storage area (e.g., corresponding to...). Figure 1 and Figure 2 The region A in the text includes n high-frequency sub-storage areas (sometimes referred to as Ax areas in this article), such as A1 storage area, A2 storage area, ..., An storage area, where n is a positive integer. The n high-frequency sub-storage areas are used to store data that has been erased and written more than a predetermined number of times. For example, if the number of erased and written times is higher than the predetermined number within a predetermined time, that is, the erase and write frequency of the high-frequency sub-storage area is high. If the high-frequency sub-storage area is erased and written at this higher erase and write frequency, it may reach its specified erase and write life in a shorter time, such as more than 100,000 times.

[0066] Optionally, each high-frequency sub-storage area may correspond to one or more storage blocks or one or more pages.

[0067] The first storage area can be a general-purpose storage area, storing the application's target data. The size of the target data determines the data size that the application can handle. Within the first storage area, n high-frequency sub-storage areas are designed to handle massive erase / write operations on the predetermined data. These sub-storage areas are also easily associated with the cache sub-storage areas (sometimes referred to as Dx areas in this paper) of the second storage area (Region D), which is used for caching. The first storage area can also include non-high-frequency sub-storage areas (also referred to as non-Ax areas in this paper), used to store data with fewer than the predetermined number of erase / write operations. In other words, they are used to store data with a relatively low erase / write frequency. Specifically, the non-high-frequency sub-storage areas store data with an erase / write frequency lower than that stored in the high-frequency sub-storage areas.

[0068] Furthermore, to avoid the problem of the entire storage device failing due to the rapid reaching of its lifespan caused by high-frequency erasure and writing of the n high-frequency sub-storage areas (also referred to as Ax storage areas in this document), the storage device in this embodiment further includes a second storage area (i.e., Figure 1 and Figure 2 The region D in the document contains n cache sub-storage areas (sometimes referred to as Dx storage areas in this article), such as D1 storage area, D2 storage area, ..., Dn storage area, where n is a positive integer. The n high-frequency sub-storage areas correspond one-to-one with the n cache sub-storage areas, for example... Figure 1 and Figure 2 The arrows indicate the correspondence between the n high-frequency sub-storage areas and the n cache sub-storage areas. A1 can correspond to D1, A2 can correspond to D2, and so on, with An corresponding to Dn. Optionally, the storage capacity of each cache sub-storage area is more than twice the storage capacity of its corresponding high-frequency sub-storage area. This allows the cache sub-storage area to perform more erase operations, improving the overall lifespan of the storage device. Each cache sub-storage area is used to cache data that is scheduled to be written to its corresponding high-frequency sub-storage area, thereby reducing the number of erase / write operations on the high-frequency sub-storage area, further increasing its lifespan, and meeting the needs of high-frequency data read / write operations. This adapts to various application scenarios and meets different application performance requirements.

[0069] It is worth mentioning that the number of n can be reasonably set according to the needs, and no specific limit is set here.

[0070] In some embodiments, the storage capacity of the second storage area can be an integer multiple of the storage block, thereby providing a load balancing mechanism for high-frequency operation data in the high-frequency sub-storage area. Optionally, a storage block may include at least one page.

[0071] In some embodiments, such as Figure 2As shown, the flash memory also includes a third storage area (corresponding to Region B), which is the transaction operation area for storage block backup and restoration and Region A data. It ensures the atomicity of write operations to Region A and prevents incomplete writing of Region A data due to abnormal power failure. When the program detects this situation, it needs to perform a recovery operation on the data in Region A based on the valid backup value of Region B.

[0072] In some embodiments, such as Figure 2 As shown, the third storage area (corresponding to Region B) includes a first sub-storage area (also known as Region BP area) and a second sub-storage area (also known as Region BT area). The first sub-storage area is used to perform atomic operations on storage blocks and provides backup protection for the storage blocks in the first storage area to ensure the integrity of operations on storage blocks. The second sub-storage area is used to provide transaction operations on the first storage area to ensure the transactionality of application processes.

[0073] In some embodiments, continue to refer to Figure 2 The storage device can also selectively configure a random access memory (i.e., corresponding to Region C), which is used to cache data to be written to the first storage area, providing a caching mechanism for the first storage area (i.e., Region A) to prevent frequent write operations to Region A and shorten the lifespan of Region A.

[0074] Depending on application requirements, Region A, Region B, Region C, and Region D can be flexibly configured based on actual physical limitations and application needs. This configuration aims to provide read and write operations for Region A while ensuring data integrity, while maintaining performance.

[0075] Furthermore, the storage device in this application embodiment may also include a controller, which may be hardware or a module for reading and writing data, managing, and maintaining the normal operation of the storage device. The controller may include a front-end interface, a back-end interface, a processor, a cache, etc. More specifically, the controller may be used to perform various operations on the aforementioned first storage area, second storage area, third storage area, and random access memory, such as read operations, erase operations, write operations, etc.

[0076] The controller can be used to perform the following storage operation methods of the storage device, and some details of the storage operation methods of the storage device will be described below.

[0077] This application provides a storage operation method applied to the aforementioned storage device.

[0078] In some embodiments, the storage operation method includes: performing a write operation on the data of the storage block corresponding to the backup target non-high frequency sub-storage area through the first sub-storage area and on the target non-high frequency sub-storage area after the backup is completed, that is, performing operation 1, atomic operation of the storage block of the Region BP area, in order to provide backup protection for the storage block of the first storage area and ensure the atomicity of the storage block operation.

[0079] This operation 1 includes the following steps S1 to S4:

[0080] Step S1: When a data write instruction for the target non-high-frequency sub-storage area of ​​the first storage area is obtained, the storage block atomic operation of the first sub-storage area is started, and it is checked whether the data of the target non-high-frequency sub-storage area should be restored. If restoration is required, the operation of S2 is executed; if restoration is not required, the operation of S3 is executed.

[0081] Step S2: If restoration is required, perform the restoration operation of the target first sub-storage area in the first sub-storage area to recover the data in the target non-high-frequency sub-storage area;

[0082] Step S3: If not restored, back up the data of the target non-high-frequency sub-storage area in the first sub-storage area;

[0083] Step S4: Once the backup is complete, write new data to the target non-high-frequency sub-storage area of ​​the first storage area.

[0084] Step S3 may include the following steps S301 to S303:

[0085] Step S301: Write the start data backup flag.

[0086] Step S302: Start the storage block erase and write operation, back up the data of the target address of the target non-high frequency sub-storage area, that is, first erase at least part of the storage blocks of the first sub-storage area, and then write the data of the target address of the target non-high frequency sub-storage area to the first sub-storage area, thereby realizing the backup.

[0087] Step S303: Write data backup complete flag.

[0088] Step S4 may include the following steps S401 to S402: In step S401, the memory block corresponding to the target non-high frequency sub-memory area is erased, and then a write operation is performed to write a new value to the target address in the target non-high frequency sub-memory area; and in step S402, a write data operation completion flag is set.

[0089] By performing operation 1 above, the atomicity of write operations to the target non-high-frequency sub-storage area of ​​the first storage area can be guaranteed, preventing incomplete writing of data to the first storage area due to abnormal power failure. If the program detects this situation, it needs to perform a recovery operation on the data of the first storage area based on the valid backup value of Region B.

[0090] In some embodiments, the storage operation method of this application further includes: providing a transaction operation to the target storage area of ​​the first storage area using a second sub-storage area, defined as operation 2, that is, using Region BT area to provide a transaction operation to Region A area, including performing the following steps:

[0091] Step 1: Check the data in the second sub-storage area to determine if the previous transaction operation has ended. If the previous transaction operation has not ended, perform a rollback operation on the second sub-storage area to restore the data in the target storage area of ​​the first storage area.

[0092] Step 2: If the previous transaction operation has been completed, then start the new transaction operation;

[0093] Step 3: Back up the old data currently stored in the target storage area of ​​the data to be written in the second sub-storage area, that is, back up the old data of the target storage area to be written in the Region BT area.

[0094] Step 4: Write new data to the target storage area. For example, use the operation 1 described above to write new data (i.e., target data) to the target address in the target storage area.

[0095] Step 5: When there is still data to be written to the first storage area, repeat steps 3 and 4 until all target addresses for which data needs to be written have completed the write operation. The memory usually includes multiple storage cells. Each storage cell has a unique address in the memory to identify and locate the cell. This address can be a number or identifier. The target address is the address corresponding to the storage cell for which the write operation needs to be performed. All target addresses for which data needs to be written have completed the write operation, which means that the storage cells corresponding to the target addresses for which data needs to be written have completed the write operation.

[0096] Step 6: End the transaction.

[0097] Optionally, the second sub-storage area is used to provide transaction operations to the first storage area, including: performing transaction operations on the non-high-frequency sub-storage area in the first storage area, or writing data to the Ax area.

[0098] Operation 2 ensures the transactional nature of the application process and prevents incomplete data writing to Region A due to abnormal power outages. If the program detects this situation, it needs to restore the data in Region A based on the valid backup value in Region B.

[0099] In some embodiments, the storage operation method further includes: performing a read operation on the data of a target high-frequency sub-storage area among the n high-frequency sub-storage areas, i.e., operation 3, which includes: first determining whether the data in the cache sub-storage area corresponding to the target high-frequency sub-storage area is valid; if the data is valid, then reading the data in the cache sub-storage area corresponding to the target high-frequency sub-storage area; if the data is invalid, then reading the data in the target high-frequency sub-storage area. In some embodiments, before determining whether the data in the cache sub-storage area corresponding to the target high-frequency sub-storage area is valid, the following steps may be performed first: initiating a read operation on the target high-frequency sub-storage area among the n high-frequency sub-storage areas to find the cache sub-storage area corresponding to the target high-frequency sub-storage area. After reading the data, the data read operation ends. Here, valid data in the cache sub-storage area means that its data can be directly accessed and used by the controller or application, while invalid data means that it cannot be accessed and used.

[0100] By using operation 3, the frequency of reading high-frequency sub-storage areas can be reduced, which can extend the life of the storage device, improve system performance, and enhance data security.

[0101] In some embodiments, the storage operation method of the storage device of this application further includes: performing a read operation on a non-high-frequency sub-storage area, i.e., performing operation 4, which may include the following steps:

[0102] Step 1: When a read instruction for a non-high-frequency sub-memory area is received, initiate the read operation for the non-high-frequency sub-memory area;

[0103] Step 2: Determine if the target data to be read is cached in the random access memory. If so, perform a read operation on the random access memory to read the target data. If not, cache the target data to be read in the non-high-frequency sub-storage area into the random access memory, then perform a read operation on the random access memory to read the target data, and finally end the data read operation.

[0104] By performing operation 4, a caching mechanism can be provided for the non-high-frequency sub-memory area using random access memory, preventing frequent read operations on the non-high-frequency sub-memory area and shortening its lifespan.

[0105] In some embodiments, the storage operation method of this application further includes performing a write operation on a first storage area. This write operation may be a write operation on a high-frequency sub-storage area or a write operation on a non-high-frequency sub-storage area. The following will combine... Figure 3 and Figure 4 The process of writing operations is explained.

[0106] First, such as Figure 4 As shown, when a write operation instruction for the first storage area is obtained, it can first be determined whether it is a write operation for the high-frequency sub-storage area. If so, the write operation for the high-frequency sub-storage area is executed.

[0107] Furthermore, such as Figure 3 and Figure 4 As shown, when it is determined that the area requiring a write operation is a high-frequency sub-memory area, the storage operation method includes performing a write operation on the target high-frequency sub-memory area among n high-frequency sub-memory areas, which includes the following steps S310 to S360:

[0108] In step S310, it is determined whether the target cache sub-storage area corresponding to the target high-frequency sub-storage area has sufficient storage space. Since the storage space of the cache sub-storage area is fixed, when the number of writes reaches the upper limit of the storage space, the target cache sub-storage area will no longer be able to write data and needs to be erased. However, if the number of writes has not yet reached the upper limit, data can be written.

[0109] In step S320, when there is sufficient storage space in the target cache sub-storage area, a write operation is performed on the target cache sub-storage area;

[0110] In step S330, when the storage space of the target cache sub-storage area is insufficient, the most recent valid data cached in the target cache sub-storage area is read. For example, the current data can be read in the manner described in operation 3 above. It is worth mentioning that valid data refers to data that can be directly accessed and used by the controller or application.

[0111] In step S340, valid data is written to the target high-frequency sub-storage area to prevent data loss.

[0112] In step S350, an erase operation is performed on the target cache sub-storage area. This erase operation can be a partial erase or a complete erase.

[0113] In step S360, a write operation is performed on the target cache sub-storage area to write the data that is intended to be written to the target high-frequency sub-storage area into the target cache sub-storage area.

[0114] In some embodiments, in step S340, valid data is written to the target high-frequency sub-storage area. Valid data can be written to the target high-frequency sub-storage area using, for example, operation 2. That is, the second sub-storage area is used to provide transaction operations to the target high-frequency sub-storage area of ​​the first storage area. Specifically, it is first determined whether the data in the cache sub-storage area corresponding to the target high-frequency sub-storage area is valid. When the data is valid, the data in the cache sub-storage area corresponding to the target high-frequency sub-storage area is read. When the data is invalid, the data in the target high-frequency sub-storage area is read, that is, the data in the corresponding target high-frequency sub-storage area is read. At this time, it is not necessary to perform a write operation to the high-frequency sub-storage area, and steps S350 and S360 can be performed directly.

[0115] By writing the data that is scheduled to be written to its corresponding high-frequency sub-storage area into the corresponding cache sub-storage area for caching, the number of erase and write operations on the high-frequency sub-storage area is reduced, thereby increasing the lifespan of the high-frequency sub-storage area. It can also meet the high-frequency read and write operation requirements of data, adapt to various application scenarios, and meet different application performance requirements.

[0116] Furthermore, in some embodiments, such as Figure 4 As shown, when it is determined that the write operation to be performed is in a non-high-frequency sub-storage area, firstly, it is determined whether the write operation performed on the target non-high-frequency sub-storage area in the non-high-frequency sub-storage area is a transaction operation. Any suitable method known to those skilled in the art can be used to make the determination, and no specific limitation is made here.

[0117] If the write operation performed on the target non-high-frequency sub-memory area is not a transaction operation, and the data corresponding to the target non-high-frequency sub-memory area is not stored in the random access memory (RAM), then the data of the storage block corresponding to the target non-high-frequency sub-memory area is backed up, and a write operation is performed on the target non-high-frequency sub-memory area after the backup is completed. Then, the target data page in the storage block corresponding to the target non-high-frequency sub-memory area is copied to the RAM, and the target data to be written to the target non-high-frequency sub-memory area is written to the RAM to obtain the written data. Afterwards, the data in the storage block corresponding to the target non-high-frequency sub-memory area is erased, and the written data cached in the RAM is written to the target non-high-frequency sub-memory area. That is, the written data stored in the RAM will eventually be written back to the target non-high-frequency sub-memory area. This written data includes the data copied from the storage block corresponding to the target non-high-frequency sub-memory area and the newly written data. The newly written data may only modify data at a portion of the addresses. It is worth noting that the target data page can be multiple pages, and multiple pages can correspond to one or more storage blocks. When writing data to be written to the non-Ax area to the RAM, the write may be a modification of a portion of the data in the target data page.

[0118] In some embodiments, the data of the storage block corresponding to the target non-high frequency sub-storage area can be backed up through the aforementioned operation 1, and the write operation on the target non-high frequency sub-storage area can be performed after the backup is completed. The specific process can be referred to the previous description and will not be repeated here.

[0119] Furthermore, in some embodiments, the storage operation method further includes: if the write operation performed on the target non-high-frequency sub-storage area is not a transaction operation, and the random access memory stores the data corresponding to the target non-high-frequency sub-storage area, then the target data to be written to the target non-high-frequency sub-storage area is written to the random access memory (that is, the target data is written to Region C area) to obtain the written data, so as to prevent frequent write operations on the non-high-frequency sub-storage area and shorten the lifespan of the first storage area. Then, the data of the storage block corresponding to the target non-high-frequency sub-storage area is erased, and the written data cached in the random access memory is written to the target non-high-frequency sub-storage area.

[0120] In some other embodiments, the storage operation method further includes: if the write operation performed on the target non-high frequency sub-storage area of ​​the non-high frequency sub-storage area is a transaction operation, then the second sub-storage area is used to provide a transaction operation on the target storage area of ​​the first storage area, the target storage area including the non-high frequency sub-storage area.

[0121] In summary, the storage device and storage operation method in this application embodiment provide a multi-caching mechanism to meet different data storage needs, thereby adapting to various application scenarios and satisfying different application performance requirements. Furthermore, by introducing a heterogeneous caching mechanism, on the one hand, it can ensure the transactionality of data operations and the atomicity of pages while improving read performance and increasing hardware lifespan; on the other hand, it constructs a cache sub-storage area for high-frequency sub-storage areas, employing a high-load balancing mechanism to meet high-frequency read and write operations, thus increasing the lifespan of the high-frequency sub-storage areas.

[0122] Furthermore, this application embodiment also provides an electronic device, which includes the aforementioned storage device. For example, the electronic device includes an automotive security chip, which may be an authentication chip or a car key, etc.

[0123] The electronic device can also be any other suitable device with the storage device described in this application, such as a home appliance, a smart terminal, a card reader, a public transport card, a bank card, etc.

[0124] Although exemplary embodiments have been described herein with reference to the accompanying drawings, it should be understood that the above exemplary embodiments are merely illustrative and are not intended to limit the scope of this application. Various changes and modifications can be made therein by those skilled in the art without departing from the scope and spirit of this application. All such changes and modifications are intended to be included within the scope of this application as claimed in the appended claims.

[0125] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0126] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed.

[0127] Numerous specific details are set forth in the specification provided herein. However, it will be understood that embodiments of this application may be practiced without these specific details. In some instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure the understanding of this specification.

[0128] Similarly, it should be understood that, in order to streamline this application and aid in understanding one or more of the various inventive aspects, features of this application may sometimes be grouped together in a single embodiment, figure, or description thereof in the description of exemplary embodiments of this application. However, this approach should not be construed as reflecting an intention that the claimed application requires more features than are expressly recited in each claim. Rather, as reflected in the corresponding claims, its inventive point lies in solving the corresponding technical problem with features fewer than all features of a single disclosed embodiment. Therefore, the claims following the detailed description are hereby expressly incorporated into that detailed description, wherein each claim itself is a separate embodiment of this application.

[0129] Those skilled in the art will understand that, apart from the mutual exclusion of features, all features disclosed in this specification (including the accompanying claims, abstract, and drawings) and all processes or units of any method or apparatus so disclosed can be combined in any combination. Unless otherwise expressly stated, each feature disclosed in this specification (including the accompanying claims, abstract, and drawings) may be replaced by an alternative feature that serves the same, equivalent, or similar purpose.

[0130] Furthermore, those skilled in the art will understand that although some embodiments described herein include certain features but not others included in other embodiments, combinations of features from different embodiments are intended to be within the scope of this application and form different embodiments. For example, in the claims, any one of the claimed embodiments can be used in any combination.

[0131] The various component embodiments of this application can be implemented in hardware, or as software modules running on one or more processors, or a combination thereof. Those skilled in the art will understand that microprocessors or digital signal processors (DSPs) can be used in practice to implement some or all of the functions of some modules in the article analysis device according to embodiments of the present invention. This application can also be implemented as an apparatus program (e.g., a computer program and computer program product) for performing part or all of the methods described herein. Such an implementation of this application can be stored on a computer-readable medium, or can be in the form of one or more signals. Such signals can be downloaded from an Internet website, provided on a carrier signal, or provided in any other form.

[0132] It should be noted that the above embodiments are illustrative of this application and not restrictive, and that those skilled in the art can devise alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses should not be construed as limiting the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. This application can be implemented by means of hardware comprising several different elements and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by the same item of hardware. The use of the words first, second, and third, etc., does not indicate any order. These words can be interpreted as names.

[0133] The above description is merely a specific embodiment or illustration of the embodiments of this application. The scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. The scope of protection of this application shall be determined by the scope of the claims.

Claims

1. A storage operation method for a storage device, characterized in that, The storage device includes: The first storage area includes n high-frequency sub-storage areas, which are used to store data that has been erased and rewritten more than or equal to a predetermined number of times, where n is a positive integer. The second storage area includes n cache sub-storage areas, each of which corresponds one-to-one with a high-frequency sub-storage area. The cache sub-storage areas are used to cache the data in their corresponding high-frequency sub-storage areas. The storage operation method includes: When the storage space of the target cache sub-storage area corresponding to the target high-frequency sub-storage area is sufficient, a write operation is performed on the target cache sub-storage area; When the storage space of the target cache sub-storage area is insufficient, the most recent valid data cached in the target cache sub-storage area is read and the valid data is written to the target high-frequency sub-storage area; an erase operation is performed on the target cache sub-storage area; and a write operation is performed on the target cache sub-storage area to write the data that is scheduled to be written to the target high-frequency sub-storage area into the target cache sub-storage area.

2. The storage operation method as described in claim 1, characterized in that, The first storage area also includes a non-high-frequency sub-storage area, which is used to store data that has been erased and rewritten less than a predetermined number of times; The storage operation method further includes: If the write operation performed on the target non-high frequency sub-storage area of ​​the non-high frequency sub-storage area is not a transaction operation, and the random access memory does not save the data of the target non-high frequency sub-storage area, then the data of the storage block corresponding to the target non-high frequency sub-storage area is backed up, and a write operation is performed on the target non-high frequency sub-storage area after the backup is completed. Copy the target data page in the storage block corresponding to the target non-high frequency sub-storage area to the random access memory, and write the data to be written to the target non-high frequency sub-storage area into the random access memory to obtain the written data. Then erase the data in the storage block corresponding to the target non-high frequency sub-storage area, and write the written data into the target non-high frequency sub-storage area. If the write operation performed on the target non-high frequency sub-storage area of ​​the non-high frequency sub-storage area is not a transaction operation, and the random access memory stores the data of the target non-high frequency sub-storage area, then the data to be written to the target non-high frequency sub-storage area is written to the random access memory to obtain the written data. Then, the data of the corresponding storage block of the target non-high frequency sub-storage area is erased, and the written data is written to the target non-high frequency sub-storage area.

3. The storage operation method as described in claim 2, characterized in that, The storage device further includes: The third storage area includes a first sub-storage area and a second sub-storage area. The first sub-storage area is used to provide backup protection for the storage blocks of the first storage area, and the second sub-storage area is used to provide transaction operations for the first storage area. The process of backing up the data of the storage block corresponding to the target non-high-frequency sub-storage area and performing write operations on the target non-high-frequency sub-storage area after the backup is completed includes: When a data write instruction is received for the target non-high-frequency sub-storage area of ​​the first storage area, an atomic operation of the storage block of the first sub-storage area is initiated, and it is determined whether to restore the data of the target non-high-frequency sub-storage area. If restored, the restoration operation of the target first sub-storage area of ​​the first sub-storage area is performed to restore the data of the target non-high-frequency sub-storage area; If not restored, the data of the target non-high-frequency sub-storage area is backed up in the first sub-storage area; Once the backup is complete, write new data to the target non-high-frequency sub-storage area of ​​the first storage area.

4. The storage operation method as described in claim 3, characterized in that, The storage operation method further includes: If the write operation performed on the target non-high frequency sub-storage area of ​​the non-high frequency sub-storage area is a transaction operation, then the second sub-storage area is used to provide a transaction operation on the target storage area of ​​the first storage area, and the target storage area includes the non-high frequency sub-storage area. The step of writing the valid data into the target high-frequency sub-storage area includes providing a transaction operation to the target storage area of ​​the first storage area using the second sub-storage area, wherein the target storage area includes the target high-frequency sub-storage area.

5. The storage operation method as described in claim 4, characterized in that, Providing transaction operations to the target storage area of ​​the first storage area using the second sub-storage area includes: Step 1: Check the data in the second sub-storage area to determine whether the last transaction operation has ended. If the last transaction operation has not ended, perform a rollback operation on the second sub-storage area to restore the data in the target storage area of ​​the first storage area. Step 2: If the previous transaction operation has been completed, then start the new transaction operation; Step 3: Back up the old data currently stored in the target storage area where the data to be written is to be backed up in the second sub-storage area; Step 4: Write new data into the target storage area, wherein when the target storage area is the high-frequency sub-storage area, the new data is the valid data; Step 5: When there is still data to be written to the first storage area, repeat steps 3 and 4 until all target addresses that need to be written to have completed the write operation. Step 6: End the transaction operation.

6. The storage operation method as described in claim 2, characterized in that, The storage operation method further includes: Step 1: When a read instruction for the non-high-frequency sub-memory area is received, initiate a read operation on the non-high-frequency sub-memory area; Step 2: Determine whether the target data to be read is cached in the random access memory. If so, perform a read operation on the random access memory to read the target data. If not, cache the target data to be read in the non-high-frequency sub-storage area into the random access memory, and then perform a read operation on the random access memory to read the target data.

7. The storage operation method as described in claim 1, characterized in that, The storage operation method further includes: Performing a read operation on the data in the target high-frequency sub-storage area among the n high-frequency sub-storage areas includes: first determining whether the data in the cache sub-storage area corresponding to the target high-frequency sub-storage area is valid; if the data is valid, then reading the data in the cache sub-storage area corresponding to the target high-frequency sub-storage area; if the data is invalid, then reading the data in the target high-frequency sub-storage area.

8. The storage operation method according to any one of claims 1 to 7, characterized in that, The storage capacity of the cache sub-storage area is more than twice the storage capacity of the high-frequency sub-storage area.

9. A storage device, characterized in that, The storage device includes: The first storage area includes n high-frequency sub-storage areas, which are used to store data that has been erased and rewritten more than or equal to a predetermined number of times, where n is a positive integer. The second storage area includes n cache sub-storage areas, each of which corresponds one-to-one with a high-frequency sub-storage area. The cache sub-storage areas are used to cache the data in their corresponding high-frequency sub-storage areas. A controller for performing the storage operation method as described in any one of claims 1 to 8.

10. An electronic device, characterized in that, The electronic device includes the storage device as described in claim 9.

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