Multi-stage SiC MOSFET active gate drive circuit based on dv / dt and di / dt feedback control

Abstract

This invention belongs to the field of power electronics technology and solves the technical problems of high switching losses, severe voltage / current spikes, and ringing phenomena associated with traditional gate drive technology for controlling SiC MOSFETs. Specifically, it relates to a multi-stage active gate drive circuit for SiC MOSFETs based on dv / dt and di / dt feedback control. By improving the topology of a conventional gate drive circuit, it achieves an active gate drive circuit that directly injects or extracts current into or from the SiC MOSFET gate, and then superimposes this current with the output current of the conventional gate drive circuit to change the net gate current input. This invention can accelerate the delay and tailing stages, thereby reducing switching losses; simultaneously, it mitigates the intermediate voltage and current change stages to suppress voltage / current spikes and electromagnetic interference, ultimately optimizing the switching behavior of the SiC MOSFET.

Description

Technical Field

[0001] This invention belongs to the field of power electronics technology, and in particular relates to a multi-stage SiC MOSFET active gate drive circuit based on dv / dt and di / dt feedback control. Background Technology

[0002] With the development of power electronics technology, the main research direction of power devices focuses on operating characteristics such as high frequency, low power consumption, and high temperature. However, the performance of traditional silicon (Si)-based power devices in these aspects is not yet comprehensive enough. Compared with Si-based materials, third-generation wide-bandgap semiconductors have significant advantages in many aspects. Research shows that wide-bandgap power devices have many advantages over Si devices. As a representative of third-generation wide-bandgap semiconductor devices, silicon carbide field-effect transistors (SiC MOSFETs) have shown a trend of becoming core devices in high-performance power electronic converters due to their high switching speed, low conduction loss, and excellent high-temperature characteristics, and have also demonstrated outstanding advantages in high-voltage and high-power applications.

[0003] While the inherent high switching speed of SiC MOSFETs reduces losses, high switching frequency increases power density, and the high breakdown electric field facilitates the implementation of high-voltage devices, it also brings severe voltage and current overshoot, high-frequency electromagnetic interference (EMI), and bridge arm crosstalk problems caused by parasitic parameters. These problems not only affect device performance but may also shorten its lifespan. Conventional gate drive (CGD) technology for controlling SiC MOSFETs is easy to implement but cannot effectively solve the above problems. In contrast, active gate drive (AGD) monitors key parameters during the switching process (such as V) in real time. ds i d By dynamically injecting or extracting gate current (di / dt, dv / dt), precise control of the switching trajectory can be achieved. This not only reduces switching losses and electromagnetic interference (EMI), but also effectively protects the system and enables adaptive intelligent control. Therefore, the application of active gate drive (AGD) technology is of great significance. Summary of the Invention

[0004] To address the shortcomings of existing technologies, this invention provides a multi-stage SiC MOSFET active gate drive circuit based on dv / dt and di / dt feedback control, which solves the technical problems of high switching losses, severe voltage / current spikes, and ringing phenomena associated with traditional gate drive techniques for controlling SiC MOSFETs.

[0005] To solve the above-mentioned technical problems, the present invention provides the following technical solution: a multi-stage SiC MOSFET active gate drive circuit based on dv / dt and di / dt feedback control, which improves the topology of a conventional gate drive circuit to obtain an active gate drive circuit that directly injects or extracts current into or from the SiC MOSFET gate, and changes the net gate current input after being superimposed with the output current of the conventional gate drive circuit. The active gate drive circuit includes: A conventional gate driver module has its input terminal used to receive PWM signals and its output terminal connected to the gate of a SiC MOSFET. The dv / dt detection module has its input terminal connected to the drain of the SiC MOSFET; The di / dt detection module has its input terminal connected to the source of the SiC MOSFET; The reference signal generation module receives PWM signals at its input terminal and inputs the output reference signal and the feedback signals output by the dv / dt detection module and the di / dt detection module together to the input terminal of the gradient feedback control module. The gradient feedback control module adopts a two-stage structure design, which is used to achieve proportional control by subtracting the reference signal from the feedback signal; The current injection / extraction module receives the output signal from the gradient feedback control module at its input and connects to the gate of the SiC MOSFET at its output.

[0006] Furthermore, the conventional gate drive module includes a pulse transformer, an inverter, a push-pull drive circuit, and a conventional gate drive resistor R. g1 ; The pulse transformer isolates the controller from the SiC MOSFET gate drive section, providing electrical isolation while converting the PWM signal sent by the controller into a suitable voltage level; the inverter inverts the PWM signal to ensure the correct drive signal is delivered to the SiC MOSFET gate; the push-pull drive circuit amplifies the current; the conventional gate drive resistor R... g1 Used to limit gate drive current i g1 This prevents excessive current from damaging devices or generating unnecessary heat, and also allows for control of switching speed.

[0007] The PWM signal sent by the controller is isolated by a pulse transformer or high-speed optocoupler and then sent to an inverter. It then enters a dual-MOSFET push-pull drive circuit, with a PMOSFET at the top and an NMOSFET at the bottom, driven by a conventional gate drive resistor R. g1 Generates a current i for controlling the switching state of the SiC MOSFET. g1Finally, it is input to the gate of the SiC MOSFET.

[0008] Furthermore, the dv / dt detection module includes a resistor R. v Capacitor C v Operational amplifier U1, compensation resistor R2, input resistor R1 and feedback resistor R f1 ; The dv / dt detection module uses a resistor R v With capacitor C v The differentiating circuit, connected in series between the drain and source of the SiC MOSFET, is used to detect the instantaneous rate of change of the drain and source voltage of the SiC MOSFET, dv / dt, that is, the rate of voltage rise and fall per unit time.

[0009] The input resistor R1 and capacitor C v After being connected in series, it is connected to the inverting input terminal of operational amplifier U1. The non-inverting input terminal of operational amplifier U1 is connected in series with compensation resistor R2 and then grounded. The feedback resistor R f1 It is then connected between the inverting input and output of operational amplifier U1.

[0010] This invention utilizes the inverting proportional amplification effect of operational amplifier U1 to adjust the input resistance R1 and the feedback resistance R. f1 The resistance value can control the proportional coefficient. The size, the proportionality coefficient < 0. Therefore, the detection voltage of the voltage gradient can be obtained, where the detection voltage of the voltage gradient during the turn-on process is positive and the detection voltage during the turn-off process is negative. The specific calculation relationship is shown below: ; in, This represents the voltage gradient detection voltage of the SiC MOSFET.

[0011] Furthermore, the di / dt detection module includes an equivalent parasitic inductance L. s Operational amplifier U2, compensation resistor R4, input resistor R3, and feedback resistor R f2 ; SiC MOSFET drain current id Gradient detection typically requires the help of stray inductance at the source, in the circuit... L s It is the equivalent parasitic inductance of the source power path, and its function is to reduce the drain current of the SiC MOSFET. i d rate of change over time di / dt It is converted into a detectable voltage signal. di / dtThe detection module functions by detecting the potential of the power emitter, typically using the source as a reference potential. The equivalent parasitic inductance... L s With input resistance R The 3-phase circuit is connected in series to the inverting input of operational amplifier U2, and a compensation resistor is connected in series to the non-inverting input of operational amplifier U2. R 4. Grounding after the feedback resistor R f2 It is connected between the inverting input and output of operational amplifier U2. After being amplified by the inverting amplifier U2, the input resistance is adjusted. R 3 with feedback resistor R f2 The resistance value can be controlled by the proportional coefficient. Size, the proportionality coefficient The voltage is less than 0, thus the current gradient detection voltage is obtained. The current gradient detection voltage is positive during the turn-on process and negative during the turn-off process. The specific calculation relationship is shown below: ; in, This indicates the current gradient detection voltage of the SiC MOSFET; This is the proportionality coefficient. This is the equivalent parasitic inductance.

[0012] Furthermore, the reference signal generation module includes a bias voltage generator, a bias resistor R6, an operational amplifier U3, a compensation resistor R7, an input resistor R5, and a feedback resistor R. f3 ;

[0013] The input resistor R5 is connected to the non-inverting input terminal of operational amplifier U3, which is grounded through a series compensation resistor R7. The bias voltage generator is connected to the inverting input terminal of operational amplifier U3 through a series bias resistor R6, and the feedback resistor R... f3 It is then connected between the inverting input and output of operational amplifier U3.

[0014] The PWM signal is a digital signal varying between 0V and 5V. After being converted into an analog signal by operational amplifier U3, the bias voltage is subtracted to form an analog signal varying between -2.5V and +2.5V, which serves as the reference signal. The input resistor R5 and the feedback resistor R are adjusted. f3 The resistance value can control the proportional coefficient of operational amplifier U3, and the amplitude of the reference signal should be comparable to the amplitude of the voltage gradient detection signal or the current gradient detection signal.

[0015] Furthermore, the gradient feedback control module includes operational amplifier U4, operational amplifier U5, input resistor R8, input resistor R9, and input resistor R... 10Input resistance R 12 Compensation resistor R 11 Compensation resistor R 13 Feedback resistor R f4 and feedback resistor R f5 ;

[0016] The gradient feedback control module achieves proportional control by subtracting the reference signal from the feedback signal. To ensure the high bandwidth characteristics of the operational amplifier, a two-stage structure design is adopted. The voltage gradient detection voltage signal and the current gradient detection voltage signal are connected to the inverting input terminal of the operational amplifier U4 through input resistors R8 and R9, respectively. The reference signal is connected through input resistor R... 10 Connect the non-inverting input terminal of operational amplifier U4, and connect a compensation resistor R in series with the non-inverting input terminal. 11 Grounding; Input resistance R 12 A compensation resistor R is connected in series between the output of operational amplifier U4 and the non-inverting input of operational amplifier U5, while a compensation resistor R is connected in series between the inverting input of operational amplifier U5. 13 Grounded. Feedback resistor R f4 The feedback resistor R is connected between the inverting input and output of operational amplifier U4. f5 It is connected between the inverting input and output of operational amplifier U5. When performing proportional amplification through operational amplifier U5, a high-speed operational amplifier is used, and the proportional control is as follows: ; in, This refers to the peak voltage, specifically the drain-source voltage (V) of the SiC MOSFET during switching. ds ) or gate-source (V gs The instantaneous maximum value of the voltage; This is the proportionality coefficient; This is the bias voltage; This represents the current gradient detection voltage signal of the SiC MOSFET; This represents the voltage gradient detection voltage signal of the SiC MOSFET.

[0017] Furthermore, the current injection / extraction module includes an emitter follower and a U... be Multiplier circuit and active gate drive resistor R g2 ;

[0018] The emitter follower is a high-bandwidth product, and also uses U... be A multiplier circuit is used to eliminate crossover distortion. In this U... be In a voltage multiplier circuit, the voltage divider resistor R 15 With voltage divider resistor R 16The resistor R is connected in series across the base of the NPN transistor; the collector of the NPN transistor is connected to the base of the upper NPN transistor in the emitter follower, and the emitter of the NPN transistor is connected to the base of the lower PNP transistor; the bias resistor R 14 Connected in series with the positive power supply and the voltage divider resistor R 15 Between, bias resistor R 17 Connected in series with the negative power supply and the voltage divider resistor R 16 Between; an active gate drive resistor R is connected in series at the output of the emitter follower. g2 The gate of the SiC MOSFET is then connected. The output voltage of the gradient feedback control module is enhanced by an emitter follower (i.e., a push-pull circuit) to improve the current output capability. The magnitude of the output current is determined by the difference between the push-pull output voltage and the gate voltage. Therefore, the active gate drive resistor R... g2 The selection of the resistor is crucial: if the resistor value is too large, the additional input current is too small, and the impact on the conventional drive is negligible; if the resistor value is too small, the additional input current is too large, which will seriously affect the speed and stability of the drive response.

[0019] In the active gate drive circuit provided by this invention, the dv / dt and di / dt detection modules, the reference signal generation module, and the gradient feedback control module all use high-speed operational amplifiers. The input resistor, feedback resistor, and compensation resistor connected to the operational amplifiers all play crucial roles. The input resistor reduces the voltage division effect of the signal source's internal resistance, ensuring complete signal transmission; it also reduces the impact on the signal source and, through the matching resistor, eliminates errors caused by bias current, protecting the signal source and improving stability. Furthermore, the input resistor can participate in the feedback network, stabilizing gain and anti-interference capabilities, and reducing distortion.

[0020] The feedback resistor, combined with the operational amplifier's internal gain, forms a negative feedback loop, feeding the output signal proportionally back to the input, thereby stabilizing the closed-loop gain and setting the amplification factor. Frequency compensation can be introduced, forming a low-pass filter with a parallel capacitor to reduce high-frequency gain and avoid self-oscillation caused by phase reversal, while increasing phase margin. By limiting bandwidth, the feedback resistor can suppress high-frequency noise, reduce output overshoot or ringing, and make the transient response smoother. It can also reduce output offset voltage and balance the influence of input bias current, thereby improving tracking accuracy and common-mode rejection ratio (CMRR).

[0021] Compensating resistors can balance input impedance to reduce offset errors, suppress electromagnetic interference, and prevent induced noise when the input terminal is floating; at the same time, they limit current surges and enhance circuit stability.

[0022] By employing the above technical solution, the present invention provides a multi-stage SiCMOSFET active gate drive circuit based on dv / dt and di / dt feedback control, which has at least the following beneficial effects:

[0023] 1. The active gate drive circuit proposed in this invention can directly inject or extract current into the gate of a SiC MOSFET. This current, when superimposed with the output current of a conventional gate drive circuit, can change the net input gate current. Therefore, it can accelerate the delay and tailing stages, thereby reducing switching losses; simultaneously, it mitigates the intermediate voltage and current changes, suppressing voltage / current spikes and electromagnetic interference, ultimately optimizing the switching behavior of the SiC MOSFET.

[0024] 2. The active gate drive circuit proposed in this invention can effectively suppress voltage / current spikes and ringing phenomena during SiC MOSFET switching while maintaining high switching speed and low switching loss, thereby reducing the impact of crosstalk and achieving low electromagnetic interference during SiC MOSFET switching.

[0025] 3. This invention employs a multi-stage active gate drive circuit based on dv / dt and di / dt feedback control, dividing the switching process of SiCMOSFET into four stages for segmented control. Taking the turn-on process as an example, during the current rise and voltage fall stages, the active gate drive draws current from the gate, reducing the net input of charging charge as in conventional drives, thereby suppressing the voltage-current gradient; during the turn-on delay and voltage tailing stages, the active gate drive injects current into the gate, increasing the amount of charging charge, thereby shortening the switching time and reducing switching losses.

[0026] 4. This invention uses gradient detection technology to detect the voltage / current signal of SiC MOSFET in real time. The reference signal is generated by processing the PWM signal. Then, the difference between the reference signal and the feedback signal is used as an error signal input to the controller to regulate the magnitude of the additional injection current at the gate.

[0027] 5. In the active gate drive of SiC MOSFET, this invention can effectively suppress voltage / current spikes and ringing phenomena generated during the switching process of SiC MOSFET while maintaining high switching speed and low switching loss, thereby achieving low electromagnetic interference. Attached Figure Description

[0028] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings: Figure 1 This is a circuit diagram of the multi-stage SiC MOSFET active gate drive circuit in this invention; Figure 2 This is a schematic diagram of the injection / extraction of gate current at each stage of the switching process in this invention; Figure 3 This is a schematic diagram of multi-stage control of the voltage at each node in this invention; Figure 4 The gate voltage V for the active drive of the SiC MOSFET turn-on process in this invention. gs Waveform diagram; Figure 5 The conventional gate current i for the active drive of the SiC MOSFET turn-on process in this invention is... Rg1 With active gate current i Rg2 Waveform diagram; Figure 6 The drain current i of the SiC MOSFET turn-on process active drive in this invention is... d With drain-source voltage V ds Waveform diagram; Figure 7 This is a waveform diagram of the gate voltage driven by the active drive during the turn-off process of the SiC MOSFET of the present invention. Figure 8 The conventional gate current i for the active drive of the SiC MOSFET turn-off process in this invention. Rg1 With active gate current i Rg2 Waveform diagram; Figure 9 The drain current i is the actively driven current during the turn-off process of the SiC MOSFET in this invention. d With drain-source voltage V ds Waveform diagram. Detailed Implementation

[0029] To make the above-mentioned objects, features, and advantages of the present invention more apparent and understandable, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. This will allow for a full understanding of how the present application uses technical means to solve technical problems and achieve technical effects, and to facilitate its implementation.

[0030] This embodiment proposes a multi-stage SiC MOSFET active gate drive circuit based on dv / dt and di / dt feedback control, suitable for applications such as... Figure 1 The active gate drive circuit shown is a topology improvement based on a conventional gate drive circuit. It includes a conventional gate drive module, a dv / dt detection module, a di / dt detection module, a reference signal generation module, a gradient feedback control module, and a current injection / extraction module.

[0031] The conventional gate drive module receives PWM signals at its input and its output is connected to the gate of the SiC MOSFET. The dv / dt detection module's input is connected to the drain of the SiC MOSFET. The di / dt detection module's input is connected to the source of the SiC MOSFET. The reference signal generation module receives PWM signals at its input and uses the output reference signal, along with the feedback signals from the dv / dt and di / dt detection modules, to input the gradient feedback control module. The gradient feedback control module employs a two-stage design, using the difference between the reference signal and the feedback signal to achieve proportional control. The current injection / extraction module receives the output signal from the gradient feedback control module and its output is connected to the gate of the SiC MOSFET.

[0032] like Figure 2 As shown, this invention employs a multi-stage feedback control method, requiring staged control of the current injected into the gate by the active driver. The current i injected into the gate by a conventional driver... g1 Taking the positive direction as the defined direction, that is: the current i during the turn-on process g1 The current i is positive (i.e., injected current), and the current i during the turn-off process is positive. g1 The value is negative (i.e., the extraction current). The following analysis, taking the turn-on process as an example, details the newly added active gate drive section:

[0033] During the turn-on delay phase, the drain current i d The drain-source voltage V remains unchanged at 0. ds Maintain the bus voltage V dc There was no fluctuation, V PWM As the switching begins to rise and the gate starts charging, this stage does not affect electromagnetic interference (EMI), but the switching delay will degrade drive performance. Therefore, active drives need to inject a current similar to the normal drive current i during this stage. g1 Current i in the same direction g2 This accelerates the transition of the SiC MOSFET from the cutoff region to the saturation region, shortening the switching time. During the current rise and voltage fall phases, the drain current i... d From 0 to load current I L Rise, drain-source voltage V ds From the bus voltage V dc As the saturation pressure drop decreases (close to 0), V PWM The gate voltage continuously changes. Precise regulation is achieved through feedback control during this stage, effectively improving control performance. To reduce electromagnetic interference (EMI), the injected current i during this stage... g2 Typically compared to conventional drive current i g1 The directions are opposite, thus reducing the voltage and current gradient and suppressing current spikes and electromagnetic interference (EMI). During the tailing phase, the drain current i... dIt has basically stabilized at i L Drain-source voltage V ds The current is extremely small, and its variation has a negligible impact on EMI. Therefore, injecting current in the same direction as the conventional drive can accelerate the tailing process and reduce switching losses. The control logic for the turn-off process is similar to that for the turn-on process, and a detailed analysis will not be repeated here.

[0034] like Figure 3 The diagram shows the node voltages of the active gate drive during each stage of the switching process. The control process is illustrated below using the turn-on process as an example. During the turn-on delay stage, the gate voltage V... gs From negative voltage V EE Rapid rise, towards the threshold voltage V th Approaching. Current gradient detection voltage V di / dt With voltage gradient detection voltage V dv / dt Both are 0, the operational amplifier of the proportional controller is saturated, and the output voltage V CC During this stage, the Miller plateau has not yet been reached, and the gate voltage V... gs The Miller plateau voltage V has not yet been reached. millier The active drive injects current into the gate, accelerating the charging of the gate capacitor to the threshold voltage. During the current rise phase, the gate voltage V... gs Reaching threshold voltage V th At the same time, it is close to the Miller plateau voltage V millier Drain current i d It begins to rise. Voltage gradient detection voltage V dv / dt The current gradient detection voltage V is 0. di / dt The current is positive. If the current rises too quickly, the active gate drive outputs a negative voltage V. EE The gate draws current from the gate; conversely, it injects current into the gate. If the current rises too slowly, the active gate drive output voltage V... CC During the voltage drop phase, current is injected into the gate; conversely, current is drawn from the gate. d Reaching i L Drain-source voltage V ds Maintain at Miller plateau voltage V millier The active drive controls the plateau duration by adjusting the gate current. During this stage, the current gradient detection voltage V is considered to be... di / dt The voltage gradient detection voltage V is 0 at this time. dv / dt The voltage is positive. If the voltage drops too quickly, the active gate drive outputs a negative voltage V. EE The gate draws current from the gate; conversely, it injects current into the gate. If the current rises too slowly, the active gate drive output voltage V... CC Injecting current into the gate; conversely, drawing current from the gate.

[0035] During the current reverse recovery phase, both voltage and current exhibit gradients. However, the current gradient changes extremely rapidly, exceeding the response speed of the detection circuit, thus the detected current gradient is considered very small. In other words, only current and voltage gradients exist during the current rise and voltage fall phases, respectively, enabling separate control of voltage and current changes. The tailing phase is similar to the turn-on delay phase, with the output V... CC This enables the SiC MOSFET to complete the turn-on process quickly.

[0036] During the tailing stage, the bus voltage V dc The gate voltage V drops to near 0. gs From Miller plateau voltage V millier Rapid rise to output voltage V CC Much higher than the threshold voltage V th As the gate voltage V gs As the gate current increases, it gradually decreases. Compared to the method of injecting a constant current using a current source circuit, this stage saves less time. The control of the turn-off process is similar to that of the turn-on process and will not be described in detail. As shown in the above analysis, this method does not require stage identification; correspondingly, a push-pull circuit can be used to achieve the injection and extraction of additional gate current.

[0037] This example was verified using Ltspice simulation. Figure 4 The gate voltage V0 for active drive during the turn-on process of a SiC MOSFET is given. gs The waveform diagram shows that the gate voltage V is maintained during the turn-on delay phase. gs The initial high-speed rise slows down after reaching the Miller plateau, making the current rise and voltage drop phases smoother, and the final tailing phase also maintains a high-speed rise to the output voltage V. CC There will be a small spike in the middle stage due to energy release, but it will not affect the overall activation speed.

[0038] Figure 5 The conventional gate current i for active drive during SiC MOSFET turn-on process is given. Rg1 With active gate current i Rg2 Waveform diagram. In the diagram, the conventional gate current i during the entire turn-on process is shown. Rg1 A positive value indicates that current is injected into the gate. The source-gate current i... Rg2 The current is positive during the turn-on delay phase, injecting current into the gate; it is negative during the current rise and voltage fall phase, drawing current from the gate; and it is positive during the final tailing phase, continuing to inject current into the gate, consistent with the previous theoretical analysis.

[0039] Figure 6 The drain current i during the active drive of the SiC MOSFET turn-on process is given. d With drain-source voltage Vds Waveform diagram. In the diagram, the current rise and voltage drop phases are relatively smooth, while the voltage and current spikes are significantly lower, with almost no ringing effect.

[0040] Figure 7 The gate voltage V0 for active drive during the turn-off process of the SiC MOSFET is given. gs The waveform shows that the gate voltage V is maintained during the turn-off delay phase. gs The initial rapid descent slows down after reaching the Miller plateau, making the voltage rise and current fall phases more gradual. The final tailing phase also maintains a rapid descent to the negative voltage V. EE .

[0041] Figure 8 The conventional gate current i for active drive during the turn-off process of a SiC MOSFET is given. Rg1 With active gate current i Rg2 Waveform diagram. In the diagram, the conventional gate current i is shown during the turn-off delay, voltage rise, and current fall phases. Rg1 A positive value indicates that current is injected into the gate; while the active gate current i Rg2 When the current is negative, current is drawn from the gate; during the final tailing stage, the normal gate current i Rg1 Current is drawn from the gate, active gate current i Rg2 Injecting current into the gate. This deviates slightly from the theoretical result, but does not affect the overall turn-off speed.

[0042] Figure 9 The drain current i during the active drive of the SiC MOSFET turn-on process is given. d With drain-source voltage V ds Waveform diagram. In the diagram, the voltage rise and current fall phases are relatively smooth, and the voltage and current spikes are significantly lower, with almost no ringing effect.

[0043] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. Since the above embodiments are substantially similar to the method embodiments, their descriptions are relatively simple; relevant parts can be referred to the descriptions of the method embodiments.

[0044] The above embodiments provide a detailed description of the present invention. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A multi-stage SiC MOSFET active gate drive circuit based on dv / dt and di / dt feedback control, characterized in that, Based on a conventional gate drive circuit, a topology improvement is performed to obtain an active gate drive circuit that directly injects or extracts current into or from the gate of the SiC MOSFET, and changes the net gate current input by superimposing it with the output current of the conventional gate drive circuit. The active gate drive circuit includes: A conventional gate driver module has its input terminal used to receive PWM signals and its output terminal connected to the gate of a SiC MOSFET. The dv / dt detection module has its input terminal connected to the drain of the SiC MOSFET; The di / dt detection module has its input terminal connected to the source of the SiC MOSFET; The reference signal generation module receives PWM signals at its input terminal and inputs the output reference signal and the feedback signals output by the dv / dt detection module and the di / dt detection module together to the input terminal of the gradient feedback control module. The gradient feedback control module adopts a two-stage structure design, which is used to achieve proportional control by subtracting the reference signal from the feedback signal; The current injection / extraction module receives the output signal from the gradient feedback control module at its input and connects to the gate of the SiC MOSFET at its output.

2. The multi-stage SiC MOSFET active gate drive circuit according to claim 1, characterized in that, The conventional gate drive module includes a pulse transformer, an inverter, a push-pull drive circuit and a conventional gate drive resistor R g1 ; The pulse transformer is used to isolate the controller from the SiC MOSFET gate drive section, providing electrical isolation while converting the PWM signal sent by the controller into a suitable voltage level; The inverter is used to reverse the PWM signal to ensure that the correct drive signal is delivered to the gate of the SiC MOSFET. The push-pull drive circuit is used to amplify the current; The conventional gate drive resistor R g1 for limiting the gate drive current i g1 and controls the switching speed.

3. The multi-stage SiC MOSFET active gate drive circuit according to claim 1, characterized in that, The dv / dt detection module includes a resistor R v , a capacitor C v , an operational amplifier U1, a compensation resistor R2, an input resistor R1 and a feedback resistor R f1 ; The dv / dt detection module adopts a differential circuit formed by connecting a resistor R v and a capacitor C v in series between the drain and the source of the SiC MOSFET, for detecting the instantaneous change rate dv / dt of the voltage between the drain and the source of the SiC MOSFET, i.e. the rate of voltage rise and fall per unit time. The input resistor R1 and the capacitor C v The input resistor R1 and the capacitor C f1 The input resistor R1 and the capacitor C 4. The multi-stage SiC MOSFET active gate drive circuit according to claim 3, characterized in that, The dv / dt detection module also includes: By utilizing the inverting proportional amplification effect of operational amplifier U1, the input resistor R1 and the feedback resistor R are adjusted. f1 The resistance value can control the proportional coefficient. The magnitude of the voltage gradient is used to obtain the detection voltage, and the calculation relationship is shown below: ； in, This represents the voltage gradient detection voltage of the SiC MOSFET.

5. The multi-stage SiC MOSFET active gate drive circuit according to claim 1, characterized in that, The di / dt detection module includes an equivalent parasitic inductance L s , an operational amplifier U2, a compensation resistor R4, an input resistor R3, and a feedback resistor R f2 ; The equivalent parasitic inductance L s The input resistor R3 is connected in series with the inverting input of the operational amplifier U2, the non-inverting input of the operational amplifier U2 is connected in series with the compensation resistor R4 to ground, and the feedback resistor R f2 is connected between the inverting input and the output of the operational amplifier U2.

6. The multi-stage SiC MOSFET active gate drive circuit according to claim 5, characterized in that, The di / dt detection module also includes: After being amplified by the inverting proportional amplifier U2, the input resistor R3 and the feedback resistor R are adjusted. f2 Resistance control proportional coefficient The magnitude of the current gradient detection voltage is obtained, and the calculation relationship is shown below: ； in, This represents the current gradient detection voltage of the SiC MOSFET.

7. The multi-stage SiC MOSFET active gate drive circuit according to claim 1, characterized in that, The reference signal generating module comprises a bias voltage generator, a bias resistor R6, an operational amplifier U3, a compensation resistor R7, an input resistor R5 and a feedback resistor R f3 ; The input resistor R5 is connected to the non-inverting input of the operational amplifier U3, the non-inverting input of the operational amplifier U3 is connected to ground through the compensation resistor R7 in series; the bias voltage generator is connected to the inverting input of the operational amplifier U3 through the bias resistor R6 in series, the feedback resistor R f3 is connected between the inverting input and the output of the operational amplifier U3.

8. The multi-stage SiC MOSFET active gate drive circuit according to claim 1, characterized in that, The gradient feedback control module comprises operational amplifier U4, operational amplifier U5, input resistor R8, input resistor R9, input resistor R 10 , input resistor R 12 , compensation resistor R 11 , compensation resistor R 13 , feedback resistor R f4 , and feedback resistor R f5 ; The voltage gradient detection voltage signal and the current gradient detection voltage signal are connected to the inverting input terminal of the operational amplifier U4 through input resistors R8 and R9 respectively, and the reference signal is connected to the non-inverting input terminal of the operational amplifier U4 through an input resistor R 10 The voltage gradient detection voltage signal and the current gradient detection voltage signal are connected to the inverting input terminal of the operational amplifier U4 through input resistors R8 and R9 respectively, and the reference signal is connected to the non-inverting input terminal of the operational amplifier U4 through an input resistor R 11 The voltage gradient detection voltage signal and the current gradient detection voltage signal are connected to the inverting input terminal of the operational amplifier U4 through input resistors R8 and R9 respectively, and the reference signal is connected to the non-inverting input terminal of the operational amplifier U4 through an input Input resistance R 12 A compensation resistor R is connected in series between the output of operational amplifier U4 and the non-inverting input of operational amplifier U5, while a compensation resistor R is connected in series between the inverting input of operational amplifier U5. 13 Grounding, feedback resistor R f4 The feedback resistor R is connected between the inverting input and output of operational amplifier U4. f5 It is connected between the inverting input and output of operational amplifier U5.

9. The multi-stage SiC MOSFET active gate drive circuit according to claim 1, characterized in that, The current injection / extraction module includes an emitter follower and a U... be Multiplier circuit and active gate drive resistor R g2 ; In the U be In a voltage multiplier circuit, the voltage divider resistor R 15 With voltage divider resistor R 16 The NPN transistor is connected in series across its base. The collector of the NPN transistor is connected to the base of the upper NPN transistor in the emitter follower, while the emitter of the NPN transistor is connected to the base of the lower PNP transistor. The bias resistor R... 14 Connected in series with the positive power supply and the voltage divider resistor R 15 Between, bias resistor R 17 Connected in series with the negative power supply and the voltage divider resistor R 16 Between; an active gate drive resistor R is connected in series at the output of the emitter follower. g2 It is then connected to the gate of the SiC MOSFET.

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