A rail-to-rail operational amplifier with transient enhancement and low noise
By employing an innovative rail-to-rail operational amplifier circuit architecture, combined with self-biasing and transient enhancement circuitry, the trade-offs between low noise, high slew rate, low power consumption, and high gain in operational amplifiers are resolved, achieving high precision and fast response in signal processing, making it suitable for portable electronic devices.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- HEFEI UNIV OF TECH
- Filing Date
- 2026-03-31
- Publication Date
- 2026-06-23
AI Technical Summary
Existing operational amplifiers are difficult to fully optimize in terms of low noise, high slew rate, low power consumption and high gain. Traditional methods often only focus on one or two performance indicators, resulting in insufficient signal processing accuracy and speed at low power supply voltages.
It employs a rail-to-rail constant transconductance input stage, a high-gain cascode intermediate stage, a high-drive-capability Class AB output stage, an operational amplifier self-biasing circuit, and a transient enhancement circuit. The self-biasing circuit stabilizes the bias point, and the transient enhancement circuit provides transient current, achieving high gain and low noise while balancing high slew rate and low power consumption.
It achieves high signal accuracy and fast response at low power supply voltage, reduces static power consumption, improves signal processing stability and device battery life, and is suitable for portable electronic devices.
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Figure CN122268282A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of integrated circuit design technology, specifically a rail-to-rail operational amplifier with transient enhancement and low noise characteristics. Background Technology
[0002] Operational amplifiers (OPAs) are the cornerstone of analog integrated circuits, and their performance directly determines the accuracy and quality of signal transmission. With the widespread use of portable electronic devices, systems often employ low-voltage power supplies to reduce power consumption. This necessitates that OPAs possess rail-to-rail input / output dynamic range to achieve maximum signal swing at low supply voltages. Simultaneously, when processing weak signals such as those from sensor outputs, OPAs must exhibit extremely low input reference noise. Furthermore, high slew rate and strong output drive capability are also crucial for quickly establishing signals or driving capacitive loads.
[0003] However, in traditional circuit architectures, there are irreconcilable contradictions among these high-performance metrics:
[0004] 1. The contradiction between low noise, high gain, and proper bias: To suppress 1 / f flicker noise generated by the current mirror, the traditional method is to increase the size of the current mirror transistor (width-to-length ratio W / L). However, larger current mirror transistors require higher gate-source voltages (Vgs) to maintain the same bias current. 2. The contradiction between high slew rate and low quiescent power consumption: The slew rate of an operational amplifier is mainly determined by the charging current of the internal nodes to the compensation capacitors. Traditionally, increasing the slew rate is done by increasing the quiescent bias current of the internal branches, but this directly leads to a linear increase in quiescent power consumption, making it difficult to meet the low power consumption requirements of modern electronic devices. 3. Limitations on output stage drive capability: Although Class AB output stages based on transconducting linear loops can provide high efficiency, their maximum output current is limited by the loop's own structure. When a large input signal is applied, some transistors in the loop may tend to turn off, thus limiting the drive capability of the output transistor gate and causing a decrease in transient response speed.
[0005] While existing technologies attempt to address some of the problems, they often focus on only one or two performance metrics, making it difficult to achieve comprehensive optimization across low noise, high slew rate, low power consumption, and high gain. Therefore, there is an urgent need in the field for an innovative circuit architecture that can systematically resolve the aforementioned multiple contradictions. Summary of the Invention
[0006] The purpose of this invention is to provide a rail-to-rail operational amplifier with transient enhancement and low noise characteristics in order to solve the problems mentioned above.
[0007] The technical solution adopted in this invention is as follows: a rail-to-rail operational amplifier with transient enhancement and low noise characteristics, comprising a rail-to-rail constant transconductance input stage, a high-gain cascode intermediate stage, a high-drive-capability Class AB output stage, an operational amplifier self-biasing circuit, and a transient enhancement circuit;
[0008] The output of the rail-to-rail constant transconductance input stage is connected to the input of the high-gain cascode intermediate stage;
[0009] The output of the high-gain cascode intermediate stage is connected to the input of the high-drive-capability Class AB output stage;
[0010] The output of the operational amplifier self-biasing circuit is connected to the bias control terminals of the rail-to-rail constant transconductance input stage and the high-gain cascode intermediate stage, respectively, to provide them with a stable bias voltage.
[0011] The input of the transient enhancement circuit is connected to the control node between the high-gain cascode intermediate stage and the high-drive-capability Class AB output stage, and the output is directly connected to the gate of the output transistor in the high-drive-capability Class AB output stage, thereby realizing the injection and extraction of transient current.
[0012] In a preferred embodiment, the operational amplifier self-biased low-noise bias circuit includes an auxiliary operational amplifier A1, a large capacitor C1 connected between the gate of current mirror N3 and ground, and current mirrors N3, N4, P3, and P4.
[0013] In a preferred embodiment, the non-inverting input of the auxiliary operational amplifier A1 is connected to the fold point A of the cascode branch, its inverting input is connected to a reference voltage Vref, and its output directly drives the gate of the current mirror N3.
[0014] In a preferred embodiment, the transient enhancement circuit includes an input comparator unit, an internal current mirror network, and a current output terminal.
[0015] The input of the transient enhancement circuit is connected to a key node in the output stage control loop (such as the gates of N8 and P8 in the Class AB output stage) to monitor the voltage difference between nodes in real time. The internal current mirror uses a pair of mirror transistors such as P7 / P5 and N4 / N6 to amplify and mirror the current signal after the comparator is triggered. The output is directly connected to the gate of the power output transistor (P0 / N0) in the Class AB output stage to realize the rapid injection or extraction of transient current.
[0016] In a preferred embodiment, the transient enhancement circuit can precisely set the fixed offset voltage Vosdc to a target threshold (e.g., 84mV) by adjusting the parameters of the tail current ISS or resistor R, thereby defining the voltage difference range that triggers the transient enhancement function. The current mirror transistors (P7, P5, N4, N6) need to be low-threshold devices and have a large aspect ratio design to ensure a fast response and provide a sufficiently large transient drive current when triggered. In the static state, when the absolute value of the input node voltage difference is less than Vosdc, there is no current output inside the circuit, and only extremely low static power consumption is maintained. Only when the voltage difference exceeds the threshold will the comparator activate the current mirror network, generate transient currents ISR1,2 and act on the gate of the output transistor.
[0017] In summary, due to the adoption of the above technical solution, the beneficial effects of the present invention are:
[0018] 1. In this invention, the design of the self-biased circuit removes the size constraint of the current mirror tube, allowing for the use of a larger current mirror tube. At the same time, the input pair adopts a rail-to-rail constant transconductance input structure with subthreshold bias, which can effectively suppress various noise interferences in the circuit, providing a clean amplification environment for the processing of weak signals and ensuring that the signal maintains good accuracy and integrity during the amplification process.
[0019] 2. This invention balances the requirements of high slew rate and low power consumption. The introduction of the transient enhancement circuit enables the operational amplifier to respond quickly when processing dynamic large signals, improving the transient change speed of the signal and ensuring rapid signal establishment and tracking; while in the static operating state, the transient enhancement circuit consumes almost no additional power, perfectly balancing the requirements of high-performance signal response and low power consumption, effectively extending the battery life of the device and adapting to the application scenarios of portable electronic devices.
[0020] 3. This invention possesses high and stable gain and bandwidth performance. Within a wide power supply voltage range, the operational amplifier's DC gain and gain-bandwidth product remain stable, and its phase characteristics are maintained within the ideal range. Performance fluctuations are not caused by power supply voltage fluctuations, ensuring continuous and stable signal amplification under different operating environments, providing the system with consistent and reliable signal processing capabilities.
[0021] 4. In this invention, the circuit design does not rely on complex clock technology, the overall structure is robust, and it has good anti-interference ability. This not only reduces the difficulty and cost of circuit implementation, but also improves the stability of long-term operation, can adapt to complex working environments, and is easy to mass-produce and promote applications, providing a reliable signal amplification solution for a variety of electronic devices. Attached Figure Description
[0022] Figure 1 This is a schematic diagram of the overall architecture of the operational amplifier of the present invention;
[0023] Figure 2 This is a diagram of the traditional transconducting linear loop output stage architecture in this invention;
[0024] Figure 3 This is a schematic diagram of the improved structure of the traditional loop in this invention;
[0025] Figure 4 This is a schematic diagram of the specific implementation architecture of the transient enhancement circuit in this invention. Detailed Implementation
[0026] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.
[0027] Example:
[0028] Reference Figure 1-4 A rail-to-rail operational amplifier with transient enhancement and low noise characteristics consists of a rail-to-rail constant transconductance input stage, a high-gain cascode intermediate stage, a high-drive-capability Class AB output stage, and two core innovative modules—an op-amp self-biasing circuit and a transient enhancement circuit.
[0029] The overall architecture of the rail-to-rail operational amplifier is shown in the attached figure. Figure 1 As shown, it specifically includes:
[0030] I. Op-amp self-biasing low-noise bias circuit:
[0031] The structure and connection relationships of the operational amplifier self-biased low-noise bias circuit include: This circuit is the core biasing scheme of the common-source cascode gain stage. It includes an auxiliary operational amplifier A1, a large capacitor C1 connected between the gate of the current mirror (N3) and ground, and current mirrors N3, N4, P3, and P4. The non-inverting input of the auxiliary operational amplifier A1 is connected to the fold point A of the common-source cascode branch, its inverting input is connected to a reference voltage Vref, and its output directly drives the gate of the current mirror N3.
[0032] The working principle and effect of the operational amplifier self-biased low-noise bias circuit are as follows: This structure forms a negative feedback loop. When the gate voltage of N3 fluctuates due to process, voltage, temperature (PVT) variations or signal disturbances, the voltage at fold point A will change accordingly. Auxiliary operational amplifier A1 senses this change and adjusts its output voltage (i.e., the gate voltage of N3), forcing the voltage at point A to stabilize at Vref, thereby establishing an extremely stable static operating point for the cascode branch. Capacitor C1 is used for high-frequency bypass, further enhancing the anti-interference capability of the bias point.
[0033] The op-amp self-biased low-noise bias circuit liberates the size constraints of the current mirror transistor. Since the bias point is dynamically maintained by the feedback loop, large-sized N3, N4, P3, and P4 transistors can be confidently used to significantly suppress 1 / f flicker noise without worrying about excessively high bias voltages. This fundamentally resolves the conflict between low-noise design and high gain with a reasonable bias point.
[0034] II. Class AB output stage with transient signal enhancement capability:
[0035] A review of traditional structures: such as Figure 2 The diagram shows a traditional transconductance linear loop output stage. It sets the quiescent current of the output transistors by the gate-source voltage relationship of transistors M2, M4, M7, and M8 (Vgs2 + Vgs4 = Vgs7 + Vgs8). However, its drawback is that when a large current output is required, the current of M4 decreases or even cuts off, causing the gate voltage of M2 to be pulled low, thus limiting the maximum output current.
[0036] The improved structure of the above-mentioned traditional loop is as follows: Figure 3 As shown. Its core innovation lies in the introduction of a transient enhancement circuit, the specific implementation of which is as follows. Figure 4 As shown. The working principle of the transient boost circuit: This circuit is essentially a window comparator with a fixed input offset voltage (Vosdc). When the output stage control loop node (such as...) Figure 3 When the absolute value of the voltage difference between the gates of N8 and P8 is less than Vosdc, the circuit does not work, the output current ISR1,2 is zero, and the static power consumption is extremely low. When a large input signal causes the voltage difference to exceed Vosdc, the comparator acts quickly, generating a huge transient current (ISR1,2) through its internal current mirror (such as P7 / P5, N4 / N6), which is directly injected into or drawn from the gate of the output transistor (P0 / N0).
[0037] Technical problem solved: This circuit intelligently senses large-signal transient events and "bursts" in additional gate drive current when needed, thereby greatly improving slew rate and output drive capability. Because it operates only during transient periods, it perfectly resolves the contradiction between high slew rate and low quiescent power consumption.
[0038] III. Rail-to-rail constant transconductance input stage operating in the subthreshold region:
[0039] The rail-to-rail constant transconductance input stage uses parallel PMOS and NMOS input pairs and is equipped with precision current summing and switching circuits (such as PB7, NB1-NB4, etc.).
[0040] The rail-to-rail constant transconductance input stage operates as follows: To achieve high transconductance (gm) in the input transistors to suppress thermal noise, they are designed with a large aspect ratio and biased to operate in the subthreshold region. By controlling the current source PB7, the current ratio flowing through the PMOS pair and NMOS pair is dynamically adjusted under different common-mode input voltages, ensuring that the total transconductance gm_total = gmp + gmn remains constant throughout the entire input voltage range.
[0041] The rail-to-rail constant transconductance input stage ensures that the operational amplifier's AC characteristics, such as gain-bandwidth product (GBW) and phase margin, remain stable at rail-to-rail input, thus avoiding performance fluctuations.
[0042] From the above, we can conclude that:
[0043] In this invention, ultra-low noise is achieved: by using a self-biased circuit to allow the current mirror tube to be of a very large size, and by using a subthreshold biased rail-to-rail constant transconductance input design for the input pair, the size of the input pair tube is made very large. In actual measurements, the input reference noise is as low as 16 nV / √Hz at 1kHz.
[0044] In this invention, a balance between high slew rate and low power consumption is achieved: the transient enhancement circuit enables the slew rate to reach 5.3 V / μs under a 100pF load, while this function consumes almost no power in the static state.
[0045] In this invention, high and stable gain and bandwidth are achieved: the DC gain exceeds 112dB over a wide power supply voltage range of 1.8V to 5.5V, the gain-bandwidth product is 5.9MHz, the phase margin reaches 76°, and the performance is stable.
[0046] This invention features high technical integration and good reliability: the entire solution does not rely on complex clock technologies such as chopper stabilization, has a robust structure, is easy to implement, and has good anti-interference and reliability.
[0047] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the term "comprising" or any other variations thereof is intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0048] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims
1. A rail-to-rail operational amplifier with transient enhancement and low noise characteristics, characterized in that: It includes a rail-to-rail constant transconductance input stage, a high-gain cascode intermediate stage, a high-drive-capability Class AB output stage, an op-amp self-biasing circuit, and a transient enhancement circuit. The output of the rail-to-rail constant transconductance input stage is connected to the input of the high-gain cascode intermediate stage; The output of the high-gain cascode intermediate stage is connected to the input of the high-drive-capability Class AB output stage; The output of the operational amplifier self-biasing circuit is connected to the bias control terminals of the rail-to-rail constant transconductance input stage and the high-gain cascode intermediate stage, respectively, to provide them with a stable bias voltage. The input of the transient enhancement circuit is connected to the control node between the high-gain cascode intermediate stage and the high-drive-capability Class AB output stage, and the output is directly connected to the gate of the output transistor in the high-drive-capability Class AB output stage, thereby realizing the injection and extraction of transient current.
2. The rail-to-rail operational amplifier with transient enhancement and low noise characteristics as described in claim 1, characterized in that: The operational amplifier self-biased low-noise bias circuit includes an auxiliary operational amplifier A1, a large capacitor C1 connected between the gate of current mirror N3 and ground, and current mirrors N3, N4, P3, and P4.
3. A rail-to-rail operational amplifier with transient enhancement and low noise characteristics as described in claim 2, characterized in that: The non-inverting input of the auxiliary operational amplifier A1 is connected to the fold point A of the cascode branch, its inverting input is connected to a reference voltage Vref, and its output directly drives the gate of the current mirror N3.
4. A rail-to-rail operational amplifier with transient enhancement and low noise characteristics as described in claim 1, characterized in that: The transient enhancement circuit includes an input comparator unit, an internal current mirror network, and a current output terminal. The input of the transient enhancement circuit is connected to a key node in the output stage control loop to monitor the voltage difference between nodes in real time. The internal current mirror uses P7 / P5, N4 / N6 and other mirror transistor pairs to amplify and mirror the current signal after the comparator is triggered. The output is directly connected to the gate of the power output transistor (P0 / N0) of the Class AB output stage to realize the rapid injection or extraction of transient current.
5. A rail-to-rail operational amplifier with transient enhancement and low noise characteristics as described in claim 1, characterized in that: The transient enhancement circuit precisely sets the fixed offset voltage Vosdc to the target threshold by adjusting the parameters of the tail current ISS or the resistor R, thereby defining the voltage difference range that triggers the transient enhancement function.
6. A rail-to-rail operational amplifier with transient enhancement and low noise characteristics as described in claim 1, characterized in that: The current mirror transistors (P7, P5, N4, N6) of the transient enhancement circuit need to be low-threshold devices and designed with a large aspect ratio.