A structure and a manufacturing method of a fan-shaped hole ring
By employing a fan-shaped hole ring structure and ink disk etching technology in the circuit board, the problems of circuit channel blockage and signal loss caused by the hole ring are solved, improving the reliability of electrical connections and signal integrity, and simplifying the manufacturing process.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SIHUI FUJI ELECTRONICS TECHNOLOGY CO LTD
- Filing Date
- 2026-04-22
- Publication Date
- 2026-06-23
AI Technical Summary
In high-density circuit board design, improper via ring design can lead to problems such as blocked circuit channels, signal transmission loss, and insufficient connection reliability, which affects the development of high-density and high-frequency circuit boards.
The structure employs a fan-shaped hole ring. By coating the surface of the hole ring with alkali-soluble photocurable ink, a fan-shaped or circular ink disk is formed. The ink disk is then removed by an etching process. Combined with copper plating and electroplating processes, a three-dimensional connection and isolation band is formed, enabling multi-segment conductivity.
It solved the problem of blocked line channels, improved the reliability of electrical connections and signal integrity, reduced signal transmission loss, simplified the processing flow, and reduced costs.
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Figure CN122269592A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of printed circuit board manufacturing technology, specifically to the structure and manufacturing method of a fan-shaped hole ring. Background Technology
[0002] As electronic devices rapidly evolve towards miniaturization, high density, and high frequency, the wiring density of circuit boards continues to increase, placing increasingly stringent demands on drilling precision and annular ring design. An annular ring, also known as a pad annular ring, refers to the ring-shaped copper area between the edge of a drilled hole (such as a via or component hole) on a circuit board and the outer edge of the surrounding copper foil pad. Its width is half the difference between the pad diameter and the drilled hole diameter, and it is a key design element ensuring circuit connectivity and mechanical strength.
[0003] Hole rings are an important component of the metallized hole structure on circuit boards. They work in conjunction with drill holes and pads to achieve electrical connections and component fixation between different layers of circuitry. Their structure mainly consists of a copper layer (hole copper) on the inner wall of the drill hole and surrounding circular copper foil pads. Their core functions include two aspects: first, electrical connection, ensuring reliable conduction between the copper layer inside the hole and the external circuitry; and second, mechanical anchoring, preventing the hole copper from separating from the pads under thermal stress or mechanical impact.
[0004] The most obvious problem caused by via rings is that they occupy too much wiring space, preventing the circuit board's pre-set traces from being laid out properly, or causing potential problems such as signal interference and abnormal electrical conductivity after laying them out. Considering the characteristics of via ring design and manufacturing, their causes and specific hazards can be categorized as follows: 1. In high-density circuit board design, via diameters are often less than 0.2mm, and the spacing between traces is extremely small, requiring very high space utilization. If the via ring is designed to be too wide, it will directly encroach on the routing space of adjacent traces, causing the pre-set trace channels to be blocked; the encroachment of the via ring space will directly lead to routing failure, or force designers to modify the trace path, increasing design complexity and the probability of errors.
[0005] 2. Besides line channel blockage, signal transmission loss is another core electrical performance problem caused by vias, especially in high-frequency signal transmission scenarios. The structural parameters and manufacturing quality of the via directly affect signal integrity, leading to signal attenuation and distortion, which in turn affects the operating performance of electronic equipment. Based on the signal transmission principle, its loss mechanism is mainly closely related to the parasitic parameters, impedance discontinuities, and structural defects of the via.
[0006] 3. In addition to the typical problems of blocked circuit channels and signal transmission loss, insufficient connection reliability is also a significant hidden danger caused by via rings. In conventional through-holes, the inner layer via ring and the copper in the via only have a ring-shaped contact surface with a limited contact area. Under long-term thermal stress, mechanical vibration, or environmental corrosion, poor contact and desoldering are prone to occur, leading to abnormal circuit conduction and affecting the long-term operational reliability of the circuit board.
[0007] These problems hinder the development of circuit boards towards higher density and higher frequency, making it impossible to meet the design requirements of miniaturized electronic devices and thus affecting the technological upgrading of the electronic equipment industry. Therefore, targeted improvements to the via ring problem and the proposal of practical solutions have significant engineering value and practical implications. Summary of the Invention
[0008] To address the aforementioned shortcomings of existing technologies, this invention provides a structure and manufacturing method for a fan-shaped perforated ring. By designing the perforated plate in a fan shape, the layout space of adjacent lines is avoided, thus solving the problem of line channels being blocked by the perforated ring.
[0009] In a first aspect, to solve the above-mentioned technical problems, the present invention provides a structure and manufacturing method of a sector-shaped perforated ring, comprising the following steps: S1. When fabricating inner layer circuits on the core board, a fan-shaped perforated plate with an outer diameter larger than the hole diameter is also fabricated at the corresponding drilling position. The center point of the fan-shaped perforated plate coincides with the center of the hole position. S2. A fan-shaped layer of alkali-soluble photocurable ink is coated on the surface of the hole disk, and the alkali-soluble photocurable ink is exposed and cured by UV light to form an ink disk; and the outer diameter of the ink disk is larger than the diameter of the drilled hole, and the center point of the fan-shaped ink disk coincides with the center of the drilled hole. S3. The core board and the outer copper foil are stacked and pressed together in the stacking order using PP to form the production board; S4. Drill through holes at the corresponding drilling positions on the production board to expose the inner ink pads in the through holes. Then, use an alkaline solution to dissolve and remove the ink pads on the hole walls to form an etched area. S5. Perform copper plating and electroplating on the production board to create copper plating layers on the hole walls and etched areas.
[0010] Furthermore, the area of the perforated disk is at least 1 / 4 of a circle.
[0011] Furthermore, when the intersection of the arc-shaped edge and the radial edge of the via is not connected to the inner layer circuitry, the intersection of the arc-shaped edge and the radial edge of the via is chamfered to form an obtuse angle structure between the radial edge and the chamfered edge.
[0012] Furthermore, in step S2, the radius of the ink disk minus the radius of the drill hole is greater than or equal to the drill hole offset tolerance plus 20 μm.
[0013] Furthermore, in step S2, the radius of the ink disk is smaller than the radius of the hole disk.
[0014] Furthermore, in step S2, the thickness of the ink disk is ≥20μm.
[0015] Furthermore, in step S4, during etching, the circuit board is immersed in a sodium hydroxide solution at 60 degrees Celsius for 30-120 minutes; and the mass percentage of the solute in the sodium hydroxide solution is 10%.
[0016] Furthermore, after step S5, the following steps are also included: S6. The outer layer circuit is fabricated on the production board using a negative film process (with vacuum resin plugging) or a positive film process (pattern electroplating), and an open-shaped hole ring is fabricated on the outer periphery of the through hole; the central angle of the hole ring is ≥90°.
[0017] Secondly, the present invention also provides another structure and manufacturing method of a sector-shaped perforated ring, comprising the following steps: S10. When fabricating inner layer circuits on the core board, a fan-shaped perforated plate with an outer diameter larger than the hole diameter of the drilled hole is also fabricated at the corresponding drilled hole position. The center point of the fan-shaped perforated plate coincides with the center of the drilled hole position. S11. A circular alkali-soluble photocurable ink is coated at the drilled hole position of the core board, and the alkali-soluble photocurable ink is exposed and cured by UV light to form a circular ink disk; and the outer diameter of the circular ink disk is larger than the hole diameter at the drilled hole position. S12. The core board and the outer copper foil are stacked and pressed together in the order of stacking by PP to form a production board, and the production board has at least two circular ink disks in the inner layer corresponding to each drilling position. S13. Drill through holes at the corresponding drilling positions on the production board to expose the inner circular ink pads in the through holes. Then, use an alkaline solution to dissolve and remove the circular ink pads on the hole walls to form circular etched areas, and the ratio of the depth to the thickness of the etched areas is ≥3. S14. Perform copper plating on the production board to deposit a copper layer on the hole wall, while the etched areas are not deposited with copper. S15. The production board is subjected to DC flash plating, but no copper layer is plated at the etched areas. S16. Then, pulse electroplating is performed on the production board to remove the copper layer on the hole wall between two adjacent circular etched positions. S17. Finally, DC electroplating is performed on the production board to divide the inside of the through hole into a through hole with at least two conductive sections, and to achieve the purpose of zero pins in the conductive section of the copper layer on the hole wall.
[0018] Furthermore, the area of the fan-shaped perforated plate (copper foil) is at least 1 / 4 of a circle; Furthermore, when the intersection of the arc-shaped edge and the radial edge of the via is not connected to the inner layer circuitry, the intersection of the arc-shaped edge and the radial edge of the via is chamfered to form an obtuse angle structure between the radial edge and the chamfered edge.
[0019] Furthermore, in step S11, the radius of the circular ink disk is A, the radius of the drilled hole is B, the drill offset tolerance is C, the thickness of the circular ink disk is D, and (ABC) / D≥3.
[0020] Furthermore, in step S11, the radius of the circular ink disk is smaller than the radius of the aperture disk, and the minimum distance between the circular ink disk and the adjacent inner layer circuit is not less than 75μm.
[0021] Furthermore, in step S11, the thickness of the circular ink disk is ≥20μm.
[0022] Furthermore, in step S13, during etching, the circuit board is immersed in a sodium hydroxide solution at 60 degrees Celsius for 30-120 minutes; and the mass percentage of the solute in the sodium hydroxide solution is 10%.
[0023] Furthermore, the following steps are included after step S17: S18. The outer layer circuit is fabricated on the production board using a negative film process (with vacuum resin plugging) or a positive film process (pattern electroplating), and an open-shaped hole ring is fabricated on the outer periphery of the through hole; the central angle of the hole ring is ≥90°.
[0024] Compared with the prior art, the present invention has the following beneficial effects: In this invention, the inner layer of the via is first designed as a fan shape, which means removing the portion of the existing circular via that is close to the adjacent circuit, so that the via avoids the layout space and passage of the adjacent circuit, thus solving the problem of the circuit passage being blocked by the via ring. Furthermore, a fan-shaped circular ink disk formed by alkali-soluble UV curable ink is coated on the surface of the via. After drilling, the circular ink disk inside the hole is etched away by an etching process to form an etched position exposed on the surface of the via. After the through hole is metallized, a three-dimensional connection can be formed between the copper plating layer on the hole wall and the via of the inner layer circuit, making the connection between the two more robust, thereby improving the reliability of the electrical connection between the inner layer circuit and the copper layer on the hole wall.
[0025] Secondly, the intersection of the arc edge and the radial edge of the orifice is chamfered to reduce the stub length of the signal during orifice transmission, thereby improving the electrical performance (signal integrity) of the circuit board.
[0026] Furthermore, for cases where through-holes require isolation (0-pile head), the inner layer's circular ink pads are designed to be circular, with at least two circular ink pads in each through-hole. After etching, the depth-to-thickness ratio of the circular etched position is ≥3. This results in poor conductivity at the circular etched position during copper deposition, preventing copper deposition. By utilizing the non-copper deposition at the circular etched position, an isolation zone is formed between every two adjacent circular etched positions. The copper layer on the hole wall at the isolation zone is dissolved during subsequent pulse electroplating, thus forming a copper-free isolation zone between every two adjacent circular etched positions. Only multiple segments of the required separated hole wall copper layer are retained within the through-hole, thereby enabling the transmission of multiple signals within the same hole and achieving the interconnection of any layer in the through-hole. This achieves the interconnection of the outer layer with any inner layer and the interconnection between at least two arbitrary inner layers. Moreover, this method eliminates the need for multiple back-drilling operations to achieve the goal of transmitting two sets of signals in one hole, resulting in low cost and simple processing. It can replace existing back-drilling, blind buried vias, and HDI board manufacturing, and can also reduce the number of holes and layers in multilayer boards.
[0027] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and will become apparent from the description or may be learned by practice of the invention. Attached Figure Description
[0028] Figure 1 This is a schematic diagram showing the fan-shaped perforated plate (copper foil) fabricated on the core board in the embodiment. Figure 2 This is a schematic diagram of the fan-shaped ink disk fabricated on the perforated disk in Example 1; Figure 3 This is a schematic diagram of the inner layer plane after drilling and metallization of holes on the production board in Example 1; Figure 4 This is a schematic diagram of the circular ink disk after it has been fabricated on the perforated disk in Example 2. Detailed Implementation
[0029] The technical solutions of the present invention will be clearly and completely described below with reference to the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0030] It should be understood that, when used in this specification and the appended claims, the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.
[0031] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.
[0032] It should also be further understood that the term "and / or" as used in this specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.
[0033] Example 1 This embodiment illustrates a method for manufacturing a circuit board, which includes the fabrication of a fan-shaped via ring structure, comprising the following processing steps: (1) Cutting: Cut at least one core board according to the panel size of 520mm×620mm. The core board is 0.5mm thick and the copper layer on both surfaces of the core board is 0.5oz thick. The core board has drilling positions, which are the positions where drilling is required in subsequent processing.
[0034] (2) Inner layer circuit fabrication (negative film process): Inner layer pattern transfer, a wet film (i.e., photosensitive alkali-soluble film) is coated on the core board using a vertical coating machine. The thickness of the wet film is controlled at 10 micrometers. The inner layer circuit is exposed using a fully automatic exposure machine with 5-6 exposure rulers (21 exposure rulers). After development, the inner layer circuit pattern is formed. Inner layer etching, the inner layer circuit is etched out on the core board after exposure and development. The inner layer line width is measured to be 3mil. Inner layer AOI, after the film is removed, the inner layer circuit is inspected for defects such as open circuits, short circuits, line gaps, and line pinholes. Products with defects are scrapped, and products without defects are sent to the next process.
[0035] Among them, such as Figure 1 As shown, when the inner layer circuit 11 is fabricated, when the inner layer circuit passes through the hole pad (PAD) position at the drilled hole position, a fan-shaped hole pad 1 with an outer diameter larger than the hole diameter at the drilled hole position is fabricated on the core board at the corresponding drilled hole position. The center point (i.e., vertex) of the fan-shaped hole pad 1 coincides with the center of the drilled hole position. That is, the part of the existing circular hole pad that is close to the adjacent circuit side is removed so that the hole pad avoids the layout space and passage of the adjacent circuit, thus solving the problem of the circuit passage being blocked by the hole ring.
[0036] Specifically, the area of the via should be at least 1 / 4 circle. This is to ensure sufficient bonding force between the via and the substrate, and to avoid affecting the reliability of the connection with the copper layer on the via wall due to an insufficient area.
[0037] Preferably, the radius of the borehole disk is 100-150 μm larger than the radius of the drilled hole, so that the circumference width retained by the borehole disk after subsequent drilling is controlled within 100-150 μm.
[0038] Preferably, when the intersection of the arc-shaped edge and the radial edge of the via 1 is not connected to the inner layer circuitry, the intersection of the arc-shaped edge and the radial edge of the via 1 is chamfered to form a chamfered edge 10. This involves cutting off one or both ends of the arc-shaped corner of the via to create an obtuse angle between the radial edge and the chamfered edge, reducing the stub length of the signal during transmission through the via and thus improving the electrical performance (signal integrity) of the circuit board. In other words, the chamfered edge is created simultaneously with the etching process of the inner layer circuitry.
[0039] When the intersection of the arc-shaped edge and the radial edge of the orifice plate 1 is connected to the inner layer circuit, since the intersection point is integrated with the inner layer circuit and there is no stub, the intersection point does not need to be chamfered.
[0040] Coated ink: such as Figure 2 As shown, a fan-shaped alkali-soluble photocurable ink is coated on the surface of the hole disk, and the alkali-soluble photocurable ink is exposed and cured by UV light to form ink disk 2. The outer diameter of ink disk 2 is larger than the diameter of the hole position, and the center point (i.e., the vertex) of the fan-shaped ink disk 2 coincides with the center of the hole position.
[0041] Specifically, the radius of the ink pad minus the radius of the drill hole is greater than or equal to the drill offset tolerance plus 20μm. This ensures that even if the hole is offset due to the drilling offset tolerance of the drilling machine during drilling, the surface of the hole pad can still be exposed within the entire ring width of the etched area after the etched area is formed. The exposed ring width of the hole pad surface is at least 20μm, so that the entire arc surface of the hole pad can form a reliable three-dimensional connection with the copper layer of the hole wall after copper plating and electroplating.
[0042] It is understandable that when the radius of the ink disk is Aμm, the radius of the drill hole is Bμm, and the drill hole offset tolerance is Cμm, AB≥C+20μm.
[0043] Specifically, the thickness of the ink disk is ≥20μm, preferably 30-50μm.
[0044] Specifically, the radius of ink disk 2 is smaller than the radius of hole disk 1.
[0045] As a preferred embodiment, the central angle of the ink disk is greater than or equal to the central angle of the aperture disk, ensuring that the entire arc length range of the aperture disk is exposed after subsequent etching.
[0046] Lamination: The browning speed is based on the thickness of the bottom copper layer. At least one core board and the outer copper foil are laminated together in a preset order using PP (i.e., prepreg). Then, according to the Tg of the board material, appropriate lamination conditions are selected to laminate the laminated board to form the production board.
[0047] (5) Drilling: Based on existing drilling technology, drill through holes at the corresponding drilling positions on the production board according to design requirements, so as to expose the ink pad and the hole pad on the wall surface of the through hole; after drilling, the inner hole pad and ink pad both form an open fan-shaped annular structure (e.g. Figure 3 (As shown).
[0048] (6) Etching: Immerse the production board in a sodium hydroxide solution at 60 degrees Celsius for 120 minutes to remove the ink pads on the hole walls and form etched sites. The ratio of the depth to the thickness of the etched sites should be controlled within 2. This ratio can ensure that a copper layer will be deposited at the etched sites during the subsequent chemical copper plating process.
[0049] In one embodiment, the concentration of the sodium hydroxide solution is 10%, meaning that the mass percentage of the solute (i.e., sodium hydroxide) in the sodium hydroxide solution is 10%, and the remainder is water.
[0050] (7) Copper plating: A thin layer of copper is deposited on the board surface, hole walls and etched areas using chemical copper plating to metallize the through holes. The backlight test is level 10, and the thickness of the copper plating in the holes is 0.5 micrometers.
[0051] (8) Electroplating: According to the design requirements, the production board is electroplated or filled with electroplating to thicken the copper layer on the hole wall and fill the etched areas.
[0052] (9) Fabrication of outer layer circuits (positive film process): outer layer pattern transfer, using a fully automatic exposure machine and positive film circuit film, with 5-7 exposure rulers (21 exposure rulers) to complete the exposure of the outer layer circuits, after development, the outer layer circuit pattern is formed on the multilayer board; outer layer pattern electroplating, and then copper and tin plating on the production board respectively, setting the electroplating parameters according to the required copper thickness; then stripping, etching and tin stripping in sequence, etching out the outer layer circuits on the production board; outer layer AOI, using an automatic optical inspection system, by comparing with CAM data, to detect whether there are defects such as open circuits, gaps, incomplete etching, short circuits, etc. in the outer layer circuits.
[0053] Preferably, when the outer layer circuit also needs to pass through the outer layer via (PAD) position, the outer layer via is also designed to reduce the size, that is, to remove the part of the via circumference that conflicts with the outer layer circuit, so that the via forms an open fan-shaped ring, so that the outer layer via avoids the layout space and passage of adjacent circuits, thus solving the problem of the outer layer circuit passage being blocked by the via.
[0054] Specifically, the central angle of the hole ring is ≥90°.
[0055] Of course, negative film processing combined with vacuum resin via plugging can also be used when fabricating outer layer circuitry.
[0056] (10) Solder resist and screen printing: After screen printing solder resist ink on the surface of the production board, it is then subjected to pre-curing, exposure, development and heat curing treatment in sequence to cure the solder resist ink into a solder resist layer; specifically, the solder resist ink on the TOP side and the characters on the TOP side are added with "UL mark", thereby coating a layer on the lines and substrates that do not need to be soldered to prevent bridging between lines during soldering, provide a permanent electrical environment and chemical corrosion resistance, and at the same time beautify the appearance.
[0057] (11) Surface treatment (immersion nickel and gold): The copper surface of the solder pads of the solder mask opening position is uniformly deposited with a nickel layer and a gold layer of a certain required thickness through chemical principle. The thickness of the nickel layer is 3-5μm; the thickness of the gold layer is 0.05-0.1μm.
[0058] (12) Electrical test: Test the electrical conductivity of the finished board. The test method used for this board is: flying probe test.
[0059] (13) Molding: Based on existing technology and design requirements, the circuit board is made with a shape tolerance of + / -0.05mm.
[0060] (14) FQC: Inspect the appearance of the circuit board according to the customer's acceptance standards and the applicant's inspection standards. If there are any defects, repair them in time to ensure excellent quality control for the customer.
[0061] (15) FQA: Re-test the appearance of the circuit board, the thickness of the copper in the holes, the thickness of the dielectric layer, the thickness of the solder mask, the thickness of the inner copper layer, etc. to see if they meet the customer's requirements.
[0062] (16) Packaging: The circuit boards are sealed and packaged according to the packaging method and quantity required by the customer, and desiccant and humidity card are placed in the packaging before shipment.
[0063] Example 2 This embodiment illustrates a method for fabricating a circuit board with arbitrary layer interconnection in through-holes, including the fabrication of a fan-shaped via ring structure, which sequentially includes the following processing steps: (1) Cutting: Cut at least two core boards according to the panel size of 520mm×620mm. The thickness of the core board is 0.5mm and the copper layer thickness on both surfaces of the core board is 0.5oz. The core board has drilling positions, which are the positions where drilling is required in subsequent processing.
[0064] (2) Inner layer circuit fabrication (negative film process): Inner layer pattern transfer, a wet film (i.e., photosensitive alkali-soluble film) is coated on the core board using a vertical coating machine. The thickness of the wet film is controlled at 10 micrometers. The inner layer circuit is exposed using a fully automatic exposure machine with 5-6 exposure rulers (21 exposure rulers). After development, the inner layer circuit pattern is formed. Inner layer etching, the inner layer circuit is etched out on the core board after exposure and development. The inner layer line width is measured to be 3mil. Inner layer AOI, after the film is removed, the inner layer circuit is inspected for defects such as open circuits, short circuits, line gaps, and line pinholes. Products with defects are scrapped, and products without defects are sent to the next process.
[0065] Among them, such as Figure 1 As shown, when the inner layer circuit is fabricated, when the inner layer circuit passes through the hole pad (PAD) position at the drill position, a fan-shaped hole pad 1 with an outer diameter larger than the hole diameter at the drill position is fabricated on the core board at the corresponding drill position. The center point (i.e., vertex) of the fan-shaped hole pad 1 coincides with the center of the drill position. That is, the part of the existing circular hole pad that is close to the adjacent circuit side is removed so that the hole pad avoids the layout space and passage of the adjacent circuit, thus solving the problem of the circuit passage being blocked by the hole ring.
[0066] Specifically, the area of the via should be at least 1 / 4 circle. This is to ensure sufficient bonding force between the via and the substrate, and to avoid affecting the reliability of the connection with the copper layer on the via wall due to an insufficient area.
[0067] Preferably, the radius of the borehole disk is 100-150 μm larger than the radius of the drilled hole, so that the circumference width retained by the borehole disk after subsequent drilling is controlled within 100-150 μm.
[0068] Preferably, when the intersection of the arc-shaped edge and the radial edge of the via 1 is not connected to the inner layer circuitry, the intersection of the arc-shaped edge and the radial edge of the via 1 is chamfered to form a chamfered edge 10. This involves cutting off one or both ends of the arc-shaped corner of the via to create an obtuse angle between the radial edge and the chamfered edge, reducing the stub length of the signal during transmission through the via and thus improving the electrical performance (signal integrity) of the circuit board. In other words, the chamfered edge is created simultaneously with the etching process of the inner layer circuitry.
[0069] When the intersection of the arc-shaped edge and the radial edge of the orifice plate 1 is connected to the inner layer circuit, since the intersection point is integrated with the inner layer circuit and there is no stub, the intersection point does not need to be chamfered.
[0070] (3) Applying ink: such as Figure 4As shown, a circular alkali-soluble photocurable ink is coated on the surface of the hole disk, and the alkali-soluble photocurable ink is exposed and cured by UV light to form a circular ink disk 3. The outer diameter of the circular ink disk 3 is larger than the diameter of the hole at the drilled position, and the center of the circular ink disk 3 coincides with the center of the drilled position.
[0071] Specifically, the radius of the circular ink pad is A, the radius of the drilled hole is B, the drill offset tolerance is C, and the thickness of the circular ink pad is D. (ABC) / D≥3, which makes the ratio of the depth to the thickness of the circular etched hole formed after drilling and etching very poor at the circular etched hole, ensuring that no copper layer will be deposited at the circular etched hole during the later chemical copper etching process.
[0072] Specifically, the thickness of the circular ink disk is ≥20μm, preferably 30-50μm.
[0073] Specifically, the radius of the circular ink disk 2 is smaller than the radius of the perforated disk 1.
[0074] Preferably, the minimum spacing between the circular ink pad and the adjacent inner layer circuit is not less than 75 μm, so as to avoid the adjacent inner layer circuit being exposed in the circular etched position due to drilling offset after drilling and etching.
[0075] Lamination: The browning speed is based on the thickness of the bottom copper layer. At least two core boards and outer copper foil are laminated together in a preset order using PP (prepreg). Then, appropriate lamination conditions are selected according to the board material Tg to laminate the laminated boards to form a production board. The production board has at least two circular ink pads in the inner layer corresponding to each drilled hole. The number of circular ink pads is preferably a multiple of 2, so that multiple circular ink pads in each through hole are set in pairs and used in conjunction. Every two adjacent circular ink pads form an isolation group. The copper layer of the hole wall between two circular ink pads in the same isolation group needs to be removed as an isolation strip. The copper layer of the hole wall between two adjacent isolation groups needs to be retained.
[0076] In one embodiment, during the stacking process, the circular ink pads corresponding to the same drill hole position in two adjacent core boards can be arranged adjacently, thereby forming an isolation zone between the circular ink pads of the two adjacent core boards in the later stage, separating the copper layer of the hole wall on the two adjacent core boards; of course, when circular ink pads are provided at the drill hole positions on both surfaces of the same core board, the copper layer of the hole wall on the upper and lower surfaces of the core board will be separated by the circular ink pads on the upper and lower surfaces.
[0077] (5) Drilling: According to the existing drilling technology, drill through holes at the corresponding drilling positions on the production board according to the design requirements, so as to expose the circular ink disk and the hole disk on the wall of the through hole; after drilling, the inner hole disk forms a fan ring and the circular ink disk forms a ring structure.
[0078] (6) Etching: The production board is immersed in a sodium hydroxide solution at 60 degrees Celsius for 120 minutes to remove the circular ink pads on the hole wall by etching, forming circular etched positions. The ratio of the depth to the thickness of the circular etched position is ≥3. The conductivity of the circular etched position under this ratio is very poor, which can ensure that no copper layer will be deposited on the circular etched position during the later chemical copper process.
[0079] In one embodiment, the concentration of the sodium hydroxide solution is 10%, meaning that the mass percentage of the solute (i.e., sodium hydroxide) in the sodium hydroxide solution is 10%, and the remainder is water.
[0080] (7) Copper plating: A thin layer of copper is deposited on the board surface and hole walls using chemical copper plating to metallize the through holes. The backlight test is level 10. The thickness of the copper plating in the hole is 0.5 micrometers, while no copper layer is deposited at the circular etched position.
[0081] DC flash plating: According to the design requirements, the circuit board is first subjected to DC flash plating. The current density during DC flash plating is 1.5ASD and the time is 6min, thereby thickening the copper in the holes by 3-5 micrometers. Because no copper layer is deposited at the circular etched positions, the conductivity of the copper layer on the hole wall between every two adjacent circular etched positions (i.e., circular etched positions in the same group) is very poor or even non-conductive. That is, the copper layer on the hole wall in this isolation section is not thickened during DC flash plating.
[0082] (9) Pulse plating: Then, periodic forward and reverse pulse plating is used to plate the circuit board. Because no copper layer is deposited at the circular etched position, the copper layer of the hole wall between two adjacent circular etched positions has very poor conductivity or even no conductivity. During forward and reverse pulse plating, the copper layer of the hole wall on the isolation band will dissolve into the plating solution to form a copper-free isolation band. The copper layer of the hole wall with current conduction will be thickened by electroplating to separate the inside of the through hole into a through hole with at least two conductive sections.
[0083] In one embodiment, the total pulse electroplating time is 6 minutes, and the current density of the forward pulse electroplating in each cycle is 3 ASD and the time is 10 ms, while the current density of the reverse pulse electroplating is 9 ASD and the time is 10 ms.
[0084] (10) DC electroplating: Finally, DC electroplating is performed on the production board. The copper layer on the hole wall with current conduction will be electroplated to thicken by 30 micrometers, and finally a conductive layer of the required thickness is formed.
[0085] (11) Fabrication of outer layer circuit (positive film process): outer layer pattern transfer, using a fully automatic exposure machine and positive film circuit film, the outer layer circuit is exposed with an exposure ruler of 5 to 7 divisions (21 divisions exposure ruler), after development, the outer layer circuit pattern is formed on the multilayer board; outer layer pattern electroplating, and then copper and tin plating are performed on the production board respectively, and the electroplating parameters are set according to the required copper thickness; then the film is removed, etched and tin is removed in sequence, and the outer layer circuit is etched on the production board; outer layer AOI, using an automatic optical inspection system, by comparing with CAM data, to detect whether there are defects such as open circuit, gap, incomplete etching, short circuit, etc. in the outer layer circuit.
[0086] Preferably, when the outer layer circuit also needs to pass through the outer layer via (PAD) position, the outer layer via is also designed to reduce the size, that is, to remove the part of the via circumference that conflicts with the outer layer circuit, so that the via forms an open fan-shaped ring, so that the outer layer via avoids the layout space and passage of adjacent circuits, thus solving the problem of the outer layer circuit passage being blocked by the via.
[0087] Specifically, the central angle of the hole ring is ≥90°.
[0088] Of course, negative film processing combined with vacuum resin via plugging can also be used when fabricating outer layer circuitry.
[0089] (12) Solder resist and screen printing: After screen printing solder resist ink on the surface of the production board, it is then subjected to pre-curing, exposure, development and heat curing treatment in sequence to cure the solder resist ink into a solder resist layer; specifically, the solder resist ink on the TOP side and the characters on the TOP side are added with "UL mark", so as to coat the lines and substrates that do not need to be soldered with a protective layer that prevents bridging between lines during soldering, provides a permanent electrical environment and resists chemical corrosion, and at the same time plays a role in beautifying the appearance.
[0090] (13) Surface treatment (immersion nickel and gold): The copper surface of the solder pads of the solder mask opening position is uniformly deposited with a nickel layer and a gold layer of a certain required thickness through chemical principle. The thickness of the nickel layer is 3-5μm; the thickness of the gold layer is 0.05-0.1μm.
[0091] (14) Electrical test: Test the electrical conductivity of the finished board. The test method used for this board is: flying probe test.
[0092] (15) Molding: Based on existing technology and design requirements, the circuit board is made with a shape tolerance of + / -0.05mm.
[0093] (16) FQC: Inspect the appearance of the circuit board according to the customer's acceptance standards and the applicant's inspection standards. If there are any defects, repair them in time to ensure excellent quality control for the customer.
[0094] (15) FQA: Re-test the appearance of the circuit board, the thickness of the copper in the holes, the thickness of the dielectric layer, the thickness of the solder mask, the thickness of the inner copper layer, etc. to see if they meet the customer's requirements.
[0095] (17) Packaging: The circuit boards are sealed according to the packaging method and quantity required by the customer, and desiccant and humidity card are placed in the packaging before shipment.
[0096] The technical solutions provided by the embodiments of the present invention have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of the embodiments of the present invention. The descriptions of the embodiments above are only for helping to understand the principles of the embodiments of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the embodiments of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.
Claims
1. A structure and manufacturing method of a sector-shaped perforated ring, characterized in that, Includes the following steps: S1. When fabricating inner layer circuits on the core board, a fan-shaped perforated plate with an outer diameter larger than the hole diameter is also fabricated at the corresponding drilling position. The center point of the fan-shaped perforated plate coincides with the center of the hole position. S2. A fan-shaped layer of alkali-soluble photocurable ink is coated on the surface of the hole disk, and the alkali-soluble photocurable ink is exposed and cured by UV light to form an ink disk; and the outer diameter of the ink disk is larger than the diameter of the drilled hole, and the center point of the fan-shaped ink disk coincides with the center of the drilled hole. S3. The core board and the outer copper foil are stacked and pressed together in the stacking order using PP to form the production board; S4. Drill through holes at the corresponding drilling positions on the production board to expose the inner ink pads in the through holes. Then, use an alkaline solution to dissolve and remove the ink pads on the hole walls to form an etched area. S5. Perform copper plating and electroplating on the production board to create copper plating layers on the hole walls and etched areas.
2. The structure and manufacturing method of the sector-shaped perforated ring according to claim 1, characterized in that, The area of the perforated plate is at least 1 / 4 of a circle.
3. The structure and manufacturing method of the sector-shaped perforated ring according to claim 1, characterized in that, When the intersection of the arc-shaped edge and the radial edge of the via is not connected to the inner layer circuit, the intersection of the arc-shaped edge and the radial edge of the via is chamfered to form an obtuse angle structure between the radial edge and the chamfered edge.
4. The structure and manufacturing method of the sector-shaped perforated ring according to claim 1, characterized in that, In step S2, the radius of the ink disk minus the radius of the drill hole is greater than or equal to the drill hole offset tolerance plus 20 μm.
5. The structure and manufacturing method of the sector-shaped perforated ring according to claim 1, characterized in that, In step S2, the thickness of the ink disk is ≥20μm.
6. The structure and manufacturing method of the sector-shaped perforated ring according to any one of claims 1 to 5, characterized in that, In step S2, the radius of the ink disk is smaller than the radius of the hole disk.
7. The structure and manufacturing method of the sector-shaped perforated ring according to claim 1, characterized in that, In step S4, during etching, the circuit board is immersed in a sodium hydroxide solution at 60 degrees Celsius for 30-120 minutes; and the mass percentage of the solute in the sodium hydroxide solution is 10%.
8. The structure and manufacturing method of the sector-shaped perforated ring according to claim 1, characterized in that, Step S5 is followed by the following steps: S6. Fabricate the outer layer circuitry on the production board, and simultaneously fabricate an open-shaped annular hole around the periphery of the through-hole; the central angle of the annular hole is ≥90°.
9. A structure and manufacturing method of a sector-shaped perforated ring, characterized in that, Includes the following steps: S10. When fabricating inner layer circuits on the core board, a fan-shaped perforated plate with an outer diameter larger than the hole diameter of the drilled hole is also fabricated at the corresponding drilled hole position. The center point of the fan-shaped perforated plate coincides with the center of the drilled hole position. S11. A circular alkali-soluble photocurable ink is coated at the drilled hole position of the core board, and the alkali-soluble photocurable ink is exposed and cured by UV light to form a circular ink disk; and the outer diameter of the circular ink disk is larger than the hole diameter at the drilled hole position. S12. The core board and the outer copper foil are stacked and pressed together in the order of stacking by PP to form a production board, and the production board has at least two circular ink disks in the inner layer corresponding to each drilling position. S13. Drill through holes at the corresponding drilling positions on the production board to expose the inner circular ink pads in the through holes. Then, use an alkaline solution to dissolve and remove the circular ink pads on the hole walls to form circular etched areas, and the ratio of the depth to the thickness of the etched areas is ≥3. S14. Perform copper plating on the production board to deposit a copper layer on the hole wall, while the etched areas are not deposited with copper. S15. The production board is subjected to DC flash plating, but no copper layer is plated at the etched areas. S16. Then, pulse electroplating is performed on the production board to remove the copper layer on the hole wall between two adjacent circular etched positions. S17. Finally, the production board is subjected to DC electroplating to isolate the inside of the through hole into a through hole with at least two conductive sections.
10. The structure and manufacturing method of the sector-shaped perforated ring according to claim 9, characterized in that, The area of the orifice is at least 1 / 4 circle; when the intersection of the arc edge and the radial edge of the orifice is not connected to the inner layer circuit, the intersection of the arc edge and the radial edge of the orifice is chamfered so that an obtuse angle structure is formed between the radial edge and the chamfered edge of the orifice.