Matching structure for coaxial TSV-RDL transition region and design method thereof

Abstract

The application discloses a matching structure for a coaxial TSV-RDL transition area, comprising a silicon substrate, the upper and lower ends of the silicon substrate are respectively provided with a silicon dioxide isolation layer, the center of the silicon substrate is provided with a coaxial TSV, the upper end of the coaxial TSV is connected with an upper layer RDL signal transmission component, and the lower end of the coaxial TSV is connected with a lower layer RDL signal transmission component. S 11 、 S 21 The transmission characteristics of the matching structure designed by the application are improved.

Description

Technical Field

[0001] This invention belongs to the field of high-speed interconnect technology of three-dimensional integrated circuits (3D ICs) and advanced packaging, and relates to a matching structure for a coaxial TSV-RDL transition region. This invention also relates to a design method for a matching structure for a coaxial TSV-RDL transition region. Background Technology

[0002] As semiconductor technology enters the post-Moore's Law era, simply relying on process node iterations is no longer sufficient to meet the demands of high-performance, high-density, and low-power chips requiring high computing power. Against this backdrop, heterogeneous integration and chiplets have become crucial pathways to improve system performance. 3D integrated interconnect architecture breaks the planar interconnect limitations of traditional 2.5D interposers, further shortening the interconnect distance between chips and significantly improving package bandwidth and system integration density. The TSV (Transient Switching Layer) handles vertical signal transmission, while the redistribution layer is responsible for lateral signal routing. The transition region between the two (TSV-RDL transition) is a critical node for the shift from vertical to lateral signal transmission; its bandwidth and electrical performance determine the signal integrity of the entire interconnect link.

[0003] However, coaxial TSVs and RDLs differ fundamentally in their structural form, physical dimensions, and transmission characteristics: coaxial TSVs are cylindrical coaxial structures with strong electromagnetic shielding capabilities and lumped parameter characteristics; RDLs are planar wiring structures exhibiting distributed parameter characteristics. This structural discontinuity leads to severe impedance mismatch in the TSV-RDL transition region at millimeter waves and higher frequencies, causing signal reflection and transmission loss. Therefore, it is necessary to propose a compensation structure and its parameterized design method for the coaxial TSV-RDL transition region to improve the return loss of the signal channel in the target frequency band. S 11 Insertion loss S 21 . Summary of the Invention

[0004] The purpose of this invention is to provide a matching structure for the coaxial TSV-RDL transition region, which improves impedance by introducing interdigital capacitance to compensate for impedance abrupt changes. S 11 , S 21 Its transmission characteristics.

[0005] Another object of the present invention is to provide a design method for a matching structure for a coaxial TSV-RDL transition region.

[0006] The first technical solution adopted in this invention is a matching structure for the coaxial TSV-RDL transition region, including a silicon substrate, with silicon dioxide isolation layers respectively provided at the upper and lower ends of the silicon substrate, a coaxial TSV provided at the center of the silicon substrate, an upper RDL signal transmission component connected to the upper end of the coaxial TSV, and a lower RDL signal transmission component connected to the lower end of the coaxial TSV.

[0007] The first technical solution of this invention is further characterized by:

[0008] The upper RDL signal transmission component includes a U-shaped grounding RDL arranged outward in a horizontal direction, a signal RDL arranged horizontally at the center of the grounding RDL, one end of the signal RDL being connected to the upper end of the coaxial TSV, and an upper RDL interdigitated capacitor array being arranged in the area between the signal RDL and the grounding RDL.

[0009] The lower RDL signal transmission component includes a U-shaped grounding RDL arranged outward in a horizontal direction, a signal RDL arranged horizontally at the center of the grounding RDL, one end of the signal RDL being connected to the lower end of the coaxial TSV, and a lower RDL interdigitated capacitor array being arranged in the area between the signal RDL and the grounding RDL.

[0010] The upper RDL interdigitated capacitor array and the lower RDL interdigitated capacitor array have the same structure, both including several pairs of capacitors to ground.

[0011] Each pair of capacitors to ground includes a signal capacitor unit and a grounding capacitor unit.

[0012] The first compensation capacitor is formed by connecting the pairs of capacitors to ground in parallel in the upper RDL interdigitated capacitor array. C m1 .

[0013] The pairs of capacitors connected to ground in the lower-level RDL interdigitated capacitor array are connected in parallel to form the second compensation capacitor. C m2 .

[0014] The second technical solution adopted in this invention is a design method for a matching structure in the coaxial TSV-RDL transition region, wherein the first compensation capacitor... C m1 The capacitance value is equal to that of the second compensation capacitor. C m2 Capacity, all equal to C m , C m The solution process is as follows: The minimum forward transmission coefficient is... S 21，min Defined as low frequency band S 21 ( f The first local minimum of ) will determine the operating frequency.f op The frequency corresponding to the second intersection point of the tangents of the minimum value is defined as the frequency, and is calculated using the following formulas (1) and (2). C m : (1) (2) in, e r The relative permittivity of the oxide is . h sub For substrate thickness, n s The number of interdigitated fingers. w s The width of the forked fingers. l s The length of the forked fingers, p s The distance between the interdigitated fingers.

[0015] The beneficial effects of this invention are as follows: (1) By establishing an electrical equivalent model of the through-silicon via (TSV) to redistribution layer (RDL) transition channel and introducing a surrogate model, the circuit performance index is quickly mapped to the design parameters without repeated full-wave electromagnetic simulation, which significantly shortens the design cycle and improves design efficiency. (2) Interdigitated capacitors are introduced at the TSV-RDL transition as matching elements to reduce reflection and improve insertion loss, thereby improving the efficiency of insertion loss within the target frequency band. S Parameter transmission characteristics and suppression of high-frequency impedance mismatch; (3) The matching structure proposed in this invention is compatible with standard 3D IC processes, requires no additional process steps, and has little impact from parasitic parameters, making it suitable for high-frequency broadband chiplet systems. Attached Figure Description

[0016] Figure 1(a) is a three-dimensional schematic diagram of the coaxial TSV-RDL signal transmission channel; Figure 1(b) is a cross-sectional view of the coaxial TSV-RDL signal transmission channel; Figure 2(a) is N Class Union π Schematic diagram of equivalent circuit; Figure 2(b) shows the coaxial TSV-RDL transmission channel and matching network. N Step π Equivalent circuit model; Figure 3(a) is a comparison between the equivalent electrical model of the coaxial TSV transmission line and the full-wave simulation results of HFSS; Figure 3(b) is a comparison of the RDL equivalent electrical model and the HFSS full-wave simulation results; Figure 3(c) is a comparison between the electrical model of the TSV-RDL transmission channel and the full-wave simulation results of HFSS; Figure 4 It is a coaxial TSV-RDL signal transmission channel and matching network. π Schematic diagram of equivalent circuit; Figure 5(a) is a three-dimensional schematic diagram of the TSV-RDL signal transmission channel with compensated interdigital capacitor in the matching structure of the coaxial TSV-RDL transition region of the present invention. Figure 5(b) is a top view of the TSV-RDL signal transmission channel with compensated interdigital capacitors in the matching structure of the coaxial TSV-RDL transition region of the present invention. Figure 6 This invention relates to key performance indicators in the optimization of matching capacitors in the matching structure for the coaxial TSV-RDL transition region. S 21,min and f op Definition diagram; Figure 7 This invention relates to the matching capacitor optimization process in the matching structure for the coaxial TSV-RDL transition region. C m Under scanning S 21 Family of frequency response curves; Figure 8 This invention relates to the process of optimizing the matching capacitor in the matching structure of the coaxial TSV-RDL transition region. f op and S 21,min Compared to C m The quadratic fitting curve; Figure 9(a) shows the return loss in Ansys HFSS before and after the coaxial TSV-RDL signal transmission channel adopts the matching compensation structure in the matching structure of the coaxial TSV-RDL transition zone of the present invention. S 11 Comparison chart of improved simulation curves; Figure 9(b) shows the insertion loss in Ansys HFSS before and after the coaxial TSV-RDL signal transmission channel adopts the matching compensation structure in the matching structure of the coaxial TSV-RDL transition zone of the present invention. S 21 Comparison chart of improved simulation curves; Figure 10 This is a graph showing the ESR and ESL versus frequency after introducing a matching capacitor in the matching structure for the coaxial TSV-RDL transition region of this invention.

[0017] In the diagram, 1. Signal RDL, 2. Ground RDL, 3. Inner metal, 4. BCB dielectric filling material, 5. Outer metal, 6. Silicon dioxide isolation layer, 7. Silicon substrate, 8. TSV-RDL transition region, 9. Bump, 10. Coaxial TSV, 11. Signal current path, 12. Return current path, 13. Upper RDL interdigitated capacitor array, 14. Lower RDL interdigitated capacitor array. Detailed Implementation

[0018] The following detailed description is provided in conjunction with specific implementation methods.

[0019] Example 1 This invention relates to a matching structure for the coaxial TSV-RDL transition region. Based on 3D IC standard technology, it addresses the high-frequency impedance mismatch problem of the coaxial TSV-RDL transition structure in the millimeter-wave band in Chiplet systems by extracting RLCG parameters, constructing an equivalent circuit, and using the equivalent model to quickly design compensation structures and mitigate the effects of parasitic parameters, thereby achieving high-performance impedance matching design.

[0020] Example 2 This invention relates to a matching structure for the coaxial TSV-RDL transition region, wherein the proposed coaxial TSV-RDL signal transmission channel structure is shown in Figure 1(a). A three-dimensional electromagnetic model as shown in Figure 1 is established in a High Frequency Structure Simulator (HFSS). The model includes a coaxial TSV10, a signal RDL1, a ground RDL2, a bump 9, a dielectric layer 6, and a silicon substrate 7. The metal part adopts a finite conductivity material model, and the dielectric part is set according to its relative permittivity. Port A and port B are respectively set at the input and output ends of the interconnect link; the ports adopt a lumped port form, and the port cross-section is defined as a rectangular area from the signal RDL1 to the ground RDL2. The signal RDL is defined as a signal conductor, and the ground RDL is defined as a reference conductor. The port reference impedance is set to 50Ω. Figure 1(b) is a cross-sectional view of the coaxial TSV-RDL signal transmission channel.

[0021] Table 1 Geometric Parameters of Coaxial TSV-RDL Signal Transmission Channel

[0022] R 1 represents the radius of the metal inside the TSV. R 2 is the dielectric radius of BCB (benzocyclobutene).t Cu The outer copper layer thickness of the TSV. t ox For the thickness of the TSV isolation oxide layer, H TSV The height of the through hole. R TSV The radius of the through hole is... w RDL The width of the RDL. t RDL For RDL thickness, l RDL RDL length, t Bump The thickness of the convex dot.

[0023] The geometric parameters are shown in Table 1. Based on the model with the above geometric parameters, a full-wave simulation of the 0-120 GHz frequency band was performed in the full-wave electromagnetic simulation tool HFSS. The frequency sampling points were set to a step size of 1 GHz within the range of 0~120 GHz, obtaining a total of 121 frequency points to ensure coverage of the electromagnetic characteristic changes of the target frequency band. The simulation outputs the admittance matrix of the two-port network. Y Each frequency point Y The matrix contains Y 11 , Y 12 , Y 21 , Y 22 .

[0024] Based on the extracted two-port admittance matrix Y Derivation of symmetry π Key admittance parameters of the equivalent circuit: series admittance Y s Used to characterize the series branch characteristics and parallel admittance Y P The formulas for characterizing the properties of parallel branches at both ends are as follows: (1) (2) Let series impedance Z S =1 / Y S The formulas for calculating the parasitic parameters of RLCG (series resistance R, series inductance L, parallel conductance G, and parallel capacitance C) are as follows: (3) Where, angular frequency ω=2 πf ( f(This refers to the operating frequency). The unit length parameter can be obtained by dividing the parameter by the length. Port 1 and port 2 correspond to the input and output terminals of the interconnect link, respectively. R , L , C , G For each segment π The equivalent parameters of the network are given in units of Ω, H, F, and S.

[0025] Using the above method, the RLCG parameters per unit length of TSV and RDL within the 0-120GHz frequency band were calculated as a function of frequency. Since both TSV and RDL exhibit significant distributed parameter characteristics at high frequencies, to avoid neglecting the distributed effect, as shown in Figure 2(a), both require the use of... N Class Alliance π The circuit is modeled equivalently, and this model, based on distributed parameter circuit theory, achieves a discretized approximation of the transmission line. Its characteristics approximate the frequency domain response of an ideal transmission line, making it a typical example. π The equivalent circuit consists of one series impedance branch and two parallel admittance branches. Cascading order. N The empirical formula is as follows: (4) in, L For interconnect segment length, f max The highest frequency in the frequency band. e r The relative permittivity, c The speed of light in a vacuum is given. The established RDL and TSV equivalent circuits are cascaded to obtain the electrical model of the coaxial TSV-RDL signal transmission channel proposed in this invention, as shown in Figure 2(b), where port 1 and port 2 correspond to the input and output terminals of the interconnection link, respectively. The proposed equivalent circuit model is verified by comparing it with full-wave simulation in HFSS software. In the simulation environment, the conductivity of each material is... s as follows: s Cu =5.8×10 7 S / m, s Si =10 S / m, e BCB =2.6 e 0, where, e 0 is the free-space dielectric constant. In the simulation environment, the simulation solution type is set to Driven Modal, and a lumped port is assigned. The lumped port is defined as a rectangle from the signal RDL to the ground RDL, and the signal RDL and ground RDL are defined as the signal conductor and the reference conductor, respectively.

[0026] As shown in Figures 3(a) and 3(b), the simulation results of the model for both the transmission line RDL and the through-silicon via (TSV) are in line with expectations. Figure 3(c) shows the overall simulation results of the coaxial TSV-RDL signal transmission channel proposed in this invention. The electrical modeling results of the reflection loss are in high agreement with the full-wave simulation results over a wide bandwidth, and maintain good consistency even in high-frequency bands above 60 GHz.

[0027] Example 3 The transition region between TSV and RDL, due to abrupt changes in structural morphology, leads to impedance discontinuities, causing a surge in equivalent inductance and resulting in inductive impedance mismatch. For example... Figure 4 As shown, compensation capacitors are respectively set at the upper TSV-RDL transition terminal and the lower TSV-RDL transition terminal of the signal transmission channel, and are respectively denoted as the first compensation capacitor. C m1 With the second compensation capacitor C m2 ,and C m1 = C m2 = C m By utilizing its capacitive characteristics to offset the inductive peak in the transition region, impedance matching is achieved. Figures 5(a) and 5(b) illustrate the introduction of a compensation capacitor in the transition region between TSV and RDL in this invention. C m1 and C m2 The corresponding geometric structure.

[0028] like Figure 4 As shown in Figures 5(a) and 5(b), the compensation capacitor C m The circuit equivalent parameters include the first compensation capacitor located at the upper TSV-RDL transition terminal. C m1 and the second compensation capacitor located at the lower TSV-RDL transition terminal C m2 The two are numerically equal. The device implementation is as follows: an interdigitated capacitor array 13 of the upper RDL is introduced into the left-side planar routing area of ​​the upper RDL to form... C m1 A lower-level RDL interdigitated capacitor array 14 is introduced into the right-side planar routing area of ​​the lower-level RDL to form... C m2 Both form a parallel ground capacitance between the signal terminal and the ground terminal to offset the inductive mismatch in the transition region and achieve impedance matching.

[0029] The interdigitated capacitor array structurally includes an upper RDL interdigitated capacitor array 13 arranged on the upper RDL and a lower RDL interdigitated capacitor array 14 arranged on the lower RDL. The upper RDL interdigitated capacitor array 13 is only located in the left-side planar trace area of ​​the upper transition end of the coaxial TSV10, and the lower RDL interdigitated capacitor array 14 is only located in the right-side planar trace area of ​​the lower transition end of the coaxial TSV10. The upper RDL interdigitated capacitor array 13 is composed of 12 interdigitated capacitor units numbered I–XII connected in parallel to form the first compensation capacitor. C m1 The lower-level RDL interdigitated capacitor array 14 is composed of 12 interdigitated capacitor units numbered XIII–XXIV connected in parallel to form a second compensation capacitor. C m2 .

[0030] The interdigitated capacitor units on the left are numbered sequentially from the end closest to the coaxial TSV10 towards the distance from it as I, II, III, IV, V, VI, VII, VIII, IX, X, XI, XII; the interdigitated capacitor units on the right are similarly numbered sequentially from the end closest to the coaxial TSV10 towards the distance from it as XIII, XIV, XV, XVI, XVII, XVIII, XIX, XX, XXI, XXII, XXIII, XXIV.

[0031] The lower interdigitated capacitor units in the left region are I–VI, and the upper interdigitated capacitor units in the left region are VII–XII; the upper interdigitated capacitor units in the right region are XIII–XVIII, and the lower interdigitated capacitor units in the right region are XIX–XXIV. The 12 interdigitated capacitor units numbered I–XII are located in the upper RDL and are connected in parallel to form the first compensation capacitor. C m1 The 12 interdigitated capacitor units numbered XIII–XXIV are located in the lower RDL and are connected in parallel to form the second compensation capacitor. C m2 The inner conductor radius of the coaxial TSV10 is... R 1. The radius of the BCB medium is R 2. The thickness of the outer conductor copper is t Cu , n s The number of interdigitated fingers. w s The width of the forked fingers. l s The length of the forked fingers, p s The distance between the interdigitated fingers. l wire The length of the RDL metal wire directly connecting the interdigitated structure. w wireThe width of the RDL metal wire directly connecting the interdigitated structure.

[0032] Each interdigitated capacitor unit includes a signal interdigitated electrode connected to the signal terminal and a ground interdigitated electrode connected to the ground terminal. The signal terminals of each unit in the same array are connected in parallel to the corresponding layer signal trace, and the ground terminals are connected in parallel to the corresponding layer ground trace, thereby obtaining the target compensation capacitor. C m1 , C m2 The sizes are equal, and in subsequent embodiments, they are... C m The alternatives are all related to the geometric parameters and number of interdigital capacitor units, so that the goals determined in the circuit design stage can be mapped to the upper RDL interdigital capacitor array 13 and the lower RDL interdigital capacitor array 14 in the device implementation stage, respectively.

[0033] Example 4 C m The surrogate model for the design process is as follows: To quantitatively characterize the matching structure, two key parameters are introduced: such as Figure 6 Minimum forward transmission coefficient S 21，min Defined as low frequency band S 21 ( f The first local minimum of ) and the operating frequency f op The frequency is defined as the frequency corresponding to the second intersection of the tangents of the minimum value. The capacitance is estimated using the empirical relation (5), where... A 1 and A 2 is given by equation (6), e r The relative permittivity of the oxide is . h sub For substrate thickness, n s The number of interdigitated fingers. w s The width of the forked fingers. l s The length of the forked fingers, p s The distance between the interdigitated fingers.

[0034] (5) , (6) Among them, A1 and A2 can be called empirical fitting coefficients. A1 represents the capacitance contribution per unit length brought by the intermediate repeating interdigitated unit, and A2 represents the capacitance contribution per unit length brought by the edge interdigitated part.

[0035] based on Figure 4 The electrical model of the signal transmission channel shown is simulated using the circuit simulation tool ADS software, from DC to 120 GHz. S The parameters, while using 0.5 fF as the step size, will... C m From 9fF to 13fF, as Figure 7 As shown. By extracting different C m corresponding S 21,min and f op The dependency between these two parameters can be accurately described by a second-order polynomial: (7) (8) Fitted curve and Figure 8 The simulation points show a high degree of agreement, and the residuals in the 9-13 fF range are extremely small. These validation results demonstrate that the quadratic model is sufficient to meet the needs of local design space exploration and can accurately derive the optimal matching capacitors that meet the requirements of different application frequency bands and insertion loss in microwave interconnect systems.

[0036] In the device implementation stage, the geometric parameters of the interdigital capacitor unit are initially selected according to equations (5)–(6) to ensure that the theoretical capacitance value of the interdigital capacitor unit is within the target range. C m The feasible range; then, as shown in Figure 5(b), the 12 interdigitated capacitor units numbered I–XII are placed in parallel and connected in the dashed box area on the left side of the upper RDL to form a... C m1 The 12 interdigitated capacitor units numbered XIII–XXIV are arranged in parallel and connected in the right dashed box area of ​​the lower RDL to form C m2 This process maps circuit-level target parameters to the layout device structure. Finally, the resulting interdigitated capacitor array structure is verified using Q3D electromagnetic extraction or HFSS full-wave simulation to ensure that the extracted equivalent capacitance matches the target... C m Basically the same.

[0037] Example 5 Based on the equivalent model of coaxial TSV-RDL interconnection and the design method of transition region compensation capacitor established in Examples 1 to 4, this example provides a specific implementation of a coaxial TSV-RDL transition region matching structure suitable for Chiplet systems, and provides a set of example structural parameters of matching capacitors for electromagnetic simulation verification.

[0038] Figure 1(a) is a three-dimensional view of the transmission channel. The coaxial TSV10 vertically penetrates the silicon substrate 7, and its top is mechanically and electrically connected to the horizontally arranged RDL1 through bump 9. RDL2 is grounded. The space between the inner conductor 3 and the outer conductor 5 of the TSV is filled with BCB dielectric 4, and the outer conductor is wrapped with a silicon dioxide isolation layer 6. Figure 1(b) is a cross-sectional view along the central axis of the coaxial TSV10, showing the radial dimensions and material layers. The inner conductor 3, BCB dielectric 4, outer conductor 5, and isolation oxide layer 6 are distributed sequentially from the inside to the outside. The signal current 11 starts from the signal RDL1, passes through the inner conductor 3, and reaches the signal RDL1 on the other side. The return current 12 starts from the power supply side ground RDL2, passes through bump 9, flows along the coaxial TSV shielding layer 5, passes through the connection between the coaxial TSV10 and RDL1, and finally reaches the ground RDL2 on the other side, thus completing the closure of the coaxial loop. The cross-sectional dimensions and connection method of RDL1 and convex point 9 are presented intuitively. The structural discontinuity causes impedance discontinuity at the transition point 8 between coaxial TSV10 and RDL1.

[0039] Figure 5(a) is a three-dimensional schematic diagram of the TSV-RDL signal transmission channel with compensated interdigital capacitors according to the present invention. The inner conductor of the coaxial TSV serves as the through signal path, and the outer conductor serves as the through ground path. Upper RDL interdigital capacitor array 13 and lower RDL interdigital capacitor array 14 are introduced into the planar trace areas on both sides of the coaxial TSV to achieve impedance regulation. These arrays consist of periodically staggered signal metals (shown in shaded areas) and ground metals, with dielectric 6 filling the spaces between the metals. Each interdigital capacitor unit numbered I–XXIV consists of a set of signal interdigital electrodes connected to the signal and a set of ground interdigital electrodes connected to ground. The two types of interdigitates are interlaced in the plane while maintaining an insulating gap, forming a ground capacitance through electric field coupling. The equivalent capacitance of the parallel array is formed by the superposition of the capacitances of each numbered unit. The unit capacitance strength is determined by the geometric parameters of the interdigitates. w s and l s Affects the effective coupling area. p s It affects the electric field coupling gap and the capacitance density per unit length.

[0040] In this invention, the upper RDL and lower RDL of the TSV-RDL signal transmission channel have the same size. The upper RDL interdigitated capacitor array 13 and the lower RDL interdigitated capacitor array 14 have the same size.

[0041] The proxy model proposed in this invention enables rapid analysis from performance indicators to design parameters, significantly improving design efficiency compared to the existing method of iterative analysis using full-wave simulation tools such as HFSS.

[0042] The interdigitated capacitors used in this invention have extremely low series parasitic parameters, a compact structure, adjustable capacitance values, and are compatible with three-dimensional integration processes.

[0043] This invention can employ conventional coaxial TSV formation and double-sided RDL processes; interdigitated patterns are photolithographically formed on the upper and lower RDL layers at the TSV-RDL transition and electroplated to form IDC.

[0044] To evaluate the improvement of signal transmission by the impedance matching structure proposed in this invention, according to equation (8), in f op At 85GHz, determine C m =12 fF. According to equation (8), the target matching capacitance can be determined to be approximately 12 fF; combined with equations (5)–(6), the geometric parameters are determined as follows: n s =12, w s =3 m m, l s =13 m m, p s =3 m m, l wire =50 m m, w wire =6 m m.

[0045] Figure 9(a) and 9(b) Figure 9 shows the comparison of the return loss and insertion loss simulation curves in Ansys HFSS before and after the coaxial TSV-RDL signal transmission channel of this invention adopts the matching compensation structure. As can be seen from Figure 9, compared with the uncompensated case, the simulation results show that: (1) the transmission performance in the 85GHz band is improved by 0.51 dB; (2) the matching performance is significantly improved - the return loss at 63GHz is improved by 31.23 dB, and at 85GHz by 16.92 dB, which has good broadband matching performance; (3) in the 0-85GHz band, S 21 The average boost in the frequency band was 0.218 dB. S 11 The amplitude decreased by 20.54 dB, with corresponding AUC values ​​of 17.58 dB·GHz and 1705.49 dB·GHz, respectively, confirming the broadband rather than narrowband advantage brought by the compensation capacitor. These results fully demonstrate the role of the compensation capacitor in optimizing the transmission performance of TSV-RDL transition in the millimeter-wave band.

[0046] Example 6 Matching performance may be degraded due to the additional impedance caused by the equivalent series resistance (ESR) and equivalent series inductance (ESL). A precise equivalent model incorporating ESR and ESL is available, such as... Figure 4 As shown. This embodiment implements a compensation capacitor. C m The interdigitated capacitor array was used as the extraction target, including the interdigitated capacitor units and their connecting metal lines to signal and ground traces. A three-dimensional parasitic parameter extraction model was built using Ansys Q3DExtractor. The signal terminal was set as the terminal connected to the signal bus metal line of the interdigitated array, and the ground terminal was set as the reference terminal connected to the return metal line. A frequency scan was performed in the 0–120 GHz band to obtain the equivalent impedance of the structure as a function of frequency. The parasitic values ​​of the capacitors extracted from the Q3D extractor are as follows: Figure 10 As shown.

[0047] Parasitic parameters of ESL and ESR are obtained through Z s ( f )= R ESR +j wL ESL Modeling was performed. Q3D extraction showed that above 30GHz, L ESL ≈3.26 pH, and throughout the entire frequency band R ESR <161 mΩ. Under the 50Ω port condition, the first-order boundary of mismatch and resistive loss can be obtained according to formulas (9)-(10).

[0048] , (9) , (10) After calculation X L (85GHz)≈1.74Ω, XL(120 GHz)≈2.46Ω; therefore, in the range of 85~120GHz... IL mis <0.003dB, while equation (13) gives IL R ≈0.014dB, in R ESR When the resistance is 0.161Ω, the total loss is less than 0.02dB, so ESR and ESL can be ignored.

Claims

1. A matching structure for the coaxial TSV-RDL transition region, characterized in that: The device includes a silicon substrate (7), with silicon dioxide isolation layers (6) at the top and bottom ends of the silicon substrate (7), and a coaxial TSV (10) at the center of the silicon substrate (7). The upper end of the coaxial TSV (10) is connected to an upper RDL signal transmission component, and the lower end of the coaxial TSV (10) is connected to a lower RDL signal transmission component.

2. The matching structure for the coaxial TSV-RDL transition region according to claim 1, characterized in that: The upper RDL signal transmission component includes a U-shaped grounding RDL (2) arranged outward along the horizontal direction. A signal RDL (1) is arranged at the center of the grounding RDL (2) along the horizontal direction. One end of the signal RDL (1) is connected to the upper end of the coaxial TSV (10). An upper RDL interdigitated capacitor array (13) is arranged in the area between the signal RDL (1) and the grounding RDL (2).

3. The matching structure for the coaxial TSV-RDL transition region according to claim 2, characterized in that: The lower RDL signal transmission component includes a U-shaped grounding RDL (2) arranged outward in the horizontal direction. A signal RDL (1) is arranged in the horizontal direction at the center of the grounding RDL (2). One end of the signal RDL (1) is connected to the lower end of the coaxial TSV (10). The area between the signal RDL (1) and the grounding RDL (2) is provided with a lower RDL interdigitated capacitor array (14).

4. The matching structure for the coaxial TSV-RDL transition region according to claim 3, characterized in that: The upper RDL interdigitated capacitor array (13) and the lower RDL interdigitated capacitor array (14) have the same structure, both including several pairs of capacitors to ground.

5. The matching structure for the coaxial TSV-RDL transition region according to claim 4, characterized in that: Each pair of ground capacitors includes a signal capacitor unit and a ground capacitor unit.

6. The matching structure for the coaxial TSV-RDL transition region according to claim 4, characterized in that: The pairs of ground capacitors in the upper RDL interdigitated capacitor array (13) are connected in parallel to form the first compensation capacitor. C m1 .

7. The matching structure for the coaxial TSV-RDL transition region according to claim 6, characterized in that: The pairs of ground capacitors in the lower RDL interdigitated capacitor array (14) are connected in parallel to form the second compensation capacitor. C m2 .

8. A design method for a matching structure used in the transition region of a coaxial TSV-RDL, characterized in that: The first compensation capacitor C m1 The capacitance value is equal to that of the second compensation capacitor. C m2 Capacitance values ​​are all equal to C m , C m The solution process is as follows: The minimum forward transmission coefficient is... S 21，min Defined as low frequency band S 21 ( f The first local minimum of ) will determine the operating frequency. f op The frequency corresponding to the second intersection point of the tangents of the minimum value is defined as the frequency, and is calculated using the following formulas (1) and (2). C m : (1) （2） in, ε r The relative permittivity of the oxide is . h sub For substrate thickness, n s The number of interdigitated fingers. w s The width of the forked fingers. l s The length of the forked fingers, p s The distance between the interdigitated fingers.

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