Multilayer electronic assembly and method of manufacturing a multilayer electronic assembly

Abstract

This disclosure provides a multilayer electronic component and a method for manufacturing the multilayer electronic component. The multilayer electronic component includes: a body comprising a dielectric layer and inner electrodes alternately disposed with respect to the dielectric layer in a first direction; a first side edge portion and a second side edge portion disposed on a fifth surface and a sixth surface of the body, respectively; and a first external electrode and a second external electrode disposed on a third surface and a fourth surface of the body, respectively. Each of the first side edge portion and the second side edge portion has an upper portion in the first direction that is asymmetrical relative to the lower portion in the first direction, and the width of the upper portion of each of the first side edge portion and the second side edge portion in the first direction in the third direction increases with increasing distance from the second surface.

Description

[0001] This application claims the benefit of priority to Korean Patent Application No. 10-2024-0196022, filed on December 24, 2024, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0002] This disclosure relates to a multilayer electronic component. Background Technology

[0003] Multilayer ceramic capacitors (MLCCs, a type of multilayer electronic component) are chip capacitors mounted on printed circuit boards of various types of electronic products, such as imaging devices (including liquid crystal displays (LCDs) and plasma display panels (PDPs)), computers, smartphones, and mobile phones, for charging or discharging from them.

[0004] MLCCs are used as components in a variety of electronic devices due to their small size, guaranteed high capacitance, and ease of installation. With the miniaturization and high output power of various electronic devices such as computers and mobile devices, the demand for miniaturization and high capacitance of multilayer ceramic capacitors is also increasing.

[0005] To achieve miniaturization and high capacitance in MLCCs, it may be necessary to maximize the effective area of ​​the internal electrodes. To this end, in order to maximize the area of ​​the internal electrodes in the width direction and suppress the step portion in the width direction caused by the internal electrodes, a method has been applied in which the side edge pieces are additionally attached to the two surfaces (exposing the internal electrode pattern) of the unit stack strip in the width direction and then sintering is performed.

[0006] However, in other methods of attaching side edge pieces, the process can be complex, and the side edge pieces and unit laminate strips can be significantly affected by heat and pressure, causing problems such as poor adhesion between the side edge pieces and unit laminate strips and deformation, which may lead to reduced reliability of the final product.

[0007] Therefore, there is a need to develop a multilayer electronic component with a novel structure that can simplify the complex processes based on existing technologies and improve the reliability of multilayer electronic components. Summary of the Invention

[0008] One aspect of this disclosure is to provide a multilayer electronic component with excellent reliability.

[0009] Another aspect of this disclosure is to simplify the manufacturing process of multilayer electronic components, including side edges.

[0010] However, the aspects of this disclosure are not limited to those set forth herein, and will be more readily understood in the process of describing specific exemplary embodiments of this disclosure.

[0011] According to one aspect of this disclosure, a multilayer electronic component is provided, the multilayer electronic component comprising: a body including a dielectric layer and inner electrodes alternately disposed with respect to the dielectric layer in a first direction; the body having a first surface and a second surface opposite to each other in the first direction, a third surface and a fourth surface connected to the first surface and the second surface, and a fifth surface and a sixth surface connected to the first surface, the second surface, the third surface and the fourth surface, the third surface and the fourth surface being opposite to each other in a second direction, and the fifth surface and the sixth surface being opposite to each other in a third direction; a first side edge portion and a second side edge portion respectively disposed on the fifth surface and the sixth surface; and a first external electrode and a second external electrode respectively disposed on the third surface and the fourth surface. A first portion of each of the first side edge portion and the second side edge portion in the first direction may have an asymmetrical shape relative to a second portion of each of the first side edge portion and the second side edge portion in the first direction, and the width of the first portion of each of the first side edge portion and the second side edge portion in the third direction may increase with increasing distance from the second surface.

[0012] According to another aspect of this disclosure, a method for manufacturing a multilayer electronic component is provided, the method comprising: stacking a plurality of ceramic green sheets in a first direction to obtain a laminate strip, wherein an inner electrode pattern is printed on the plurality of ceramic green sheets; forming gaps in the laminate strip along a second direction perpendicular to the first direction; filling the gaps with a side edge paste; cutting the laminate strip filled with the side edge paste along the second direction and a third direction perpendicular to the first and second directions to obtain a plurality of unit laminate strips; sintering the plurality of unit laminate strips to obtain a body and side edges disposed on two surfaces of the body in the third direction for each sintered unit laminate strip; and forming an outer electrode on the body.

[0013] According to exemplary embodiments of this disclosure, multilayer electronic components can have excellent reliability.

[0014] According to exemplary embodiments of this disclosure, the manufacturing process of multilayer electronic components including side edges can be simplified.

[0015] However, the various advantages and effects of this disclosure are not limited to those set forth herein, and will be more readily understood in the process of describing specific exemplary embodiments of this disclosure. Attached Figure Description

[0016] The above and other aspects, features, and advantages of this disclosure will be more clearly understood from the following specific embodiments, taken in conjunction with the accompanying drawings, in which: Figure 1 This is a schematic perspective view of a multilayer electronic assembly according to an exemplary embodiment of the present disclosure; Figure 2 From Figure 1 A three-dimensional view excluding the external electrodes; Figure 3 From Figure 2 A 3D view excluding the side edges; Figure 4 It is along Figure 1 A schematic cross-sectional view of line I-I'; Figure 5 It is along Figure 1 A schematic cross-sectional view taken from line II-II'; Figure 6 It is a schematic 3D diagram illustrating the operation of obtaining the stacked strips; Figure 7 The laminated strips are shown before the gaps are formed; Figure 8 This shows the state in which gaps are being formed in the laminated strips; Figure 9 The laminated strips are shown after the gaps have been formed; Figure 10 This is a front view showing the gaps between the laminated strips filled with slurry at the side edges; and Figure 11 It is a three-dimensional diagram showing the state in which the gaps between the laminated strips are filled with slurry from the side edges. Detailed Implementation

[0017] In the following description, exemplary embodiments of the present disclosure are illustrated with reference to the accompanying drawings. However, the present disclosure may be exemplified in many different forms and should not be construed as being limited to the specific exemplary embodiments set forth herein. Additionally, exemplary embodiments of the present disclosure may be provided to describe the present disclosure more completely to those skilled in the art. Therefore, for clarity of description, the shape and size of elements in the drawings may be exaggerated, and elements denoted by the same reference numerals in the drawings may be the same elements.

[0018] For clarity of this disclosure, parts irrelevant to the description have been omitted, and dimensions (e.g., lengths) have been enlarged to clearly indicate layers and regions. Throughout the specification, similar parts having the same function within the same area are indicated by similar reference numerals. Throughout the specification, unless otherwise expressly stated, when an element is referred to as "comprising" or "including," it means that it may also include other elements, but does not exclude other elements.

[0019] In the accompanying drawings, the first direction X can be defined as the stacking direction or the thickness (T) direction, the second direction Y can be defined as the length (L) direction, and the third direction Z can be defined as the width (W) direction.

[0020] Multilayer electronic components Figure 1 This is a schematic perspective view of a multilayer electronic component according to an exemplary embodiment of the present disclosure.

[0021] Figure 2 From Figure 1 A three-dimensional view with the external electrode removed.

[0022] Figure 3 From Figure 2 A 3D view excluding the side edges.

[0023] Figure 4 It is along Figure 1 A schematic cross-sectional view taken from line I-I'.

[0024] Figure 5 It is along Figure 1 A schematic cross-sectional view taken from line II-II'.

[0025] In the following text, reference will be made to Figures 1 to 5 A multilayer electronic assembly 100 according to an exemplary embodiment of the present disclosure is described in detail. Furthermore, a multilayer ceramic capacitor (hereinafter referred to as "MLCC") is described as an example of a multilayer electronic assembly, but the present disclosure is not limited thereto, and the multilayer electronic assembly can be applied to various electronic products formed using ceramic materials, such as inductors, piezoelectric elements, varistors, thermistors, etc.

[0026] A multilayer electronic component 100 according to an exemplary embodiment of the present disclosure may include: a body 110 including a dielectric layer 111 and inner electrodes 121 and 122 alternately stacked with the dielectric layer in a first direction; the body having a first surface 1 and a second surface 2 opposite to each other in the first direction, a third surface 3 and a fourth surface 4 connected to the first and second surfaces, and a fifth surface 5 and a sixth surface 6 connected to the first and fourth surfaces, the third and fourth surfaces being opposite to each other in a second direction, and the fifth and sixth surfaces being opposite to each other in a third direction; a first side edge portion 114 and a second side edge portion 115 respectively disposed on the fifth and sixth surfaces; and a first external electrode 131 and a second external electrode 132 respectively disposed on the third and fourth surfaces. The upper portion of each of the first and second side edge portions in the first direction may have an asymmetrical shape relative to the lower portion of each of the first and second side edge portions in the first direction. The width of the upper portion of each of the first and second side edge portions in the first direction in the third direction may increase with increasing distance from the second surface.

[0027] In the following, each component included in the multilayer electronic assembly 100 according to an example embodiment of the present disclosure will be described.

[0028] In the body 110, the dielectric layer 111 and the inner electrodes 121 and 122 may be stacked alternately.

[0029] The specific shape of the main body 110 is not limited. However, as... Figures 1 to 5 As shown, the body 110 may have a hexahedral shape or a similar shape. During the sintering process, the ceramic powder particles included in the body 110 may shrink, so that the body 110 may not have a hexahedral shape with perfectly straight lines.

[0030] The main body 110 may have a first surface 1 and a second surface 2 that are opposite to each other in a first direction, a third surface 3 and a fourth surface 4 connected to the first surface 1 and the second surface 2, and a fifth surface 5 and a sixth surface 6 connected to the third surface 3 and the fourth surface 4. The third surface 3 and the fourth surface 4 are opposite to each other in a second direction, and the fifth surface 5 and the sixth surface 6 are opposite to each other in a third direction.

[0031] The multiple dielectric layers 111 included in the body 110 may be in a sintered state, and adjacent dielectric layers 111 may be integrated with each other, making their boundaries difficult to identify without the use of a scanning electron microscope (SEM). There is no limit to the number of stacked dielectric layers, and it can be determined taking into account the size of the multilayer electronic assembly. For example, the body can be formed by stacking 400 or more dielectric layers.

[0032] The dielectric layer 111 can be formed through the following steps: preparing a ceramic slurry including ceramic powder particles, an organic solvent, and a binder, coating the slurry on a carrier film and drying it to prepare a green ceramic sheet, and then sintering the green ceramic sheet. There is no limitation on the ceramic powder particles as long as sufficient capacitance can be obtained using them, and the ceramic powder particles can be, for example, BaTiO3-based ceramic powder particles or CaZrO3-based paraelectric ceramic powder particles. As a more specific example, the BaTiO3-based ceramic powder particles may include BaTiO3, (Ba 1-x Ca x )TiO3 (0 < x < 1), Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1), and Ba(Ti 1-y Zr y )O3 (0 < y < 1), and the CaZrO3-based paraelectric ceramic powder particles may include (Ca 1-x Sr x )(Zr 1-y Ti y )O3 (0 < x < 1, 0 < y < 1).

[0033] Therefore, the dielectric layer 111 may include at least one of BaTiO3, (Ba 1-x Ca x )TiO3 (0 < x < 1), Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1), Ba(Ti 1-y Zr y )O3 (0 < y < 1), and (Ca 1-x Sr x )(Zr 1-y Ti y )O3 (0 < x < 1, 0 < y < 1).

[0034] The main body 110 may include: a capacitance forming portion Ac provided in the main body 110, the capacitance forming portion Ac forming a capacitance by including a first inner electrode 121 and a second inner electrode 122 arranged opposite to each other and having the dielectric layer 111 interposed therebetween; and covering portions 112 and 113 provided on the upper and lower portions of the capacitance forming portion Ac in a first direction.

[0035] Furthermore, the capacitor forming portion Ac can be a portion that helps to form a capacitor, and can be formed by repeatedly stacking a plurality of first internal electrodes 121 and a plurality of second internal electrodes 122 on each other and having a dielectric layer 111 between them.

[0036] Cover portions 112 and 113 may be disposed on two surfaces of the capacitor forming portion Ac in the first direction.

[0037] Cover portions 112 and 113 may include a first cover portion 112 disposed on the upper part of the capacitor forming portion Ac in the first direction and a second cover portion 113 disposed on the lower part of the capacitor forming portion Ac in the first direction. The first cover portion 112 may be referred to as the upper cover portion and the second cover portion 113 may be referred to as the lower cover portion.

[0038] The first cover portion 112 and the second cover portion 113 can be formed by stacking one or two or more dielectric layers on the upper and lower surfaces of the capacitor forming portion Ac in the thickness direction, respectively, and can be used to prevent the internal electrode from being damaged due to physical or chemical stress.

[0039] The first cover portion 112 and the second cover portion 113 do not include an inner electrode and may include the same material as the dielectric layer 111.

[0040] In other words, the first cover portion 112 and the second cover portion 113 may include ceramic materials, and may include, for example, barium titanate (BaTiO3) based ceramic materials.

[0041] There is no limitation on the thickness of each of the covers 112 and 113. However, in order to easily achieve miniaturization and high capacitance of multilayer electronic components, the thickness tc1 of the first cover 112 and the thickness tc2 of the second cover 113 can be less than or equal to 20 μm.

[0042] The thickness tc1 of the first covering portion 112 and the thickness tc2 of the second covering portion 113 may be equal to each other, but this disclosure is not limited thereto, and the thickness tc1 of the first covering portion 112 and the thickness tc2 of the second covering portion 113 may have different values.

[0043] The thickness tc1 of the first cover portion 112 can refer to its dimension in the first direction, and can be the average of the dimensions of the first cover portion 112 in the first direction measured at five points spaced apart from each other at equal intervals in the third direction. The thickness tc2 of the second cover portion 113 can be measured in the same manner.

[0044] Side edge portions 114 and 115 may be provided on the fifth and sixth surfaces of the main body 110.

[0045] The side edge portions 114 and 115 may include a first side edge portion 114 provided on the fifth surface and a second side edge portion 115 provided on the sixth surface.

[0046] The first side edge portion 114 may be provided on one surface in the third direction of the capacitor forming portion Ac and the covering portions 112 and 113, and the second side edge portion 115 may be provided on the other surface in the third direction of the capacitor forming portion Ac and the covering portions 112 and 113.

[0047] The side edge portions 114 and 115 may be basically used to prevent the inner electrodes from being damaged due to physical stress or chemical stress.

[0048] The upper portion in the first direction of each of the first side edge portion 114 and the second side edge portion 115 may have a shape asymmetric with respect to the lower portion in the first direction of each of the first side edge portion 114 and the second side edge portion 115.

[0049] The width in the third direction of the upper portion in the first direction of each of the first side edge portion 114 and the second side edge portion 115 may increase as the distance from the second surface increases. Accordingly, the stress applied to the multilayer electronic component may be reduced, and the area of the lower surface of the multilayer electronic component in the first direction may be larger than the area of the upper surface of the multilayer electronic component in the first direction, thereby improving the mounting reliability when mounted on a substrate. In addition, the multilayer electronic component may have improved reliability, and the manufacturing process of the multilayer electronic component including the side edge portions may be simplified. [[ID=***]] [[ID=***]]

[0050] Refer to Figure 5 , in the exemplary embodiment, the main body 110 may include a capacitor forming portion Ac and a first covering portion 112 and a second covering portion 113. The capacitor forming portion Ac includes inner electrodes 121 and 122 and a dielectric layer 111, and the first covering portion 112 and the second covering portion 113 are respectively provided on the upper portion and the lower portion in the first direction of the capacitor forming portion. When the width in the third direction of the first side edge portion 114 measured at the height of the second surface is referred to as mu0, the width in the third direction of the first side edge portion 114 measured at the height of the boundary between the first covering portion 112 and the capacitor forming portion is referred to as mu1, and the width in the third direction of the first side edge portion 114 measured at the height of the capacitor forming portion spaced apart from the second surface by twice the thickness tc1 of the first covering portion in the first direction is referred to as mu2, mu0 < mu1 < mu2 may be satisfied.

[0051] In the exemplary embodiment, 2 × mu0 < mu2 may be satisfied. In addition, mu0 may converge to 0.

[0052] In the example embodiment, each of the first side edge portion 114 and the second side edge portion 115 has a deviation of less than or equal to 10% between the width of the lower portion in the first direction and the width in the third direction.

[0053] Furthermore, the lower portion of each of the first side edge portion 114 and the second side edge portion 115 in the first direction may have a substantially uniform width in the third direction.

[0054] In an example embodiment, when the width of the first side edge portion in the third direction, measured at the height of the first surface, is referred to as md0, the width of the first side edge portion in the third direction, measured at the height of the boundary between the second cover portion and the capacitor forming portion, is referred to as md1, and the width of the first side edge portion in the third direction, measured at a height of the capacitor forming portion at a distance from the first surface that is twice the thickness of the second cover portion, is referred to as md2, the deviation between md0, md1, and md2 may be less than or equal to 10%.

[0055] In the example embodiment, when the width of the first side edge portion in the third direction, measured at the height of the second surface, is called mu0, the width of the first side edge portion in the third direction, measured at the height of the first surface, is called md0, and the width of the first side edge portion in the third direction, measured at the height of the center of the body in the first direction, is called mc, it can satisfy 0.9≤md0 / mc≤1.1 and mu0 / mc≤0.5.

[0056] In the example embodiment, when the width of the first side edge portion in the third direction, measured at the height of the second surface, is called mu0, and the width of the first side edge portion in the third direction, measured at the height of the center of the body in the first direction, is called mc, the condition mu0 / mc ≤ 0.1 can be satisfied.

[0057] In an example embodiment, the main body may include: a capacitor forming portion, including an inner electrode and a dielectric layer; and a first cover portion and a second cover portion, respectively disposed on the upper and lower portions of the capacitor forming portion in a first direction. When the thickness of the upper cover portion in the first direction is referred to as tc1, the outer peripheral surface of the first side edge portion parallel to the fifth surface in the third direction is referred to as the S1 surface, the starting point of the extension line ES1 of the S1 surface in the upper portion of the first side edge portion in the first direction is referred to as pe, and the thickness from the extension line E2 of the second surface to pe in the first direction is referred to as tpe, tc1 can be satisfied. <tpe。

[0058] In this case, 2×tc1 can be satisfied. <tpe。

[0059] Furthermore, the above description of the first side edge portion 114 can also be applied to the second side edge portion 115.

[0060] The inner electrodes 121 and 122 may include a first inner electrode 121 and a second inner electrode 122. The first inner electrode 121 and the second inner electrode 122 may be alternately arranged opposite each other and a dielectric layer 111 included in the body 110 is interposed between them, and the first inner electrode 121 and the second inner electrode 122 may be exposed to the third surface 3 and the fourth surface 4 of the body 110, respectively.

[0061] The first inner electrode 121 may be spaced apart from the fourth surface 4 and exposed through the third surface 3, and the second inner electrode 122 may be spaced apart from the third surface 3 and exposed through the fourth surface 4. The first outer electrode 131 may be disposed on the third surface 3 of the body and connected to the first inner electrode 121, and the second outer electrode 132 may be disposed on the fourth surface 4 of the body and connected to the second inner electrode 122.

[0062] That is, the first inner electrode 121 may be connected to the first outer electrode 131 but not to the second outer electrode 132, and the second inner electrode 122 may be connected to the second outer electrode 132 but not to the first outer electrode 131. Therefore, the first inner electrode 121 may be formed to be spaced apart from the fourth surface 4 by a predetermined distance, and the second inner electrode 122 may be formed to be spaced apart from the third surface 3 by a predetermined distance.

[0063] In an example embodiment, inner electrodes 121 and 122 may include a first inner electrode 121 extending to a third, fifth, and sixth surface, and a second inner electrode 122 extending to a fourth, fifth, and sixth surface. Each of the first inner electrode 121 and the second inner electrode 122 may have its two ends in the third-direction direction contacting side edges 114 and 115.

[0064] The conductive metal included in the inner electrodes 121 and 122 may include at least one of Ni, Cu, Pd, Ag, Au, Pt, In, Sn, Al, Ti and alloys thereof, but this disclosure is not limited thereto.

[0065] The average thickness td of dielectric layer 111 is not limited, but can be, for example, from 0.1 μm to 10 μm. The average thickness te of each of the inner electrodes 121 and 122 is not limited, but can be, for example, from 0.05 μm to 3.0 μm. Furthermore, the average thickness td of dielectric layer 111 and the average thickness te of each of the inner electrodes 121 and 122 can be arbitrarily set according to desired characteristics or applications. For example, in the case of small information technology (IT) electronic components, to achieve miniaturization and high capacitance, the average thickness td of dielectric layer 111 can be less than or equal to 0.45 μm, and the average thickness te of each of the inner electrodes 121 and 122 can be less than or equal to 0.45 μm.

[0066] The average thickness td of dielectric layer 111 and the average thickness te of each of inner electrodes 121 and 122 can refer to the average dimension of dielectric layer 111 in the first direction and the average dimension of each of inner electrodes 121 and 122 in the first direction, respectively. The average thickness td of dielectric layer 111 and the average thickness te of each of inner electrodes 121 and 122 can be measured, for example, by scanning a cross-section of body 110 in the first and second directions using a SEM at a magnification of 10000. More specifically, the average thickness td of dielectric layer 111 can be measured by measuring the thickness of dielectric layer 111 at multiple points (e.g., thirty points spaced equally apart in the second direction) and calculating the average thickness. Similarly, the average thickness te of each of inner electrodes 121 and 122 can be measured by measuring the thickness at multiple points (e.g., thirty points spaced equally apart in the second direction) and calculating the average thickness. Thirty points spaced apart from each other at equal intervals can be specified in the capacitor forming section Ac. In addition, when such an average value measurement is performed on the ten dielectric layers 111 and the ten inner electrodes 121 and 122, the average thickness td of the dielectric layer 111 and the average thickness te of each of the inner electrodes 121 and 122 can be more generalized.

[0067] The widths (e.g., mu0, mu1, mu2, md0, md1, md2, and mc) and thicknesses (e.g., tc1 and tpe) disclosed herein can be measured using SEM. Other methods and / or tools, as understood by one of ordinary skill in the art, may be used even if not described in this disclosure.

[0068] External electrodes 131 and 132 can be disposed on the third surface 3 and the fourth surface 4 of the main body 110, respectively.

[0069] The external electrodes 131 and 132 may be disposed on the third surface 3 and the fourth surface 4 of the main body 110, respectively, and may include the first external electrode 131 and the second external electrode 132 connected to the first internal electrode 121 and the second internal electrode 122, respectively.

[0070] Reference Figure 1 The external electrodes 131 and 132 can be configured to cover the two end surfaces of the side edges 114 and 115 in the second direction.

[0071] In this example embodiment, a structure is described in which a multilayer electronic component 100 has two external electrodes 131 and 132, but the number and shape of the external electrodes 131 and 132 may be changed depending on the form of the internal electrodes 121 and 122 or for other purposes.

[0072] Each of the external electrodes 131 and 132 can be formed using any conductive material (such as metal), and the specific material can be determined taking into account electrical properties, structural stability, etc. Furthermore, each of the external electrodes 131 and 132 can have a multilayer structure.

[0073] For example, the external electrodes 131 and 132 may include electrode layers 131a and 132a disposed on the body 110 and plating layers 131b and 132b formed on the electrode layers.

[0074] As a more specific example of electrode layers 131a and 132a, the electrode layer may be a sintered electrode comprising a conductive metal and glass, or a resin-based electrode comprising a conductive metal and resin.

[0075] Furthermore, electrode layers 131a and 132a may have a form in which a sintered electrode and a resin-based electrode are sequentially formed on the body 110. Additionally, electrode layers 131a and 132a can be formed by transferring a sheet including a conductive metal onto the body 110 or by transferring a sheet including a conductive metal onto a sintered electrode.

[0076] Materials with excellent electrical conductivity can be used as conductive metals included in electrode layers 131a and 132a, but there are no limitations on the materials. For example, the conductive metal can be at least one of nickel (Ni), copper (Cu), and alloys thereof.

[0077] Platings 131b and 132b can be used to improve mounting characteristics. There is no limitation on the type of each of platings 131b and 132b, and each of platings 131b and 132b can be a plating including at least one of Ni, Sn, Pd and alloys thereof, and can be formed as multiple layers.

[0078] As a more specific example of plating layers 131b and 132b, each of plating layers 131b and 132b may be a Ni plating layer or a Sn plating layer, and may have a Ni plating layer and a Sn plating layer sequentially formed on electrode layers 131a and 132a, or may have a Sn plating layer, a Ni plating layer, and a Sn plating layer sequentially formed on electrode layers 131a and 132a. Additionally, each of plating layers 131b and 132b may include multiple Ni plating layers and / or multiple Sn plating layers.

[0079] There are no size restrictions for the multilayer electronic component 100.

[0080] However, in order to achieve miniaturization and high capacitance of the multilayer electronic component 100, the multilayer electronic component 100 may have dimensions of 0.603 (length: 0.6 mm, width: 0.3 mm) or larger. Taking into account manufacturing tolerances, the maximum length of the body 110 in the second direction (L direction) may be less than or equal to 0.69 mm, and the maximum width of the body 110 in the third direction (W direction) may be less than or equal to 0.39 mm.

[0081] Here, the maximum length of the main body 110 in the second direction (L direction) can refer to the maximum dimension of the main body 110 in the second direction, the maximum width of the main body 110 in the third direction (W direction) can refer to the maximum dimension of the main body 110 in the third direction, and the maximum thickness of the main body 110 in the first direction (T direction) can refer to the maximum dimension of the main body 110 in the first direction.

[0082] Methods for manufacturing multilayer electronic components Figure 6 It is a schematic 3D diagram illustrating the operation of obtaining the stacked strips.

[0083] Figure 7 The laminated strips before the gaps are formed are shown.

[0084] Figure 8 This shows the state in which gaps are being formed in the laminated strips.

[0085] Figure 9 The laminated strips are shown after the gaps are formed.

[0086] Figure 10 This is a front view showing the gaps between the laminated strips filled with slurry from the side edges.

[0087] Figure 11 It is a three-dimensional diagram showing the state in which the gaps between the laminated strips are filled with slurry from the side edges.

[0088] In the following text, reference will be made to Figures 6 to 11 A method for manufacturing a multilayer electronic component is described in detail below. The method for manufacturing a multilayer electronic component described below is an example of manufacturing the multilayer electronic component 100 described above, and the multilayer electronic component 100 may not be manufactured solely by the manufacturing method described below.

[0089] A method for manufacturing a multilayer electronic component according to an example embodiment of the present disclosure may include: obtaining a laminate 200 by laminating ceramic green sheets 201 and 202, on which inner electrode patterns 221 and 222 are printed in a first direction; forming a gap G in the laminate 200 along a second direction perpendicular to the first direction; filling the gap G with a paste psm formed by side edge portions; obtaining a plurality of unit laminates by cutting the laminate 200 filled with the paste psm for side edge portions along the second direction and a third direction (perpendicular to the first and second directions); obtaining a body 110 and side edge portions 114 and 115 disposed on two surfaces of the body in a third direction by sintering the unit laminates; and forming outer electrodes 131 and 132 on the body.

[0090] Manufacturing of laminated strips First, a laminated strip 200 can be obtained by laminating ceramic green sheets 201 and 202, on which internal electrode patterns 221 and 222 are printed, in a first direction. At least a portion of the laminated strip 200 may be incorporated into the body 110 of this disclosure after sintering.

[0091] In the process of manufacturing the laminate 200, multiple ceramic green sheets 201 and 202, on which internal electrode patterns 221 and 222 are disposed, can be laminated on the support film 310.

[0092] The support film 310 can be used to support the laminated strips 200 in which internal electrode patterns 221 and 222 and multiple ceramic green sheets 201 and 202 are stacked. In this case, the support film 310 may include adhesive materials such as latex, starch, cellulose, protein, isoprene rubber (IR), nitrile rubber (NBR), styrene-butadiene rubber (SBR), chloroprene rubber (CR), silicone rubber, silicone materials, polyurethane materials, acrylic materials, and mixtures thereof.

[0093] Multiple ceramic green sheets 201 and 202 can be formed using a ceramic paste comprising ceramic powder particles, an organic solvent, a dispersant, and a binder. The ceramic powder particles may include barium titanate-based materials, lead-based perovskite composite materials, or strontium titanate-based materials as raw materials included in the dielectric layer 111 of the multilayer electronic component 100. Barium titanate-based materials may include BaTiO3-based ceramic powder particles. Examples of BaTiO3-based ceramic powders may include BaTiO3 and materials obtained by partially dissolving Ca and / or Zr in BaTiO3 (Ba... 1-x Ca x TiO3 (0) <x<1)、Ba(Ti 1-y Ca y )O3(0 <y<1)、(Ba 1-x Ca x (Ti) 1-yZr y )O3 (0 < x < 1, 0 < y < 1) and Ba(Ti 1-y Zr y )O3 (0 < y < 1). When sintering a plurality of green ceramic sheets 201 and 202, the sintered green ceramic sheets 201 and 202 can become the dielectric layer 111 included in the main body 110.

[0094] In an exemplary embodiment, the stacked strip 200 may further include a cover green ceramic sheet 203 that forms the covering portions 112 and 113. The cover green ceramic sheet 203 may be formed of the same material as the materials of the green ceramic sheets 201 and 202, but the present disclosure is not limited thereto. Through a sintering process, the cover green ceramic sheet 203 can form the first covering portion 112 and the second covering portion 113 of the main body 110. In this case, the cover green ceramic sheet 203 may be formed at one surface and the other surface of the stacked strip in the first direction, and the cover green ceramic sheet 203 may be formed of a single layer or multiple layers.

[0095] Inner electrode patterns 221 and 2 are formed on the green ceramic sheets 201 and 202 by using an inner electrode conductive paste including a conductive metal. The conductive metal included in the inner electrode patterns 221 and 222 is not limited, and a material having excellent conductivity may be used. For example, the conductive metal may include at least one of nickel (Ni), copper (Cu), palladium (Pd), silver (Ag), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), and alloys thereof. The method of forming the inner electrode patterns 221 and 222 on the green ceramic sheets 201 and 202 is not limited. For example, the inner electrode patterns 221 and 222 can be formed by printing an inner electrode conductive paste including a conductive metal on the green ceramic sheets 201 and 202 by using a screen printing method or a gravure printing method.

[0096] The inner electrode patterns can have a stripe shape. Specifically, the inner electrode pattern can be formed to contact both ends of each of the green ceramic sheets 201 and 202 in the third direction and be spaced apart from each other at regular intervals in the second direction.

[0097] The inner electrode patterns can include a first inner electrode pattern 221 formed on the green ceramic sheet 201 and a second inner electrode pattern 222 formed on the other green ceramic sheet 202.

[0098] In an example embodiment, the ceramic green sheet printed with an inner electrode pattern may include a first ceramic green sheet 201 printed with a first inner electrode pattern 221 and a second ceramic green sheet 202 printed with a second inner electrode pattern 222. A laminated strip 200 may be formed by alternately stacking the first ceramic green sheet 201 and the second ceramic green sheet 202 in a first direction, and a cover portion ceramic green sheet 203 without an inner electrode pattern may be stacked in the upper and lower portions of the laminated strip in the first direction.

[0099] Gap Formation Operation A gap G can be formed in the laminate 200 along a second direction perpendicular to the first direction.

[0100] Reference Figures 7 to 9 A gap G can be formed in the laminate 200 along the gap forming line C0-C0. The gap forming line C0-C0 can be a cutting line parallel to the second direction and can be set at substantially equal intervals in the third direction.

[0101] There are no restrictions on the method of forming the gap G in the laminate 200. For example, a dicing method can be used, and the cutting can be performed using a dicing blade DB, the width of which is equal to the sum of the width of the first side edge of the final product in the third direction and the width of the second side edge in the third direction.

[0102] In this case, since a gap G is formed in the laminate 200, the inner electrode pattern can be exposed to the gap G.

[0103] Alternatively, the gap G can be formed to pass through the laminated strip 200 in the first direction.

[0104] Operation of filling side edge slurry Subsequently, the side edges can be filled with slurry PSM into the gaps G of the laminate 200, such as... Figure 10 As shown in the image.

[0105] During drying, the slurry psm filling the gap G shrinks towards the lower part of the side edge in the first direction, causing a volume reduction, so that the upper part of the side edge in the first direction can have a concave shape. After sintering, the upper and lower parts of the side edge in the first direction can have asymmetrical shapes relative to each other.

[0106] The slurry (PSM) for forming side edges may include ceramic powder particles, organic solvents, dispersants, and binders. The ceramic powder particles included in the slurry (PSM) for forming side edges may be the same as those included in the ceramic green sheet described above, but this disclosure is not limited thereto, and different ceramic powder particles may also be used. Furthermore, the additives included in the slurry (PSM) for forming side edges may include elements different from those added to the ceramic green sheet, or may include the same elements but in different amounts.

[0107] In the prior art, in order to form the side edge portion, a method has been applied in which the side edge portion sheet is additionally attached to the two surfaces (exposed with the inner electrode pattern) of the unit laminate in the width direction and then sintering is performed.

[0108] However, in other methods of attaching side edge pieces, the process can be complex, and the side edge pieces and unit laminate strips can be significantly affected by heat and pressure, causing problems such as poor adhesion between the side edge pieces and unit laminate strips and deformation, which may lead to reduced reliability of the final product.

[0109] According to an exemplary embodiment of this disclosure, after the gap G is formed in the laminate 200, the gap G of the laminate 200 can be filled with a side edge forming paste (psm), thereby not only reducing the effects of heat and pressure, but also suppressing problems such as poor adhesion between the side edge pieces and the unit laminate, as well as deformation. Therefore, the multilayer electronic assembly 100 can have improved moisture-proof reliability.

[0110] Operations to obtain unit stacked strips Multiple unit laminates can be obtained by cutting laminates 200 filled with slurry psm along a second direction and a third direction (perpendicular to the first and second directions).

[0111] Reference Figure 11 The laminated strips 200 can be cut along mutually perpendicular cutting lines C1-C1 and C2-C2. Cutting lines C1-C1 can be parallel to a second direction and can be arranged at substantially equal intervals in a third direction. Cutting lines C2-C2 can also be parallel to a third direction and can be arranged at substantially equal intervals in the second direction. Unit sheets with substantially uniform dimensions in the third direction can be formed through cutting lines C1-C1, and unit laminated strips with substantially uniform dimensions in the second direction can be formed through cutting lines C2-C2.

[0112] There are no restrictions on the means used to cut the laminated strip 200. For example, the laminated strip 200 can be cut using a scraper cutting method, a guillotine cutting method, or a laser cutting method.

[0113] In an example embodiment, a cut along a second direction can be performed on the central portion of the side edge forming paste (psm) filling the gap in the third direction. That is, a cutting line C1-C1 can be positioned on the side edge forming paste (psm).

[0114] Sintering operation Subsequently, sinterable unit stacks are formed to obtain the main body and side edges disposed on two surfaces of the main body in the third-order direction. There is no limitation on the sintering temperature. However, for example, sintering can be performed at 1000°C to 1300°C. Alternatively, sintering can be performed in a reducing atmosphere.

[0115] Operation of forming external electrodes Subsequently, external electrodes can be formed on the body. The multilayer electronic assembly 100 can be manufactured by forming external electrodes 131 and 132 on one surface and another surface of the body 110 in the second direction, respectively.

[0116] For example, when electrode layers 131a and 132a include sintered electrode layers, the body 110 can be impregnated with an external electrode conductive paste comprising metal powder particles, glass frit, binder and organic solvent, and then the external electrode conductive paste can be sintered at a temperature of 500°C to 900°C to form a sintered electrode layer.

[0117] For example, when electrode layers 131a and 132a include resin electrode layers, the substrate can be impregnated into a conductive resin composition comprising metal powder particles, resin, binder and organic solvent, and then cured by heat treatment at a temperature of 250°C to 550°C to form a resin electrode layer.

[0118] Furthermore, plating layers 131b and 132b can be formed on electrode layers 131a and 132a by further performing electroplating and / or electroless plating.

[0119] While exemplary embodiments have been shown and described above, it will be readily understood by those skilled in the art that modifications and variations may be made without departing from the scope of this disclosure as defined by the appended claims.

[0120] Furthermore, the term "example embodiment" as used herein does not refer to the same example embodiment, but is provided to emphasize a particular feature or characteristic that differs from a particular feature or characteristic of another example embodiment. However, the example embodiments provided herein are considered to be implementable by combining them, in whole or in part. For example, an element described in a particular example embodiment may be understood as a description relating to another example embodiment, even if it is not described in another example embodiment, unless a contrary or contradictory description is provided in that other example embodiment.

[0121] The terminology used herein is for the purpose of describing particular exemplary embodiments only and is not intended to limit the exemplary embodiments. As used herein, unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “the” are also intended to include the plural forms.

Claims

1. A multilayer electronic component, comprising: A body includes a dielectric layer and internal electrodes alternately disposed with the dielectric layer in a first direction. The body has a first surface and a second surface opposite to each other in the first direction, a third surface and a fourth surface connected to the first surface and the second surface, and a fifth surface and a sixth surface connected to the first surface, the second surface, the third surface and the fourth surface. The third surface and the fourth surface are opposite to each other in a second direction, and the fifth surface and the sixth surface are opposite to each other in a third direction. The first side edge portion and the second side edge portion are respectively disposed on the fifth surface and the sixth surface; as well as The first external electrode and the second external electrode are respectively disposed on the third surface and the fourth surface. Wherein, the first portion of each of the first side edge portion and the second side edge portion in the first direction has a first portion having an asymmetrical shape relative to the second portion of each of the first side edge portion and the second side edge portion in the first direction, and the width of the first portion of each of the first side edge portion and the second side edge portion in the third direction increases with the distance from the second surface.

2. The multilayer electronic component according to claim 1, wherein, The main body includes: a capacitor forming portion, including the inner electrode and the dielectric layer; and a first covering portion and a second covering portion, respectively disposed on a first portion of the capacitor forming portion in the first direction and a second portion of the capacitor forming portion in the first direction. The first side edge portion is configured to cover the capacitor forming portion and the first and second covering portions on a third-direction upward first surface, and the second side edge portion is configured to cover the capacitor forming portion and the first and second covering portions on a third-direction upward second surface.

3. The multilayer electronic component according to claim 1, wherein, The main body includes: a capacitor forming portion, including the inner electrode and the dielectric layer; and a first covering portion and a second covering portion, respectively disposed on a first portion of the capacitor forming portion in the first direction and a second portion of the capacitor forming portion in the first direction. When the width of the first side edge portion in the third direction, measured at the height of the second surface, is called mu0; the width of the first side edge portion in the third direction, measured at the height of the boundary between the first covering portion and the capacitor forming portion, is called mu1; and the width of the first side edge portion in the third direction, measured at a height of the capacitor forming portion at a distance from the second surface at twice the thickness of the first covering portion, is called mu2, then mu0 is satisfied. <mu1<mu2。 4. The multilayer electronic component according to claim 3, wherein, Satisfy 2×mu0 <mu2。 5. The multilayer electronic component according to claim 1, wherein, The second portion of each of the first and second side edge portions has a deviation of 10% or less between its width in the third direction.

6. The multilayer electronic component according to claim 2, wherein, When the width of the first side edge portion in the third direction, measured at the height of the first surface of the body, is called md0, the width of the first side edge portion in the third direction, measured at the height of the boundary between the second cover portion and the capacitor forming portion, is called md1, and the width of the first side edge portion in the third direction, measured at a height of the capacitor forming portion at a distance twice the thickness of the second cover portion from the first surface of the body in the first direction, is called md2, the deviation between md0, md1, and md2 is less than or equal to 10%.

7. The multilayer electronic assembly according to claim 1, wherein, When the width of the first side edge portion in the third direction, measured at the height of the second surface, is called mu0, the width of the first side edge portion in the third direction, measured at the height of the first surface, is called md0, and the width of the first side edge portion in the third direction, measured at the height of the center of the body in the first direction, is called mc, the following conditions are met: 0.9 ≤ md0 / mc ≤ 1.1 and mu0 / mc ≤ 0.

5.

8. The multilayer electronic component according to claim 1, wherein, When the width of the first side edge portion measured at the height of the second surface in the third direction is called mu0, and the width of the first side edge portion measured at the height of the center of the body in the first direction in the third direction is called mc, the condition mu0 / mc ≤ 0.1 is satisfied.

9. The multilayer electronic component according to claim 1, wherein, The main body includes: a capacitor forming portion, including the inner electrode and the dielectric layer; and a first covering portion and a second covering portion, respectively disposed on a first portion of the capacitor forming portion in the first direction and a second portion of the capacitor forming portion in the first direction. When the thickness of the first covering portion in the first direction is referred to as tc1, the outer peripheral surface of the first side edge portion parallel to the fifth surface in the third direction is referred to as the S1 surface, the starting point of the extension line of the S1 surface in the first portion of the first side edge portion in the first direction is referred to as pe, and the thickness from the extension line of the second surface to pe in the first direction is referred to as tpe, then tc1 is satisfied. <tpe。 10. The multilayer electronic component according to claim 9, wherein, Satisfy 2×tc1 <tpe。 11. The multilayer electronic assembly according to claim 1, wherein, The internal electrode includes a first internal electrode extending to the third surface, the fifth surface, and the sixth surface, and a second internal electrode extending to the fourth surface, the fifth surface, and the sixth surface.

12. The multilayer electronic assembly according to claim 1, wherein, The first part and the second part are respectively the upper part and the lower part of each of the first side edge portion and the second side edge portion.

13. A method for manufacturing a multilayer electronic component, the method comprising: Multiple ceramic green sheets are stacked in a first direction to obtain a laminated strip, and an internal electrode pattern is printed on the multiple ceramic green sheets; A gap is formed in the laminated strip along a second direction perpendicular to the first direction; The gap is filled with slurry from the side edges; The laminated strip filled with the side edge slurry is cut along the second direction and a third direction perpendicular to the first and second directions to obtain a plurality of unit laminated strips; The plurality of unit stack strips are sintered to obtain a body and side edge portions disposed on two surfaces of the body in the third direction for each sintered unit stack strip; as well as An external electrode is formed on the main body.

14. The method according to claim 13, wherein, Perform the step of forming the gap, thereby exposing the inner electrode pattern to the gap.

15. The method according to claim 13, wherein, The gap is formed to pass through the stacked strip in the first direction.

16. The method according to claim 13, wherein, In the step of cutting the laminated strip, the slurry at the side edge of the gap is cut along the second direction at the central portion in the third direction.

17. The method according to claim 13, wherein, The plurality of ceramic green sheets with the internal electrode pattern printed on them include a first ceramic green sheet and a second ceramic green sheet. A first internal electrode pattern is printed on the first ceramic green sheet, and a second internal electrode pattern is printed on the second ceramic green sheet. The laminate strip is formed by alternately stacking the first ceramic green sheet and the second ceramic green sheet in the first direction, and ceramic green sheets without internal electrode patterns are stacked in the first and second portions of the laminate strip in the first direction.

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