Code density calibration method and system based on dark counts

Abstract

This application relates to a code density calibration method and system based on dark counting. The method includes: setting a SPAD in Geiger mode under no-light conditions; generating a Poisson-distributed dark counting pulse unrelated to the TDC clock using thermal perturbation; using this pulse as a trigger signal to acquire and convert raw code during non-measurement periods / independent channels; recording the frequency of each unit using a counter array; calculating the total number of samples and the system period; calculating the calibration results of each unit, as well as differential and integral nonlinear indices; calculating the correction time value based on the indices; storing the calibration time in on-chip storage using the raw code as an index; constructing a calibration lookup table; during actual detection, using the raw code to address and look up the table, reading the calibration time and combining it with the coarse count to synthesize a high-precision result. This method can improve the measurement accuracy, stability, and environmental adaptability of a high-precision time-to-digital converter.

Description

Technical Field

[0001] This application relates to the field of data processing technology, and in particular to a code density calibration method and system based on dark counting. Background Technology

[0002] In high-tech fields such as modern precision measurement, quantum communication, lidar, and medical imaging, the time-to-digital converter (TDC) serves as a core timing unit, and its measurement accuracy directly determines the performance ceiling of the entire system. With the continuous improvement of measurement resolution requirements through technological iterations, high-precision TDCs have become key supporting components for various cutting-edge devices, requiring time measurement accuracy at the picosecond or even sub-picosecond level to meet the demand for precise capture and quantization of extremely short time intervals. However, in practical applications, the performance of high-precision TDCs is highly susceptible to the combined effects of process deviations, power supply voltage fluctuations, and ambient temperature drift (PVT fluctuations), resulting in significant nonlinear errors. This severely restricts their measurement accuracy and stability, becoming a core technological bottleneck currently facing the industry. Process deviations are an inherent factor leading to nonlinear errors in TDCs. During semiconductor chip manufacturing, minute deviations in processes such as photolithography, etching, and doping can cause inconsistencies in the physical parameters of the core components within the TDC. For example, the delay chain, as the core structure for time-separated quantization in TDC, experiences variations in the resistance and capacitance values ​​of its individual units due to process fluctuations. This leads to deviations between the actual delay time of each delay unit and the design ideal value, resulting in localized uneven quantization steps, i.e., differential nonlinearity error. This process-level deviation is random and cannot be completely avoided. Even with high-precision manufacturing processes, achieving absolute consistency in all component parameters is difficult, posing a fundamental challenge to high-precision TDC calibration. Power supply voltage fluctuations are a significant factor causing dynamic nonlinearity errors in TDC. TDC relies on a stable power supply to maintain the normal operation of its components. However, in practical applications, factors such as power supply noise, load changes, and power supply link impedance can all cause slight fluctuations in the power supply voltage. Voltage changes directly affect the operating speed of the delay units: when the voltage increases, the signal transmission speed of the delay unit increases, and the actual delay time decreases; when the voltage decreases, the transmission speed decreases, and the delay time increases. This strong correlation between voltage and delay causes the quantization characteristics of TDC to change in real time with voltage fluctuations, resulting in deviations in measurement results under different voltage conditions. Furthermore, this deviation is dynamic and difficult to compensate for over a long period using fixed calibration parameters. For high-precision measurement systems that require continuous operation over extended periods, nonlinear errors caused by voltage fluctuations can severely impact the consistency and reliability of measurement data. Ambient temperature drift is a key factor causing TDC nonlinear errors to vary with operating conditions. Temperature changes in the TDC's operating environment alter the electrical characteristics and signal transmission delay of the delay cells through physical mechanisms such as thermal expansion and contraction and changes in carrier mobility. On one hand, increased temperature leads to a decrease in carrier mobility in semiconductor materials, increasing the delay time of the delay cells; on the other hand, temperature changes also induce thermal stress in chip packaging, substrates, and other structures, further exacerbating delay differences between delay chain cells.More complexly, the effect of temperature on TDC is cumulative and non-uniform; the degree to which delay cells in different regions are affected by temperature may vary, leading to a significant increase in integral nonlinearity error. In extreme environments or wide-temperature-range applications, the nonlinearity error caused by temperature drift can even exceed the impact of process deviations, becoming the main factor limiting the accuracy of TDC measurements.

[0003] To address the aforementioned nonlinear error issues, various calibration schemes have been proposed in the industry. Traditional schemes often rely on external high-precision signal sources or complex auxiliary calibration circuits. Calibration is achieved by inputting a standard reference signal to the TDC and comparing the deviation of the measurement results with the standard value. However, these external calibration methods have significant drawbacks: first, the external signal source requires extremely high precision, leading to a substantial increase in system hardware costs; second, the external signal is susceptible to noise interference and parasitic parameters during transmission, resulting in signal integrity issues and reduced calibration accuracy; and third, the calibration process requires interrupting the normal operation of the TDC, making real-time dynamic compensation impossible and unable to cope with dynamic errors caused by environmental changes.

[0004] Therefore, developing a calibration technology that does not rely on an external calibration signal source, can achieve on-chip self-calibration and real-time dynamic compensation, and can effectively resist the effects of process, voltage and temperature fluctuations is of great significance for improving the measurement accuracy, stability and environmental adaptability of high-precision time-to-digital converters, and is also a key requirement for promoting the technological upgrading of related high-end technology fields. Summary of the Invention

[0005] Therefore, it is necessary to provide a code density calibration method and system based on dark counting that can eliminate the signal integrity problems and parasitic interference commonly found in traditional external calibration methods, while ensuring that the TDC module can still maintain extremely high linearity and conversion accuracy when the ambient temperature drifts or voltage fluctuates.

[0006] A code density calibration method based on dark counting, the method comprising:

[0007] Step 1: Place the single-photon avalanche diode in a dark environment and operate it in Geiger mode to generate dark counting pulses through thermal perturbation; the dark counting pulses follow a Poisson distribution on the time axis and are statistically uncorrelated with the operating clock of the time-to-digital converter. Step 2: Use the dark counting pulse as the input trigger signal, continuously collect and convert it into the original digital code value during non-measurement periods or independent calibration channels, construct a counter array to record the pulse frequency of each unit, and at the same time count the total number of samplings and the system cycle. Step 3: Based on the pulse frequency of each unit, simultaneously count the total number of samplings and the system period, calculate the calibration results of each delay unit, and further calculate the differential nonlinearity characterizing local non-uniformity and the integral nonlinearity characterizing global cumulative error, and output the calibration and nonlinearity index data. Step 4: Calculate the correction time value of the actual cumulative physical width of each delay unit based on the calibration and nonlinearity index data. Using the original output code as the index and the actual physical time deviation as the content, write the correction time value into the on-chip storage unit to build and store the nonlinear calibration lookup table. Step 5: In the actual photon detection stage, the raw code value output by the time-to-digital converter is used as the address to access the nonlinear calibration lookup table, read the corresponding calibrated fine time data and synthesize it with the coarse counting time to obtain the high-precision photon arrival time. Step 6: Continuously collect dark counting pulses through background statistics or time-sharing processing, repeat steps 2 to 4, update the calibration lookup table in real time, and compensate for delay chain transmission errors caused by temperature drift and voltage fluctuations.

[0008] A code density calibration system based on dark counting, the system includes a single-photon avalanche diode dark counting module, a time-to-digital converter calibration module, and an on-chip probability histogram storage module that are connected in sequence and form a closed loop; A single-photon avalanche diode dark counting module is used to generate and output random dark counting pulse signals that are statistically uncorrelated with the operating clock of the time-to-digital converter; The time-to-digital converter calibration module is used to receive dark counting pulse signals and perform statistical acquisition, code density testing and nonlinear index calculation, and output calibration results and differential and integral nonlinear data; The on-chip probability histogram storage module is used to receive calibration results and nonlinear index data, build and store nonlinear calibration lookup tables, provide real-time calibration data for actual measurements, and dynamically refresh the calibration lookup table through background statistics or time-sharing processing to complete real-time compensation for environmental drift.

[0009] The aforementioned code density calibration method and system based on dark counting aims to address the nonlinear error problem caused by process, voltage, and temperature fluctuations in high-precision time-to-digital converters (TDCs). It eliminates the need for additional external high-precision signal sources or complex auxiliary calibration circuits, achieving on-chip self-calibration and real-time performance compensation for particle number-resolved time-to-digital converters. This method effectively eliminates signal integrity problems and parasitic interference common in traditional external calibration methods, while ensuring that the TDC module maintains extremely high linearity and conversion accuracy even under ambient temperature drift or voltage fluctuations. The system integrates a single-photon avalanche diode dark counting module, a TDC calibration module, and an on-chip probability histogram storage module. It utilizes random dark counting pulses excited by the thermal effect of single-photon avalanche diodes as an ideal random signal source, replacing traditional external calibration circuits. Through statistical analysis of a large number of dark counts, a code density histogram is constructed, and differential and integral nonlinearities are calculated, generating a calibration lookup table stored in the on-chip memory. During measurement, the system corrects the original data in real time by looking up a table, achieving on-chip self-calibration and dynamic performance compensation without external excitation. This effectively eliminates the effects of environmental drift and ensures the system's wide-range, high-linearity, and high-precision time measurement performance under complex operating conditions. Attached Figure Description

[0010] Figure 1 This is a flowchart illustrating a code density calibration method based on dark counting in one embodiment; Figure 2 This is a diagram illustrating the architecture of a code density calibration system based on dark counting in one embodiment. Figure 3 This is an architecture diagram of an on-chip probability histogram storage module in one embodiment; Figure 4 This is a schematic diagram of the dark count calibration results in another embodiment; Figure 5 This is a diagram showing the calibration results of a ring oscillator in one embodiment; Figure 6 This is a diagram showing the calibration results of an asynchronous crystal oscillator in one embodiment. Detailed Implementation

[0011] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0012] In one embodiment, such as Figure 1 As shown, a code density calibration method based on dark counting is provided, including the following steps: Step 1: Place the single-photon avalanche diode in a dark environment and operate it in Geiger mode to generate dark counting pulses through thermal perturbation. The dark counting pulses follow a Poisson distribution on the time axis and are statistically uncorrelated with the clock of the time-to-digital converter.

[0013] Single-photon avalanche diodes (SPADs) are high-sensitivity photodetectors. In Geiger mode, the reverse bias voltage is set above the breakdown voltage, creating an extremely high electric field region within the PN junction. In the absence of light, thermal perturbation within the semiconductor material randomly generates intrinsic carriers. These carriers enter the high-field depletion region and are accelerated by the electric field, gaining extremely high kinetic energy. This triggers a chain reaction of avalanche multiplication, amplifying the weak single-electron signal into a macroscopic current pulse, i.e., a dark counting pulse. Due to the quantum randomness of thermal excitation, the pulse exhibits a Poisson distribution on the time axis and is statistically completely uncorrelated with the TDC operating clock. This satisfies the stringent requirements of code density testing for input signal randomness, providing ideal statistical samples for subsequent calibration without the need for an external random signal generator.

[0014] Step 2: Use the dark counting pulse as the input trigger signal, continuously collect and convert it into the original digital code value during non-measurement periods or independent calibration channels, construct a counter array to record the pulse frequency of each unit, and at the same time count the total number of samplings and the system cycle.

[0015] The non-measurement period refers to the time when no actual photon detection is performed. The independent calibration channel is dedicated to calibrating signal transmission; both channels avoid interference from the calibration process on normal TDC measurements. After acquiring the dark counting pulses, the TDC calibration module converts them into raw digital code values, which directly reflect the pulse's position in the TDC delay chain. This is for the fine counting function within the TDC. M A counter array of depth M is constructed using delay units (i.e., the number of counters is the same as the number of delay units). Each counter corresponds to a delay unit, and the frequency of the dark counting pulses captured by that unit is recorded. ( i The delay unit number, from 0 to M -1). The total number of samples was also counted. (The sum of the number of pulses captured by all delay units) and the system cycle (TDC completes one full time quantization cycle), and it is necessary to ensure that the fine counting range of TDC covers the entire system cycle, and ensure that the uniform distribution of dark counting pulses on the time axis can be fully mapped to each delay unit, so as to provide full-range data support for subsequent calculations.

[0016] Step 3: Based on the pulse frequency of each unit, simultaneously calculate the total number of samplings and the system period, calculate the calibration results of each delay unit, and further calculate the differential nonlinearity characterizing local non-uniformity and the integral nonlinearity characterizing global cumulative error, and output the calibration and nonlinearity index data.

[0017] The calibration result for each delay unit refers to the actual physical time width of each delay unit, calculated based on the pulse frequency of that unit. Total number of samples The statistical proportion, combined with the system cycle The calibration results for each delay unit are as follows:

[0018] This result reflects the real-time quantization capability of the delay unit.

[0019] Differential nonlinearity (DNL) characterizes the local non-uniformity of the quantization step, reflecting the deviation between the actual physical width and the ideal width of a single delay unit (MT). The ideal width directly determines the stability of the TDC's microscale resolution and its lossless code characteristic. Integral nonlinearity (INL) characterizes the global cumulative error of the system's conversion characteristics, formed by the sum of the differential nonlinearities of each delay unit. It represents the degree of deviation between the actual transmission characteristic curve and the ideal linear line, determining the absolute accuracy of the TDC's full-range time measurement. By calculating these two indicators, the nonlinearity error of the TDC can be accurately quantified, providing a clear basis for subsequent calibration.

[0020] Step 4: Calculate the correction time value of the actual cumulative physical width of each delay unit based on the calibration and nonlinearity index data. Using the original output code as the index and the actual physical time deviation as the content, write the correction time value into the on-chip storage unit to build and store the nonlinear calibration lookup table.

[0021] The correction time value is calculated based on the calibration results of the delay units and the nonlinear index. It accurately reflects the actual cumulative physical width of each delay unit and is used to correct the time deviation corresponding to the original TDC output code. The on-chip storage unit is a high-speed static random access memory (SRAM) or a dedicated register file, which has the advantage of fast access speed and can meet the data reading speed requirements of subsequent real-time calibration. The original output code is the digital code value obtained by TDC conversion in step 2. Using it as an index, the corresponding correction time value (real physical time deviation) can be quickly located. The mapping relationship between the two constitutes a nonlinear calibration lookup table. When constructing this table, the correction time values ​​need to be written into the on-chip storage unit in an orderly manner according to the index. At the same time, the system will use the on-chip storage resources to construct a probability histogram. This histogram is the statistical distribution of the frequency of captured dark count pulses of each delay unit, which reflects the real physical characteristics of TDC under the current temperature and voltage environment in real time, and provides data support for subsequent calibration effect verification.

[0022] Step 5: In the actual photon detection stage, the raw code value output by the time-to-digital converter is used as the address to access the nonlinear calibration lookup table, read the corresponding calibrated fine time data and synthesize it with the coarse counting time to obtain the high-precision photon arrival time.

[0023] The actual photon detection phase is the core operating phase of the TDC, used to capture and quantize photon arrival time information. At this stage, the raw code value output by the TDC still contains nonlinear errors, which need to be corrected using a lookup table. The hardware logic directly accesses the lookup table via address addressing, eliminating the need for complex real-time floating-point operations. It can instantly read the calibrated fine-grained time data corresponding to the raw code value, which has eliminated local nonlinear errors from individual delay units. The coarse count time is the time value obtained by the TDC through the coarse count module, reflecting the approximate range of photon arrival times, while the fine-grained time data reflects the subdivided quantization results of the time. The two are combined using an adder to obtain photon arrival times that simultaneously cover a wide range and have high precision, ensuring the measurement accuracy of the TDC in practical applications.

[0024] Step 6: Continuously collect dark counting pulses through background statistics or time-sharing processing, repeat steps 2 to 4, update the calibration lookup table in real time, and compensate for delay chain transmission errors caused by temperature drift and voltage fluctuations.

[0025] Background statistics refer to the parallel acquisition of dark count pulses by the background system while the TDC performs actual photon detection; time-division processing refers to dividing the time into multiple periods, with some periods used for actual detection and others for calibration data acquisition. Both methods ensure that the calibration process does not affect the normal operation of the TDC. After continuously acquiring dark count pulses, the statistical acquisition in step 2, the nonlinear index calculation in step 3, and the lookup table construction in step 4 are repeated, and the correction time value in the calibration lookup table can be updated in real time. Because ambient temperature drift will change the electrical characteristics and propagation delay of the delay unit through thermal expansion and contraction and changes in carrier mobility, and power supply voltage fluctuations will directly affect the operating speed of the delay unit, resulting in delay chain propagation errors, the updated lookup table can reflect the characteristics of the TDC under the current environment, thereby compensating for these errors in real time, establishing a closed-loop dynamic tracking mechanism for the physical characteristics of the device, and ensuring that the measurement system maintains optimal linearity and accuracy in all time periods and under multiple operating conditions.

[0026] In one embodiment, placing the single-photon avalanche diode in a dark environment and operating it in Geiger mode includes: Setting the reverse bias voltage of a single-photon avalanche diode above its breakdown voltage creates a high electric field region inside the PN junction, providing the physical conditions for the thermally excited avalanche multiplication effect of charge carriers.

[0027] Specifically, the breakdown voltage of the SPAD is the critical threshold for its operation in Geiger mode. The reverse bias voltage needs to be precisely controlled above the breakdown voltage to ensure a sufficiently strong electric field is formed inside the PN junction. This high electric field region provides an acceleration environment for thermally excited carriers, enabling them to gain sufficient kinetic energy to trigger an avalanche multiplication effect, thereby generating stable dark counting pulses. This design requires no additional signal excitation device, directly utilizing the physical characteristics of the SPAD to generate calibration signals. This not only simplifies the system hardware structure and reduces hardware complexity and cost, but also provides ideal statistical random samples through dark counting. The dark counting events are statistically completely uncorrelated with the TDC reference clock, meeting the stringent requirements of code density testing for the randomness of the input signal, thus ensuring extremely high accuracy in differential and integral nonlinear calculations. Finally, this method has in-situ real-time dynamic compensation capabilities. Since it utilizes the signal generated in-situ by the detector, the calibration process covers the entire signal transmission link, enabling real-time capture and correction of delay drift caused by changes in ambient temperature, power supply voltage fluctuations, and device aging, ensuring that the system maintains high-precision time measurement performance throughout the entire cycle.

[0028] It also achieves high-level on-chip integration of SPAD and TDC modules, laying the foundation for subsequent in-situ testing and real-time calibration, and avoiding noise interference and parasitic parameter effects introduced by external signal sources.

[0029] In one embodiment, based on the pulse frequency of each unit, and simultaneously calculating the total number of samples and the system period, the calibration result of each delay unit is calculated, including: Based on the pulse frequency of each unit, and simultaneously calculating the total number of samples and the system period, the calibration result of each delay unit is as follows:

[0030] in, This indicates the number of samples per unit. Indicates the total number of samples. Indicates the system period.

[0031] Specifically, compared to the ideal model that assumes uniform delay cell width in traditional calibration methods, this calculation method is based on actual statistical data, which better reflects the physical characteristics of TDC. This provides accurate raw data for subsequent elimination of nonlinear errors caused by process deviations and environmental drift, ensuring the reliability of the calibration results. In one embodiment, calculating the differential nonlinearity characterizing local nonuniformity and the integral nonlinearity characterizing global cumulative error includes: The differential nonlinearity characterizing local inhomogeneity and the integral nonlinearity characterizing global cumulative error are calculated as follows:

[0032]

[0033] in, This indicates the number of samples per unit. Indicates the total number of samples. This represents the total number of delay units. Indicates the first i Differential nonlinearity of each delay unit i Indicates the sequence number of the delay unit. This indicates that the integral is nonlinear.

[0034] Specifically, differential nonlinearity and integral nonlinearity are core indicators for evaluating the quantization uniformity and overall measurement accuracy of a time-to-digital converter (TDC). Differential nonlinearity characterizes the local non-uniformity of the quantization step, reflecting the deviation of the actual physical width of a single delay unit from its ideal width, directly determining the stability of the TDC's resolution capability and its lossless code characteristic at the microscale. Integral nonlinearity characterizes the global cumulative error of the system's conversion characteristics; it is formed by the sum of different levels of differential nonlinearity, representing the degree of deviation of the actual transmission characteristic curve from the ideal linear line, determining the absolute accuracy of the system's time measurement across the entire dynamic range. The calculation of these two indicators is based on the actual statistical data obtained in step 3, rather than theoretical assumptions, and can accurately quantify the nonlinear errors of the TDC caused by process deviations, temperature drift, and voltage fluctuations. Calculating these two indicators provides a clear basis for error correction in the subsequent construction of a calibration lookup table, ensuring that subsequent calibration can specifically eliminate local and global errors and improve the measurement accuracy of the TDC.

[0035] In one embodiment, during the actual photon detection phase, the hardware logic directly accesses the nonlinear calibration lookup table via address addressing.

[0036] Specifically, the hardware logic refers to the circuit modules within the TDC used for data processing and storage access, possessing high-speed computing and data transmission capabilities. During the actual photon detection phase, after the TDC outputs the raw code value, the hardware logic does not need to perform complex real-time floating-point operations. Instead, it directly uses the raw code value as the physical address, quickly locating the corresponding entry in the nonlinear calibration lookup table in the on-chip memory unit via the address bus, and instantly reading the calibrated fine-time data stored in that entry. This access method has an extremely fast response speed, meeting the TDC's requirements for real-time measurement and avoiding measurement delays caused by excessive data processing time. Simultaneously, after reading the fine-time data, the hardware logic combines it with the coarse counting time using an adder to obtain the final high-precision photon arrival time. The entire process requires no manual intervention, achieving automated integration of calibration and measurement. Compared to traditional external calibration methods that require interrupting measurement for complex calculations, this design not only improves calibration efficiency but also ensures the continuity and stability of the measurement process, effectively avoiding the impact of external interference on the measurement results.

[0037] It should be understood that, although Figure 1 The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order in which these steps are executed, and they can be performed in other orders. Figure 1 At least some of the steps in the process may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least some of the sub-steps or stages of other steps.

[0038] In one embodiment, such as Figure 2 As shown, a code density calibration system based on dark counting is provided, including: a single-photon avalanche diode dark counting module, a time-to-digital converter calibration module, and an on-chip probability histogram storage module; A single-photon avalanche diode dark counting module is used to generate and output random dark counting pulse signals that are statistically uncorrelated with the operating clock of the time-to-digital converter; The time-to-digital converter calibration module is used to receive dark counting pulse signals and perform statistical acquisition, code density testing and nonlinear index calculation, and output calibration results and differential and integral nonlinear data; The on-chip probability histogram storage module is used to receive calibration results and nonlinear index data, build and store nonlinear calibration lookup tables, provide real-time calibration data for actual measurements, and dynamically refresh the calibration lookup table through background statistics or time-sharing processing to complete real-time compensation for environmental drift.

[0039] In one embodiment, the single-photon avalanche diode in the single-photon avalanche diode dark counting module is a high-sensitivity photodetector that generates dark counting pulses through thermal excitation in a dark environment, converting the detector's own noise characteristics into an ideal random signal source required for calibration.

[0040] Specifically, the core advantage of SPAD, as a high-sensitivity photodetector, lies in its ability to spontaneously generate highly random dark counting pulses in the absence of light. This module requires no external light source or signal excitation device; it generates pulses solely through the thermal excitation mechanism of the SPAD itself, transforming the traditional detector noise characteristics into an ideal random signal source required for calibration. This design not only eliminates the hardware cost of integrating a high-precision random signal generator but also avoids signal transmission loss and parasitic interference between the external signal source and the TDC. Furthermore, the on-chip integration of the SPAD and the TDC module allows the dark counting pulses to be directly input into the TDC calibration module, shortening the signal transmission path, reducing signal integrity issues, and providing a clean signal foundation for subsequent high-precision calibration, ensuring that the calibration data accurately reflects the actual operating state of the TDC.

[0041] In one embodiment, the on-chip probability histogram storage module includes an on-chip storage unit and a hardware addressing logic unit. The on-chip storage unit is a high-speed static random access memory or a dedicated register file, used to store the probability histogram and the nonlinear calibration lookup table. The hardware addressing logic unit is used to realize fast addressing of the original code value and reading of calibration data, and works with the adder to complete the synthesis of fine time data and coarse counting time.

[0042] Specifically, such as Figure 3 The diagram shows the architecture of the on-chip probability histogram storage module. This module first writes the correction time value, which accurately reflects the actual cumulative physical width at each level and is calculated based on the statistical histogram, into the on-chip high-speed static random access memory or dedicated register file in the form of a digital mapping. This constructs a nonlinear calibration lookup table indexed by the original output code and containing the actual physical time deviation. In the subsequent actual photon detection stage, whenever the measurement module responds to the trigger signal and outputs the subdivided quantized original code value, the system hardware logic does not need to perform complex real-time floating-point operations. Instead, it directly accesses the lookup table using the original code value as the physical address, instantly reads the corresponding calibrated fine time data, and synthesizes it with the coarse counting time through an adder to obtain the final high-precision photon arrival time. At the same time, the system continuously refreshes the lookup table data through background statistics or time-sharing processing, establishing a closed-loop dynamic tracking mechanism for the physical characteristics of the device. This compensates for and eliminates delay chain transmission errors caused by ambient temperature drift or power supply voltage fluctuations in real time, ensuring that the measurement system maintains optimal linearity and accuracy throughout all time periods and under multiple operating conditions.

[0043] In one embodiment, the probability histogram constructed by the on-chip probability histogram storage module is a statistical distribution of the frequency of dark counting pulses captured by each delay unit.

[0044] Specifically, the horizontal axis of the probability histogram represents the delay unit number of the TDC, and the vertical axis represents the dark count pulse capture frequency corresponding to each delay unit. This histogram is a visualization and structured storage of the statistically collected data in step 2, which can intuitively reflect the distribution of dark count pulses in each delay unit. According to statistical laws, if the TDC has no nonlinear error, the distribution of dark count pulses in each delay unit should tend to be uniform, and the heights of the bars in the histogram should be similar; if there is a nonlinear error, the capture frequency of some delay units will be significantly higher or lower, and the histogram will show obvious fluctuations. By analyzing the distribution characteristics of the histogram, the distribution area and severity of the TDC nonlinear error can be preliminarily determined, providing an intuitive reference for subsequent calculation of nonlinear indicators (DNL, INL). At the same time, the histogram data will be continuously updated by the backend statistics or time-sharing processing, which can track the characteristic changes of the TDC caused by environmental temperature drift and voltage fluctuations in real time, providing data support for the dynamic refresh of the calibration lookup table, ensuring that the calibration results can always match the current working state of the TDC, and achieving long-term stable error compensation.

[0045] In one embodiment, the time-to-digital converter calibration module has a built-in statistical processing unit and a counter array. The statistical processing unit is used to complete the acquisition, conversion and nonlinear index calculation of dark counting pulses, and the counter array is used to record the frequency of dark counting pulses of each delay unit, so as to realize the massive data statistics of code density test.

[0046] Specifically, the counter array consists of M The system consists of several counters (the same number as the TDC fine-count delay units), each corresponding to a delay unit, capable of recording the frequency of dark counting pulses captured by that unit in real time and with high accuracy. It supports massive data statistics, ensuring statistical significance and meeting the sample size requirements for code density testing. The statistical processing unit is the core computing component of this module, with three main functions: first, receiving dark counting pulses and converting them into raw digital code values ​​to provide a basis for the counter array's counting; second, processing the data recorded by the counter array... Summarize and calculate the total number of samples. Simultaneously obtain the system cycle Thirdly, based on , , and the total number of delay units M Calculate the calibration results for each delay unit. And further calculate the differential nonlinearity Nonlinearity with Integrals This unit employs hardware-based computational logic, enabling rapid processing and calculation of large amounts of data, avoiding the delays of software computation, and ensuring efficient calibration. Simultaneously, the statistical processing unit can output the calculated calibration results and nonlinear index data to the on-chip probability histogram storage module, providing core data for constructing the calibration lookup table and achieving a closed loop in the calibration process.

[0047] The aforementioned code density calibration system based on dark counting achieves on-chip self-calibration and real-time performance compensation for the Time-to-Digital Converter (TDC) through the coordinated operation of a single-photon avalanche diode dark counting module, a time-to-digital converter (TDD) calibration module, and an on-chip probability histogram storage module. This system requires no external high-precision signal source or complex auxiliary calibration circuitry. Utilizing SPAD dark counting pulses as an ideal random signal source, it effectively eliminates nonlinear errors caused by process, voltage, and temperature fluctuations through statistical acquisition, nonlinear calculation, lookup table construction, and dynamic refreshing. Verified through 100 measurements, such as… Figure 4 , Figure 5 , Figure 6 As shown, the system's maximum calibration standard deviation is only 1.1 ps, significantly better than the ring oscillator (1.4 ps) and asynchronous crystal oscillator (1.5 ps) schemes, with less fluctuation and no periodic deviation. This advantage stems from the quantum randomness of SPAD dark counting, whose triggering time is completely decoupled from the physical layer of the system clock, providing high-purity random samples for code density testing. This ensures that the system can maintain a wide range, high linearity, and high-precision time measurement performance under complex operating conditions, and can be widely used in high-end technology fields that rely on high-precision TDCs, such as precision measurement, quantum communication, lidar, and medical imaging.

[0048] Specific limitations regarding the code density calibration system based on dark counting can be found in the limitations of the code density calibration method based on dark counting above, and will not be repeated here. Each module in the aforementioned code density calibration system based on dark counting can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in hardware or independently of the processor in a computer device, or stored in software in the memory of a computer device, so that the processor can call and execute the corresponding operations of each module.

[0049] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0050] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these modifications and improvements all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A method for code density calibration based on dark counts, characterized in that, The method includes: Step 1: Place the single-photon avalanche diode in a dark environment and operate it in Geiger mode to generate dark counting pulses through thermal perturbation effect; the dark counting pulses follow a Poisson distribution on the time axis and are statistically uncorrelated with the operating clock of the time-to-digital converter. Step 2: Use the dark counting pulse as the input trigger signal, continuously collect and convert it into the original digital code value during non-measurement periods or independent calibration channels, construct a counter array to record the pulse frequency of each unit, and at the same time count the total number of samplings and the system cycle. Step 3: Based on the pulse frequency of each unit, simultaneously count the total number of samplings and the system period, calculate the calibration results of each delay unit, and further calculate the differential nonlinearity characterizing local non-uniformity and the integral nonlinearity characterizing global cumulative error, and output the calibration and nonlinearity index data. Step 4: Calculate the correction time value of the actual cumulative physical width of each delay unit based on the calibration and nonlinear index data. Using the original output code as the index and the actual physical time deviation as the content, write the correction time value into the on-chip storage unit to construct and store the nonlinear calibration lookup table. Step 5: In the actual photon detection stage, the raw code value output by the time-to-digital converter is used as the address to access the nonlinear calibration lookup table, and the corresponding calibrated fine time data is read and combined with the coarse counting time to obtain the high-precision photon arrival time. Step 6: Continuously collect dark counting pulses through background statistics or time-sharing processing, repeat steps 2 to 4, update the calibration lookup table in real time, and compensate for delay chain transmission errors caused by temperature drift and voltage fluctuations.

2. The method of claim 1, wherein, Placing a single-photon avalanche diode in a dark environment and operating it in Geiger mode includes: Setting the reverse bias voltage of a single-photon avalanche diode above its breakdown voltage creates a high electric field region inside the PN junction, providing the physical conditions for the thermally excited avalanche multiplication effect of charge carriers.

3. The method of claim 1, wherein, Based on the pulse frequency of each unit, and simultaneously calculating the total number of samples and the system period, the calibration results of each delay unit are calculated, including: Based on the pulse frequency of each unit, and simultaneously calculating the total number of samples and the system period, the calibration result of each delay unit is calculated as follows: wherein, represents the number of samples per unit, represents the total number of samples, represents the system period.

4. The method of claim 1, wherein, The calculation of differential nonlinearity characterizing local nonuniformity and integral nonlinearity characterizing global cumulative error includes: The differential nonlinearity characterizing local inhomogeneity and the integral nonlinearity characterizing global cumulative error are calculated as follows: wherein, denotes the number of samples per unit, denotes the total number of samples, denotes the total number of delay units, denotes the differential nonlinearity of the i delay unit, i denotes the index of the delay unit, denotes the integral nonlinearity.

5. The method according to claim 1, characterized in that, In the actual photon detection stage, the hardware logic directly accesses the nonlinear calibration lookup table through address addressing.

6. A code density calibration system based on dark counting, used to implement the calibration method according to any one of claims 1-5, characterized in that, It includes a single-photon avalanche diode dark counting module, a time-to-digital converter calibration module, and an on-chip probability histogram storage module, which are connected in sequence to form a closed loop; The single-photon avalanche diode dark counting module is used to generate and output a random dark counting pulse signal that is not statistically correlated with the operating clock of the time-to-digital converter; The time-to-digital converter calibration module is used to receive dark counting pulse signals and perform statistical acquisition, code density testing and nonlinear index calculation, and output calibration results and differential and integral nonlinear data; The on-chip probability histogram storage module is used to receive calibration results and nonlinear index data, construct and store a nonlinear calibration lookup table, provide real-time calibration data for actual measurements, and dynamically refresh the calibration lookup table through background statistics or time-sharing processing to complete real-time compensation for environmental drift.

7. The system according to claim 6, characterized in that, The single-photon avalanche diode in the dark counting module is a high-sensitivity photodetector. It generates dark counting pulses through thermal excitation in the absence of light, converting the detector's own noise characteristics into an ideal random signal source required for calibration.

8. The system according to claim 6, characterized in that, The on-chip probability histogram storage module includes an on-chip storage unit and a hardware addressing logic unit. The on-chip storage unit is a high-speed static random access memory or a dedicated register file, used to store the probability histogram and the nonlinear calibration lookup table. The hardware addressing logic unit is used to realize fast addressing of the original code value and reading of calibration data, and works with the adder to complete the synthesis of fine time data and coarse counting time.

9. The system according to claim 8, characterized in that, The probability histogram constructed by the on-chip probability histogram storage module is a statistical distribution of the frequency of dark counting pulses captured by each delay unit.

10. The system according to claim 6, characterized in that, The time-to-digital converter calibration module has a built-in statistical processing unit and a counter array. The statistical processing unit is used to complete the acquisition, conversion and nonlinear index calculation of dark counting pulses. The counter array is used to record the frequency of dark counting pulses of each delay unit, realizing the massive data statistics of code density testing.

Images