Multilayer electronic assembly and method of manufacturing a multilayer electronic assembly

Abstract

This disclosure provides a multilayer electronic component and a method for manufacturing the multilayer electronic component. The multilayer electronic component includes: a body having a first and a second surface opposite to each other in a first direction, a third and a fourth surface opposite to each other in a second direction, and a fifth and a sixth surface opposite to each other in a third direction; and external electrodes disposed on the third and fourth surfaces. In at least one cross-section of the body in the first and second directions and in the first and third directions, at least one corner region connecting two adjacent surfaces (from the first to the sixth surface) includes a first curved segment connected to one of the two adjacent surfaces, a second curved segment connected to the other of the two adjacent surfaces, and a straight segment connecting the first and second curved segments.

Description

[0001] This application claims the benefit of priority to Korean Patent Application No. 10-2024-0198396, filed on December 27, 2024, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. Technical Field

[0002] This disclosure relates to a multilayer electronic component and a method for manufacturing the multilayer electronic component. Background Technology

[0003] Multilayer ceramic capacitors (MLCCs, a type of multilayer electronic component) are chip capacitors mounted on printed circuit boards of various types of electronic products, such as imaging devices (including liquid crystal displays (LCDs) and plasma display panels (PDPs)), computers, smartphones, and mobile phones, and used to charge or discharge them.

[0004] MLCCs are used as components in a variety of electronic devices due to their small size, guaranteed high capacitance, and ease of installation. With the miniaturization and high output power of various electronic devices such as computers and mobile devices, the demand for miniaturization and high capacitance of multilayer ceramic capacitors is also increasing.

[0005] Polishing, as one of the various manufacturing processes of MLCCs, can be one of the more important operations, and it can directly affect the surface condition and quality of MLCC wafers.

[0006] MLCC polishing is a process that refines the surface and edges of MLCC wafers after high-temperature sintering, exposes the internal electrodes, and optimizes the physical shape of the wafer (i.e., the MLCC wafer). MLCC polishing is known to be an essential operation for ensuring the electrical characteristics and reliability of MLCCs.

[0007] In the MLCC polishing process, it is important to form an appropriate level of roundness on the wafer surface to ensure moisture resistance and prevent chipping defects.

[0008] The existing MLCC polishing process is performed by introducing tens of thousands of wafers and auxiliary materials into a sealed rotating structure to induce wafer wear. However, this process may have technical problems, namely, the difficulty in monitoring the wafer polishing behavior in real time within the sealed structure. Furthermore, managing quality variations in the polishing process or performing improvement assessments may require thousands of sampling measurements, and analyzing the cross-sections of wafers in each manufacturing batch can consume significant time and resources.

[0009] Furthermore, according to the existing MLCC polishing process, sufficient polishing time may be required to form an appropriate level of roundness on the wafer surface, and chipping defects are very likely to occur during the polishing process.

[0010] Therefore, there is a need to develop a novel multilayer electronic component structure that can prevent breakage defects and improve moisture resistance reliability. Furthermore, there is a need to develop a novel multilayer electronic component structure that can overcome the low quality control efficiency and real-time monitoring limitations inherent in existing MLCC polishing processes.

[0011] [Existing technical documents] [Patent Literature] (Patent Document 1) Korean Patent Application No. 10-2015-0011263 published. Summary of the Invention

[0012] One aspect of this disclosure is to provide a multilayer electronic component with excellent reliability.

[0013] Another aspect of this disclosure is to provide a multilayer electronic component that suppresses fragmentation defects.

[0014] Another aspect of this disclosure is to provide a multilayer electronic component with improved moisture resistance reliability.

[0015] Another aspect of this disclosure is to provide a method for manufacturing multilayer electronic components that suppresses fragmentation defects.

[0016] However, the aspects of this disclosure are not limited to those set forth herein, and will be more readily understood in the process of describing specific exemplary embodiments of this disclosure.

[0017] According to one aspect of this disclosure, a multilayer electronic component is provided, the multilayer electronic component comprising: a body including a dielectric layer and inner electrodes alternately disposed with respect to the dielectric layer in a first direction, the body having a first surface and a second surface opposite to each other in the first direction, a third surface and a fourth surface connected to the first surface and the second surface, and a fifth surface and a sixth surface connected to the first surface and the fourth surface, the third surface and the fourth surface opposite to each other in a second direction, and the fifth surface and the sixth surface opposite to each other in a third direction; and outer electrodes disposed on the third surface and the fourth surface. In at least one cross-section of the body in the first direction and the second direction and in the third direction, at least one corner region in a corner region connecting two adjacent surfaces among the first surface to the sixth surface may include a first curved segment connected to one of the two adjacent surfaces, a second curved segment connected to the other of the two adjacent surfaces, and a straight segment connecting the first curved segment and the second curved segment to each other.

[0018] According to another aspect of this disclosure, a method for manufacturing a multilayer electronic component is provided, the method comprising: forming a laminate strip by stacking a plurality of ceramic green sheets in a first direction; forming grooves in the upper and lower surfaces of the laminate strip in the first direction, along a second direction perpendicular to the first direction and along a third direction perpendicular to both the first and second directions; obtaining a unit laminate strip by cutting the laminate strip along the grooves; obtaining a body by sintering the unit laminate strip; and forming an external electrode on the body. The method may further include a polishing operation of polishing the unit laminate strip before sintering or a polishing operation of polishing the body before forming the external electrode.

[0019] According to another aspect of this disclosure, a multilayer electronic component is provided, the multilayer electronic component comprising: a body including a capacitor forming portion, the body having at least one edge connecting two adjacent surfaces, the at least one edge including a first curved segment connected to one of the two adjacent surfaces, a second curved segment connected to the other of the two adjacent surfaces, and a straight segment disposed between the first curved segment and the second curved segment and connecting the first curved segment and the second curved segment, wherein the ratio of the radius of curvature of the first curved segment to the radius of curvature of the second curved segment is in the range of 0.78 to 1.28.

[0020] Multilayer electronic components according to exemplary embodiments of this disclosure may have improved reliability.

[0021] Multilayer electronic components according to exemplary embodiments of this disclosure can suppress fragmentation defects.

[0022] Multilayer electronic components according to exemplary embodiments of this disclosure may have improved moisture-proof reliability.

[0023] The method for manufacturing multilayer electronic components according to exemplary embodiments of this disclosure can suppress chipping defects.

[0024] However, the various advantages and effects of this disclosure are not limited to those set forth herein, and will be more readily understood in the process of describing specific exemplary embodiments of this disclosure. Attached Figure Description

[0025] The above and other aspects, features and advantages of this disclosure will become clearer from the following detailed embodiments, taken in conjunction with the accompanying drawings, in which: Figure 1 This is a schematic perspective view of a multilayer electronic assembly according to an exemplary embodiment of the present disclosure; Figure 2 It is along Figure 1 A schematic cross-sectional view of line I-I'; Figure 3It is along Figure 1 A schematic cross-sectional view taken from line II-II'; Figure 4 yes Figure 3 A magnified view of the K1 region; Figure 5 It is based on examples of existing technology and Figure 4 The diagram corresponding to region K1; Figure 6 It is a schematic 3D diagram illustrating the operation of obtaining the stacked strips; Figure 7 It is a schematic three-dimensional view of the layers of strips before the groove is formed; Figure 8 This is the front view of the stacked strips used to form the groove; Figure 9 yes Figure 8 Enlarged view of region K2; Figure 10 It is a side view of a stacked strip with grooves formed on two surfaces in the first direction; Figure 11 It is a front view of a stacked strip with grooves formed on two surfaces in the first direction; and Figure 12 It is a three-dimensional view of two surfaces with grooved overlapping strips in the first direction. Detailed Implementation

[0026] In the following description, exemplary embodiments of the present disclosure are illustrated with reference to the accompanying drawings. However, the present disclosure may be exemplified in many different forms and should not be construed as limited to the specific exemplary embodiments set forth herein. Additionally, exemplary embodiments of the present disclosure may be provided to describe the present disclosure more fully to those skilled in the art. Therefore, for clarity of description, the shape and size of elements in the drawings may be exaggerated, and elements denoted by the same reference numerals in the drawings may be the same elements.

[0027] For clarity of this disclosure, parts irrelevant to the description have been omitted, and dimensions (e.g., lengths) have been enlarged to clearly indicate layers and areas, and similar parts having the same function within the same conceptual scope are indicated by similar reference numerals throughout the specification. Throughout the specification, unless otherwise expressly stated, when an element is referred to as "comprising" or "including," it means that it may also include other elements, rather than excluding them.

[0028] In the accompanying drawings, the first direction can be defined as the stacking direction, the thickness (T) direction, or the X direction; the second direction can be defined as the length (L) direction or the Y direction; and the third direction can be defined as the width (W) direction or the Z direction.

[0029] Multilayer electronic components Figure 1 This is a schematic perspective view of a multilayer electronic component according to an exemplary embodiment of the present disclosure.

[0030] Figure 2 It is along Figure 1 A schematic cross-sectional view taken from line I-I'.

[0031] Figure 3 It is along Figure 1 A schematic cross-sectional view taken from line II-II'.

[0032] Figure 4 yes Figure 3 A magnified view of the K1 region.

[0033] In the following text, reference will be made to Figures 1 to 4 A multilayer electronic assembly 100 according to an exemplary embodiment of the present disclosure is described in detail. Furthermore, a multilayer ceramic capacitor (hereinafter referred to as "MLCC") is described as an example of a multilayer electronic assembly, but the present disclosure is not limited thereto, and the multilayer electronic assembly 100 can be various electronic products formed using ceramic materials, such as inductors, piezoelectric elements, varistors, thermistors, etc.

[0034] A multilayer electronic component 100 according to an example embodiment of the present disclosure may include: a body 110 including a dielectric layer 111 and inner electrodes 121 and 122 alternately stacked with the dielectric layer 111 in a first direction; the body 110 having a first surface 1 and a second surface 2 opposite to each other in the first direction, a third surface 3 and a fourth surface 4 connected to the first surface 1 and the second surface 2, and a fifth surface 5 and a sixth surface 6 connected to the first surface 1 to the fourth surface 4; the third surface 3 and the fourth surface 4 being opposite to each other in a second direction, and the fifth surface 5 and the sixth surface 6 being opposite to each other in a third direction; and outer electrodes 131 and 132 disposed on the third surface 3 and the fourth surface 4. In at least one cross section of the body 110 in the first direction and the second direction, and in the cross section of the body 110 in the first direction and the third direction, at least one corner region in the corner region Cz connecting two adjacent surfaces among the first surface 1 to the sixth surface 6 may include a first curved segment Rz1 connected to one of the two adjacent surfaces, a second curved segment Rz2 connected to the other of the two adjacent surfaces, and a straight segment Lz connecting the first curved segment Rz1 and the second curved segment Rz2 to each other.

[0035] In other words, at least one edge connecting two adjacent surfaces to each other includes a rounded portion having a first curved segment connected to one of the two adjacent surfaces, a second curved segment connected to the other of the two adjacent surfaces, and a straight segment connecting the first curved segment and the second curved segment.

[0036] In existing technologies, the corner area where two adjacent surfaces connect to each other can be polished into a rounded shape to prevent chipping defects and improve moisture resistance reliability. However, to achieve the appropriate level of roundness, sufficient polishing time may be required, and chipping defects are likely to occur during the polishing process.

[0037] According to an example embodiment of this disclosure, the corner region Cz connecting two adjacent surfaces may include a first curved segment Rz1 connected to one of the two adjacent surfaces, a second curved segment Rz2 connected to the other of the two adjacent surfaces, and a straight segment Lz connecting the first curved segment Rz1 and the second curved segment Rz2 to each other. This not only prevents chipping defects and improves moisture resistance reliability, but also suppresses the occurrence of chipping defects during the polishing process by reducing polishing time, thereby fundamentally preventing chipping defects.

[0038] In the following, each component included in the multilayer electronic assembly 100 according to an example embodiment of the present disclosure will be described.

[0039] In the body 110, the dielectric layer 111 and the inner electrodes 121 and 122 may be stacked alternately.

[0040] The specific shape of the main body 110 is not limited. However, as Figure 1 As shown, the body 110 may have a hexahedral shape or a shape similar to a hexahedron. During the sintering process, the ceramic powder particles included in the body 110 may shrink, so that the body 110 may not have a hexahedral shape with perfectly straight lines.

[0041] The main body 110 may have: a first surface 1 and a second surface 2, which are opposite to each other in a first direction; a third surface 3 and a fourth surface 4, which are connected to the first surface 1 and the second surface 2, and are opposite to each other in a second direction; and a fifth surface 5 and a sixth surface 6, which are connected to the first surface 1 to the fourth surface 4, and are opposite to each other in a third direction.

[0042] The main body 110 may include a corner region Cz in a cross section in the first direction and the second direction, or in a cross section in the first direction and the third direction, connecting two adjacent surfaces among the first to the sixth surfaces.

[0043] According to an example embodiment of the present disclosure, in at least one cross-section of the body 110 in the first direction and the second direction, and in at least one cross-section of the body 110 in the first direction and the third direction, at least one corner region Cz connecting two adjacent surfaces among the first surface 1 to the sixth surface 6 may include a first curved segment Rz1 connected to one of the two adjacent surfaces, a second curved segment Rz2 connected to the other of the two adjacent surfaces, and a straight segment Lz connecting the first curved segment Rz1 and the second curved segment Rz2 to each other. This not only prevents chipping defects and improves moisture resistance reliability, but also suppresses the occurrence of chipping defects during the polishing process by reducing polishing time, thereby fundamentally preventing chipping defects.

[0044] In the cross-sections in the first direction and the third direction, the corner region Cz may include the first-fifth corner region Cz1-5 connecting the first surface 1 and the fifth surface 5 to each other, the first-sixth corner region Cz1-6 connecting the first surface 1 and the sixth surface 6 to each other, the second-fifth corner region Cz2-5 connecting the second surface 2 and the fifth surface 5 to each other, and the second-sixth corner region Cz2-6 connecting the second surface 2 and the sixth surface 6 to each other.

[0045] In the cross-sections of the first and second directions, the corner region Cz may include a first-third corner region Cz1-3 connecting the first surface 1 and the third surface 3 to each other, a first-fourth corner region Cz1-4 connecting the first surface 1 and the fourth surface 4 to each other, a second-third corner region Cz2-3 connecting the second surface 2 and the third surface 3 to each other, and a second-fourth corner region Cz2-4 connecting the second surface 2 and the fourth surface 4 to each other.

[0046] Figure 5 It is based on examples of existing technology and Figure 4 The diagram corresponding to region K1. Figure 4 and Figure 5 In comparison, in the example according to the prior art, in order to achieve a suitable level of roundness, the edge may need to be polished to a radius of curvature R' approximately 0.6 times the thickness T1' of the cover 112' in the first direction. In this case, sufficient polishing time may be required, and chipping defects are likely to occur during the polishing process.

[0047] In comparison, refer to Figure 4The corner region Cz of this disclosure may include a first curved segment Rz1 connected to the second surface 2, a second curved segment Rz2 connected to the sixth surface 6, and a straight segment Lz connecting the first curved segment Rz1 and the second curved segment Rz2 to each other. Therefore, it can be confirmed that the radius of curvature R1 of the first curved segment Rz1 and the radius of curvature R2 of the second curved segment Rz2 are significantly reduced compared to the radius of curvature R' according to the prior art. Therefore, polishing time can be reduced compared to the prior art, thereby fundamentally reducing the possibility of chipping defects.

[0048] In the example embodiment, the acute angle θL formed by the line segment Lz and the first direction (X direction) can be greater than 30 degrees and less than 60 degrees. (Refer to...) Figure 4 The acute angle θL formed by the straight line segment Lz and the line XL indicating the first direction can be greater than 30 degrees and less than 60 degrees.

[0049] Therefore, the effect of suppressing fracture defects caused by the corner region Cz and improving moisture-proof reliability can be further improved. When the acute angle θL is less than or equal to 30 degrees or greater than or equal to 60 degrees, the radius of curvature of the first bending segment Rz1 or the second bending segment Rz2 may be excessively increased, and the effect of suppressing fracture defects and improving moisture-proof reliability caused by the corner region Cz of this disclosure may be insufficient.

[0050] Therefore, the acute angle θL formed by the straight line segment Lz and the first direction can preferably be greater than 30 degrees and less than 60 degrees, and more preferably, it can be greater than or equal to 40 degrees and less than or equal to 50 degrees.

[0051] In the example embodiment, when the radius of curvature of the first curved segment Rz1 is called R1 and the radius of curvature of the second curved segment Rz2 is called R2, R1 / R2 can be greater than or equal to 0.78 and less than or equal to 1.28.

[0052] When the radius of curvature of the first bending segment Rz1 is called R1 and the radius of curvature of the second bending segment Rz2 is called R2, since R1 and R2 have similar values, the effect of suppressing fragmentation defects and improving moisture-proof reliability of this disclosure can be further improved. However, R1 and R2 do not need to be the same or similar to each other. For example, R1 / R2 can be greater than or equal to 0.78 and less than or equal to 1.28. More preferably, R1 / R2 can be greater than or equal to 0.8 and less than or equal to 1.2. More preferably, R1 / R2 can be greater than or equal to 0.9 and less than or equal to 1.1.

[0053] In an example embodiment, the main body 110 may include: a capacitor forming portion Ac, including inner electrodes 121 and 122; a first covering portion 112 disposed on the upper part of the capacitor forming portion Ac in a first direction; and a second covering portion 113 disposed on the lower part of the capacitor forming portion Ac in the first direction, and a corner region may be disposed in the first covering portion 112 and the second covering portion 113.

[0054] In the example embodiment, when the average thickness of the first covering portion 112 in the first direction is referred to as T1, and the length of the straight segment Lz provided in the corner region Cz in the first covering portion 112 is referred to as L1, L1 / T1≥0.207 can be satisfied. Therefore, the effect of suppressing cracking defects caused by the corner region Cz and the effect of improving moisture-proof reliability can be further improved.

[0055] The upper limit of L1 / T1 is not limited; however, when L1 is too large, it may be difficult to adequately ensure the bending segment. Therefore, L1 / T1 ≤ 1.248 can be satisfied. Thus, in the example embodiment, T1 and L1 can satisfy 0.207 ≤ L1 / T1 ≤ 1.248.

[0056] In the example embodiment, when the average thickness of the first covering portion 112 in the first direction is referred to as T1, and the radius of curvature of the first curved segment Rz1 and the radius of curvature of the second curved segment Rz2 in the corner region Cz of the first covering portion 112 are referred to as R1 and R2, respectively, R1 / T1 and R2 / T1 can be greater than or equal to 0.2. Therefore, the effect of suppressing cracking defects caused by the corner region Cz and the effect of improving moisture-proof reliability can be further improved.

[0057] Furthermore, there are no upper limits for R1 / T1 and R2 / T1; for example, R1 / T1 and R2 / T1 can be less than 0.6.

[0058] In an example embodiment, when the average thickness of the first covering portion 112 in the first direction is referred to as T1, and the thickness of the corner region Cz in the first direction is referred to as TCz, TCz / T1 ≤ 0.75 can be satisfied.

[0059] The method for measuring L1, R1, R2, θL, T1, and TCz is not limited. For example, the body 110 can be polished to the center of the body 110 in the second direction to expose the cross-section of the body 110 in the first and third directions, or the body 110 can be polished to the center of the body 110 in the third direction to expose the cross-section of the body 110 in the first and second directions. Then, L1, R1, R2, θL, T1, and TCz can be measured using an optical microscope, a scanning electron microscope (SEM), etc.

[0060] The first surface 1 to the sixth surface 6 of the body 110 can be generally flat surfaces, and the area from the end of each surface to the end of the adjacent surface can be considered as a corner area Cz.

[0061] Reference Figure 4 The end of each surface can refer to the point where a flat surface ends, or the point where curvature increases rapidly and a curved segment begins. Additionally, the first surface 1 to the sixth surface 6 and the straight segment Lz can refer to regions with significantly large radii of curvature or radii of curvature approaching infinity.

[0062] Reference Figure 4 From left to right, based on the change in the radius of curvature of the contour of the main body 110, the radius of curvature initially approaches infinity until the point where the second surface 2 ends. Then, the radius of curvature rapidly decreases to R1 at the point where the first curved segment Rz1 begins. Subsequently, the radius of curvature can rapidly increase to a value close to infinity at the point where the straight segment Lz begins, until the point where the straight segment Lz ends. Then, the radius of curvature can rapidly decrease to R2 at the point where the second curved segment Rz2 begins. Subsequently, the radius of curvature can rapidly increase to a value close to infinity at the point where the sixth surface 6 begins.

[0063] The corresponding data can be obtained by scanning the K1 region using SEM. Figure 4 The image of region K1 is obtained. Then, the contour of the main body 110 can be extracted from the obtained image using an image analysis program. Subsequently, the radius of curvature can be measured by analyzing the extracted contour using CAD software. Through such analysis, the corner region Cz, the straight line segment Lz in the corner region Cz, and the first curved segment Rz1 and the second curved segment Rz2 can be distinguished from each other.

[0064] The radii of curvature of the straight segment Lz and the first to sixth surfaces 1 to 6 of the body 110 are not limited. However, the straight segment Lz and the first to sixth surfaces 1 to 6 of the body 110 may have radii of curvature that are, for example, 100 times or greater than the radii of curvature of the first curved segment Rz1 and the second curved segment Rz2.

[0065] The plurality of dielectric layers 111 included in the body 110 may be in a sintered state, and adjacent dielectric layers 111 may be integrated with each other, making the boundaries between adjacent dielectric layers 111 difficult to identify without the use of SEM. The number of stacked dielectric layers 111 is not limited and can be determined taking into account the size of the multilayer electronic component 100. For example, the body 110 may be formed by stacking 400 or more dielectric layers 111.

[0066] The dielectric layer 111 can be formed through the following steps: preparing a ceramic slurry including ceramic powder particles, an organic solvent, and a binder, coating the ceramic slurry on a carrier film and drying it to prepare a green ceramic sheet, and then sintering the green ceramic sheet. The ceramic powder particles are not limited as long as sufficient capacitance can be obtained therefrom, and can be, for example, barium titanate (BaTiO3)-based powder particles and CaZrO3-based paraelectric powder particles. As a more specific example, the barium titanate (BaTiO3)-based powder particles can be BaTiO3, (Ba 1-x Ca x )TiO3 (0 < x < 1), Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1), and Ba(Ti 1-y Zr y )O3 (0 < y < 1) at least one of them, and the CaZrO3-based paraelectric powder particles can be (Ca 1-x Sr x )(Zr 1- y Ti y )O3 (0 < x < 1, 0 < y < 1).

[0067] Therefore, the dielectric layer 111 can include BaTiO3, (Ba 1-x Ca x )TiO3 (0 < x < 1), Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1), Ba(Ti 1-y Zr y )O3 (0 < y < 1), and (Ca<00000​​​​​​​​​The main body 110 may include: a capacitor forming portion Ac disposed in the main body 110, the capacitor forming portion Ac having capacitance by including a first inner electrode 121 and a second inner electrode 122 configured to be opposite to each other and a dielectric layer 111 disposed between the first inner electrode 121 and the second inner electrode 122; and covering portions 112 and 113 disposed on the upper and lower portions of the capacitor forming portion Ac in a first direction.

[0069] Furthermore, the capacitor forming part Ac is the part that helps to form the capacitor, and it can be formed by stacking a plurality of first internal electrodes 121 and a plurality of second internal electrodes 122 alternately and by placing a dielectric layer 111 between the first internal electrodes 121 and the second internal electrodes 122.

[0070] Cover portions 112 and 113 may be disposed on two surfaces of the capacitor forming portion Ac in the first direction.

[0071] Cover portions 112 and 113 may include a first cover portion 112 disposed on the upper part of the capacitor forming portion Ac in the first direction and a second cover portion 113 disposed on the lower part of the capacitor forming portion Ac in the first direction. The first cover portion 112 may be referred to as the upper cover portion, and the second cover portion 113 may be referred to as the lower cover portion.

[0072] The first cover portion 112 and the second cover portion 113 can be formed by stacking one or two or more dielectric layers on the upper and lower surfaces of the capacitor forming portion Ac in the thickness direction, respectively, and can be used to substantially prevent the internal electrode from being damaged due to physical or chemical stress.

[0073] The first cover portion 112 and the second cover portion 113 do not include an inner electrode and may include the same material as the dielectric layer 111.

[0074] In other words, the first cover portion 112 and the second cover portion 113 may include ceramic materials, and may include, for example, barium titanate (BaTiO3) based ceramic materials.

[0075] The thickness of each of the covers 112 and 113 is not limited. However, in order to easily achieve miniaturization and high capacitance of multilayer electronic components, the thickness of each of the first cover 112 and the second cover 113 can be 20 μm or less.

[0076] The thickness of the first covering portion 112 and the thickness of the second covering portion 113 may be equal to each other, but this disclosure is not limited thereto, and the thickness of the first covering portion 112 and the thickness of the second covering portion 113 may have different values.

[0077] The thickness of the first cover portion 112 can refer to its dimension in the first direction, and the average value of the dimension of the first cover portion 112 in the first direction measured at five points equidistant from each other in the third direction can be referred to as the average value T1 of the first cover portion 112. The average thickness of the second cover portion 113 can be measured in the same manner.

[0078] Edge portions 114 and 115 may be provided on the fifth surface 5 and the sixth surface 6 of the main body 110.

[0079] Edge portions 114 and 115 may include a first edge portion 114 disposed on the fifth surface 5 and a second edge portion 115 disposed on the sixth surface 6. That is, edge portions 114 and 115 may be disposed on two surfaces of the ceramic body 110 that are opposite to each other in the width direction.

[0080] like Figure 3 As shown, the edges 114 and 115 may refer to the region between the two ends of each of the first inner electrode 121 and the second inner electrode 122 and the outer surface of the body 110 in a cross section of the body 110 cut along the width-thickness (WT) direction.

[0081] Edges 114 and 115 can be used to prevent damage to the internal electrodes due to physical or chemical stress.

[0082] Edge portions 114 and 115 can be formed by coating conductive paste onto the portion of the ceramic green sheet other than the portion on which the edge portion will be formed, to form an internal electrode.

[0083] Furthermore, in order to suppress the step difference caused by the inner electrodes 121 and 122, the edge portions 114 and 115 can be formed by stacking the inner electrodes and then cutting the inner electrodes to expose the inner electrodes on the two side surfaces of the capacitor forming portion Ac in the third direction (width direction). Thereafter, one dielectric layer or two or more dielectric layers can be stacked on the two side surfaces of the capacitor forming portion Ac in the third direction (width direction).

[0084] The width of each of the edge portions 114 and 115 is not limited. However, in order to easily achieve miniaturization and high capacitance of multilayer electronic components, the average width of each of the edge portions 114 and 115 may be less than or equal to 20 μm.

[0085] The average width of each of the edge portions 114 and 115 may be the average dimension MW1 of the region spaced between the inner electrode and the fifth surface 5 in the third direction or the average dimension MW2 of the region spaced between the inner electrode and the sixth surface 6 in the third direction, and may be the average of the dimensions of each of the edge portions 114 and 115 in the third direction measured at five points equidistant from each other on the side surface of the capacitor forming portion Ac.

[0086] Therefore, in the example embodiment, the regions of the inner electrodes 121 and 122 spaced apart from the fifth surface 5 and the sixth surface 6 may each have an average size MW1 and MW2 in the third direction that may be 20 μm or less.

[0087] The inner electrodes 121 and 122 may include a first inner electrode 121 and a second inner electrode 122. The first inner electrode 121 and the second inner electrode 122 may be alternately arranged opposite each other, and a dielectric layer 111 included in the body 110 is located between the first inner electrode 121 and the second inner electrode 122, and the first inner electrode 121 and the second inner electrode 122 may be exposed on the third surface 3 and the fourth surface 4 of the body 110, respectively.

[0088] The first inner electrode 121 may be spaced apart from the fourth surface 4 and exposed through the third surface 3, and the second inner electrode 122 may be spaced apart from the third surface 3 and exposed through the fourth surface 4. The first outer electrode 131 may be disposed on the third surface 3 of the body 110 and connected to the first inner electrode 121, and the second outer electrode 132 may be disposed on the fourth surface 4 of the body 110 and connected to the second inner electrode 122.

[0089] That is, the first inner electrode 121 is not connected to the second outer electrode 132 but can be connected to the first outer electrode 131, and the second inner electrode 122 is not connected to the first outer electrode 131 but can be connected to the second outer electrode 132. Therefore, the first inner electrode 121 can be formed to be spaced apart from the fourth surface 4 by a predetermined distance, and the second inner electrode 122 can be formed to be spaced apart from the third surface 3 by a predetermined distance.

[0090] In an example embodiment, inner electrodes 121 and 122 may include a first inner electrode 121 extending to a third surface 3 and a second inner electrode 122 extending to a fourth surface 4. Each of the first inner electrode 121 and the second inner electrode 122 may have its two ends in the third-direction direction contacting edges 114 and 115.

[0091] The conductive metal included in the inner electrodes 121 and 122 may include at least one of Ni, Cu, Pd, Ag, Au, Pt, In, Sn, Al, Ti and alloys thereof, but this disclosure is not limited thereto.

[0092] The average thickness td of dielectric layer 111 is not limited, but can be, for example, from 0.1 μm to 10 μm. The average thickness te of each of the inner electrodes 121 and 122 is not limited, but can be, for example, from 0.05 μm to 3.0 μm. Furthermore, the average thickness td of dielectric layer 111 and the average thickness te of each of the inner electrodes 121 and 122 can be arbitrarily set according to desired characteristics or applications. For example, in the case of small information technology (IT) electronic components, to achieve miniaturization and high capacitance, the average thickness td of dielectric layer 111 can be less than or equal to 0.45 μm, and the average thickness te of each of the inner electrodes 121 and 122 can be less than or equal to 0.45 μm.

[0093] The average thickness td of dielectric layer 111 and the average thickness te of each of inner electrodes 121 and 122 can refer to the dimensions of dielectric layer 111 and each of inner electrodes 121 and 122 in the first direction, respectively. The average thickness td of dielectric layer 111 and the average thickness te of each of inner electrodes 121 and 122 can be measured, for example, by scanning a cross-section of body 110 in the first and second directions using a SEM at a magnification of 10000. More specifically, the average thickness td of dielectric layer 111 can be measured by measuring the thickness of dielectric layer 111 at multiple points (e.g., thirty points equidistant from each other in the second direction) and calculating the average thickness. Similarly, the average thickness te of each of inner electrodes 121 and 122 can be measured by measuring the thickness at multiple points (e.g., thirty points equidistant from each other in the second direction) and calculating the average thickness. The thirty equidistant points can be specified in the capacitor forming section Ac. Furthermore, when such an average measurement is performed on the ten dielectric layers 111 and the ten inner electrodes 121 and 122, the average thickness td of the dielectric layer 111 and the average thickness te of each of the inner electrodes 121 and 122 can be more generalized.

[0094] External electrodes 131 and 132 can be disposed on the third surface 3 and the fourth surface 4 of the main body 110, respectively.

[0095] The external electrodes 131 and 132 may be disposed on the third surface 3 and the fourth surface 4 of the main body 110, respectively, and may include the first external electrode 131 and the second external electrode 132 connected to the first internal electrode 121 and the second internal electrode 122, respectively.

[0096] Reference Figure 1 The outer electrodes 131 and 132 may be configured to cover the two end surfaces of the edges 114 and 115 in the second direction. Alternatively, the outer electrodes 131 and 132 may also be configured to cover a portion of the two end surfaces of the edges 114 and 115 in the third direction.

[0097] In this example embodiment, a structure is described in which a multilayer electronic component 100 has two external electrodes 131 and 132, but the number and shape of the external electrodes 131 and 132 may be changed depending on the form of the internal electrodes 121 and 122 or for other purposes.

[0098] Each of the external electrodes 131 and 132 can be formed using any conductive material (such as metal), and the specific material can be determined taking into account electrical properties, structural stability, etc. Furthermore, each of the external electrodes 131 and 132 can have a multilayer structure.

[0099] For example, the external electrodes 131 and 132 may respectively include electrode layers 131a and 132a disposed on the main body 110 and plating layers 131b and 132b formed on the electrode layers 131a and 132a.

[0100] As a more specific example of electrode layers 131a and 132a, electrode layers 131a and 132a may be sintered electrodes comprising conductive metal and glass, or resin-based electrodes comprising conductive metal and resin.

[0101] Furthermore, electrode layers 131a and 132a may have a form in which a sintered electrode and a resin-based electrode are sequentially formed on the body 110. Additionally, electrode layers 131a and 132a can be formed by transferring a sheet including a conductive metal onto the body 110 or by transferring a sheet including a conductive metal onto a sintered electrode.

[0102] Materials with excellent electrical conductivity can be used as conductive metals included in electrode layers 131a and 132a, but such materials are not limited. For example, the conductive metal can be at least one of nickel (Ni), copper (Cu), and alloys thereof.

[0103] Platings 131b and 132b can be used to improve mounting characteristics. The type of each of platings 131b and 132b is not limited, and each of platings 131b and 132b can be a plating including at least one of Ni, Sn, Pd and alloys thereof, and can be formed using multiple layers.

[0104] As a more specific example of plating layers 131b and 132b, each of plating layers 131b and 132b may be a Ni plating layer or a Sn plating layer, and may have a Ni plating layer and a Sn plating layer sequentially formed on electrode layers 131a and 132a, or may have a Sn plating layer, a Ni plating layer, and a Sn plating layer sequentially formed on electrode layers 131a and 132a. Additionally, each of plating layers 131b and 132b may include multiple Ni plating layers and / or multiple Sn plating layers.

[0105] The size of the multilayer electronic component 100 is not limited.

[0106] For example, the multilayer electronic component 100 may have dimensions of 0.603 (length: 0.6 mm, width: 0.3 mm) or larger. Taking into account manufacturing tolerances, the maximum length of the body 110 in the second direction (L direction) may be less than or equal to 0.69 mm, and the maximum width of the body 110 in the third direction (W direction) may be less than or equal to 0.39 mm.

[0107] Here, the maximum length of the main body 110 in the second direction (L direction) can refer to the maximum size of the main body 110 in the second direction, the maximum width of the main body 110 in the third direction (W direction) can refer to the maximum size of the main body 110 in the third direction, and the maximum thickness of the main body 110 in the first direction (T direction) can refer to the maximum size of the main body 110 in the first direction.

[0108] However, the size of the multilayer electronic component 100 need not be limited to a small size. As the size of the multilayer electronic component 100 increases, the present disclosure can have more pronounced effects and structural differences. Therefore, the multilayer electronic component 100 can have a size of 1005 (length: 1.0 mm, width: 0.5 mm) or larger. Taking into account manufacturing errors, the maximum length of the body 110 in the second direction (L direction) can be greater than or equal to 1.1 mm, and the maximum width of the body 110 in the third direction (W direction) can be greater than or equal to 0.55 mm.

[0109] Methods for manufacturing multilayer electronic components Figure 6 This is a schematic 3D diagram illustrating the operation of obtaining the stacked strips.

[0110] Figure 7 It is a schematic three-dimensional view of the layers of strips before the groove is formed.

[0111] Figure 8 This is the front view of the stacked strips used to form the groove.

[0112] Figure 9 yes Figure 8 A magnified view of the K2 region.

[0113] Figure 10 It is a side view of a stacked strip with grooves formed on two surfaces in the first direction.

[0114] Figure 11 It is a front view of the stacked strips with grooves formed on two surfaces in the first direction.

[0115] Figure 12 It is a three-dimensional view of two surfaces with grooved overlapping strips in the first direction.

[0116] In the following text, reference will be made to Figures 6 to 12 A method for manufacturing a multilayer electronic component is described in detail below. The method for manufacturing a multilayer electronic component described below is an example of manufacturing the multilayer electronic component 100 described above, and the multilayer electronic component 100 may not be manufactured solely by the manufacturing method described below.

[0117] A method for manufacturing a multilayer electronic component according to an example embodiment of the present disclosure may include: forming a laminate 200 by stacking a plurality of ceramic green sheets GS1, GS2, and GS3 in a first direction; forming grooves H1 and H2 in the upper surface Sa and lower surface Sb of the laminate 200 in the first direction, along a second direction perpendicular to the first direction and a third direction perpendicular to the first and second directions; obtaining a unit laminate by cutting the laminate 200 along the grooves H1 and H2; obtaining a body 110 by sintering the unit laminate; and forming external electrodes 131 and 132 on the body 110. The method may further include a polishing operation of polishing the unit laminate before sintering or polishing the body 110 before forming the external electrodes 131 and 132.

[0118] According to an example embodiment of this disclosure, grooves H1 and H2 can be formed in the laminate 200, and unit laminates can be obtained by cutting the laminate 200 along the grooves H1 and H2, thereby suppressing chipping defects even with fewer polishing processes, and also improving the moisture resistance reliability of multilayer electronic components.

[0119] In the following, each operation of manufacturing a multilayer electronic component according to an example embodiment of the present disclosure will be described in detail.

[0120] Forming laminated strips First, a laminated strip 200 can be formed by stacking multiple ceramic green sheets GS1, GS2, and GS3 in a first direction. At least a portion of the laminated strip 200 may be included as part of the body 110 of this disclosure after sintering.

[0121] In this configuration, ceramic green sheets GS1, GS2, and GS3 may comprise a first ceramic green sheet GS1 having a first internal electrode pattern P121 printed thereon, a second ceramic green sheet GS2 having a second internal electrode pattern P122 printed thereon, and a third ceramic green sheet GS3 having neither the first internal electrode pattern P121 nor the second internal electrode pattern P122 printed thereon. The third ceramic green sheet GS3 may be laminated in the upper portion P112 of the laminating strip 200 in the first direction and in the lower portion P113 of the laminating strip 200 in the first direction, and the first ceramic green sheet GS1 and the second ceramic green sheet GS2 may be alternately laminated in the central portion of the laminating strip 200 in the first direction.

[0122] In the operation of forming the stacked strip 200, first, a plurality of green ceramic sheets GS1, GS2, and GS3 may be stacked on the support film 310.

[0123] The support film 310 can be used to support the stacked strip 200 in which a plurality of green ceramic sheets GS1, GS2, and GS3 are stacked. In this case, the support film 310 may include an adhesive material such as latex, starch, cellulose, protein, isoprene rubber (IR), nitrile rubber (NBR), styrene-butadiene rubber (SBR), chloroprene rubber (CR), silicone rubber, silicones, polyurethanes, acrylates, and mixtures thereof.

[0124] The plurality of green ceramic sheets GS1, GS2, and GS3 can be formed using a ceramic paste including ceramic powder particles, an organic solvent, a dispersant, and a binder. The ceramic powder particles may include a barium titanate-based material, a lead composite perovskite-based material, or a strontium titanate-based material as raw materials included in the dielectric layer 111 of the multilayer electronic component 100. The barium titanate-based material may include BaTiO3-based ceramic powder particles. Examples of BaTiO3-based ceramics may include BaTiO3 and (Ba 1-x Ca x )TiO3 (0 < x < 1), Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1), or at least one of Ba(Ti 1-y Zr y )O3 (0 < y < 1). After sintering the plurality of green ceramic sheets GS1 and GS2, the sintered green ceramic sheets GS1 and GS2 may become the dielectric layer 111 included in the main body 110. After sintering the third green ceramic sheet GS3, the sintered third green ceramic sheet GS3 may form the first covering portion 112 and the second covering portion 113. The third green ceramic sheet GS3 may be formed of the same material as the first green ceramic sheet GS1 and the second green ceramic sheet GS2, but the present disclosure is not limited thereto.

[0125] Internal electrode patterns P121 and P122 can be formed on ceramic green sheets GS1 and GS2 using an internal electrode paste comprising a conductive metal. The conductive metal included in the internal electrode patterns P121 and P122 is not limited, and materials with excellent conductivity can be used. For example, the conductive metal may include at least one of nickel (Ni), copper (Cu), palladium (Pd), silver (Ag), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), and alloys thereof. The method for forming the internal electrode patterns P121 and P122 on the ceramic green sheets GS1 and GS2 is not limited. For example, the internal electrode patterns P121 and P122 can be formed by printing an internal electrode conductive paste comprising a conductive metal onto the ceramic green sheets GS1 and GS2 using screen printing or gravure printing.

[0126] The internal electrode patterns P121 and P122 may include a first internal electrode pattern P121 formed on the first ceramic green sheet GS1 and a second internal electrode pattern P122 formed on the second ceramic green sheet GS2.

[0127] Groove forming operation Subsequently, grooves H1 and H2 can be formed in the upper surface Sa and lower surface Sb of the laminated strip 200 in the first direction along a second direction (Y direction) perpendicular to the first direction (X direction) and a third direction (Z direction) perpendicular to the first and second directions. For example, grooves H1 and H2 may include groove H1 formed along the second direction (Y direction) and groove H2 formed along the third direction (Z direction). Therefore, after the polishing process, the corner region Cz may include a straight segment Lz, thereby suppressing chipping defects and improving moisture resistance reliability.

[0128] Reference Figure 7 Grooves H1 and H2 can be formed in the laminated strip 200 along lines C1-C1 and C2-C2. Lines C1-C1 and C2-C2 may include line C1-C1 parallel to a second direction and line C2-C2 parallel to a third direction. Lines C1-C1 may be arranged at substantially equal intervals in the third direction, and lines C2-C2 may be arranged at substantially equal intervals in the second direction.

[0129] Figure 5 It is based on examples of existing technology and Figure 4 The diagram corresponding to region K1. In an example according to the prior art, a polishing process can be performed after cutting the laminated strip along lines C1-C1 and C2-C2, without forming grooves in the laminated strip. Therefore, as Figure 5As shown, roundness can be achieved through a polishing process. To achieve a suitable level of roundness, the edges may need to be polished to a radius of curvature R' approximately 0.6 times the thickness T1' of the cover 112' in the first direction. In this case, sufficient polishing time may be required, and chipping defects are likely to occur during the polishing process.

[0130] In contrast, in this disclosure, after grooves H1 and H2 are formed in the laminated strip 200, the laminated strip can be cut along lines C1-C1 and C2-C2, and then a polishing process can be performed. Therefore, due to the polishing process, a portion of grooves H1 and H2 can be retained as a straight segment Lz, and the two ends of the straight segment Lz can have curved segments Rz1 and Rz2 formed due to polishing. (Refer to...) Figure 4 The corner region Cz of this disclosure may include a first curved segment Rz1 connected to the second surface 2, a second curved segment Rz2 connected to the sixth surface 6, and a straight segment Lz connecting the first curved segment Rz1 and the second curved segment Rz2 to each other. Therefore, it can be confirmed that the radius of curvature R1 of the first curved segment Rz1 and the radius of curvature R2 of the second curved segment Rz2 are significantly reduced compared to the radius of curvature R' according to the prior art. Therefore, compared to the prior art, polishing time can be reduced, thereby fundamentally reducing the possibility of chipping defects and improving moisture resistance reliability.

[0131] The method for forming grooves H1 and H2 in the laminate 200 is not limited. For example, grooves H1 and H2 can be formed using a blade DB. For example, grooves H1 and H2 can be formed in the following manner: First, as... Figure 7 and Figure 8 As shown, grooves H1 and H2 are formed along lines C1-C1 and C2-C2 on the upper surface Sa of the laminated strip 200 in the first direction, and then as... Figure 10 and Figure 11 The laminate 200 is flipped and placed on the support film 310, and grooves H1 and H2 are formed along lines C1-C1 and C2-C2 in the lower surface Sb of the laminate 200 in the first direction.

[0132] In an example embodiment, the thickness Th of each of the grooves H1 and H2 formed in the upper surface Sa of the laminate 200 in the first direction may be 50% or less of the thickness Tp1 of the upper portion P112 of the laminate 200 in the first direction. Similarly, the thickness of each of the grooves H1 and H2 formed in the lower surface Sb of the laminate 200 in the first direction may be 50% or less of the thickness of the lower portion P113 of the laminate 200 in the first direction.

[0133] In an example embodiment, slots H1 and H2 may be disposed in regions that do not overlap with at least one of the first inner electrode pattern P121 and the second inner electrode pattern P122 in a first direction. In lines C1-C1 and C2-C2, line C1-C1 may not overlap with the first inner electrode pattern P121 and the second inner electrode pattern P122 in a first direction, while a portion of line C2-C2 may be disposed to overlap with either the first inner electrode pattern P121 or the second inner electrode pattern P122 in a first direction.

[0134] In the example embodiment, grooves H1 and H2 may be V-shaped. Specifically, refer to... Figure 11 In the cross-section of the main body in the first and third directions, the groove H1 formed along the second direction may have a V-shape. (Refer to...) Figure 10 In the cross-section of the main body in the first and second directions, the groove H2 formed along the third direction can have a V-shape. Since grooves H1 and H2 have a V-shape, the corner region Cz can be easily formed into a shape including the straight segment Lz after polishing.

[0135] V-shaped grooves H1 and H2 can be formed by using a V-shaped blade DB to form the groove.

[0136] In the example embodiment, the angle θv formed by the two sides of the V-shaped grooves H1 and H2 can be greater than 60 degrees and less than 120 degrees. Therefore, the acute angle θL formed by the straight line segment Lz and the first direction (X direction) can be controlled to be greater than 30 degrees and less than 60 degrees, thereby further improving the effect of suppressing fracture defects caused by the corner region Cz and improving the moisture-proof reliability.

[0137] More preferably, the angle θv formed by the two sides of the V-shaped grooves H1 and H2 can be greater than or equal to 80 degrees and less than or equal to 100 degrees.

[0138] Cutting operation Unit stacked strips can be obtained by cutting stacked strips 200 along grooves H1 and H2.

[0139] Reference Figure 12 The laminated strips 200 can be cut along lines C1-C1 and C2-C2 that are perpendicular to each other.

[0140] The means of cutting the laminated strip 200 are not limited. For example, the laminated strip 200 can be cut using a blade cutting method, a guillotine cutting method, or a laser cutting method.

[0141] In the example embodiment, the cut can be performed along the point where the two sides of the V-shaped grooves H1 and H2 intersect. That is, the cut can be performed along the vertices of the V-shaped grooves H1 and H2.

[0142] Polishing operation Subsequently, a polishing process for the polishing unit stack can be performed. Optionally, after the sintering of the unit stack to obtain the body, the polishing process for the polishing body can be performed before the formation of the outer electrode.

[0143] Polishing processes can be performed by introducing tens of thousands of stacked strips or bodies (hereinafter referred to as "sheets") and auxiliary materials into a sealed rotating structure to induce wear on the sheets. Auxiliary materials may include abrasives, lubricants, etc., and abrasives may include ceramic particles, polishing beads, etc.

[0144] During the polishing process, tens of thousands of wafers can be processed in a sealed environment, making it difficult to monitor the polishing behavior of individual wafers in real time. Furthermore, for diverse management and improved evaluation, it may be necessary to analyze thousands of sample wafers, which can consume significant time and resources.

[0145] According to an example embodiment of this disclosure, the polishing process can be performed after the grooves H1 and H2 are formed in the laminated strip 200, thereby reducing polishing time and fundamentally reducing the likelihood of breakage defects and improving moisture resistance reliability.

[0146] Sintering operation Sinterable unit stacks are used to obtain body 110. The sintering temperature is not limited. However, for example, sintering can be performed at 1000°C to 1300°C. Alternatively, sintering can be performed in a reducing atmosphere.

[0147] When the polishing process is not performed before sintering, the polishing process of the main body can be performed before the formation of the outer electrode.

[0148] Operation of forming external electrodes Subsequently, external electrodes can be formed on the body. The multilayer electronic assembly 100 can be manufactured by forming external electrodes 131 and 132 on one surface (third surface 3) and another surface (third surface 4) of the body 110 in the second direction, respectively.

[0149] For example, when electrode layers 131a and 132a include sintered electrode layers, the body 110 can be immersed in an external electrode conductive paste comprising metal powder particles, glass frit, binder and organic solvent, and then the external electrode conductive paste can be sintered at a temperature of 500°C to 900°C to form a sintered electrode layer.

[0150] For example, when electrode layers 131a and 132a include resin electrode layers, the substrate can be immersed in a conductive resin composition comprising metal powder particles, resin, binder and organic solvent, and then the conductive resin composition can be cured by heat treatment at a temperature of 250°C to 550°C to form a resin electrode layer.

[0151] Furthermore, plating layers 131b and 132b can be formed by further performing electrolytic plating and / or electroless plating on electrode layers 131a and 132a.

[0152] (Example) The sample piece is manufactured according to the above manufacturing method, and the manufacturing of the sample piece makes the sample piece so that... Figure 4 θL and R1 / R2 satisfy the conditions in Table 1 below. A moisture-proof reliability evaluation was performed, and the results are shown in Table 1 below.

[0153] In the moisture-proof reliability evaluation, 20,000 sample pieces were prepared for each test number. A voltage of 3Vr (three times the rated voltage (Vr)) was applied for 12 hours at a temperature of 85°C and a relative humidity of 85%. When the insulation resistance value of the sample piece decreased to 1 / 100 of the initial value or less, the sample piece was identified as defective, and the number of sample pieces identified as defective is shown in Table 1.

[0154] [Table 1]

[0155] Referring to Table 1, in all tests from test number 1 to test number 5, the number of samples exhibiting moisture-proof reliability failure out of 20,000 samples was less than or equal to 40, confirming a low moisture-proof reliability failure rate of less than or equal to 0.2%. This result can be explained by the fact that reducing polishing time fundamentally suppresses the occurrence of chipping defects during the polishing process (as described above).

[0156] Specifically, when θL is greater than 30 degrees and less than 60 degrees, the number of samples showing moisture-proof reliability failure among 20,000 samples is less than or equal to 4, which confirms that the moisture-proof reliability failure rate is significantly low, less than or equal to 0.02%.

[0157] While exemplary embodiments have been shown and described above, it will be readily understood by those skilled in the art that modifications and variations may be made without departing from the scope of this disclosure as defined by the appended claims.

[0158] Furthermore, the term "example embodiment" as used herein does not refer to the same example embodiment, but is provided to emphasize a particular feature or characteristic that differs from a particular feature or characteristic of another example embodiment. However, the example embodiments provided herein are considered to be implementable by combining them entirely or partially with each other. For example, an element described in a particular example embodiment may be understood as a description relating to another example embodiment, even if it is not described in another example embodiment, unless a contrary or contradictory description is provided in that other example embodiment.

[0159] The terminology used herein is for the purpose of describing particular exemplary embodiments only and is not intended to limit the exemplary embodiments. As used herein, the singular forms are also intended to include the plural forms, unless the context clearly indicates otherwise.

Claims

1. A multilayer electronic component, comprising: A body includes a dielectric layer and internal electrodes alternately disposed with the dielectric layer in a first direction. The body has a first surface and a second surface opposite to each other in the first direction, a third surface and a fourth surface connected to the first surface and the second surface, and a fifth surface and a sixth surface connected to the first surface and the fourth surface. The third surface and the fourth surface are opposite to each other in a second direction, and the fifth surface and the sixth surface are opposite to each other in a third direction. as well as External electrodes are disposed on the third surface and the fourth surface. Wherein, in at least one of the cross sections of the body in the first direction and the second direction and the cross sections of the body in the first direction and the third direction, at least one corner region in the corner region connecting two adjacent surfaces among the first surface to the sixth surface includes a first curved segment connected to one of the two adjacent surfaces, a second curved segment connected to the other of the two adjacent surfaces, and a straight segment connecting the first curved segment and the second curved segment to each other.

2. The multilayer electronic component according to claim 1, wherein, The acute angle formed by the straight line segment and the first direction is greater than 30 degrees and less than 60 degrees.

3. The multilayer electronic component according to claim 1, wherein, When the radius of curvature of the first curved segment is called R1 and the radius of curvature of the second curved segment is called R2, R1 / R2 is greater than or equal to 0.78 and less than or equal to 1.

28.

4. The multilayer electronic component according to claim 1, wherein, The main body includes: a capacitor forming portion including the inner electrode; a first covering portion disposed on the upper part of the capacitor forming portion in the first direction; and a second covering portion disposed on the lower part of the capacitor forming portion in the first direction. The at least one corner area is provided in the first cover and the second cover.

5. The multilayer electronic component according to claim 4, wherein, When the average thickness of the first covering portion in the first direction is referred to as T1, and the length of the straight segment provided in the at least one corner region of the first covering portion is referred to as L1, L1 / T1≥0.207 is satisfied.

6. The multilayer electronic component according to claim 5, wherein, L1 and T1 satisfy 0.207≤L1 / T1≤1.

248.

7. The multilayer electronic component according to claim 4, wherein, When the average thickness of the first covering portion in the first direction is referred to as T1, and the radius of curvature of the first curved segment disposed in the at least one corner region of the first covering portion and the radius of curvature of the second curved segment disposed in the at least one corner region of the first covering portion are referred to as R1 and R2 respectively, R1 / T1 and R2 / T1 are greater than or equal to 0.

2.

8. The multilayer electronic component according to claim 7, wherein, R1 / T1 and R2 / T1 are greater than or equal to 0.2 and less than 0.

6.

9. The multilayer electronic component according to claim 4, wherein, When the average thickness of the first covering portion in the first direction is referred to as T1, and the thickness of the at least one corner region provided in the first covering portion in the first direction is referred to as TCz, TCz / T1≤0.75 is satisfied.

10. The multilayer electronic assembly according to claim 1, wherein, In the cross-sections of the first direction and the third direction, the corner region includes a first-fifth corner region connecting the first surface and the fifth surface to each other, a first-sixth corner region connecting the first surface and the sixth surface to each other, a second-fifth corner region connecting the second surface and the fifth surface to each other, and a second-sixth corner region connecting the second surface and the sixth surface to each other.

11. The multilayer electronic assembly according to claim 1, wherein, In the cross-sections of the first direction and the second direction, the corner region includes a first-third corner region connecting the first surface and the third surface to each other, a first-fourth corner region connecting the first surface and the fourth surface to each other, a second-third corner region connecting the second surface and the third surface to each other, and a second-fourth corner region connecting the second surface and the fourth surface to each other.

12. The multilayer electronic assembly according to claim 1, wherein, The maximum length of the body in the second direction is greater than or equal to 1.1 mm and the maximum width of the body in the third direction is greater than or equal to 0.55 mm.

13. A method for manufacturing a multilayer electronic component, the method comprising: A laminated strip is formed by stacking multiple ceramic green sheets in a first direction; In the upper and lower surfaces of the laminated strip in the first direction, a first groove is formed along a second direction perpendicular to the first direction, and a second groove is formed along a third direction perpendicular to the first and second directions; Unit laminated strips are obtained by cutting the laminated strips along the first groove and the second groove; The main body is obtained by sintering the unit stacked strips; as well as An external electrode is formed on the main body. The method further includes a polishing operation of polishing the unit stack strips before sintering or a polishing operation of polishing the body before forming the external electrode.

14. The method according to claim 13, wherein, The plurality of ceramic green sheets include a first ceramic green sheet printed with a first internal electrode pattern, a second ceramic green sheet printed with a second internal electrode pattern, and a third ceramic green sheet not printed with the first internal electrode pattern and the second internal electrode pattern. The third ceramic green sheet is stacked in the upper and lower portions of the stacking strip in the first direction, and the first ceramic green sheet and the second ceramic green sheet are alternately stacked in the central portion of the stacking strip in the first direction.

15. The method according to claim 14, wherein, The thickness of the first groove and the second groove formed in the upper surface of the laminated strip in the first direction is 50% or less of the thickness of the upper portion of the laminated strip in the first direction.

16. The method of claim 14, wherein, The first groove and the second groove are disposed in a region that does not overlap with at least one of the first inner electrode pattern and the second inner electrode pattern in the first direction.

17. The method according to claim 13, wherein, In the cross-section of the body in the first direction and the third direction, the first groove has a V-shape, and in the cross-section of the body in the first direction and the second direction, the second groove has a V-shape.

18. The method according to claim 17, wherein, The angle formed by the two sides of each of the first and second V-shaped grooves is between 80 and 100 degrees.

19. The method of claim 17, wherein, The cutting is performed at the point where the two sides of each of the first and second grooves in the V-shape intersect.

20. A multilayer electronic component, comprising: The body includes a capacitor forming portion, the body having at least one edge connecting two adjacent surfaces, the at least one edge including a first curved segment connected to one of the two adjacent surfaces, a second curved segment connected to the other of the two adjacent surfaces, and a straight segment disposed between the first curved segment and the second curved segment and connecting the first curved segment and the second curved segment. The ratio of the radius of curvature of the first curved segment to the radius of curvature of the second curved segment is in the range of 0.78 to 1.

28.

21. The multilayer electronic component according to claim 20, further comprising: The first covering portion is disposed above the capacitor forming portion in the thickness direction; And a second covering portion, disposed below the capacitor forming portion in the thickness direction. The at least one edge is disposed in one or both of the first covering portion and the second covering portion.

22. The multilayer electronic assembly according to claim 21, wherein, The at least one edge is disposed in the first covering portion, and wherein the ratio of the length L1 of the straight segment in the direction connecting the first curved segment and the second curved segment to the average thickness T1 of the first covering portion in the thickness direction is in the range of 0.207 to 1.

248.

23. The multilayer electronic assembly according to claim 21, wherein, The at least one edge is disposed in the first covering portion, and wherein, when the average thickness of the first covering portion in the thickness direction is T1, the radius of curvature of the first curved segment is R1, and the radius of curvature of the second curved segment is R2, both R1 / T1 and R2 / T1 are greater than or equal to 0.2 and less than 0.6.

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