Solar Cells and Their Optimization Methods

Abstract

This application relates to the field of solar cell technology, and more particularly to a solar cell and its optimization method. The optimization method includes: providing process sheets from each step of the cell manufacturing process, and obtaining the photoluminescence brightness of each process sheet; printing a paste onto each process sheet to obtain a printed sheet, and obtaining the photoluminescence brightness of each printed sheet; obtaining the attenuation rate of the photoluminescence brightness of the process sheets and the corresponding printed sheets, and using the attenuation rate as an indicator to evaluate the corrosion resistance of the film layer introduced in the corresponding step to the paste; and optimizing the paste or film layer structure based on the corrosion resistance of the film layer to the paste. In this application, a non-pressurized small-plate process cell is used as the target, avoiding the manpower and financial resources required for module-based approaches. Simultaneously, the photoluminescence brightness (PL) values ​​of the process sheets before and after printing are tested separately. Based on the change in PL values, the compatibility between the specific film layer and the paste can be determined, thereby allowing for targeted adjustments to the corresponding film layer and paste.

Description

Technical Field

[0001] This application relates to the field of solar cell technology, and in particular to a solar cell and its optimization method. Background Technology

[0002] In recent years, the photovoltaic (PV) industry has developed rapidly, accounting for a significant proportion of renewable energy production. N-TOPCon cells exhibit higher minority carrier lifetime, lower electro-induced degradation (PID) effect, and lower light-induced degradation (LID). In the structure of N-Topcon cells, the back film layer of the silicon wafer mainly transmits through the majority carrier selective tunneling layer and the poly-Si layer. ++ Doping and Si x N y The passivation effect of the film reduces the recombination rate of charge carriers on the silicon wafer surface, thereby improving minority carrier lifetime. Based on this, the back-side film of the silicon wafer can be optimized to improve the overall performance of the battery. However, how to specifically optimize specific films still needs further research.

[0003] It should be noted that the above content is not necessarily prior art, nor is it intended to limit the scope of patent protection of this application. Summary of the Invention

[0004] This application provides a solar cell and its optimization method to solve or alleviate one or more of the technical problems mentioned above.

[0005] The first aspect of this application provides a method for optimizing solar cells.

[0006] According to embodiments of this application, the method for optimizing the solar cell includes the following operations: Provide process sheets for each step in the manufacturing process of solar cells, and obtain the photoluminescence brightness of each process sheet; Each process sheet is printed with paste to obtain a printed sheet, and the photoluminescence brightness of each printed sheet is obtained. The attenuation rate of the photoluminescence brightness of the process sheet and the corresponding printed sheet is obtained, and the attenuation rate is used as an indicator to evaluate the corrosion resistance of the film layer introduced in the corresponding process to the slurry. Based on the corrosion resistance of the membrane to the slurry, the slurry or membrane structure is optimized.

[0007] In this embodiment, a non-pressed small-plate process cell is used as the target, avoiding the consumption of manpower and financial resources that would be required for a module-based approach. At the same time, the PL value of the process cell before and after printing is tested separately. Based on the change in PL value before and after printing, the compatibility of the specific film layer and paste can be determined. Therefore, the corresponding film layer and paste can be adjusted in a targeted manner, thereby optimizing the cell performance.

[0008] According to another embodiment of this application, the method for optimizing the solar cell includes the following operations: The printed sheets were subjected to high-temperature and humidity stress tests to obtain test aged sheets, and the photoluminescence brightness of each test aged sheet was obtained. The decay rate of photoluminescence brightness of each printed wafer before and after the high temperature and humidity stress test is obtained, and the decay rate is used as an indicator to evaluate the damage of the film layer introduced in each process to the silicon wafer. Based on the degree of damage, the corresponding film layer is optimized.

[0009] In this embodiment of the application, by comparing the PL values ​​before and after the high-temperature and humidity stress test, the aging ability of each film layer against high-temperature and humidity stress can be obtained, which is beneficial for subsequent targeted adjustments.

[0010] A second aspect of this application provides a solar cell prepared by the optimized method of the first aspect. As a result, the paste in this solar cell is better matched with each film layer, and / or the aging resistance of each film layer is better. Attached Figure Description

[0011] In the accompanying drawings, unless otherwise specified, the same reference numerals throughout the various drawings denote the same or similar parts or elements. These drawings are not necessarily drawn to scale. It should be understood that these drawings depict only some embodiments disclosed in this application and should not be construed as limiting the scope of this application.

[0012] Figure 1 This is a flowchart of the method for optimizing a solar cell provided in an embodiment of this application; Figure 2 This is a flowchart of an optimization method for a solar cell provided in another embodiment of this application; Figure 3 This is a schematic diagram of the structure of the process slices in each of the various processes provided in the embodiments of this application.

[0013] Explanation of reference numerals in the attached figures: 1-Silicon substrate; 2-n + poly-Si layer; 3-Si x N y Layer; 4-electrode. Detailed Implementation

[0014] The embodiments of this application are described in detail below, examples of which are illustrated in the accompanying drawings. In the drawings, for clarity, the dimensions of layers, regions, and elements, as well as their relative dimensions, may be exaggerated. Throughout, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application. It should be noted that, unless otherwise specified, the embodiments and features in the embodiments of this application can be combined with each other.

[0015] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or portions, these elements, components, areas, layers, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or portion from another element, component, area, layer, or portion. Therefore, without departing from the teachings of this application, the first element, component, area, layer, or portion discussed below may be referred to as a second element, component, area, layer, or portion. And the discussion of a second element, component, area, layer, or portion does not imply that the first element, component, area, layer, or portion necessarily exists in this application.

[0016] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0017] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such terms can be used interchangeably where appropriate so that the embodiments of this application described herein can be implemented, for example, in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0018] In this application, when numerical intervals (i.e., numerical ranges) are involved, unless otherwise specified, the distribution of selectable numerical values ​​within the numerical interval is considered continuous, and includes the two endpoints of the numerical interval (i.e., the minimum and maximum values), as well as every numerical value between these two endpoints. Unless otherwise specified, when a numerical interval refers only to integers within that numerical interval, it includes the two endpoint integers of the numerical range, as well as every integer between the two endpoints, which is equivalent to directly listing every integer. When multiple numerical ranges are provided to describe features or characteristics, these numerical ranges can be merged. In other words, unless otherwise specified, the numerical ranges disclosed in this application should be understood to include any and all subranges included therein. The "numerical value" in the numerical interval can be any quantitative value, such as a number, percentage, ratio, etc. The term "numerical interval" can be broadly included to include percentage intervals, ratio intervals, proportion intervals, etc.

[0019] High-accelerated temperature and humidity stress testing (HAST) is a high-acceleration reliability testing method for electronic components, using temperature and humidity as environmental parameters. It assesses the moisture resistance of test samples by increasing the water vapor pressure in the test chamber to an extremely high level higher than the partial pressure of water vapor inside the sample. This process accelerates the penetration of moisture into the sample over time. During the entire HAST test, moisture damage to the silicon wafer is unavoidable. Existing silicon wafer HAST tests typically involve pressing multiple silicon wafers of the same grade into a module before testing, a cumbersome and costly process. Furthermore, HAST damage measured using the module-to-module method cannot pinpoint the specific film layer from which the damage originates, hindering targeted improvements to the relevant film layers later.

[0020] This application provides an optimization method for solar cells. Based on this method, the compatibility between specific film layers and pastes can be obtained, and the specific sources of HAST damage in the film layers can be identified, allowing for targeted adjustments. Details are provided below.

[0021] Exemplary embodiments according to this application will now be described in more detail with reference to the accompanying drawings. It should be understood that these exemplary embodiments may be implemented in many different forms and should not be construed as being limited to the embodiments set forth herein.

[0022] The first aspect of this application provides a method for optimizing solar cells.

[0023] In some embodiments, such as Figure 1 As shown, the optimization method for this solar cell includes the following steps: S101. Provide process sheets for each step in the manufacturing process of solar cells, and obtain the photoluminescence brightness of each process sheet; It is worth noting that the photoluminescence brightness, or PL value, is related to the non-equilibrium minority carrier concentration in the material from the perspective of carrier recombination. During photoluminescence, the recombination of photogenerated electrons and holes produces photons, and the PL value reflects the recombination rate and quantity of photogenerated carriers. When the material has fewer defects and a more complete crystal structure, photogenerated carriers can recombine more effectively, resulting in a higher brightness value. Conversely, if the material has many defects or impurities, carrier recombination will be hindered, and the PL value will decrease. Therefore, by comparing the PL values ​​of the three process wafers before and after paste printing and before and after HAST aging, the degree of damage to the silicon substrate by the corresponding film layer can be determined. In some specific embodiments, the solar cell includes a TOPCon cell.

[0024] Optionally, see Figure 3 Each of the aforementioned processes includes at least two of alkaline polishing, front coating, and back coating. This facilitates comparison of the changes in the film layer introduced by each process. Specifically, a silicon substrate is obtained after an alkaline polishing process on a silicon wafer. The alkaline polishing process includes: providing an N-type monocrystalline silicon wafer, performing front-side boron diffusion on the N-type monocrystalline silicon wafer, and then performing alkaline washing on the N-type monocrystalline silicon wafer to obtain silicon substrate 1.

[0025] Furthermore, the positive film process includes: depositing n on the back side of the silicon substrate 1. + Poly-Si layer 2, an Al2O3 layer and Si are deposited on the front side of the silicon substrate. x N y The process sheet after obtaining the positive film is a stack of n layers. + Silicon substrate of poly-Si layer 2.

[0026] Alternatively, plasma-enhanced chemical vapor deposition (PECVD) can be used to deposit n + poly-Si layer, deposited Al2O3 layer and Si x N y layer.

[0027] Furthermore, the backing film process includes: in the n + Si is deposited on poly-Si layer 2 x N y Layer 3, resulting in the backsheet, i.e., n layers are sequentially stacked in the first direction. + poly-Si layer 2 and Si x N y The silicon substrate 1 of layer 3. Wherein, the first direction is the direction along the thickness direction of the silicon substrate 1, from the front side to the back side of the silicon substrate 1.

[0028] Optionally, n + The thickness of poly-Si layer 2 can be 80nm to 100nm.

[0029] Optionally, Si x N y The thickness of layer 3 can be 70nm to 100nm.

[0030] S102. Perform paste printing on each process sheet to print the electrode 4 onto the back of each process sheet, resulting in each printed sheet as shown in the figure. Figure 3 To obtain the photoluminescence brightness of each printed sheet; Optionally, each process sheet can be placed on a two-stage back printing press for paste printing.

[0031] Furthermore, the printing process employs selective ink penetration printing, which is common in the current TOPCon process. The ink can be a two-stage back-fine printing ink, such as BA901-A455 ink from Nantong Tiansheng New Energy Co., Ltd., or CSP-N3TR ink from Changzhou Juhe New Material Co., Ltd.

[0032] S103. Obtain the attenuation rate of the photoluminescence brightness of the process sheet and the corresponding printed sheet, and use the attenuation rate as an indicator to evaluate the corrosion resistance of the film layer introduced in the corresponding process to the slurry; thereby, the compatibility between the specific film layer and the slurry can be obtained. The magnitude of the PL attenuation rate reflects the degree of corrosion of the film layer after printing the slurry. The larger the attenuation rate, the greater the degree of corrosion of the film layer by the slurry; and vice versa.

[0033] S104. Based on the corrosion resistance of the film layer to the slurry, optimize the slurry or film layer structure. Therefore, the magnitude of the photoluminescence brightness attenuation rate before and after printing the slurry can be used as a basis for adjusting the slurry or film layer structure, optimizing the film layer or slurry with a large photoluminescence brightness attenuation rate, and improving the compatibility between the film layer and the slurry.

[0034] In this embodiment, a non-pressed small-plate process cell is used as the target, avoiding the consumption of manpower and financial resources that would be required for a module-based approach. At the same time, the PL value of the process cell before and after printing is tested separately. Based on the change in PL value before and after printing, the compatibility of the specific film layer and paste can be determined. Therefore, the corresponding film layer and paste can be adjusted in a targeted manner, thereby optimizing the cell performance.

[0035] In other embodiments, the method for optimizing the solar cell further includes the following operations: S201. High-temperature and humidity stress tests are conducted on the printed wafers to obtain aged test wafers, and the photoluminescence brightness of each aged test wafer is obtained. Thus, by using printed wafers from each process to conduct high-temperature and humidity stress tests, the photoluminescence brightness of each aging test represents the recombination rate and quantity of photogenerated carriers in the solar cell, thereby reflecting the degree of aging damage to the film layer. Optionally, the high-temperature and humidity stress test (HAST test) is conducted at 121℃~150℃, with a humidity of 85%~100%, for a time of 15h~96h.

[0036] S202. Obtain the attenuation rate of photoluminescence brightness of each printed wafer before and after the high temperature and humidity stress test, and use the attenuation rate as an indicator to evaluate the damage of the film layer introduced in each process to the silicon wafer; thereby, by comparing the PL values ​​before and after the high temperature and humidity stress test, the aging ability of each film layer to resist high temperature and humidity stress can be obtained, which is beneficial for subsequent targeted adjustments.

[0037] S203. Based on the damage level, optimize the corresponding film layer. Thus, targeted adjustments are made based on the area with the greatest loss, optimizing the overall performance of the battery.

[0038] For example, n are stacked + The silicon substrate with the poly-Si layer showed the greatest change in PL value before and after the HAST test, indicating that n + The poly-Si layer has the worst aging resistance, which can be adjusted by adjusting n. + The process of creating the poly-Si layer is used to optimize the overall performance of the battery.

[0039] A second aspect of this application provides a solar cell prepared by the optimized method of the first aspect. As a result, the paste in this solar cell is better matched with each film layer, and / or the aging resistance of each film layer is better.

[0040] The following section will conduct performance tests on the optimization method for the solar cell provided in the embodiments of this application.

[0041]

Example 1

[0042] Step 5: Apply the following to four additional silicon substrates and four layers of n-coated silicon: +A poly-Si layer silicon substrate and four layers sequentially stacked with n in the first direction + poly-Si layer and Si x N y The silicon substrate of the layer is printed with paste on the back to form electrodes, and then cured in a sintering machine with a sintering peak temperature of 835°C. The slurry was purchased from Nantong Tiansheng New Energy Co., Ltd. and its model number is BA901-A455. Step 6: Perform PL testing on the above printed films. The PL testing conditions are: laser intensity of 1.03 and laser current of 19.65. The results are shown in Table 1.

[0043] Step 7: Based on the PL values ​​before and after printing, make corresponding improvements to the film or paste.

[0044]

Example 2

[0045]

Example 3

[0046] Step 2: Perform PL testing on each printed wafer after the HAST test. The PL test conditions are: laser intensity of 1.03 and laser current of 19.65. The results are shown in Table 2.

[0047] Step 3: Based on the PL values ​​before and after the HAST test, make corresponding improvements to the film layer.

[0048]

Example 4

[0049] Step 2: Perform PL testing on each printed wafer after the HAST test. The PL test conditions are: laser intensity of 1.03 and laser current of 19.65. The results are shown in Table 2.

[0050] Step 3: Based on the PL values ​​before and after the HAST test, make corresponding improvements to the film layer.

[0051] Table 1

[0052] Note: Attenuation rate before and after printing = (PL value after printing - PL value before printing) / PL value before printing × 100%.

[0053] Analyzing Table 1, the PL brightness attenuation rate of each back film layer before and after slurry printing in Examples 1 and 2 is compared: There is no significant difference in the PL value of the silicon substrate layer, n + The significant decrease in the PL value of the poly-Si layer proves that the fine backing slurry affects the n... + The poly-Si layer suffered the most damage; SiN x The overall PL value increased after the printing of the paste in the SiN layer. This is because... x Under the passivation effect, high-temperature sintering improves the internal crystal structure of the battery cell, thereby increasing the overall PL brightness. On the other hand, comparing the PL values ​​of each backsheet layer before and after printing with the pastes in Examples 1 and 2, based on the PL brightness decay rate, it can be seen that the Tiansheng paste used in Example 1 causes less damage to the backsheet layer, corresponding to a higher PL value. Therefore, the printing process can be further improved by comparing the composition of the backsheet pastes and selecting the optimal printing paste to reduce film damage; simultaneously optimizing n... + Poly-Si layer process formulation, optimizing polycrystalline silicon thickness.

[0054] Table 2

[0055] Note: Attenuation rate before and after aging = (PL value after aging - PL value after printing) / PL value after printing × 100%.

[0056] As shown in Table 2, comparing the PL values ​​of the process wafers in Examples 3 and 4 before and after HAST15, there was no significant difference in the PL value of the silicon substrate; + poly-Si layer and SiN x The PL values ​​of all layers decreased, with n + The more significant reduction in the poly-Si layer indicates that the n of the fine paste on the back after printing... + The poly-Si layer further decays after HAST15. Therefore, this can be mitigated by improving n + The poly-Si layer process or stacking process is used to optimize the film layer, thereby improving the aging resistance.

[0057] It should be noted that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential," etc., are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application. The directional terms "inner" and "outer" refer to the inside or outside relative to the outline of the component itself. For example, if a device in the drawings is inverted, a device described as "above" or "on top of" other devices or structures will subsequently be positioned as "below" or "under" other devices or structures. Thus, the exemplary term "above" can include both "above" and "below." The device may also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatial relative descriptions used herein are interpreted accordingly.

[0058] It should also be noted that the terms "one embodiment," "another embodiment," and "embodiment" used in this application refer to specific features, structures, or characteristics described in connection with that embodiment, which are included in at least one embodiment described in the general description of this application. The appearance of the same expression in multiple places in the specification does not necessarily refer to the same embodiment. Furthermore, when a specific feature, structure, or characteristic is described in connection with any embodiment, the intention is to suggest that implementing such a feature, structure, or characteristic in conjunction with other embodiments also falls within the scope of this application.

[0059] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0060] It should also be noted that the above are merely preferred embodiments of this application and do not limit the scope of patent protection of this application. Any equivalent structural or procedural changes made using the content of this application’s specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of this application.

Claims

1. A method for optimizing solar cells, characterized in that, Includes the following operations: Provide process sheets for each step in the manufacturing process of solar cells, and obtain the photoluminescence brightness of each process sheet; Each process sheet is printed with paste to obtain a printed sheet, and the photoluminescence brightness of each printed sheet is obtained. The attenuation rate of the photoluminescence brightness of the process sheet and the corresponding printed sheet is obtained, and the attenuation rate is used as an indicator to evaluate the corrosion resistance of the film layer introduced in the corresponding process to the slurry. Based on the corrosion resistance of the membrane to the slurry, the slurry or membrane structure is optimized.

2. The method for optimizing solar cells according to claim 1, characterized in that, The battery cells include TOPCon batteries.

3. The method for optimizing solar cells according to claim 1, characterized in that, The process includes at least two of the following: alkaline polishing process, positive film process, and back film process.

4. The method for optimizing solar cells according to claim 3, characterized in that, The alkaline polishing process includes: An N-type monocrystalline silicon wafer is provided, and the N-type monocrystalline silicon wafer is subjected to front-side boron diffusion, followed by alkaline washing to obtain a silicon substrate. The positive film process includes: depositing an n + poly-Si layer on the back surface of the silicon substrate, depositing an Al203 layer and Si x N y layer on the front surface of the silicon substrate; and + the process piece after the front film is obtained, i.e. the silicon substrate with the n The back film process includes: In the n + Si layer is deposited on the poly-Si layer x N y The process sheet after the back film is obtained, i.e. the silicon substrate with the n + poly-Si layer and Si x N y layer stacked in the first direction in sequence.

5. The method for optimizing solar cells according to claim 4, characterized in that, The process wafer includes a silicon substrate and n-layered silicon wafers. + A silicon substrate with a poly-Si layer, and n layers sequentially stacked in the first direction. + poly-Si layer and Si x N y At least two of the silicon substrates in the layer.

6. The method for optimizing solar cells according to claim 1, characterized in that, This also includes the following operations: High-temperature and humidity stress tests were conducted on the printed sheets to obtain test aged sheets, and the photoluminescence brightness of each test aged sheet was obtained. The decay rate of photoluminescence brightness of each printed wafer before and after the high temperature and humidity stress test is obtained, and the decay rate is used as an indicator to evaluate the damage of the film layer introduced in each process to the silicon wafer. Based on the degree of damage, the corresponding film layer is optimized.

7. The method for optimizing solar cells according to claim 6, characterized in that, The high-temperature and humidity stress test conditions include: The temperature ranges from 121℃ to 150℃, the humidity ranges from 85% to 100%, and the time ranges from 15h to 96h.

8. The method for optimizing a solar cell according to any one of claims 1 to 7, characterized in that, The test conditions for the photoluminescence brightness were all the same.

9. The method for optimizing solar cells according to claim 8, characterized in that, The test conditions for the photoluminescence brightness include: The laser intensity is 1.03–1.10, and the laser current is 19.65–19.

80.

10. A solar cell, characterized in that, It is prepared by the optimization method according to any one of claims 1 to 9.

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