Multilayer electronic component

Abstract

The present disclosure provides a multilayer electronic component including a main body including dielectric layers and first and second internal electrodes alternately arranged with the dielectric layers interposed therebetween, and first and second external electrodes provided on the main body and connected to the first and second internal electrodes, respectively. The first external electrode includes a tin (Sn) plating layer provided at an outermost portion of the first external electrode, and the second external electrode includes a gold-tin (Au-Sn) plating layer provided at an outermost portion of the second external electrode, the gold-tin (Au-Sn) plating layer having a color different from that of the Sn plating layer.

Description

[0001] This application claims the benefit of priority to Korean Patent Application No. 10-2025-0004024, filed on January 10, 2025, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. Technical Field

[0002] This disclosure relates to a multilayer electronic component. Background Technology

[0003] Multilayer ceramic capacitors (MLCCs, a type of multilayer electronic component) are chip capacitors mounted on printed circuit boards in various electronic products, such as liquid crystal displays (LCDs) and plasma display panels (PDPs), computers, smartphones, and mobile phones, to charge or discharge them. MLCCs are used as components in various electronic devices due to their small size, high capacitance, and ease of installation.

[0004] In addition, screening tests (such as burn-in testing) are performed to induce potential defects in MLCCs and screen for early defects. During screening tests, high voltages are repeatedly applied to the MLCCs, and the voltage continues to be applied even after final screening and mounting on the printed circuit board. MLCCs typically have two external electrodes that are usually visually indistinguishable from each other. Therefore, the direction of voltage application may change multiple times during screening tests, potentially degrading the dielectric insulation resistance (IR) and expected lifetime characteristics. Therefore, maintaining a consistent voltage application direction throughout MLCC screening tests and final use improves MLCC reliability. Summary of the Invention

[0005] One aspect of this disclosure is to provide a multilayer electronic component with excellent reliability.

[0006] According to one aspect of this disclosure, a multilayer electronic component includes: a body including a dielectric layer and a first inner electrode and a second inner electrode, the first inner electrode and the second inner electrode being alternately disposed and the dielectric layer being disposed between the first inner electrode and the second inner electrode; and a first outer electrode and a second outer electrode disposed on the body and respectively connected to the first inner electrode and the second inner electrode. The first outer electrode includes a tin (Sn) plating layer disposed on its outermost portion, and the second outer electrode includes a gold-tin (Au-Sn) plating layer disposed on its outermost portion, the gold-tin (Au-Sn) plating layer having a color different from that of the Sn plating layer. Attached Figure Description

[0007] The above and other aspects, features and advantages of this disclosure will become clearer from the following detailed embodiments, taken in conjunction with the accompanying drawings, in which: Figure 1 This is a schematic perspective view of a multilayer electronic assembly according to an embodiment; Figure 2 It is a schematic representation of the path along Figure 1 A cross-sectional view of the section intercepted by line I-I'; Figure 3 It is a schematic representation of the path along Figure 1 A cross-sectional view of the section intercepted by line II-II'; Figure 4 It is a schematic representation of the path along Figure 1 A cross-sectional view of the section intercepted by line III-III'; Figure 5 This schematically illustrates a multilayer electronic assembly according to another embodiment. Figure 2 Corresponding cross-sectional view; Figure 6 This is a schematic plan view of a multilayer electronic component packaging unit according to an embodiment; Figure 7A This is a plot showing the lifetime Weibull distributions for Examples 1 and 2; Figure 7B This is a plot showing the lifetime Weibull distributions for Examples 3 and 4; and Figure 7C This is a graph showing the lifetime Weibull distribution for Examples 5 and 6. Detailed Implementation

[0008] In the following description, embodiments of the present disclosure will be illustrated with reference to specific examples and accompanying drawings. However, embodiments of the present disclosure can be modified in many different ways, and the scope of the present disclosure is not limited to the embodiments described below. Furthermore, embodiments of the present disclosure are provided to provide a more complete description of the disclosure to those skilled in the art. Therefore, for clarity, the shapes and dimensions of elements in the drawings may be exaggerated, and elements indicated by the same reference numerals in the drawings are the same elements.

[0009] Furthermore, to clearly illustrate this disclosure in the accompanying drawings, parts irrelevant to the description have been omitted, and for ease of description, the dimensions and thicknesses of each component shown in the drawings are arbitrarily illustrated; therefore, this disclosure is not necessarily limited to the embodiments shown. Additionally, the same reference numerals are used to describe components having the same function within the scope of the same concept. Moreover, throughout the specification, when it is said that a component "comprises," unless otherwise stated, it means that other components may be included without excluding them.

[0010] In the accompanying drawings, the first direction X can be defined as the thickness direction, the second direction Y can be defined as the length direction, and the third direction Z can be defined as the width direction.

[0011] Multilayer electronic components Figure 1 This is a schematic perspective view of a multilayer electronic assembly according to an embodiment.

[0012] Figure 2 It is a schematic representation of the path along Figure 1 A cross-sectional view of the section intercepted by line I-I'.

[0013] Figure 3 It is a schematic representation of the path along Figure 1 A cross-sectional view of the section cut by line II-II'.

[0014] Figure 4 It is a schematic representation of the path along Figure 1 A cross-sectional view of the section cut by line III-III'.

[0015] In the following text, reference will be made to Figures 1 to 4 A multilayer electronic assembly 100 according to an embodiment is described in detail. Furthermore, although a multilayer ceramic capacitor is described as an example of a multilayer electronic assembly, this disclosure is not limited thereto, and this disclosure can be applied to various multilayer electronic assemblies such as inductors, piezoelectric elements, varistors, or thermistors.

[0016] According to an embodiment, the multilayer electronic assembly 100 may include a body 110 and external electrodes 131 and 132 disposed on the body 110.

[0017] Although there are no specific restrictions on the exact shape of the main body 110, however... Figure 1 As shown, the body 110 may be formed in a hexahedral shape or a similar shape. Due to the shrinkage of the ceramic powder contained in the body 110 during the sintering process or due to the polishing process of the edges of the body 110, the body 110 may not have a perfect right hexahedral shape, but may have a generally hexahedral shape.

[0018] The main body 110 may have a first surface 1 and a second surface 2 that are opposite to each other in a first direction, a third surface 3 and a fourth surface 4 that are connected to the first surface 1 and the second surface 2 and are opposite to each other in a second direction, and a fifth surface 5 and a sixth surface 6 that are connected to the first surface 1, the second surface 2, the third surface 3 and the fourth surface 4 and are opposite to each other in a third direction.

[0019] The main body 110 may include a dielectric layer 111 and internal electrodes 121 and 122 alternately disposed with the dielectric layer 111. The plurality of dielectric layers 111 forming the main body 110 are in a sintered state, and adjacent dielectric layers 111 may be integrated such that it is difficult to distinguish the boundary therebetween without using a scanning electron microscope (SEM).

[0020] For example, the dielectric layer 111 may include a perovskite-type compound represented by ABO3 as its main component. The perovskite compound represented by ABO3 may include, for example, at least one selected from the group consisting of BaTiO3, (Ba 1-x Ca x )TiO3 (0 < x < 1), Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1), Ba(Ti 1-y [[ID=2I]]Zr y )O3 (0 < y < 1), CaZrO3, and (Ca 1-x Sr x )(Zr 1- y Ti y )O3 (0 < x ≤ 0.5, 0 < y ≤ 0.5).

[0021] The average thickness td of the dielectric layer 111 is not particularly limited. The average thickness td of the dielectric layer 111 may be, for example, from about 0.1 μm to 20 μm, from about 0.1 μm to 10 μm, from about 0.1 μm to 5 μm, from about 0.1 μm to 2 μm, or from about 0.1 μm to 0.4 μm.

[0022] The internal electrodes 121 and 122 may include, for example, a first internal electrode 121 and a second internal electrode 122, which are alternately disposed in a first direction with the dielectric layer 111 interposed therebetween. The first internal electrode 121 and the second internal electrode 122, which are a pair of electrodes having different polarities, may be disposed to face each other with the dielectric layer 111 interposed therebetween.

[0023] The first internal electrode 121 may be spaced apart from the fourth surface 4, and the first internal electrode 121 may be connected to the first external electrode 131 at the third surface 3. The second internal electrode 122 may be spaced apart from the third surface 3, and the second internal electrode 122 may be connected to the second external electrode 132 at the fourth surface 4.

[0024] The conductive metal included in the inner electrodes 121 and 122 may be at least one selected from the group consisting of Ni, Cu, Pd, Ag, Au, Pt, Sn, W, Ti and alloys thereof. More specifically, the conductive metal included in the inner electrodes 121 and 122 may include Ni, but this disclosure is not limited thereto.

[0025] There is no particular limitation on the average thickness te of the inner electrodes 121 and 122. The average thickness te of the inner electrodes 121 and 122 can be, for example, 0.1 μm to 3.0 μm, 0.1 μm to 1.0 μm, or 0.1 μm to 0.4 μm.

[0026] The average thickness td of dielectric layer 111 refers to the average thickness of dielectric layer 111 in the first direction, and the average thickness te of inner electrodes 121 and 122 refers to the average thickness of inner electrodes 121 and 122 in the first direction. The average thickness td of dielectric layer 111 and the average thickness te of inner electrodes 121 and 122 can be measured by scanning the first and second direction sections of the body 110 at a magnification of 10,000 using a scanning electron microscope (SEM). More specifically, the average thickness td of dielectric layer 111 can be measured by measuring the thickness at multiple points (e.g., five equally spaced points in the Y direction) on a single dielectric layer 111 and then averaging the results. Similarly, the average thickness te of inner electrodes 121 and 122 can be measured by measuring the thickness at multiple points (e.g., five equally spaced points in the second direction) on a single inner electrode 121 or 122 and then averaging the results. The five equally spaced points can be specified in the capacitor forming section Ac. Furthermore, by performing the average value measurement on the ten dielectric layers 111 and then taking the average value, the average thickness td of the dielectric layers 111 can be more generalized, and by performing the average value measurement on the ten inner electrodes 121 and 122 and then taking the average value, the average thickness te of the inner electrodes 121 and 122 can be more generalized.

[0027] The main body 110 may include: a capacitor forming portion Ac, disposed within the main body 110 and forming a capacitor therein, the capacitor forming portion Ac including alternately disposed first inner electrode 121 and second inner electrode 122, and a dielectric layer 111 between the first inner electrode 121 and the second inner electrode 122; covering portions 112 and 113, disposed on two surfaces of the capacitor forming portion Ac opposite to each other in a first direction; and edge portions 114 and 115, disposed on two surfaces of the capacitor forming portion Ac and the covering portions 112 and 113 opposite to each other in a third direction. Except that the covering portions 112 and 113 and the edge portions 114 and 115 do not include inner electrodes, the covering portions 112 and 113 and the edge portions 114 and 115 may have a structure similar to that of the dielectric layer 111.

[0028] The average thickness tc of the covering portions 112 and 113 can be, for example, 300 μm or less, 150 μm or less, 100 μm or less, 30 μm or less, or 20 μm or less. The average thickness tc of the covering portions 112 and 113 can also be, for example, 5 μm or more, 10 μm or more, or 30 μm or more. In this case, the average thickness tc of the covering portions 112 and 113 refers to the average thickness of each of the first covering portion 112 and the second covering portion 113.

[0029] The average thickness tc of the covers 112 and 113 may refer to the average thickness of the covers 112 and 113 in the first direction, and may be the average thickness in the first direction measured at five equally spaced points on the cross section of the body 110 in the first and second directions.

[0030] The average thickness of edge portions 114 and 115 can be, for example, 150 μm or less, 100 μm or less, 20 μm or less, or 15 μm or less. The average thickness of edge portions 114 and 115 can also be, for example, 5 μm or more, 10 μm or more, or 20 μm or more. In this case, the average thickness of edge portions 114 and 115 refers to the average thickness of each of the first edge portion 114 and the second edge portion 115.

[0031] The average thickness of the edges 114 and 115 may refer to the average thickness of the edges 114 and 115 in the third direction, and may be the average thickness in the third direction measured at five equally spaced points in the first and third direction sections of the body 110.

[0032] The external electrodes 131 and 132 may include a first external electrode 131 connected to the first internal electrode 121 and a second external electrode 132 connected to the second internal electrode 122. The first external electrode 131 may be disposed on the third surface 3 to contact the end of the first internal electrode 121, and the second external electrode 132 may be disposed on the fourth surface 4 to contact the end of the second internal electrode 122. The first external electrode 131 may extend from the third surface 3 to a portion of the first surface 1, a portion of the second surface 2, a portion of the fifth surface 5, and a portion of the sixth surface 6, and the second external electrode 132 may extend from the fourth surface 4 to a portion of the first surface 1, a portion of the second surface 2, a portion of the fifth surface 5, and a portion of the sixth surface 6.

[0033] According to an embodiment, Sn plating 131c may be disposed on the outermost part of the first external electrode 131, and Au-Sn plating 132c may be disposed on the outermost part of the second external electrode 132, wherein Au-Sn plating 132c has a color different from that of Sn plating 131c.

[0034] As mentioned above, after manufacturing, multilayer electronic components undergo screening tests, such as aging tests. During screening tests, high voltages should be applied to the multilayer electronic components multiple times. However, in situations where the appearance of the first external electrode and the second external electrode cannot be distinguished, the direction of voltage application to the multilayer electronic components may sometimes change several times during process selection and subsequent use.

[0035] When a voltage is applied to a dielectric, the domains within the dielectric may align in the direction of the applied voltage. Subsequent heat treatment of the dielectric can cause the domains to rearrange randomly, but even after heat treatment, some domains may retain their original arrangement. In this state, if a voltage is applied to the dielectric in the opposite direction, some domains may be damaged by the voltage applied in the opposite direction to their alignment, which may degrade the insulation resistance of the dielectric.

[0036] Furthermore, in the case of the multilayer electronic assembly 100 according to an embodiment of the present disclosure, a Sn plating layer 131c is disposed on the outermost portion of the first external electrode 131, and an Au-Sn plating layer 132c is disposed on the outermost portion of the second external electrode 132. The Au-Sn plating layer 132c has a different color than the Sn plating layer 131c, thereby allowing the first external electrode 131 and the second external electrode 132 to be distinguished during process selection and use. This ensures a uniform voltage application direction for the multilayer electronic assembly 100 during process selection and use, thereby improving the reliability of the multilayer electronic assembly 100.

[0037] In this disclosure, the case where the Sn plating 131c and the Au-Sn plating 132c have different colors can be represented, for example, by a color difference (ΔE) between the Sn plating 131c and the Au-Sn plating 132c defined by the following mathematical formula 1, being 50 or greater.

[0038] [Mathematical Expression 1] ΔE = [(ΔL * ) 2 +(Δa * ) 2 +(Δb * ) 2 ] 1 / 2 In the above mathematical formula 1, ΔL* can refer to the difference between the L* value of the CIE L*a*b* color system measured in the Sn coating 131c and the L* value of the CIE L*a*b* color system measured in the Au-Sn coating 132c, Δa* can refer to the difference between the a* value of the CIE L*a*b* color system measured in the Sn coating 131c and the a* value of the CIE L*a*b* color system measured in the Au-Sn coating 132c, and Δb* can refer to the difference between the b* value of the CIE L*a*b* color system measured in the Sn coating 131c and the b* value of the CIE L*a*b* color system measured in the Au-Sn coating 132c. In this disclosure, "CIE L*a*b* color system" can refer to the color system standardized and recommended by the International Commission on Illumination (CIE) in 1976, in which L* value represents luminance (0~100, 0 represents black, 100 represents white), a* value represents red-green bias (-128~127, positive value represents reddish color, negative value represents greenish color), and b* value represents yellow-blue bias (-128~127, positive value represents yellowish color, negative value represents bluish color).

[0039] In addition, since gold (Au) is yellow, the color difference between Sn plating 131c and Au-Sn plating 132c can be confirmed solely based on the b* value.

[0040] Furthermore, the Au-Sn plating 132c may include an Au-Sn alloy comprising Au and Sn. Au is a non-ferrous metal with excellent electrical conductivity and solderability not significantly worse than Sn, while Sn possesses excellent solderability. It is sufficient for the Au-Sn plating 132c to contain an Au-Sn alloy. However, for example, the Au content (by weight) relative to all elements in the Au-Sn plating 132c may be greater than the Sn content (by weight) relative to all elements in the Au-Sn plating 132c. This allows for more reliable differentiation between the first external electrode 131 and the second external electrode 132. Because Au has excellent wettability relative to Sn, even if the Au content (by weight) in the Au-Sn plating 132c is greater than the Sn content (by weight), the mounting stability is not significantly reduced.

[0041] In this embodiment, the Au content (wt%) in the Au-Sn plating 132c relative to the total Au and Sn content can be greater than or equal to 62.4 wt% and less than 100 wt%. When this range is met, the first external electrode 131 and the second external electrode 132 can be more clearly distinguished. Referring to Table 1 below, when the Au content (wt%) relative to the total Au and Sn content is 62.4 wt% or greater, AuSn and / or Au5Sn with a high proportion of Au in the intermetallic compound of Au and Sn can be formed, thereby making the color difference between the Sn plating 131c and the Au-Sn plating 132c clearly observable.

[0042] [Table 1]

[0043] For example, when the b* value of the CIE L*a*b* color system measured on the Sn coating 131c is b1* and the b* value of the CIE L*a*b* color system measured on the Au-Sn coating 132c is b2*, the condition b2*-b1*≥50 can be satisfied.

[0044] Therefore, when performing a tape packaging process on the multilayer electronic component 100, multiple multilayer electronic components 100 can be arranged in the same direction. In this case, when the multilayer electronic component 100 is mounted on a printed circuit board, the polarity of the terminals on the printed circuit board and the polarity of the external electrodes 131 and 132 of the multilayer electronic component 100 can be unified, thereby improving the expected lifespan of the multilayer electronic component 100.

[0045] For example, the Au content (wt%) in the Au-Sn coating 132c relative to the total Au and Sn content can be measured by analyzing a first and second direction cross-section of the multilayer electronic assembly 100 polished to its center in a third direction using scanning electron microscopy (SEM-energy dispersive X-ray spectroscopy (EDS). However, this disclosure is not limited thereto, and other known measurement methods can be used.

[0046] The Au-Sn plating 132c may include at least one of Au5Sn, AuSn, AuSn2, and AuSn4. More specifically, the Au-Sn plating 132c may include at least one of Au5Sn and AuSn, wherein Au5Sn and AuSn have high Au content in the intermetallic compounds of Au and Sn. This results in a significant color difference between the Sn plating 131c and the Au-Sn plating 132c.

[0047] As long as the Sn plating layer 131c is located at the outermost part of the first external electrode 131 and the Au-Sn plating layer 132c is located at the outermost part of the second external electrode 132, there are no particular restrictions on the specific form of the first external electrode 131 and the second external electrode 132.

[0048] The first external electrode 131 may include, for example, a first base electrode layer 131a in contact with the first internal electrode 121 and a first nickel (Ni) plating layer 131b disposed on the first base electrode layer 131a. The second external electrode 132 may include, for example, a second base electrode layer 132a in contact with the second internal electrode 122 and a second nickel (Ni) plating layer 132b disposed on the second base electrode layer 132a.

[0049] The first base electrode layer 131a and the second base electrode layer 132a may both be sintered electrode layers comprising metal and glass. The first base electrode layer 131a and the second base electrode layer 132a may comprise at least one selected from the group consisting of Cu, Ni, Pd, Pt, Au, Ag, Pb and alloys thereof. For example, the first base electrode layer 131a and the second base electrode layer 132a may both comprise Cu. The glass included in the base electrode layers 131a and 132a may comprise at least one oxide selected from, for example, the group consisting of Ba, Ca, Zn, Al, B, and Si.

[0050] The Sn plating layer 131c may be configured to contact the first Ni plating layer 131b, and the Au-Sn plating layer 132c may be configured to contact the second Ni plating layer 132b. In an embodiment, the Sn plating layer 131c may be configured to completely cover the first Ni plating layer 131b, and the Au-Sn plating layer 132c may be configured to completely cover the second Ni plating layer 132b.

[0051] Sn plating 131c may be disposed on the third surface 3 and may extend to a portion of the first surface 1, a portion of the second surface 2, a portion of the fifth surface 5 and a portion of the sixth surface 6, and Au-Sn plating 132c may be disposed on the fourth surface 4 and may extend to a portion of the first surface 1, a portion of the second surface 2, a portion of the fifth surface 5 and a portion of the sixth surface 6.

[0052] Figure 5 This is a schematic cross-sectional view of a multilayer electronic assembly 200 according to another embodiment, and is related to... Figure 2 The corresponding diagram. Refer to it in the following text. Figure 5 A multilayer electronic assembly 200 according to another embodiment is described. For use with... Figures 1 to 4 The multilayer electronic assembly 100 described herein has the same or similar construction, uses the same or similar reference numerals, and repeated descriptions will be omitted.

[0053] The multilayer electronic assembly 200 may include a main body 110 and external electrodes 231 and 232 disposed on the main body 110.

[0054] The first external electrode 231 may include a first base electrode layer 231a in contact with the first internal electrode 121, a first conductive resin layer 231d disposed on the first base electrode layer 231a, and a first nickel (Ni) plating layer 231b disposed on the first conductive resin layer 231d.

[0055] The second external electrode 232 may include a second base electrode layer 232a in contact with the second internal electrode 122, a second conductive resin layer 232d disposed on the second base electrode layer 232a, and a second nickel (Ni) plating layer 232b disposed on the second conductive resin layer 232d. The Sn plating layer 231c may be configured to contact the first Ni plating layer 231b, and the Au-Sn plating layer 232c may be configured to contact the second Ni plating layer 232b.

[0056] The first base electrode layer 231a and the second base electrode layer 232a may both be sintered electrode layers comprising metal and glass. The first base electrode layer 231a and the second base electrode layer 232a may comprise at least one material selected from the group consisting of Cu, Ni, Pd, Pt, Au, Ag, Pb and alloys thereof. For example, the first base electrode layer 131a and the second base electrode layer 132a may both comprise Cu.

[0057] Both the first conductive resin layer 231d and the second conductive resin layer 232d may comprise metal particles and resin. The metal particles included in the conductive resin layers 231d and 232d may include at least one of spherical particles and plate-like particles. In this case, spherical particles may also include imperfect spheres, for example, imperfect spheres with a length ratio (major axis / minor axis) of 1.45 or less. Plate-like particles refer to particles having a flat and elongated shape, and are not particularly limited, but may have a length ratio (major axis / minor axis) of 1.95 or greater. The metal particles included in the conductive resin layers 231d and 232d may include, for example, at least one selected from the group consisting of Cu, Ni, Pd, Pt, Au, Ag, Pb, Sn and alloys thereof. The resin included in the conductive resin layers 231d and 232d may include, for example, at least one of epoxy resin, acrylic resin, and ethyl cellulose resin.

[0058] Methods for manufacturing multilayer electronic components The following describes an example of a method for forming a multilayer electronic component 100. However, the method for manufacturing the multilayer electronic component 100 is not limited to this example.

[0059] First, ceramic powder for forming dielectric layer 111 is prepared. The ceramic powder may include, for example, powders derived from BaTiO3, (Ba... 1-x Ca x TiO3 (0) <x<1)、Ba(Ti 1-y Cay )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1), Ba(Ti 1-y Zr y )O3 (0 < y < 1), CaZrO3, and (Ca 1-x Sr x )(Zr 1-y Ti y )O3 (0 < x ≤ 0.5, 0 < y ≤ 0.5), selected from the group consisting of at least one. BaTiO3 powder can be synthesized, for example, by reacting a titanium raw material (such as titanium dioxide) with a barium raw material (such as barium carbonate). Methods for synthesizing ceramic powders include, for example, solid-state methods, sol-gel methods, hydrothermal synthesis methods, etc., but the present disclosure is not limited thereto. Next, the prepared ceramic powder is dried and ground, and then mixed with an organic solvent (such as ethanol) and a binder (such as polyvinyl butyral) to prepare a ceramic slurry. The ceramic slurry is coated on a carrier film and dried to prepare a green ceramic sheet. <�

[0060] Next, a conductive paste for an internal electrode, including metal powder, binder, organic solvent, etc., is printed on the green ceramic sheet to a predetermined thickness using a screen printing method, intaglio printing method, etc., thereby forming an internal electrode pattern.

[0061] Thereafter, the green ceramic sheet on which the internal electrode pattern is printed is peeled off from the carrier film, and then, the green ceramic sheets on which the internal electrode pattern is printed are stacked in a predetermined number and pressed together to form a ceramic laminate. A predetermined number of green ceramic sheets without an internal electrode pattern can be stacked on the upper and lower portions of the ceramic laminate to form covering portions 112 and 113 after firing. Then, the ceramic laminate is cut into a predetermined blank size, and the cut blank is sintered to form the main body 110. Firing can be performed, for example, in 1.0% H2 / 99.0% N2 to 3.5% H2 / 96.5% N2 (H2O / H2 / N2 atmosphere) at a temperature of 1000 °C to 1400 °C for 1 to 3 hours.

[0062] In addition, edge portions 114 and 115 can be formed by coating a conductive paste for an internal electrode on the regions of the green ceramic sheet except for the regions where the edge portions are to be formed and firing. Alternatively, in order to suppress the step difference caused by the internal electrodes 121 and 122, the ceramic laminate can be cut such that the internal electrode pattern is exposed on both sides of the cut blank in the third direction. Then, sheets for forming the edge portions can be attached to both sides of the cut blank in the third direction, and then fired to form the edge portions 114 and 115.

[0063] Next, external electrodes 131 and 132 are formed. For example, the base electrode layers 131a and 132a can be formed by immersing the body 110 in a conductive paste containing metal powder, glass frit, binder, and organic solvent, and then firing the conductive paste at a temperature of 500°C to 900°C. The metal powder may include, for example, Cu powder.

[0064] Alternatively, nickel plating layers 131b and 132b can be formed on the substrate electrode layers 131a and 132a using electrolytic plating and / or electroless plating.

[0065] Next, an electrolytic plating and / or electroless plating can be used to form a tin (Sn) plating 131c on the first nickel plating 131b.

[0066] An Au-Sn plating layer 132c can be formed on the second nickel plating layer 132b. The Au-Sn plating layer 132c can be formed by electrolytic plating using an Au-Sn alloy plating bath containing, for example, at least one selected from the group consisting of Na3Au(SO3)2, Sn[K2(OH)6], Na2SnO3, NaOH, etc. For example, increasing the weight ratio of Na3Au(SO3)2 in the Au-Sn alloy plating bath can increase the Au content (weight %) in the Au-Sn plating layer 132c relative to the total Au and Sn content.

[0067] On the other hand, there are no particular limitations on the method used to manufacture the multilayer electronic component 200. For example, base electrode layers 231a and 232a can be formed on the body 110, and then the body 110 can be immersed in a conductive resin composition comprising metal powder, resin, binder and organic solvent, followed by a curing heat treatment at a temperature of 250°C to 550°C to form conductive resin layers 231d and 232d.

[0068] Next, using the aforementioned method, Ni coatings 231b and 232b, Sn coating 231c, and Au-Sn coating 232c can be formed sequentially.

[0069] Multilayer electronic component packaging unit Figure 6 This is a schematic plan view of a multilayer electronic component packaging unit according to an embodiment. In the following text, reference will be made to... Figure 6 A multilayer electronic component packaging unit 300 according to an embodiment is described.

[0070] According to an embodiment, the multilayer electronic component packaging unit 300 may include a carrier tape 310 and a cover tape 320 attached to the carrier tape 310.

[0071] The carrier tape 310 may have, for example, a plurality of receiving slots 311. The plurality of receiving slots 311 may accommodate multilayer electronic components 100 (or 200). The plurality of receiving slots 311 may be arranged along the length of the carrier tape 310.

[0072] Multiple chain grooves 312 can be provided on one side of the carrier belt 310. Multiple chain grooves 312 can be arranged along the length of the carrier belt 310. The chain grooves 312 can be used to move the carrier belt 310 using a gear-like device.

[0073] like Figure 6 As shown, the two external electrodes of the multilayer electronic component 100 (or 200) can be distinguished from each other by camera identification during the packaging process. Therefore, multiple multilayer electronic components 100 (or 200) can be arranged in the same orientation within the package body 300. In this case, when the multilayer electronic component 100 (or 200) is mounted on a printed circuit board, the polarity of the terminals on the printed circuit board can be easily aligned with the polarity of the external electrodes 131 and 132 of the multilayer electronic component 100, thereby improving the expected lifespan of the multilayer electronic components 100 and 200.

[0074] (Experimental Example 1) The expected lifetime was evaluated by comparing screening tests and changes in the direction of voltage application during final use. First, a sample sheet with dimensions of 3216 (length: approximately 3.2 mm, width: approximately 1.6 mm, thickness: approximately 1.6 mm) was prepared. The first external electrode of the sample sheet comprised a first base electrode layer (containing Cu), a first Ni plating layer, and a Sn plating layer formed sequentially. The second external electrode of the sample sheet comprised a second base electrode layer (containing Cu), a second Ni plating layer, and an Au-Sn plating layer formed sequentially. Furthermore, the Au content in each example could be substantially the same.

[0075] Next, the sample wafers underwent aging tests. Four aging tests were performed at 160°C, 75V, and a holding time of 30 minutes. The voltage application direction for each aging test is listed in Table 2 below. After the aging tests, each sample wafer was heat-treated at 160°C for 1 hour.

[0076] Finally, each sample was mounted on a printed circuit board and subjected to high-temperature accelerated life testing (HALT) at 160°C and 125V. Table 2 lists the voltage application direction for the HALT test and the number of final voltage application direction changes for the samples that underwent aging and HALT tests.

[0077] Specifically, Examples 1 and 2 unify the voltage application direction of the aging test to positive (+). In Example 1, the voltage application direction of the high-temperature accelerated life test is uniformly positive, while in Example 2, the voltage application direction of the high-temperature accelerated life test becomes negative (-).

[0078] Examples 3 and 4 change the voltage application direction of the aging test three times. In Example 3, the voltage application direction of the high-temperature accelerated life test is positive (the initial voltage application direction). In Example 4, the voltage application direction of the high-temperature accelerated life test is negative (opposite to the initial voltage application direction).

[0079] Examples 5 and 6 change the voltage application direction of the aging test once. In Example 5, the voltage application direction in the high-temperature accelerated life test is set to positive (+) (the initial voltage application direction), and in Example 6, the voltage application direction in the high-temperature accelerated life test is set to negative (-) (the opposite direction to the initial voltage application direction).

[0080] [Table 2]

[0081] Figure 7A This is a plot showing the lifetime Weibull distributions for Examples 1 and 2. Figure 7B This is a graph showing the lifetime Weibull distributions for Examples 3 and 4. Figure 7C This is a plot showing the lifetime Weibull distributions for Examples 5 and 6. (Refer to...) Figure 7A , Figure 7B and Figure 7C As can be seen, compared with Examples 2 to 6, Example 1, which underwent aging tests and high-temperature accelerated life tests without any change in the direction of voltage application, exhibits superior life characteristics.

[0082] This may be because some of the domains constituting the dielectric are damaged by voltage applied in the direction opposite to the domain alignment, leading to a deterioration in the dielectric's insulation resistance.

[0083] Furthermore, Example 3 exhibits superior lifetime characteristics compared to Example 4, and Example 5 exhibits superior lifetime characteristics compared to Example 6. This is likely because in Examples 3 and 5, the initial voltage application direction is the same as the voltage application direction during the high-temperature accelerated lifetime test, while in Examples 4 and 6, the initial voltage application direction is opposite to the voltage application direction during the high-temperature accelerated lifetime test. Specifically, while the number of times the voltage application direction is changed is important for maintaining the reliability of multilayer electronic components, it is confirmed that unifying the application direction of the initial voltage applied during process selection and the final voltage applied during use is even more important.

[0084] (Experimental Example 2) Prepare a sample sheet with dimensions of 3216 (length: approximately 3.2 mm, width: approximately 1.6 mm, thickness: approximately 1.6 mm). The first external electrode of the sample sheet includes a first base electrode layer (containing Cu), a first Ni plating layer, and a Sn plating layer formed sequentially. The second external electrode of the sample sheet includes a second base electrode layer (containing Cu), a second Ni plating layer, and an Au-Sn plating layer formed sequentially.

[0085] Subsequently, a packaging process was performed on examples with different Au content (wt%) relative to the total Au and Sn content in the Au-Sn plating. In Example 7, the Au content (wt%) relative to the total Au and Sn content in the Au-Sn plating was 14.65 wt%. In Example 8, the Au content (wt%) relative to the total Au and Sn content in the Au-Sn plating was 37.3 wt%. In Example 9, the Au content (wt%) relative to the total Au and Sn content in the Au-Sn plating was 55.35 wt%. In Example 10, the Au content (wt%) relative to the total Au and Sn content in the Au-Sn plating was 62.4 wt%. In the comparative example, a Sn plating was formed on the outermost portion of the second external electrode instead of an Au-Sn plating.

[0086] Next, the RGB values ​​of the second external electrode were measured and recorded in Table 3 below. The b* values ​​(i.e., b1* values) of the CIE L*a*b* color system measured on the Sn plating layer of the first external electrode and the b* values ​​(i.e., b2* values) of the CIEL*a*b* color system measured on the Au-Sn plating layer of the second external electrode were measured and the difference between them (b2*-b1*) was calculated and recorded in Table 3 below.

[0087] Subsequently, the sample sheets of Comparative Examples and Examples 7 to 10 were subjected to a tape packaging process. 300 sample sheets were packaged for each example, and a camera mounted in the packaging apparatus was used to determine the colors of the first and second external electrodes, thereby ensuring that the sample sheets were arranged in the same orientation on the tape. The ratio of the number of sample sheets arranged in the same orientation on the tape was defined as the "load rate" and recorded in Table 3 below.

[0088] [Table 3]

[0089] In the comparative example, the loading rate was approximately 50%, indicating that the sample sheets were arranged in a random orientation, making it difficult to distinguish between the first and second external electrodes.

[0090] In Examples 7 and 8, the load rate is higher than in the comparative examples, but lower than in Examples 9 and 10.

[0091] In Example 9, the loading rate increases to 85.7% as the distinction between the first and second external electrodes becomes easier. Specifically, Example 10 satisfies that the Au content (wt%) in the Au-Sn coating relative to the total Au and Sn content is 62.4 wt% or greater, thereby clearly distinguishing the first and second external electrodes, and thus achieving a loading rate of 100%.

[0092] As described above, according to the embodiments, a multilayer electronic component with excellent reliability can be provided.

[0093] This disclosure is not limited to the above embodiments and drawings, but is intended to be limited by the appended claims. Therefore, within the scope of the technical spirit of this disclosure as described in the claims, those skilled in the art will be able to make various substitutions, modifications and alterations, and these will also be considered to fall within the scope of this disclosure.

[0094] Furthermore, the term "embodiment" does not refer to the same embodiment and is provided to emphasize and describe different unique features. However, the embodiments presented above do not preclude implementation in combination with features of another embodiment. For example, even if something described in a particular embodiment is not described in another embodiment, it may be understood as a description relating to the other embodiment, unless there is a description that contradicts or contradicts the content in the other embodiment.

[0095] In this disclosure, the term "connection" includes not only direct connections but also indirect connections via adhesive layers, etc. Furthermore, the term "electrical connection" includes both cases of physical connections and cases without physical connections. Additionally, expressions such as "first" and "second" are used to distinguish one component from another and do not limit the order and / or importance of the components. In some cases, without departing from the scope of the claims, a first element may be named a second element, and similarly, a second element may be named a first element.

[0096] While exemplary embodiments have been shown and described above, it will be readily understood by those skilled in the art that modifications and variations may be made without departing from the scope of this disclosure as defined by the appended claims.

Claims

1. A multilayer electronic component, comprising: The main body includes a dielectric layer and a first inner electrode and a second inner electrode, wherein the first inner electrode and the second inner electrode are alternately disposed and the dielectric layer is located between the first inner electrode and the second inner electrode; and A first external electrode and a second external electrode are disposed on the main body and respectively connected to the first internal electrode and the second internal electrode. The first external electrode includes a Sn plating layer disposed on the outermost portion of the first external electrode, and The second external electrode includes an Au-Sn plating layer disposed on the outermost part of the second external electrode, the Au-Sn plating layer having a color different from that of the Sn plating layer.

2. The multilayer electronic component according to claim 1, wherein, The Au element content (by weight) in the Au-Sn coating relative to the total element content is greater than the Sn element content (by weight) in the Au-Sn coating relative to the total element content.

3. The multilayer electronic component according to claim 1, wherein, The Au content (wt%) in the Au-Sn coating relative to the total content of Au and Sn elements is greater than or equal to 62.4 wt% and less than 100 wt%.

4. The multilayer electronic component according to claim 1, wherein, When the b* value of the CIE L*a*b* color system measured from the Sn coating is b1*, and the b* value of the CIE L*a*b* color system measured from the Au-Sn coating is b2*, b2*-b1*≥50 is satisfied.

5. The multilayer electronic component according to claim 1, wherein, The Au-Sn coating includes at least one of Au5Sn, AuSn, AuSn2, and AuSn4.

6. The multilayer electronic assembly according to claim 1, wherein, The Au-Sn coating includes at least one of Au5Sn and AuSn.

7. The multilayer electronic assembly according to claim 1, wherein, The first external electrode includes a first base electrode layer in contact with the first internal electrode and a first Ni plating layer disposed on the first base electrode layer. The second external electrode includes a second base electrode layer in contact with the second internal electrode and a second Ni plating layer disposed on the second base electrode layer.

8. The multilayer electronic component according to claim 7, wherein, The Sn coating is configured to completely cover the first Ni coating, and The Au-Sn coating is configured to completely cover the second Ni coating.

9. The multilayer electronic component according to claim 1, wherein, The body has a first surface and a second surface opposite to each other in a first direction, a third surface and a fourth surface connected to the first surface and the second surface and opposite to each other in a second direction, and a fifth surface and a sixth surface connected to the first surface and the fourth surface and opposite to each other in a third direction. The Sn plating layer is disposed on the third surface and extends onto a portion of the first surface, a portion of the second surface, a portion of the fifth surface, and a portion of the sixth surface. The Au-Sn coating is disposed on the fourth surface and extends to a portion of the first surface, a portion of the second surface, a portion of the fifth surface, and a portion of the sixth surface.

10. The multilayer electronic assembly according to claim 7, wherein, Both the first and second base electrode layers comprise Cu and glass.

11. The multilayer electronic assembly according to claim 1, wherein, The first external electrode includes: a first base electrode layer in contact with the first internal electrode; a first conductive resin layer disposed on the first base electrode layer; and a first nickel plating layer disposed on the first conductive resin layer. The second external electrode includes: a second base electrode layer in contact with the second internal electrode; a second conductive resin layer disposed on the second base electrode layer; and a second nickel plating layer disposed on the second conductive resin layer.

12. The multilayer electronic assembly according to claim 11, wherein, Both the first and second base electrode layers comprise Cu and glass, and Both the first conductive resin layer and the second conductive resin layer comprise metal particles and resin.

13. The multilayer electronic assembly according to claim 1, wherein, The color difference ΔE between the Sn coating and the Au-Sn coating, as defined by mathematical formula 1, is 50 or greater, whereby mathematical formula 1 is: ΔE =[(ΔL * ) 2 +(Δa * ) 2 +(Δb * ) 2 ] 1 / 2 , Wherein, ΔL* is the difference between the L* values ​​of the CIE L*a*b* color system measured in the Sn coating and the Au-Sn coating respectively, Δa* is the difference between the a* values ​​of the CIE L*a*b* color system measured in the Sn coating and the Au-Sn coating respectively, and Δb* is the difference between the b* values ​​of the CIE L*a*b* color system measured in the Sn coating and the Au-Sn coating respectively.

14. The multilayer electronic assembly according to claim 7, wherein, The first and second base electrode layers comprise at least one selected from the group consisting of Cu, Ni, Pd, Pt, Au, Ag, Pb and alloys thereof.

Images