Solar cell and method of manufacturing the same

Abstract

This invention provides a solar cell and its fabrication method. The solar cell includes a silicon substrate, a plurality of first metal electrodes, and a plurality of second metal electrodes. First doped regions and second doped regions are alternately arranged on a first surface of the silicon substrate, with opposite doping polarities. Each of the plurality of first metal electrodes corresponds one-to-one with a first doped region, and each first metal electrode covers its corresponding first doped region. Similarly, each of the plurality of second metal electrodes corresponds one-to-one with a second doped region, and each second metal electrode partially covers its corresponding second doped region. The width of each first metal electrode is greater than the width of a first doped region. This greater width increases the contact area between the first metal electrode and the first doped region, effectively reducing the contact resistance between them and the series resistance of the cell, thus contributing to improved fill factor and open-circuit voltage.

Description

Technical Field

[0001] This invention relates to the field of battery technology, and more specifically, to a solar cell and its fabrication method. Background Technology

[0002] In related technologies, to achieve the alternating arrangement of P-type and N-type doped regions on the back side of the battery and to ensure precise alignment between the metal electrode and the corresponding doped region, multiple patterning processes such as photolithography or laser are typically used to define the doped region and the electrode region separately. However, this process requires the introduction of multiple masks, resulting in a complex and lengthy fabrication process and high manufacturing costs. Summary of the Invention

[0003] The present invention aims to at least solve one of the technical problems existing in the prior art, and to provide a solar cell and its preparation method, so as to solve the problems of complex and lengthy preparation process and high manufacturing cost of back contact cells in related technologies.

[0004] In a first aspect, the present invention provides a solar cell, comprising:

[0005] A silicon substrate, wherein a first doped region and a second doped region are disposed on a first surface of the silicon substrate in a sequentially alternating manner, the doping polarities of the first doped region and the second doped region being opposite;

[0006] Multiple first metal electrodes, each of which corresponds to a multiple first doped region, and each first metal electrode covers its corresponding first doped region;

[0007] Multiple second metal electrodes, each of the multiple second metal electrodes corresponding one-to-one with multiple second doped regions, and each second metal electrode covers a portion of the corresponding second doped region;

[0008] The width of the first metal electrode is greater than the width of the first doped region.

[0009] In some embodiments, the ratio of the width of the first metal electrode in the first direction to the width of the corresponding first doped region is in the range of 1.01 to 1.2, and the first direction is the direction in which the first doped region and the second doped region are arranged alternately.

[0010] In some embodiments, the width ratio of the second doped region to the first doped region in the first direction is in the range of 10 to 50.

[0011] In some embodiments, the width of the first doped region in the first direction ranges from 20 μm to 100 μm, and the width of the second doped region in the first direction ranges from 200 μm to 1000 μm.

[0012] In some embodiments, the first doped region is provided with a first dielectric layer and a first doped layer stacked sequentially in the direction away from the silicon substrate; the second doped region is provided with a second dielectric layer and a second doped layer stacked sequentially in the direction away from the silicon substrate; the total thickness of the first doped layer and the first dielectric layer is less than the total thickness of the second doped layer and the second dielectric layer.

[0013] In some embodiments, the thickness of the first doped layer is 20 nm to 200 nm; the thickness of the second doped layer is 50 nm to 300 nm.

[0014] In some embodiments, an isolation portion is provided between the first doped region and the second doped region, the isolation portion being a silicon material layer, and the doping element of the isolation portion including one or more of boron, phosphorus, oxygen and nitrogen.

[0015] In some embodiments, the thickness of the first metal electrode ranges from 10 μm to 30 μm, and the width of the first metal electrode ranges from 25 μm to 100 μm.

[0016] In some embodiments, the thickness of the second metal electrode ranges from 15 μm to 35 μm, and the width of the second metal electrode ranges from 20 μm to 80 μm.

[0017] Secondly, the present invention provides a method for preparing a solar cell, the method comprising the following steps:

[0018] S1. A P-type polycrystalline silicon region is deposited on the first surface of a silicon substrate, and a P-type metal electrode is formed on the P-type polycrystalline silicon region by screen printing.

[0019] S2. Using the P-region metal electrode as a mask, phosphorus doping is performed on the first surface in the area not covered by the P-region metal electrode to form a phosphorus silicon glass layer.

[0020] S3. Deposit an N-type polycrystalline silicon region on the phosphorosilicate glass layer, and form an N-type metal electrode on the N-type polycrystalline silicon region by screen printing;

[0021] S4. A textured surface is formed on the second surface opposite to the first surface by wet etching;

[0022] S5. The isolation portion between the P-region metal electrode and the N-region metal electrode is reduced by ion implantation of doping elements.

[0023] S6. Deposit a film on the silicon substrate to form a battery cell.

[0024] In some embodiments, in step S1, the thickness of the P-region metal electrode is configured to prevent phosphorus dopant from penetrating the P-type polycrystalline silicon region below the P-region metal electrode.

[0025] In some embodiments, in step S2, the phosphorus doping method is phosphorus diffusion or ion implantation.

[0026] In some embodiments, in step S2, if the phosphorus diffusion method is used, the phosphorus-silicon glass layer is formed during the phosphorus diffusion process; if the ion implantation method is used, the phosphorus-silicon glass layer is formed after sintering; the thickness of the phosphorus-silicon glass layer is in the range of 30 nm to 70 nm.

[0027] In some embodiments, in step S2, the phosphorus doping concentration ranges from 10E to 20cm⁻¹. -3 ~10E21cm -3 The depth of the lateral expansion is 20nm to 100nm.

[0028] In some embodiments, the boron doping concentration in the P-type and N-type polysilicon regions ranges from 10E19cm⁻¹. -3 ~10E20cm -3 .

[0029] In some embodiments, in step S3, the N-region metal electrode is formed by screen printing and penetrating the phosphosilicate glass layer.

[0030] In some embodiments, in step S5, the dopant element implanted in the isolation section includes one or more of boron, phosphorus, nitrogen, and oxygen.

[0031] The present invention has the following beneficial effects:

[0032] This invention provides a solar cell in which a second metal electrode covers a portion of a second doped region, effectively reducing the metal shading area on the light-receiving surface of the cell and allowing more sunlight to directly irradiate the silicon substrate, thereby generating more photocurrent. Simultaneously, a first metal electrode covers its corresponding first doped region, and the width of the first metal electrode is greater than the width of the first doped region. This increases the contact area between the first metal electrode and the first doped region while effectively reducing the contact resistance between them and the series resistance of the entire cell, contributing to improved fill factor and open-circuit voltage.

[0033] This invention provides a method for fabricating a solar cell. It directly uses a printed P-region metal electrode as a mask, and performs phosphorus doping on the area not covered by the P-region metal electrode to form a phosphosilicate glass layer. Then, an N-type polycrystalline silicon region is deposited on the phosphosilicate glass layer, and an N-region metal electrode is formed on the N-type polycrystalline silicon region by screen printing. This process eliminates the multiple masking and photolithography steps required for doping and electrode patterning in related technologies, significantly simplifying the fabrication process and reducing manufacturing costs. Ion implantation of dopant elements into the isolation region between the P-region and N-region metal electrodes effectively reduces the conductivity of the isolation region, which significantly suppresses the risk of leakage or short circuit between the P-region and N-region metal electrodes, thereby improving the electrical isolation and long-term reliability of the cell. Attached Figure Description

[0034] Figure 1 This is a schematic diagram of the structure of a solar cell provided in an embodiment of the present invention;

[0035] Figure 2 for Figure 1 A cross-sectional view along the AA direction;

[0036] Figure 3 A flowchart illustrating a method for fabricating a solar cell according to an embodiment of the present invention;

[0037] Figure 4A For the corresponding Figure 3 A schematic diagram of the battery structure in step S1;

[0038] Figure 4B For the corresponding Figure 3 A schematic diagram of the battery structure in step S2;

[0039] Figure 4C For the corresponding Figure 3 A schematic diagram of the battery structure in step S3;

[0040] Figure 4D For the corresponding Figure 3 A schematic diagram of the battery structure in step S4;

[0041] Figure 4E For the corresponding Figure 3 Schematic diagram of the battery structure in steps S5 and S6. Detailed Implementation

[0042] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without inventive effort are within the scope of protection of this invention.

[0043] It should be noted that although functional modules are divided in the device schematic diagram and the logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in a different order than the module division in the device or the order in the flowchart. In the description of this invention, "several" means one or more, "multiple" means two or more, "greater than," "less than," and "exceeding" are understood to exclude the number itself, while "above," "below," and "within" are understood to include the number itself. The use of "first" and "second" is merely for distinguishing technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of indicated technical features, or implicitly indicating the order of the indicated technical features. Unless otherwise expressly specified and limited, the terms "installation," "connection," "linking," "setting," and "arrangement," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; a mechanical connection or an electrical connection; a direct connection or an indirect connection through an intermediate medium; or a connection within two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0044] In view of the problems existing in related technologies, the present invention aims to provide a solar cell and its preparation method, so as to solve the problems of complex and lengthy preparation process and high manufacturing cost of back contact cells in related technologies.

[0045] In the first aspect, such as Figure 1 and Figure 2 As shown, the solar cell provided in this embodiment of the invention includes a silicon substrate 100, a plurality of first metal electrodes 200, and a plurality of second metal electrodes 300. A first doped region 110 and a second doped region 120 are disposed alternately on a first surface of the silicon substrate 100, the doping polarities of the first doped region 110 and the second doped region 120 being opposite. Each of the plurality of first metal electrodes 200 corresponds one-to-one with a plurality of first doped regions 110, and each first metal electrode 200 covers its corresponding first doped region 110. Each of the plurality of second metal electrodes 300 corresponds one-to-one with a plurality of second doped regions 120, and each second metal electrode 300 partially covers its corresponding second doped region 120. The width of each first metal electrode 200 is greater than the width of the first doped region 110.

[0046] With the aforementioned solar cell structure, the second metal electrode 300 covers a portion of the second doped region 120, effectively reducing the metal shading area on the light-receiving surface of the cell, allowing more sunlight to directly irradiate the silicon substrate 100, thereby generating more photocurrent. Simultaneously, the first metal electrode 200 covers its corresponding first doped region 110, and the width of the first metal electrode 200 is greater than the width of the first doped region 110. This increases the contact area between the first metal electrode 200 and the first doped region 110, while also effectively reducing the contact resistance between them and the series resistance of the entire cell, contributing to improved fill factor and open-circuit voltage.

[0047] In some specific embodiments of the present invention, one of the first doped region 110 and the second doped region 120 is a P-doped region and the other is an N-doped region. For example, the first doped region 110 is a P-doped region, and the first metal electrode 200 is disposed in the P-doped region; the second doped region 120 is an N-doped region, and the second metal electrode 300 is disposed in the N-doped region.

[0048] In some specific embodiments of the present invention, the ratio of the width of the first metal electrode 200 in the first direction to the width of the corresponding first doped region 110 ranges from 1.01 to 1.2. Exemplarily, the ratio of the width of the first metal electrode 200 in the first direction to the width of the corresponding first doped region 110 can be 1.01, 1.02, 1.03, 1.04, 1.05, 1.06, 1.07, 1.08, 1.09, 1.1, 1.11, 1.12…1.2. The first direction is the direction in which the first doped region 110 and the second doped region 120 are arranged alternately. This embodiment, by limiting the ratio of the width of the first metal electrode 200 in the first direction to the width of the corresponding first doped region 110, can optimize the balance between the battery's contact resistance and light-shielding area, thereby maximizing the battery's conversion efficiency.

[0049] Specifically, when the width of the first metal electrode 200 is greater than the width of the first doped region 110, the contact area between the first metal electrode 200 and the first doped region 110 increases, which can significantly reduce the contact resistance between them, thereby reducing the overall series resistance of the battery. The reduction in series resistance is beneficial to improving the battery's fill factor. The first metal electrode 200 needs to collect all the photogenerated carriers generated by the first doped region 110. If the width of the first metal electrode 200 is too small, for example, if the ratio of the width of the first metal electrode 200 in the first direction to the width of the corresponding first doped region 110 is less than 1, some carriers may need to travel long distances to be collected by the first metal electrode 200, increasing transmission loss and recombination risk, which may damage the open-circuit voltage and fill factor. Furthermore, by limiting the ratio of the width of the first metal electrode 200 in the first direction to the width of the corresponding first doped region 110 to a reasonable range, it is possible to ensure sufficiently low contact resistance while avoiding material waste and increased process alignment difficulties caused by an excessively wide first metal electrode 200. It may also increase the risk of a short circuit between the first metal electrode 200 and the second metal electrode 300.

[0050] In some specific embodiments of the present invention, the width ratio of the second doped region 120 and the first doped region 110 in the first direction ranges from 10 to 50. For example, the width ratio of the second doped region 120 and the first doped region 110 in the first direction can be 10, 10.05, 10.1, 10.15, 10.2…50. This embodiment, by limiting the width ratio of the second doped region 120 and the first doped region 110 in the first direction, can optimize the area distribution and carrier collection balance of the battery doped regions, thereby maximizing the battery's current output and overall efficiency. Specifically, the first doped region 110 and the second doped region 120 jointly collect carriers. Limiting their width ratio essentially optimizes the area distribution of the first doped region 110 and the second doped region 120, ensuring that electrons and holes generated by sunlight can be efficiently collected by their respective doped regions, thereby improving the short-circuit current. Furthermore, by limiting the width ratio of the second doped region 120 to the first doped region 110, an optimal balance can be achieved between reducing series resistance and suppressing carrier recombination, which is beneficial for improving the fill factor and open-circuit voltage.

[0051] In some embodiments, the width of the first doped region 110 in the first direction ranges from 20 μm to 100 μm, and the width of the second doped region 120 in the first direction ranges from 200 μm to 1000 μm. Exemplarily, the width of the first doped region 110 in the first direction can be 20 μm, 20.5 μm, 21 μm, 21.5 μm, 22 μm, 22.5 μm…100 μm. The width of the second doped region 120 in the first direction can be 200 μm, 200.5 μm, 201 μm, 201.5 μm, 202 μm…1000 μm.

[0052] In some specific embodiments of the present invention, the thickness of the first metal electrode 200 ranges from 10 μm to 30 μm, and the width of the first metal electrode 200 ranges from 25 μm to 100 μm. Exemplarily, the thickness of the first metal electrode 200 can be 10 μm, 10.5 μm, 11 μm, 11.5 μm…30 μm. The width of the first metal electrode 200 can be 25 μm, 25.5 μm, 26 μm, 26.5 μm…100 μm. The thickness of the second metal electrode 300 ranges from 15 μm to 35 μm, and the width of the second metal electrode 300 ranges from 20 μm to 80 μm. Exemplarily, the thickness of the second metal electrode 300 can be 15 μm, 15.5 μm, 16 μm, 16.5 μm…35 μm. The width of the second metal electrode 300 can be 20μm, 20.5μm, 21μm, 21.5μm...80μm. This embodiment limits the thickness of the first metal electrode 200 and the second metal electrode 300 to provide lower resistance. In processes such as screen printing, if the first metal electrode 200 and the second metal electrode 300 are too thin, it may lead to high resistance and easy breakage; if they are too thick, it may increase cost and generate stress. Appropriate thickness is beneficial to improving the stability of the first metal electrode 200 and the second metal electrode 300 in subsequent processing or use. This embodiment limits the width of the first metal electrode 200 to ensure that the width of the first metal electrode 200 is greater than the width of the first doped region 110, increasing the contact area between the first metal electrode 200 and the first doped region 110, which can significantly reduce contact resistance, thereby effectively reducing the overall series resistance of the battery. Furthermore, the width of the first metal electrode 200 ensures that all charge carriers generated in the first doped region 110 can be efficiently collected. In this embodiment, by limiting the width of the second metal electrode 300, the width of the second metal electrode 300 is controlled to be smaller than the width of the second doped region 120, so that more light can reach the second doped region 120, which helps to generate more charge carriers and thus improves the short-circuit current of the battery.

[0053] In some specific embodiments of the present invention, such as Figure 2As shown, the first doped region 110 has a first dielectric layer 111 and a first doped layer 112 stacked sequentially in the direction away from the silicon substrate 100; the second doped region 120 has a second dielectric layer 121 and a second doped layer 122 stacked sequentially in the direction away from the silicon substrate 100; the total thickness of the first doped layer 112 and the first dielectric layer 111 is less than the total thickness of the second doped layer 122 and the second dielectric layer 121. In this embodiment, by making the total thickness of the first doped layer 112 and the first dielectric layer 111 less than the total thickness of the second doped layer 122 and the second dielectric layer 121, the accumulated stress in the stacked film layers can be adjusted and balanced to a certain extent, reducing the risk of film layer cracking, thereby enhancing the stability and reliability of the battery under harsh environments such as thermal cycling.

[0054] In some embodiments, the thickness of the first doped layer 112 is 20 nm to 200 nm; the thickness of the second doped layer 122 is 50 nm to 300 nm. Exemplarily, the thickness of the first doped layer 112 can be 20 nm, 20.5 nm, 21 nm, 21.5 nm, 22 nm…200 nm. The thickness of the second doped layer 122 can be 50 nm, 50.5 nm, 51 nm, 51.5 nm, 52 nm…300 nm. This embodiment limits the thickness of the first doped layer 112 and the second doped layer 122 to form an effective built-in electric field and field-effect passivation, and to ensure that carriers can be sufficiently collected. If the first doped layer 112 and the second doped layer 122 are too thick, more defects will be introduced, increasing recombination and impairing the open-circuit voltage; if they are too thin, the tunneling probability may decrease, the contact resistance may increase, and the fill factor may be impaired.

[0055] In some specific embodiments of the present invention, such as Figure 1 and Figure 2 As shown, an isolation portion 130 is disposed between the first doped region 110 and the second doped region 120. The isolation portion 130 is a silicon material layer, and the doping element of the isolation portion 130 includes one or more of boron, phosphorus, oxygen, and nitrogen. In this embodiment, by providing the isolation portion 130 between the first doped region 110 and the second doped region 120, the isolation portion 130 forms a high-resistivity region between the first doped region 110 and the second doped region 120, which can effectively prevent leakage or short circuit between the first doped region 110 and the second doped region 120, ensuring that the PN junction can work normally.

[0056] Secondly, such as Figure 3 As shown, the method for preparing a solar cell provided in this embodiment of the invention is used to prepare the solar cell in the first aspect embodiment. The preparation method includes the following steps:

[0057] S1. A P-type polysilicon region (P-poly) is deposited on the first surface of a silicon substrate, and a P-region metal electrode is formed on the P-type polysilicon region by screen printing.

[0058] S2. Using the P-region metal electrode as a mask, phosphorus doping is performed on the area on the first surface that is not covered by the P-region metal electrode to form a phosphorus silicon glass layer.

[0059] S3. Deposit an N-type polycrystalline silicon region (N-poly) on the phosphosilicate glass layer, and form an N-type metal electrode on the N-type polycrystalline silicon region by screen printing;

[0060] S4. A textured surface is formed on the second surface opposite to the first surface by wet etching;

[0061] S5. The isolation section between the P-region metal electrode and the N-region metal electrode is reduced by ion implantation of doping elements.

[0062] S6. Deposit a film onto the silicon substrate to form a solar cell.

[0063] The aforementioned method for fabricating solar cells directly utilizes a pre-printed P-region metal electrode as a mask. Phosphorus doping is performed on the areas not covered by the P-region metal electrode to form a phosphosilicate glass layer. Subsequently, an N-type polycrystalline silicon region is deposited on the phosphosilicate glass layer, and an N-region metal electrode is formed on the N-type polycrystalline silicon region via screen printing. This process eliminates the multiple masking and photolithography steps required for doping and electrode patterning in related technologies, significantly simplifying the fabrication process and reducing manufacturing costs. Ion implantation of dopant elements into the isolation region between the P-region and N-region metal electrodes effectively reduces the conductivity of the isolation region, significantly suppressing the risk of leakage or short circuit between the P-region and N-region metal electrodes, thereby improving the electrical isolation and long-term reliability of the cell.

[0064] In some specific embodiments of the present invention, in step S1, the thickness of the P-region metal electrode is configured to prevent phosphorus dopant from penetrating the P-type polycrystalline silicon region below the P-region metal electrode. This embodiment configures the thickness of the P-region metal electrode to prevent phosphorus dopant from penetrating the P-type polycrystalline silicon region because the P-region metal electrode needs to act as a mask in step S2 to prevent subsequent phosphorus doping processes from contaminating the P-type polycrystalline silicon region. This ensures the concentration and collection efficiency of carriers in the P-region, thereby guaranteeing the electrical integrity of the PN junction, significantly reducing interface recombination, and improving the open-circuit voltage and conversion efficiency of the battery.

[0065] In some specific embodiments of the present invention, in step S2, the phosphorus doping method is either phosphorus diffusion or ion implantation. Phosphorus diffusion, for example, involves thermally diffusing phosphorus atoms into regions not covered by the P-region metal electrode under a phosphorus-containing atmosphere and high temperature conditions to form a phosphosilicate glass layer. Ion implantation, for example, involves accelerating phosphorus ions in an electric field and implanting them into regions not covered by the P-region metal electrode, followed by annealing to activate the implanted phosphorus atoms and repair defects, thus forming a phosphosilicate glass layer.

[0066] In some specific embodiments of the present invention, in step S2, if phosphorus diffusion is used, the phosphosilicate glass layer is formed during the phosphorus diffusion process; if ion implantation is used, the phosphosilicate glass layer is formed after sintering; the thickness of the phosphosilicate glass layer ranges from 30 nm to 70 nm. Exemplarily, the thickness of the phosphosilicate glass layer can be 30 nm, 30.5 nm, 31 nm, 31.5 nm…70 nm. In the phosphorus diffusion method, limiting the thickness of the phosphosilicate glass layer ensures the quality and efficiency of the doping process. If the phosphosilicate glass layer is too thin, it indicates insufficient phosphorus source supply or insufficient diffusion time, resulting in a low surface doping concentration and a shallow junction depth, affecting the ohmic contact and carrier collection efficiency of the cell. If the phosphosilicate glass layer is too thick, it may hinder further diffusion of phosphorus into the silicon substrate, thus affecting doping uniformity and junction depth. In the ion implantation method, limiting the thickness of the phosphosilicate glass layer helps to form excellent ohmic contacts while avoiding an excessively thick phosphosilicate glass layer that hinders carrier transport, thereby improving the conversion efficiency and reliability of the solar cell.

[0067] In some specific embodiments of the present invention, in step S2, the phosphorus doping concentration range is 10E20cm⁻¹. -3 ~10E21cm -3 The lateral expansion depth is 20nm to 100nm. In this embodiment, by limiting the phosphorus doping concentration, a suitable phosphorus doping concentration can form a good ohmic contact, reduce series resistance, and at the same time avoid excessive concentration from introducing too many defects as recombination centers, thereby improving the fill factor and open-circuit voltage. In this embodiment, by limiting the lateral expansion depth of phosphorus doping, it is possible to effectively prevent short circuits from occurring between adjacent P-regions and N-regions due to excessive proximity.

[0068] In some specific embodiments of the present invention, the boron doping concentration range in the P-type polysilicon region and the N-type polysilicon region is 10E19cm⁻¹. -3 ~10E20cm -3In this embodiment, the boron doping concentration in the P-type and N-type polysilicon regions is limited to ensure that the boron doping concentration is within a suitable range. If the boron doping concentration is too low, the field-effect passivation will be weakened and the surface passivation effect will be poor; if the boron doping concentration is too high, too many defects will be introduced, which will become recombination centers for charge carriers, thereby increasing recombination losses and reducing open-circuit voltage.

[0069] In some specific embodiments of the present invention, in step S3, the N-region metal electrode is formed by screen printing and penetrating the phosphosilicate glass layer. This method enables a low-resistance, high-reliability ohmic contact between the N-region metal electrode and the underlying silicon substrate.

[0070] In some specific embodiments of the present invention, in step S4, a textured structure is formed on a second surface opposite to the first surface by wet etching. For example, an anisotropic etching is performed on the second surface using an alkaline solution (such as sodium hydroxide or potassium hydroxide solution), utilizing the difference in etching rate of single-crystal silicon on different crystal planes to form a textured surface on the silicon substrate surface composed of multiple randomly distributed micron-sized pyramidal structures. This structure can effectively reduce the surface reflectivity of sunlight, increase the propagation path of light within the silicon substrate, thereby enhancing light absorption and increasing the short-circuit current of the battery.

[0071] In some specific embodiments of the present invention, in step S5, the doping element implanted into the isolation portion includes one or more of boron, phosphorus, nitrogen, and oxygen. In this embodiment, selectively implanting one or more of these elements into the isolation portion can locally generate an insulating dielectric layer within the silicon substrate, blocking conductive channels and greatly reducing parasitic capacitance and leakage current.

[0072] In some specific embodiments of the present invention, in step S6, a film is deposited on the silicon substrate to form a solar cell. For example, one or more functional thin films are deposited on at least one surface of the silicon substrate (particularly the second surface, which serves as the primary light-receiving surface). The thin film can be an anti-reflection film (such as silicon nitride, aluminum oxide, titanium dioxide, or a combination thereof) to reduce surface reflection of incident light and enhance light absorption; the thin film can also be a passivation film (such as aluminum oxide, silicon oxide, etc.) to reduce the surface recombination rate and improve interface properties. The film deposition can be achieved through processes such as plasma-enhanced chemical vapor deposition (PECVD), atomic layer deposition (ALD), or sputtering. This functional film layer can significantly improve the short-circuit current and open-circuit voltage of the cell, thereby obtaining a high-performance solar cell.

[0073] The battery structures corresponding to each step in the above preparation method are as follows: Figures 4A-4E As shown, Figure 4A To deposit a P-type polycrystalline silicon region (P-poly) on the first surface of a silicon substrate, and to form a P-region metal electrode on the P-type polycrystalline silicon region by screen printing. Figure 4BUsing a P-region metal electrode as a mask, phosphorus doping is performed on the first surface in the region not covered by the P-region metal electrode to form a phosphorosilicate glass layer; an N-type polycrystalline silicon region (N-poly) is deposited on the phosphorosilicate glass layer. Figure 4C To form N-region metal electrodes on N-type polycrystalline silicon regions by screen printing. Figure 4D A textured surface is formed on a second surface opposite to the first surface by wet etching. Figure 4E To form a solar cell, a silicon substrate is coated with a dopant layer by ion implantation of doping elements to create an isolation region (I region) between the P-region metal electrode and the N-region metal electrode.

[0074] It is understood that the above embodiments are merely exemplary implementations used to illustrate the principles of the present invention, and the present invention is not limited thereto. For those skilled in the art, various modifications and improvements can be made without departing from the spirit and essence of the present invention, and these modifications and improvements are also considered to be within the scope of protection of the present invention.

Claims

1. A solar cell, characterized in that, include: A silicon substrate, wherein a first doped region and a second doped region are disposed on a first surface of the silicon substrate in a sequentially alternating manner, the doping polarities of the first doped region and the second doped region being opposite; Multiple first metal electrodes, each of which corresponds to a multiple first doped region, and each first metal electrode covers its corresponding first doped region; Multiple second metal electrodes, each of the multiple second metal electrodes corresponding one-to-one with multiple second doped regions, and each second metal electrode covers a portion of the corresponding second doped region; The width of the first metal electrode is greater than the width of the first doped region.

2. The solar cell according to claim 1, characterized in that, The ratio of the width of the first metal electrode in the first direction to the width of the corresponding first doped region is in the range of 1.01 to 1.2, and the first direction is the direction in which the first doped region and the second doped region are arranged alternately.

3. The solar cell according to claim 2, characterized in that, The width ratio of the second doped region to the first doped region in the first direction is in the range of 10 to 50.

4. The solar cell according to claim 3, characterized in that, The width of the first doped region in the first direction ranges from 20 μm to 100 μm, and the width of the second doped region in the first direction ranges from 200 μm to 1000 μm.

5. The solar cell according to claim 1, characterized in that, The first doped region has a first dielectric layer and a first doped layer stacked sequentially in the direction away from the silicon substrate; the second doped region has a second dielectric layer and a second doped layer stacked sequentially in the direction away from the silicon substrate; the total thickness of the first doped layer and the first dielectric layer is less than the total thickness of the second doped layer and the second dielectric layer.

6. The solar cell according to claim 5, characterized in that, The thickness of the first doped layer is 20 nm to 200 nm; the thickness of the second doped layer is 50 nm to 300 nm.

7. The solar cell according to claim 1, characterized in that, An isolation portion is provided between the first doped region and the second doped region. The isolation portion is a silicon material layer, and the doping element of the isolation portion includes one or more of boron, phosphorus, oxygen and nitrogen.

8. The solar cell according to claim 1, characterized in that, The thickness of the first metal electrode ranges from 10 μm to 30 μm, and the width of the first metal electrode ranges from 25 μm to 100 μm.

9. The solar cell according to claim 1, characterized in that, The thickness of the second metal electrode ranges from 15 μm to 35 μm, and the width of the second metal electrode ranges from 20 μm to 80 μm.

10. A method for preparing a solar cell, used to prepare the solar cell according to any one of claims 1 to 9, characterized in that, The preparation method includes the following steps: S1. A P-type polycrystalline silicon region is deposited on the first surface of a silicon substrate, and a P-type metal electrode is formed on the P-type polycrystalline silicon region by screen printing. S2. Using the P-region metal electrode as a mask, phosphorus doping is performed on the first surface in the area not covered by the P-region metal electrode to form a phosphorus silicon glass layer. S3. Deposit an N-type polycrystalline silicon region on the phosphorosilicate glass layer, and form an N-type metal electrode on the N-type polycrystalline silicon region by screen printing; S4. A textured surface is formed on the second surface opposite to the first surface by wet etching; S5. The isolation portion between the P-region metal electrode and the N-region metal electrode is reduced by ion implantation of doping elements. S6. Deposit a film on the silicon substrate to form a battery cell.

11. The preparation method according to claim 10, characterized in that, In step S1, the thickness of the P-region metal electrode is configured to prevent phosphorus dopant from penetrating the P-type polycrystalline silicon region below the P-region metal electrode.

12. The preparation method according to claim 10, characterized in that, In step S2, the phosphorus doping method is either phosphorus diffusion or ion implantation.

13. The preparation method according to claim 12, characterized in that, In step S2, if the phosphorus diffusion method is used, the phosphorus-silicon glass layer is formed during the phosphorus diffusion process; if the ion implantation method is used, the phosphorus-silicon glass layer is formed after sintering; the thickness of the phosphorus-silicon glass layer is in the range of 30 nm to 70 nm.

14. The preparation method according to claim 10, characterized in that, In step S2, the phosphorus doping concentration range is 10E20cm⁻¹. -3 ~10E21cm -3 The depth of the lateral expansion is 20nm to 100nm.

15. The preparation method according to claim 10, characterized in that, The boron doping concentration range in the P-type and N-type polysilicon regions is 10E19cm⁻¹. -3 ~10E20cm -3 .

16. The preparation method according to claim 10, characterized in that, In step S3, the N-region metal electrode is formed by screen printing and penetrating the phosphosilicate glass layer.

17. The preparation method according to claim 10, characterized in that, In step S5, the doping element implanted in the isolation section includes one or more of boron, phosphorus, nitrogen, and oxygen.

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