Memory management method and apparatus

Abstract

The application discloses a memory management method and device, and belongs to the field of information technology. The method comprises the following steps: in the case that a memory usage request of a first service is received, a buffer mode of a display memory area is controlled according to a UI interface display state of an electronic device and / or a service attribute of the first service, the display memory area comprises at least two buffers, and the buffer mode comprises a first buffer mode and a second buffer mode; in the case that the buffer mode of the display memory area is controlled to be the first buffer mode, only a first part of buffers is allowed to be used by a display controller of the electronic device, and a second part of buffers is allowed to be used by the first service; and in the case that the buffer mode of the display memory area is controlled to be the second buffer mode, the first part of buffers and the second part of buffers are allowed to be used by the display controller, and the display memory area is refused to be used by the first service.

Description

Technical Field

[0001] This application belongs to the field of information technology, specifically relating to a memory management method and apparatus. Background Technology

[0002] In existing technologies, electronic devices commonly employ a dual-buffer mechanism to achieve smooth, tear-free graphics display. The working principle is as follows: the system pre-allocates two equal-sized areas in memory, called the front buffer and the back buffer. The display controller continuously reads data from the front buffer and refreshes it onto the screen. The graphics processing unit (GPU) or central processing unit (CPU) draws the next frame in the back buffer. When the back buffer is finished drawing and the vertical synchronization (V-Sync) signal arrives, the system instantly swaps the data between the two buffers by modifying pointers or registers. These two buffers are statically allocated at compile time. Regardless of whether the screen is in a rapidly changing scrolling state or a static display state, this memory is exclusively occupied by the display controller and cannot be used by other services. This leads to electronic devices being prone to failure when faced with sudden high memory-demand tasks, such as noise reduction during Bluetooth calls, firmware decompression during over-the-air (OTA) upgrades, and large image decoding, due to insufficient remaining heap memory.

[0003] It is evident that existing memory management technologies are insufficient to meet the usage requirements of multiple business scenarios. Summary of the Invention

[0004] The purpose of this application is to provide a memory management method, device, electronic device, and medium that can solve the problem that existing memory management technologies cannot meet the needs of multiple service scenarios because display memory is fixedly occupied.

[0005] In a first aspect, embodiments of this application provide a memory management method, including: Upon receiving a memory usage request from a first service, the buffer mode of the display memory area is controlled according to the UI display status of the electronic device and / or the service attributes of the first service. The display memory area includes at least two buffers, and the buffer mode includes a first buffer mode and a second buffer mode. Wherein, when the buffer mode of the display memory area is controlled to be the first buffer mode, only the display controller of the electronic device is allowed to use the first part of the buffer, and the first service is allowed to use the second part of the buffer, wherein the first part of the buffer and the second part of the buffer are different buffers among the at least two buffers; When the buffer mode of the display memory area is controlled to the second buffer mode, the display controller of the electronic device is allowed to use the first part of the buffer and the second part of the buffer, and the first service is denied access to the display memory area.

[0006] Secondly, embodiments of this application provide a memory management device, including: The control module is used to control the buffer mode of the display memory area according to the UI display status of the electronic device and / or the service attributes of the first service when a memory usage request of the first service is received. The display memory area includes at least two buffers, and the buffer mode includes a first buffer mode and a second buffer mode. Wherein, when the buffer mode of the display memory area is controlled to be the first buffer mode, only the display controller of the electronic device is allowed to use the first part of the buffer, and the first service is allowed to use the second part of the buffer, wherein the first part of the buffer and the second part of the buffer are different buffers among the at least two buffers; When the buffer mode of the display memory area is controlled to the second buffer mode, the display controller of the electronic device is allowed to use the first part of the buffer and the second part of the buffer, and the first service is denied access to the display memory area.

[0007] Thirdly, embodiments of this application provide an electronic device including a processor and a memory, wherein the memory stores programs or instructions executable on the processor, and the programs or instructions, when executed by the processor, implement the steps of the method described in the first aspect.

[0008] Fourthly, embodiments of this application provide a readable storage medium on which a program or instructions are stored, which, when executed by a processor, implement the steps of the method described in the first aspect.

[0009] Fifthly, embodiments of this application provide a chip, the chip including a processor and a communication interface, the communication interface being coupled to the processor, the processor being used to run programs or instructions to implement the method as described in the first aspect.

[0010] In a sixth aspect, embodiments of this application provide a computer program product stored in a storage medium, which is executed by at least one processor to implement the method described in the first aspect.

[0011] In this embodiment, upon receiving a memory usage request from a first service, the buffer mode of the display memory area is controlled based on the UI display status of the electronic device and / or the service attributes of the first service. The display memory area includes at least two buffers, and the buffer modes include a first buffer mode and a second buffer mode. Specifically, when the buffer mode of the display memory area is controlled as the first buffer mode, only the display controller of the electronic device is allowed to use a first portion of the buffer, and the first service is allowed to use a second portion of the buffer. The first and second portions of the buffer are different buffers among the at least two buffers. When the buffer mode of the display memory area is controlled as the second buffer mode, the display controller of the electronic device is allowed to use both the first and second portions of the buffer, and the first service is denied access to the display memory area. Thus, this embodiment divides the display memory area into two different buffer modes and controls the switching of the buffer mode based on the attributes of the requested service and the UI display status when a new service request is received. This allows the portion of display memory that is fixedly occupied by the display controller to be lent to the requested service in some scenarios, ensuring the normal startup and operation of the requested service. Therefore, this embodiment better meets the usage needs of multi-service scenarios compared to existing technologies. Attached Figure Description

[0012] Figure 1 This is a flowchart of the memory management method provided in the embodiments of this application; Figure 2 This is a diagram of the dynamic memory management software architecture provided in the embodiments of this application; Figure 3 This is a schematic diagram of the resource registration module provided in an embodiment of this application; Figure 4 This is a timing flowchart of the memory management method provided in the embodiments of this application; Figure 5 This is a structural diagram of the memory management device provided in the embodiments of this application; Figure 6 This is a structural diagram of the electronic device provided in the embodiments of this application; Figure 7 This is a hardware structure diagram of the electronic device provided in the embodiments of this application. Detailed Implementation

[0013] The technical solutions of the embodiments of this application will be clearly described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application are within the scope of protection of this application.

[0014] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such terms can be used interchangeably where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class and the number of objects is not limited; for example, a first object can be one or more. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.

[0015] To make the embodiments of this application clearer, the relevant technical knowledge involved in this application is described below: In embedded devices such as the Internet of Things (IoT) and smart wearables, static random-access memory (SRAM) resources are extremely expensive and limited. As user interfaces (UIs) become increasingly sophisticated, large screens and high-resolution displays become mainstream, resulting in the graphics frame buffer occupying a significant amount of system random access memory (RAM) resources.

[0016] 1. Double buffer display mechanism To achieve smooth, tear-free graphics display, existing technologies generally employ a double-buffer display mechanism, the main working principle of which is as follows: The system pre-allocates two regions of equal size in memory, called the front buffer and the back buffer, respectively: 1) Display process: The display controller always reads data from the front buffer and refreshes it onto the screen.

[0017] 2) Rendering process: The graphics processing unit (GPU) or CPU draws the next frame of the image in the back buffer.

[0018] 3) Swap process: When the back buffer is drawn and the vertical synchronization signal (V-Sync) arrives, the system instantly swaps the roles of the two buffers by modifying pointers or registers (the front becomes the back, and the back becomes the front).

[0019] 2. Static resource allocation In traditional designs, the size and purpose of the double buffer used for display are statically fixed at compile time, and this memory resource is fixed in place unless the code is modified and recompiled.

[0020] 3. Overlay loading Overlay loading is a memory management technique that allows programs to dynamically load blocks of code or data into memory at runtime, overwriting currently unused parts, thereby enabling larger programs to run in a limited memory space.

[0021] The existing technology has the following drawbacks: 1) Resource solidification through a double buffer mechanism To prevent screen tearing and flickering, existing technologies generally employ double-buffered or even triple-buffered mechanisms. These two buffers are statically allocated at compile time, and regardless of whether the screen is in a rapidly changing scrolling state or a static display state, this portion of memory is exclusively occupied by the display controller and cannot be used by other services.

[0022] 2) The contradiction of peak memory demand Embedded systems often face sudden high memory demands, such as noise reduction during Bluetooth calls, firmware decompression during OTA upgrades, and large image decoding. In traditional architectures, because video memory is fixed, the system often fails to start these high-priority tasks due to insufficient remaining heap memory, or is forced to use overlay techniques.

[0023] 3) Defects of Overlay Technology Traditional overlay technology requires pre-defined mutually exclusive memory regions and has complex switching logic, usually involving Flash read and write, which is slow and difficult to handle dynamic scenarios with millisecond-level UI rendering and concurrent background tasks, and is prone to causing system crashes.

[0024] To address this issue, this application proposes a dynamic management architecture for the display buffer. Without increasing hardware costs, it breaks down the barriers between graphics memory and general-purpose memory, enabling dynamic "borrowing" and "returning" of the display buffer to solve the problem of insufficient peak memory in embedded systems. This application mainly includes a dynamic memory scheduling mechanism and a display mode degradation / recovery mechanism, achieving safe switching between single and dual buffers, thereby fully utilizing system resources and meeting the needs of more functional scenarios.

[0025] The memory management method provided in this application will be described in detail below with reference to the accompanying drawings, through specific embodiments and application scenarios.

[0026] Please see Figure 1 , Figure 1 A flowchart of the memory management method provided in the embodiments of this application is shown below. Figure 1 As shown, the method includes the following steps: Step 101: Upon receiving a memory usage request from the first service, control the buffer mode of the display memory area according to the UI display status of the electronic device and / or the service attributes of the first service. The display memory area includes at least two buffers, and the buffer mode includes a first buffer mode and a second buffer mode. Wherein, when the buffer mode of the display memory area is controlled to be the first buffer mode, only the display controller of the electronic device is allowed to use the first part of the buffer, and the first service is allowed to use the second part of the buffer, wherein the first part of the buffer and the second part of the buffer are different buffers among the at least two buffers; When the buffer mode of the display memory area is controlled to the second buffer mode, the display controller of the electronic device is allowed to use the first part of the buffer and the second part of the buffer, and the first service is denied access to the display memory area.

[0027] In this application embodiment, a mechanism for dynamically managing the display buffer is proposed, which can switch the display memory area exclusively occupied by the display controller between different buffer modes to meet the usage requirements of the background business without affecting the foreground display.

[0028] The aforementioned first service can be a non-display service supported by the electronic device, such as audio service, OTA service, Bluetooth call service, etc.

[0029] The UI display status mentioned above can cover whether the electronic device's UI is displayed (i.e., whether the screen is off), whether the UI is static (e.g., whether it displays a static or dynamic image), and the current refresh rate requirement.

[0030] The aforementioned business attributes may include information such as business name, business type, and business priority. The display memory area includes at least two buffers, such as a double buffer (including a front buffer and a back buffer), or a triple buffer.

[0031] The aforementioned display memory area may refer to the memory area used by the display controller of an electronic device.

[0032] The aforementioned buffer modes can include single-buffer mode, double-buffer mode, triple-buffer mode, etc. Specifically, various buffer modes can be divided according to the number of buffers that the display controller is allowed to use. For example, single-buffer mode only allows the display controller to use one buffer in the display memory area, while double-buffer mode allows the display controller to use two buffers in the display memory area.

[0033] The first buffer mode can be a single buffer mode, the second buffer mode can be a double buffer mode, or the first buffer mode can be a single buffer mode or a double buffer mode, and the second buffer mode can be a triple buffer mode.

[0034] When the display memory area includes a double buffer, the display controller initially adopts a double buffer mode. For ease of understanding, this application embodiment mainly uses the example of a display memory area including a double buffer, with the first buffer mode being a single buffer mode and the second buffer mode being a double buffer mode.

[0035] In this embodiment of the application, when a background service is running, a memory usage request can be initiated first, and the system will decide whether to switch the buffer mode of the display memory area based on the current UI display status and the attributes of the service.

[0036] Specifically, based on the UI display status of the electronic device and the service attributes of the first service, it can be determined whether the conditions for switching the buffer mode are met, and then decide whether to switch the buffer mode of the display memory area. If the conditions are met, the buffer mode of the display memory area will be switched from the second buffer mode to the first buffer mode; if the conditions are not met, the buffer mode of the display memory area will remain in the second buffer mode. The conditions for switching the buffer mode may include a static or low refresh rate UI, high priority of the first service, and the first service being a preset type of service. Conditions for not switching the buffer mode may include a non-static or high refresh rate UI, high priority of the first service, and the first service not being a preset type of service.

[0037] In the first buffer mode, one or a portion of the display memory area's buffers can be lent to the first service, and the display controller uses only one or a portion of the buffers in the memory area. In the second buffer mode, lending one or a portion of the display memory area's buffers to the first service is refused, and the display controller uses all the buffers in the memory area. For example, in single-buffer mode, buffer B can be lent to the first service, and the display controller uses only buffer A; in dual-buffer mode, buffer B is refused to be lent to the first service, and the display controller uses both buffer A and buffer B.

[0038] It should be noted that the embodiments of this application can realize dynamic management of the display memory area based on the dynamic memory scheduler and control the switching of the buffer mode. Specifically, when the first service has a memory usage requirement, it sends a memory usage request to the dynamic memory scheduler. The dynamic memory scheduler determines whether to switch the buffer mode based on the UI display status and the service attributes of the first service. When preparing to switch, it locks the display controller to read one of the buffers in the display memory area in a loop and lends the other buffer to the first service.

[0039] It should also be noted that each business module can register its memory requirements, business priorities, etc. with the dynamic memory scheduler during initialization.

[0040] Furthermore, it is understood that before controlling the buffer mode of the display memory area based on the UI display status of the electronic device and / or the service attributes of the first service, it is possible to first determine whether the remaining content can meet the memory usage requirements of the first service. If it cannot meet the requirements, then the step of controlling the buffer mode of the display memory area based on the UI display status of the electronic device and / or the service attributes of the first service is executed. If it can meet the requirements, this step is not necessary, and the buffer mode of the display memory area is not switched.

[0041] In some embodiments, when the switching conditions are not met, such as when the current UI interface is displaying dynamic images at a high refresh rate or the first service has a low priority, the buffer mode of the display memory area can be controlled to the second buffer mode. That is, the display controller maintains the use of dual or multiple buffers in the display memory area and rejects the memory borrowing request of the first service. In this way, the flow of the current UI interface task can be guaranteed first.

[0042] Optionally, controlling the buffer mode of the display memory area based on the UI display status of the electronic device and / or the service attributes of the first service includes at least one of the following: When the UI interface displays a static image, the buffer mode of the display memory area is controlled to be the first buffer mode; When the UI displays a dynamic image, the buffer mode of the display memory area is controlled to be the second buffer mode; When the priority of the first service is greater than the first preset priority, the buffer mode of the display memory area is controlled to be the first buffer mode; If the priority of the first service is lower than the first preset priority, the buffer mode of the display memory area is controlled to be the second buffer mode; When the UI interface displays a static image and the priority of the first service is greater than the second preset priority, the buffer mode of the display memory area is controlled to be the first buffer mode. When the UI interface displays a static image and the priority of the first service is lower than the second preset priority, the buffer mode of the display memory area is controlled to be the second buffer mode; When the UI displays a dynamic image and the priority of the first service is greater than the third preset priority, the buffer mode of the display memory area is controlled to be the first buffer mode. When the UI displays a dynamic image and the priority of the first service is lower than the third preset priority, the buffer mode of the display memory area is controlled to be the second buffer mode.

[0043] In some embodiments, the decision to switch buffer modes can be based on the UI display status. If the UI displays a static image with a low refresh rate, the buffer switching conditions are met, and the buffer mode is switched to the first buffer mode, allowing a portion of the buffer to be lent to the first service. If the UI displays a dynamic image with a high refresh rate, the buffer switching conditions are not met, and the buffer mode is not switched, maintaining the second buffer mode and refusing to lend the buffer to the first service. This ensures the normal operation of some background services without affecting the dynamic display effect of the UI.

[0044] In other embodiments, the decision to switch the buffer mode can be based on the priority of the first service. If the priority of the first service is high (higher than a first preset priority), the buffer switching condition is met, and the buffer mode is switched to the first buffer mode, allowing a portion of the buffer to be lent to the first service. If the priority of the first service is low (lower than the first preset priority), the buffer switching condition is not met, and the buffer mode is not switched, maintaining the second buffer mode and refusing to lend the buffer to the first service. In this way, the normal use of high-priority background services can be guaranteed.

[0045] In some embodiments, the decision to switch the buffer mode can be made by combining the UI display status and the priority of the first service. If the UI displays a static image with a low refresh rate, and the priority of the first service is high (higher than the second preset priority), the buffer switching condition is met, and the buffer mode is switched to the first buffer mode, allowing a portion of the buffer to be lent to the first service. If the UI displays a static image with a low refresh rate, but the priority of the first service is very low (lower than the second preset priority), the buffer switching condition is not met, and the buffer mode is not switched; the second buffer mode is maintained, and the buffer is not lent to the first service. If the UI displays a dynamic image with a high refresh rate, but the priority of the first service is extremely high (higher than the third preset priority, such as a call service), the buffer switching condition is met, and the buffer mode is switched to the first buffer mode, forcibly allowing a portion of the buffer to be lent to the first service. If the UI displays a dynamic image with a high refresh rate, but the priority of the first service is low (lower than the third preset priority), the buffer switching condition is not met, and the buffer mode is not switched; the second buffer mode is maintained, and the buffer is not lent to the first service. The third preset priority can be greater than the second preset priority, and the third preset priority can be greater than or equal to the first preset priority. This balances the dynamic display effects of the UI interface with the normal operation of high-priority services.

[0046] Optionally, controlling the buffer mode of the display memory area to be the first buffer mode includes: Upon receiving the first vertical synchronization signal from the display controller of the electronic device, the buffer address of the display controller is modified to the address of the first buffer, and the address of the second buffer is sent to the first service.

[0047] In some embodiments, in order to ensure the safety of the display process and avoid problems such as display abnormalities or crashes, an atomic switching mechanism based on the vertical synchronization signal V-Sync can be used to switch the buffer mode of the display memory area.

[0048] Specifically, when the conditions for buffer mode switching are met, the display controller can be notified to stop rendering new frames to the buffers to be borrowed, and only draw in one or a portion of the buffers. The system can then wait for the display controller's V-Sync interrupt signal to ensure that the display controller has completed the last read of the buffers to be borrowed. Upon receiving the display controller's V-Sync interrupt signal, the buffer mode can be switched during the V-Sync blanking period. Specifically, the base address register of the display controller's buffer address is modified to the address of the first buffer, locking it to only read the first buffer in a loop. The address of the second buffer is then mapped to the first service, i.e., responding to the memory usage request of the first service, the address of the second buffer is returned to the first service, allowing the first service to use the second buffer.

[0049] Thus, the V-Sync-based atomic switching mechanism proposed in this application precisely utilizes the microsecond-level safety window of the V-Sync blanking period scanned by the display controller. Only after cutting off the display controller's read path to the second buffer and locking the base address register does the transfer of memory ownership occur. This mechanism completely isolates read-write conflicts at the underlying hardware timing level, ensuring absolute security during the memory borrowing and returning process.

[0050] Optionally, after controlling the buffer mode of the display memory area to the first buffer mode, the method further includes: Upon completion of the first service, the buffer mode of the display memory area is switched back to the second buffer mode.

[0051] In some embodiments, when the first service is completed, the first service has finished using the second buffer. At this time, the buffer mode of the display memory area can be switched back to the second buffer mode, so that the display controller can resume the alternating reading of the dual buffers and restore the smooth operation of the UI interface.

[0052] Optionally, the step of controlling the display memory area's buffer mode to switch back to the second buffer mode after the first service is completed includes: Upon completion of the first service, the second buffer is released, and the UI module of the electronic device is controlled to redraw the UI interface data in the second buffer. Upon receiving the second vertical synchronization signal from the display controller, the buffer address of the display controller is modified to the address of the first buffer and the address of the second buffer.

[0053] In some embodiments, upon completion of the first service, the second buffer can be released, and the UI framework (i.e., the UI module) can be notified to redraw a complete frame in the second buffer. This involves redrawing the content of the first buffer in the second buffer to ensure synchronization between the two buffers. After drawing is complete, the system can wait for the V-Sync interrupt signal from the display controller. Upon receiving the V-Sync interrupt signal, the buffer mode can be restored to the second buffer mode. Specifically, the base address register of the display controller's buffer address can be modified to the address of the first buffer and the address of the second buffer to restore the display controller's dual-buffer alternating read mode. Subsequently, the UI display status and service requests can continue to be monitored, awaiting the next buffer mode switch.

[0054] It should be noted that when mapping the address of the second buffer to the first service, the second buffer can be marked with a certain status, such as marking the second buffer as "Dirty," indicating that it needs to be redrawn upon return. After the first service is completed and the second buffer is released, a forced redraw is performed in the second buffer.

[0055] This implementation method allows for the safe restoration of the display memory area's buffer mode to the initial double-buffered alternating read mode, avoiding problems such as display anomalies or crashes.

[0056] In summary, the core logic of this application embodiment is as follows: when the system detects a "low frame rate display requirement" (such as static images, low refresh rate) or a "high priority business request", it will proactively and safely downgrade the display driver from "double buffer mode" to "single buffer mode". The ownership of the released second buffer is instantly transferred to general business (such as audio algorithm). After the business ends, the double buffer mode is seamlessly restored.

[0057] The embodiments of this application can be based on Figure 2 The dynamic management architecture implementation of the display buffer shown is as follows: Figure 2 As shown, the architecture includes: UI framework, display controller, physical memory, non-graphics business modules (such as audio, OTA, etc.), and dynamic memory scheduler running in the operating system kernel layer.

[0058] The dynamic memory scheduler mainly consists of the following three modules: 1) Resource registration module: Each business module (UI framework, audio task, OTA task, etc.) registers its memory requirements and priority during initialization.

[0059] 2) Status monitoring module: Real-time monitoring of system events, including: Display status: whether the screen is off, whether the UI is static, and the current refresh rate requirement.

[0060] Business request: Are there any other high-priority non-visual tasks requesting large blocks of memory?

[0061] 3) Arbitration Strategy Module: When the UI is static and there is a background task request: approve the loan and switch to single-buffer mode.

[0062] When the UI is dynamically swiping but the background task has extremely high priority (such as a call task): force borrowing, switch to single buffer mode (accept slight loss of image quality).

[0063] When the UI is dynamically scrolling and the background task has low priority: refuse to lend out and maintain double buffer mode.

[0064] The following is combined Figures 2 to 4 The specific implementation steps of the embodiments of this application are illustrated below: 1) When the system starts, the dynamic memory scheduler first takes over the display memory area reserved in the system SRAM and divides it into the first buffer (Buffer A) and the second buffer (Buffer B). By default, the display controller works in the dual-buffer alternating read mode.

[0065] 2) The UI framework registers its current "display state" (e.g., static, low refresh rate, high scrolling rate) with the dynamic memory scheduler; at the same time, non-graphics business modules register their "memory requirements" and "business priorities" with the dynamic memory scheduler.

[0066] like Figure 3 As shown, the UI framework, OTA service, audio service, or other services can all register resources through the scheduler's resource registration module, and then the dynamic memory scheduler can manage them.

[0067] 3) The dynamic memory scheduler's status monitoring module starts running, mainly monitoring the display status and whether there are business requests. The display status mainly includes whether the screen is off, whether the UI is static, the current refresh rate requirement, and quantitative indicators used for arbitration. The business requests mainly monitor whether other non-display services initiate memory requests and need to borrow buffer resources.

[0068] 4) When a service initiates a request, the arbitration strategy module of the dynamic memory scheduler makes a judgment. If the lending criteria are met, the explicit buffer safe switching process is executed.

[0069] To prevent screen glitches or system anomalies during switching and to ensure safe switching of the buffer, an atomic switching mechanism based on vertical synchronization (V-Sync) is adopted, the flowchart of which is shown below. Figure 4 As shown, it includes the following steps: S1 (Request and Freeze): When the dynamic memory scheduler receives a memory borrowing request, it sends a "prepare to degrade" signal to the display controller. The UI framework stops rendering new frames to Buffer B and only draws to or stops drawing to Buffer A.

[0070] S2 (Timing Synchronization): The dynamic memory scheduler polls or waits for the V-Sync interrupt signal from the display controller. Here, the purpose of waiting for V-Sync is to ensure that the display controller has completed the last read of Buffer B.

[0071] S3 (Pointer Redirection): During the V-Sync blanking period, modify the base address register of the display controller to lock it to read Buffer A only in a loop.

[0072] S4 (Ownership Transfer): The dynamic memory scheduler maps the physical address of Buffer B to the requesting task and marks Buffer B as "Dirty" (meaning it needs to be redrawn when returned).

[0073] S5 (Return and Restore): Buffer B is released after the task is completed. The dynamic memory scheduler notifies the UI framework to force a full frame redraw in Buffer B. After the drawing is completed, the double-buffered alternating read mode is restored at the next V-Sync signal.

[0074] Here, atomic switching is used to ensure the safety of the display process and avoid problems such as display abnormalities or crashes. Specifically, it manifests as follows: Pause the UI framework's writing to Buffer B; Wait for the UI framework to complete the current cycle's read operation (such as the V-Sync signal); Lock the UI framework to use only Buffer A (single-buffer mode); Transfer the read and write permissions of Buffer B to the first service.

[0075] 6) After the business completes the borrowing, the buffer is returned, and the UI framework switches back to dual-buffer display; the dynamic memory scheduler continues to monitor the display status and business requests, waiting for the next switch.

[0076] The following two specific application scenarios illustrate the implementation of this application: 1. OTA decompression scenario in static image Scenario Description: When a user clicks "System Upgrade," a progress bar is displayed on the screen (with low screen update frequency). The system needs to decompress a large firmware package, requiring a large amount of memory to be allocated.

[0077] The execution process is as follows: The OTA task requests memory from the dynamic memory scheduler (the dynamic memory scheduler detects the service request).

[0078] The dynamic memory scheduler determines that the current UI is only updating the progress bar and does not require a high frame rate, thus meeting the downgrade conditions (currently, there is no need for high frame rate display, the dynamic memory scheduler arbitration determines that it meets the lending requirements, and begins the safe switching process).

[0079] The dynamic memory scheduler locks Buffer A for displaying the progress bar (the UI framework stops rendering new frames to Buffer B and only draws to Buffer A).

[0080] Buffer B is borrowed as an OTA decompression buffer (a safe handover is completed, and the OTA service gains ownership of Buffer B for use).

[0081] Decompression complete. Buffer B returned. The system resumes smooth animation and displays "Upgrade successful" (Usage complete. Return Buffer B and switch back to dual-buffer display mode).

[0082] 2. Bluetooth call scenario (high priority forced downgrade) Scenario description: The user is scrolling through a list (high frame rate requirement) when a call is suddenly answered, triggering the Bluetooth noise reduction algorithm (requires large memory).

[0083] The execution process is as follows: When the call is connected, the dynamic memory scheduler detects a high-priority service requesting memory.

[0084] The dynamic memory scheduler intervenes and, even if there is a high frame rate display requirement, still performs a downgrade switching process (for higher priority business requests, the dynamic memory scheduler arbitrates and determines that they meet the forced borrowing requirement, and starts the safe switching process).

[0085] The UI framework enters single-buffered mode (the UI framework stops rendering new frames to Buffer B and only draws in Buffer A). At this time, there may be slight tearing in the scrolling list, but this ensures smooth call playback.

[0086] Buffer B is provided for use by the call algorithm (after a safe handover is completed, the call service acquires ownership of Buffer B and uses it).

[0087] The call ends, double buffering is restored, and the UI swipes become smooth again (use complete, return Buffer B, and switch back to double buffer display mode).

[0088] The storage management method in this embodiment, upon receiving a memory usage request from a first service, controls the buffer mode of the display memory area based on the UI display status of the electronic device and / or the service attributes of the first service. The display memory area includes at least two buffers, and the buffer modes include a first buffer mode and a second buffer mode. Specifically, when the buffer mode of the display memory area is controlled as the first buffer mode, only the display controller of the electronic device is allowed to use a first portion of the buffer, and the first service is allowed to use a second portion of the buffer. The first and second portions of the buffer are different buffers among the at least two buffers. When the buffer mode of the display memory area is controlled as the second buffer mode, the display controller of the electronic device is allowed to use both the first and second portions of the buffer, and the first service is denied access to the display memory area. Thus, this embodiment divides the display memory area into two different buffer modes and controls the switching of the buffer mode based on the attributes of the requested service and the UI display status when a new service request is received. This allows, in some scenarios, the portion of display memory that is fixedly occupied by the display controller to be lent to the requesting service, ensuring the normal startup and operation of the requesting service. Therefore, this embodiment better meets the usage needs of multi-service scenarios compared to existing technologies.

[0089] The dynamic memory scheduler proposed in this application breaks the physical isolation between "video memory" and "system memory," and its beneficial effects focus on resource utilization, system robustness, and architectural innovation, which are reflected in the following aspects: 1) Break down static resource barriers to achieve memory expansion with zero hardware cost. In existing technologies, the graphics display buffer is statically fixed during system compilation, resulting in a large amount of idle SRAM resources when the UI is static, while high-concurrency tasks fail due to insufficient heap memory. This application introduces a dynamic memory scheduler to achieve cross-business domain memory pooling management. Without increasing the chip's SRAM capacity, idle display buffers are dynamically converted into general-purpose memory, effectively handling instantaneous peak memory demands such as OTA decompression and audio noise reduction, and greatly reducing the hardware cost threshold for embedded devices.

[0090] 2) Establish cross-domain perception and intelligent arbitration mechanisms to improve the robustness of the system under extreme operating conditions. Existing systems lack a global perspective on resource scheduling, making them highly susceptible to crashes due to memory exhaustion caused by sudden tasks. The dynamic memory scheduler in this application possesses cross-domain state awareness capabilities, enabling real-time quantitative comparison of "UI refresh requirements" and "background business priorities." Under extreme resource constraints (such as sudden incoming calls during high-frequency scrolling), the scheduler can execute a forced degradation strategy of "function over visual," proactively sacrificing slight UI smoothness to ensure memory supply for core business processes (such as call algorithms). This avoids system crashes caused by memory fragmentation or OutOfMemoryError (OOM), significantly improving the product's resilience and stability.

[0091] 3) A unified and decoupled resource registration architecture improves software scalability. The scheduler provides standardized resource registration and status monitoring interfaces, enabling dynamic borrowing and return of underlying memory without coupling between subsystems such as the UI framework, audio tasks, and OTA tasks. This highly cohesive and loosely coupled architecture significantly reduces the development and maintenance difficulty of complex embedded systems.

[0092] The V-Sync-based atomic switching process proposed in this application solves the fatal problem of "forced memory grabbing leading to system crashes or screen glitches." Its beneficial effects focus on hardware-level security, visual integrity, and response speed, and are reflected in the following aspects: 1) Eliminate bus conflicts and provide hardware-level system switching security. In traditional architectures, if software forcibly preempts memory being read by the display controller, it can easily trigger a bus contention conflict between the CPU and the display controller, leading to a hardware hard fault or even a system crash. This application's V-Sync-based atomic switching mechanism precisely utilizes the microsecond-level safety window of the display's V-Sync blanking period. It only transfers memory ownership after cutting off the display controller's read path to the second buffer and locking the base address register. This mechanism completely isolates read-write conflicts at the underlying hardware timing level, ensuring absolute safety during memory borrowing and returning.

[0093] 2) Eliminate interference from dirty data to ensure a seamless visual experience. Existing crude memory reuse schemes often result in the display controller reading "dirty data" written by non-graphics applications during switching, leading to severe color noise or screen tearing (display artifacts). This application's atomic switching process ensures that the display controller reads only legitimate graphics data at all times through forced locking of single-buffered loop reading and a forced dirty area redraw blocking mechanism during return. Even when downgrading to single-buffered mode, it only manifests as a decrease in frame rate or slight tearing, never resulting in garbled or disorganized screen artifacts that disrupt the user experience, achieving a visually smooth transition.

[0094] 3) Millisecond-level dynamic response, replacing traditional overlay technology Traditional overlay technology relies on reading Flash data and replacing code segments, which is extremely time-consuming (hundreds of milliseconds to seconds) and cannot meet the needs of bursty, high-real-time tasks (such as Bluetooth call answering). The atomic switching in this application involves only a very small number of register modifications, and its response latency is limited to only one V-Sync cycle (typically around 16 milliseconds). This millisecond-level ultra-fast response ensures that high-priority algorithms can instantly acquire the necessary memory and begin execution, avoiding stuttering or delays during the initial business startup phase.

[0095] The memory management method provided in this application can be executed by a memory management device. This application uses the execution of the memory management method by a memory management device as an example to illustrate the memory management device provided in this application.

[0096] Please see Figure 5 , Figure 5 This is a schematic diagram of the structure of the memory management device provided in the embodiments of this application, such as... Figure 5 As shown, the memory management device 500 includes: The control module 501 is used to control the buffer mode of the display memory area according to the UI display status of the electronic device and / or the service attributes of the first service when a memory usage request of the first service is received. The display memory area includes at least two buffers, and the buffer mode includes a first buffer mode and a second buffer mode. Wherein, when the buffer mode of the display memory area is controlled to be the first buffer mode, only the display controller of the electronic device is allowed to use the first part of the buffer, and the first service is allowed to use the second part of the buffer, wherein the first part of the buffer and the second part of the buffer are different buffers among the at least two buffers; When the buffer mode of the display memory area is controlled to the second buffer mode, the display controller of the electronic device is allowed to use the first part of the buffer and the second part of the buffer, and the first service is denied access to the display memory area.

[0097] Optionally, the control module 501 includes at least one of the following: When the UI interface displays a static image, the buffer mode of the display memory area is controlled to be the first buffer mode; When the UI displays a dynamic image, the buffer mode of the display memory area is controlled to be the second buffer mode; When the priority of the first service is greater than the first preset priority, the buffer mode of the display memory area is controlled to be the first buffer mode; If the priority of the first service is lower than the first preset priority, the buffer mode of the display memory area is controlled to be the second buffer mode; When the UI interface displays a static image and the priority of the first service is greater than the second preset priority, the buffer mode of the display memory area is controlled to be the first buffer mode. When the UI interface displays a static image and the priority of the first service is lower than the second preset priority, the buffer mode of the display memory area is controlled to be the second buffer mode; When the UI displays a dynamic image and the priority of the first service is greater than the third preset priority, the buffer mode of the display memory area is controlled to be the first buffer mode. When the UI displays a dynamic image and the priority of the first service is lower than the third preset priority, the buffer mode of the display memory area is controlled to be the second buffer mode.

[0098] Optionally, the control module 501 is specifically configured to, upon receiving a first vertical synchronization signal from the display controller of the electronic device, modify the buffer address of the display controller to the address of the first buffer, and send the address of the second buffer to the first service.

[0099] Optionally, the control module 501 is also configured to control the buffer mode of the display memory area to switch back to the second buffer mode when the first service is completed.

[0100] Optionally, the control module 501 is specifically used for: Upon completion of the first service, the second buffer is released, and the UI module of the electronic device is controlled to redraw the UI interface data in the second buffer. Upon receiving the second vertical synchronization signal from the display controller, the buffer address of the display controller is modified to the address of the first buffer and the address of the second buffer.

[0101] The memory management device 500 in this embodiment, upon receiving a memory usage request from a first service, controls the buffer mode of the display memory area based on the UI display status of the electronic device and / or the service attributes of the first service. The display memory area includes at least two buffers, and the buffer modes include a first buffer mode and a second buffer mode. When the buffer mode of the display memory area is controlled as the first buffer mode, only the display controller of the electronic device is allowed to use a first portion of the buffer, and the first service is allowed to use a second portion of the buffer. The first and second portions of the buffer are different buffers among the at least two buffers. When the buffer mode of the display memory area is controlled as the second buffer mode, the display controller of the electronic device is allowed to use both the first and second portions of the buffer, and the first service is denied access to the display memory area. Thus, this embodiment divides the display memory area into two different buffer modes and controls the switching of the buffer mode based on the attributes of the requested service and the UI display status when a new service request is received. This allows the portion of display memory that is fixedly occupied by the display controller to be lent to the requesting service in some scenarios, ensuring the normal startup and operation of the requested service. Therefore, this embodiment better meets the usage needs of multi-service scenarios compared to existing technologies.

[0102] The memory management device in this application embodiment can be an electronic device or a component within an electronic device, such as an integrated circuit or a chip. The electronic device can be a terminal or other devices besides a terminal. For example, the electronic device can be a mobile phone, tablet computer, laptop computer, PDA, in-vehicle electronic device, mobile internet device (MID), augmented reality (AR) / virtual reality (VR) device, robot, wearable device, ultra-mobile personal computer (UMPC), netbook, or personal digital assistant (PDA), etc. It can also be a server, network attached storage (NAS), personal computer (PC), television (TV), ATM, or self-service machine, etc. This application embodiment does not specifically limit the scope of the device.

[0103] The memory management device in this application embodiment can be a device with an operating system. This operating system can be Android, iOS, or other possible operating systems; this application embodiment does not specifically limit the specific operating system used.

[0104] The memory management device provided in this application embodiment can achieve... Figures 1 to 4 The various processes implemented in the method embodiments can achieve the same technical effect, and will not be described again here to avoid repetition.

[0105] Optionally, such as Figure 6 As shown, this application embodiment also provides an electronic device 600, including a processor 601 and a memory 602. The memory 602 stores a program or instructions that can run on the processor 601. When the program or instructions are executed by the processor 601, they implement the various steps of the above-described memory management method embodiment and can achieve the same technical effect. To avoid repetition, they will not be described again here.

[0106] It should be noted that the electronic devices in the embodiments of this application include the mobile electronic devices and non-mobile electronic devices described above.

[0107] Figure 7 A schematic diagram of the hardware structure of an electronic device to implement an embodiment of this application.

[0108] The electronic device 700 includes, but is not limited to, components such as: radio frequency unit 701, network module 702, audio output unit 703, input unit 704, sensor 705, display unit 706, user input unit 707, interface unit 708, memory 709, and processor 710.

[0109] Those skilled in the art will understand that the electronic device 700 may also include a power supply (such as a battery) for supplying power to various components. The power supply may be logically connected to the processor 710 through a power management system, thereby enabling functions such as managing charging, discharging, and power consumption through the power management system. Figure 7 The electronic device structure shown does not constitute a limitation on the electronic device. The electronic device may include more or fewer components than shown, or combine certain components, or have different component arrangements, which will not be elaborated here.

[0110] The processor 710 is used for: Upon receiving a memory usage request from a first service, the buffer mode of the display memory area is controlled according to the UI display status of the electronic device and / or the service attributes of the first service. The display memory area includes at least two buffers, and the buffer mode includes a first buffer mode and a second buffer mode. Wherein, when the buffer mode of the display memory area is controlled to be the first buffer mode, only the display controller of the electronic device is allowed to use the first part of the buffer, and the first service is allowed to use the second part of the buffer, wherein the first part of the buffer and the second part of the buffer are different buffers among the at least two buffers; When the buffer mode of the display memory area is controlled to the second buffer mode, the display controller of the electronic device is allowed to use the first part of the buffer and the second part of the buffer, and the first service is denied access to the display memory area.

[0111] Optionally, the processor 710 is also used for at least one of the following: When the UI interface displays a static image, the buffer mode of the display memory area is controlled to be the first buffer mode; When the UI displays a dynamic image, the buffer mode of the display memory area is controlled to be the second buffer mode; When the priority of the first service is greater than the first preset priority, the buffer mode of the display memory area is controlled to be the first buffer mode; If the priority of the first service is lower than the first preset priority, the buffer mode of the display memory area is controlled to be the second buffer mode; When the UI interface displays a static image and the priority of the first service is greater than the second preset priority, the buffer mode of the display memory area is controlled to be the first buffer mode. When the UI interface displays a static image and the priority of the first service is lower than the second preset priority, the buffer mode of the display memory area is controlled to be the second buffer mode; When the UI displays a dynamic image and the priority of the first service is greater than the third preset priority, the buffer mode of the display memory area is controlled to be the first buffer mode. When the UI displays a dynamic image and the priority of the first service is lower than the third preset priority, the buffer mode of the display memory area is controlled to be the second buffer mode.

[0112] Optionally, the processor 710 is also used for: Upon receiving the first vertical synchronization signal from the display controller of the electronic device, the buffer address of the display controller is modified to the address of the first buffer, and the address of the second buffer is sent to the first service.

[0113] Optionally, the processor 710 is also used for: Upon completion of the first service, the buffer mode of the display memory area is switched back to the second buffer mode.

[0114] Optionally, the processor 710 is also used for: Upon completion of the first service, the second buffer is released, and the UI module of the electronic device is controlled to redraw the UI interface data in the second buffer. Upon receiving the second vertical synchronization signal from the display controller, the buffer address of the display controller is modified to the address of the first buffer and the address of the second buffer.

[0115] It should be understood that, in this embodiment, the input unit 704 may include a graphics processing unit (GPU) 7041 and a microphone 7042. The GPU 7041 processes image data of still images or videos obtained by an image capture device (such as a camera) in video capture mode or image capture mode. The display unit 706 may include a display panel 7061, which may be configured in the form of a liquid crystal display, an organic light-emitting diode, or the like. The user input unit 707 includes at least one of a touch panel 7071 and other input devices 7072. The touch panel 7071 is also called a touch screen. The touch panel 7071 may include a touch detection device and a touch controller. Other input devices 7072 may include, but are not limited to, a physical keyboard, function keys (such as volume control buttons, power buttons, etc.), a trackball, a mouse, and a joystick, which will not be described in detail here.

[0116] The memory 709 can be used to store software programs and various data. The memory 709 may primarily include a first storage area for storing programs or instructions and a second storage area for storing data. The first storage area may store the operating system, application programs or instructions required for at least one function (such as sound playback, image playback, etc.). Furthermore, the memory 709 may include volatile memory or non-volatile memory, or both. The non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory can be random access memory (RAM), static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), and direct memory bus RAM (DRRAM). The memory 709 in the embodiments of this application includes, but is not limited to, these and any other suitable types of memory.

[0117] Processor 710 may include one or more processing units; optionally, processor 710 integrates an application processor and a modem processor, wherein the application processor mainly handles operations involving the operating system, user interface, and applications, and the modem processor mainly handles wireless communication signals, such as a baseband processor. It is understood that the aforementioned modem processor may also not be integrated into processor 710.

[0118] This application also provides a readable storage medium storing a program or instructions. When the program or instructions are executed by a processor, they implement the various processes of the above-described memory management method embodiments and achieve the same technical effect. To avoid repetition, they will not be described again here.

[0119] The processor is the processor in the electronic device described in the above embodiments. The readable storage medium includes computer-readable storage media, such as computer read-only memory (ROM), random access memory (RAM), magnetic disk, or optical disk.

[0120] This application embodiment also provides a chip, which includes a processor and a communication interface. The communication interface is coupled to the processor. The processor is used to run programs or instructions to implement the various processes of the above memory management method embodiments and can achieve the same technical effect. To avoid repetition, it will not be described again here.

[0121] It should be understood that the chip mentioned in the embodiments of this application may also be referred to as a system-on-a-chip, system chip, chip system, or system-on-a-chip, etc.

[0122] This application provides a computer program product that is stored in a storage medium and executed by at least one processor to implement the various processes of the memory management method embodiments described above, and can achieve the same technical effect. To avoid repetition, it will not be described again here.

[0123] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, it should be noted that the scope of the methods and apparatuses in the embodiments of this application is not limited to performing functions in the order shown or discussed, but may also include performing functions substantially simultaneously or in the reverse order, depending on the functions involved. For example, the described methods may be performed in a different order than described, and various steps may be added, omitted, or combined. Additionally, features described with reference to certain examples may be combined in other examples.

[0124] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a computer software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0125] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.

Claims

1. A memory management method, characterized in that, include: Upon receiving a memory usage request from a first service, the buffer mode of the display memory area is controlled according to the UI display status of the electronic device and / or the service attributes of the first service. The display memory area includes at least two buffers, and the buffer mode includes a first buffer mode and a second buffer mode. Wherein, when the buffer mode of the display memory area is controlled to be the first buffer mode, only the display controller of the electronic device is allowed to use the first part of the buffer, and the first service is allowed to use the second part of the buffer, wherein the first part of the buffer and the second part of the buffer are different buffers among the at least two buffers; When the buffer mode of the display memory area is controlled to the second buffer mode, the display controller of the electronic device is allowed to use the first part of the buffer and the second part of the buffer, and the first service is denied access to the display memory area.

2. The method according to claim 1, characterized in that, The step of controlling the buffer mode of the display memory area based on the UI display status of the electronic device and / or the service attributes of the first service includes at least one of the following: When the UI interface displays a static image, the buffer mode of the display memory area is controlled to be the first buffer mode; When the UI displays a dynamic image, the buffer mode of the display memory area is controlled to be the second buffer mode; When the priority of the first service is greater than the first preset priority, the buffer mode of the display memory area is controlled to be the first buffer mode; If the priority of the first service is lower than the first preset priority, the buffer mode of the display memory area is controlled to be the second buffer mode; When the UI interface displays a static image and the priority of the first service is greater than the second preset priority, the buffer mode of the display memory area is controlled to be the first buffer mode. When the UI interface displays a static image and the priority of the first service is lower than the second preset priority, the buffer mode of the display memory area is controlled to be the second buffer mode; When the UI displays a dynamic image and the priority of the first service is greater than the third preset priority, the buffer mode of the display memory area is controlled to be the first buffer mode. When the UI displays a dynamic image and the priority of the first service is lower than the third preset priority, the buffer mode of the display memory area is controlled to be the second buffer mode.

3. The method according to claim 2, characterized in that, The control of the display memory area's buffer mode to the first buffer mode includes: Upon receiving the first vertical synchronization signal from the display controller of the electronic device, the buffer address of the display controller is modified to the address of the first buffer, and the address of the second buffer is sent to the first service.

4. The method according to claim 2 or 3, characterized in that, After controlling the buffer mode of the display memory area to the first buffer mode, the method further includes: Upon completion of the first service, the buffer mode of the display memory area is switched back to the second buffer mode.

5. The method according to claim 4, characterized in that, The step of controlling the display memory area to switch back to the second buffer mode when the first service is completed includes: Upon completion of the first service, the second buffer is released, and the UI module of the electronic device is controlled to redraw the UI interface data in the second buffer. Upon receiving the second vertical synchronization signal from the display controller, the buffer address of the display controller is modified to the address of the first buffer and the address of the second buffer.

6. A memory management device, characterized in that, include: The control module is used to control the buffer mode of the display memory area according to the UI display status of the electronic device and / or the service attributes of the first service when a memory usage request of the first service is received. The display memory area includes at least two buffers, and the buffer mode includes a first buffer mode and a second buffer mode. Wherein, when the buffer mode of the display memory area is controlled to be the first buffer mode, only the display controller of the electronic device is allowed to use the first part of the buffer, and the first service is allowed to use the second part of the buffer, wherein the first part of the buffer and the second part of the buffer are different buffers among the at least two buffers; When the buffer mode of the display memory area is controlled to the second buffer mode, the display controller of the electronic device is allowed to use the first part of the buffer and the second part of the buffer, and the first service is denied access to the display memory area.

7. The memory management device according to claim 6, characterized in that, The control module includes at least one of the following: When the UI interface displays a static image, the buffer mode of the display memory area is controlled to be the first buffer mode; When the UI displays a dynamic image, the buffer mode of the display memory area is controlled to be the second buffer mode; When the priority of the first service is greater than the first preset priority, the buffer mode of the display memory area is controlled to be the first buffer mode; If the priority of the first service is lower than the first preset priority, the buffer mode of the display memory area is controlled to be the second buffer mode; When the UI interface displays a static image and the priority of the first service is greater than the second preset priority, the buffer mode of the display memory area is controlled to be the first buffer mode. When the UI interface displays a static image and the priority of the first service is lower than the second preset priority, the buffer mode of the display memory area is controlled to be the second buffer mode; When the UI displays a dynamic image and the priority of the first service is greater than the third preset priority, the buffer mode of the display memory area is controlled to be the first buffer mode. When the UI displays a dynamic image and the priority of the first service is lower than the third preset priority, the buffer mode of the display memory area is controlled to be the second buffer mode.

8. The memory management device according to claim 7, characterized in that, Specifically, the control module is used to modify the buffer address of the display controller to the address of the first buffer when it receives the first vertical synchronization signal from the display controller of the electronic device, and to send the address of the second buffer to the first service.

9. The memory management device according to claim 7 or 8, characterized in that, The control module is also used to control the buffer mode of the display memory area to switch back to the second buffer mode when the first service is completed.

10. The memory management device according to claim 9, characterized in that, The control module is specifically used for: Upon completion of the first service, the second buffer is released, and the UI module of the electronic device is controlled to redraw the UI interface data in the second buffer. Upon receiving the second vertical synchronization signal from the display controller, the buffer address of the display controller is modified to the address of the first buffer and the address of the second buffer.

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