A passivation method of a topcon cell

Abstract

The application discloses a passivation method of a TOPCon cell, which comprises the following steps: providing a TOPCon cell; the TOPCon cell comprises an N-type silicon substrate, the N-type silicon substrate comprises opposite front and back surfaces; the front surface comprises a first electrode, and the back surface comprises a second electrode; cutting at a reserved cutting position of the TOPCon cell by using a preset cutting process to form a TOPCon half cell; sequentially forming a first passivation layer, a second passivation layer and a barrier layer on a side of the cutting surface surface in a direction outward from the N-type silicon substrate to obtain a laminated passivation structure; the edge of the laminated passivation structure is not in contact with the first electrode and the second electrode; and performing low-temperature annealing on the TOPCon half cell with the laminated passivation structure. By using the method, the interface tunneling, gradient hydrogen passivation and field effect synergistic effect are realized, the carrier recombination of the laser cutting side surface is reduced, and the barrier layer effectively blocks the water and oxygen erosion.

Description

Technical Field

[0001] This invention relates to the technical field of solar cells, and more particularly to a passivation method for TOPCon cells. Background Technology

[0002] Tunneling oxide passivated contact (TOPCon) cells, as the mainstream technology for high-efficiency N-type crystalline silicon solar cells, have been widely used in the photovoltaic industry due to their excellent passivation effect, high open-circuit voltage, low light-induced degradation, and bifacial power generation characteristics. To further reduce module line loss, increase module output power, and meet the production needs of large-size silicon wafers, the industry commonly uses laser cutting to cut complete TOPCon cells into half-cells or smaller pieces. However, both laser cutting and mechanical cutting create numerous silicon dangling bonds, lattice damage layers, microcracks, and surface impurities at the cell cutting edges. This causes the cutting edges to become severe carrier recombination centers, significantly increasing the edge recombination rate and leakage current, directly resulting in a 0.1%-0.5% loss in cell conversion efficiency. Simultaneously, it reduces the mechanical strength and long-term reliability of the cell, hindering further improvements in the performance of TOPCon half-cell cells.

[0003] In existing technologies, passivation of the cut edges of crystalline silicon solar cells often employs single-layer alumina, single-layer silicon nitride, or single-layer amorphous silicon thin films. However, such single-layer passivation structures have significant drawbacks: First, they can only achieve single chemical passivation or field-effect passivation, failing to simultaneously repair lattice damage, saturated dangling bonds, and block external moisture erosion, resulting in limited passivation effectiveness. Second, the single-layer thin film has poor process compatibility with the tunneling oxide layer and polycrystalline silicon layer of the TOPCon solar cell body; high-temperature treatment easily damages the original passivation structure, while low-temperature deposition results in insufficient adhesion. Third, the single-layer thin film has weak anti-aging and anti-moisture permeation capabilities, leading to rapid degradation of passivation performance after long-term use, making it difficult to meet the long service life requirements of photovoltaic products. Summary of the Invention

[0004] This invention provides a passivation method for TOPCon batteries. By forming a stacked passivation structure of a first passivation layer, a second passivation layer, and a barrier layer sequentially on the cut surface, and by having the structure cover only the surface of the cut surface and not extend to the contact area of ​​the first and second electrodes, the method achieves the synergistic effect of interface tunneling, gradient hydrogen passivation, and field effect, significantly reducing carrier recombination on the laser-cut side. At the same time, the barrier layer effectively blocks water and oxygen erosion and resists UV decay, thus achieving efficient, stable, and reliable edge passivation.

[0005] This invention provides a passivation method for TOPCon batteries, comprising: Provides TOPCon cells; TOPCon cells include an N-type silicon substrate, the N-type silicon substrate includes opposing front and back sides; the front side includes a first electrode, and the back side includes a second electrode; Using a pre-defined cutting process, the TOPCon battery is cut at the reserved cutting position to form a TOPCon half-cell battery; A first passivation layer, a second passivation layer, and a barrier layer are sequentially formed on one side of the cut surface from the N-type silicon substrate outwards to obtain a stacked passivation structure; the edge of the stacked passivation structure has no contact with the first electrode and the second electrode; Low-temperature annealing was performed on TOPCon half-cell cells that form a stacked passivation structure.

[0006] Optionally, using a preset cutting process, cutting can be performed at the pre-reserved cutting position of the TOPCon battery, including: Using laser cutting technology, the TOPCon battery is cut at a pre-reserved cutting position under preset cutting conditions; the preset cutting conditions include a cutting power of 6W-10W and a cutting time of 0.3s-0.8s.

[0007] Optionally, a first passivation layer, a second passivation layer, and a barrier layer are sequentially formed on one side of the diced surface from the N-type silicon substrate outwards to obtain a stacked passivation structure, including: Using a first preset deposition process and under first preset conditions, a first passivation layer is deposited on the surface of the cut surface in the direction from the N-type silicon substrate outward. Using a second preset deposition process and under second preset conditions, a second passivation layer is deposited on the surface of the first passivation layer on the side away from the N-type silicon substrate; Using a third preset deposition process, under third preset conditions, a barrier layer is deposited on the surface of the second passivation layer on the side away from the N-type silicon substrate.

[0008] Optionally, the first preset conditions include introducing a mixture of silane and ammonia into the reaction chamber of the first preset deposition process, wherein the flow rate of silane is 1000 sccm / min-1500 sccm / min, the flow rate of ammonia is 3000 sccm / min-4000 sccm / min, the gas volume ratio of silane to ammonia is 1:2.5-1:4, the deposition temperature is 250℃-350℃, the deposition pressure is 120Pa-300Pa, and the radio frequency power is 15000W-20000W.

[0009] Optionally, the second preset conditions include introducing a mixture of silane, hydrogen, and argon into the reaction chamber of the second preset deposition process, with the argon flow rate at 2000 sccm / min-3000 sccm / min, the silane flow rate at 800 sccm / min-1200 sccm / min, the hydrogen flow rate linearly reduced from 2500 sccm / min-3000 sccm / min to 800 sccm / min-1200 sccm / min, the deposition temperature at 220℃-300℃, the deposition pressure at 150 Pa-300 Pa, and the radio frequency power at 14000 W-18000 W.

[0010] Optionally, the third preset conditions include introducing a mixture of silane, ammonia, and nitrous oxide into the reaction chamber of the third preset deposition process, with the silane flow rate being 1000 sccm / min-1400 sccm / min, the ammonia flow rate being 2000 sccm / min-3000 sccm / min, and the nitrous oxide flow rate being 4000 sccm / min-5000 sccm / min; the deposition time being 20 min-40 min; the deposition temperature being 250℃-350℃; the deposition pressure being 150 Pa-300 Pa; and the radio frequency power being 16000 W-21000 W.

[0011] Optionally, the first passivation layer includes a silicon nitride interface layer with a thickness of 5 nm-15 nm and a refractive index of 2.0-2.3; and / or, The second passivation layer includes a hydrogenated amorphous silicon passivation layer with a thickness of 15 nm-50 nm. The hydrogen content of the hydrogenated amorphous silicon passivation layer decreases linearly from the side closest to the first passivation layer to the side furthest from the first passivation layer. Specifically, the hydrogen content of the hydrogenated amorphous silicon passivation layer is 20 at.%-25 at.% on the side closest to the first passivation layer and 7 at.%-12 at.% on the side furthest from the first passivation layer; and / or, The barrier layer includes a silicon oxynitride barrier layer with a thickness of 11nm-28nm, a refractive index of 1.55-1.85, and a film density of ≥95%.

[0012] Optionally, before forming a first passivation layer, a second passivation layer, and a barrier layer sequentially on one side of the diced surface from the N-type silicon substrate outwards to obtain the stacked passivation structure, the method further includes: The cut surface is pretreated using plasma treatment technology under preset pretreatment conditions.

[0013] Optionally, the preset pretreatment conditions include a first hydrogen plasma activation condition and a second hydrogen plasma activation condition. The first hydrogen plasma activation condition includes an activation power of 520W-680W and an activation time of 16s-24s; the second hydrogen plasma activation condition includes an activation power of 320W-430W and an activation time of 11s-19s.

[0014] Optionally, the TOPCon half-cell cell forming the stacked passivation structure is subjected to low-temperature annealing, including: Under preset annealing conditions, the TOPCon half-cell cells forming the stacked passivation structure are subjected to low-temperature annealing. The preset annealing conditions include a first annealing condition, a second annealing condition, and a third annealing condition. The first annealing condition involves raising the annealing temperature to 200℃-250℃ at a heating rate of 5℃ / min-10℃ / min and holding it at that temperature for 5min-10min. The second annealing condition involves raising the annealing temperature to 280℃-320℃ at a heating rate of 3℃ / min-5℃ / min and holding it at that temperature for 10min-15min. The third annealing condition involves lowering the annealing temperature to room temperature at a cooling rate of 8℃ / min-12℃ / min. The total annealing time under the preset annealing conditions is 15min-60min.

[0015] The technical solution of this invention provides a TOPCon battery. The TOPCon battery includes an N-type silicon substrate, which has a front side and a back side. The front side includes a first electrode, and the back side includes a second electrode. A pre-defined cutting process is used to cut the TOPCon battery at a pre-reserved cutting position to form a TOPCon half-cell battery. A first passivation layer, a second passivation layer, and a barrier layer are sequentially formed on one side of the cut surface from the N-type silicon substrate outwards, resulting in a stacked passivation structure. The edge of the stacked passivation structure has no contact with the first and second electrodes. The TOPCon half-cell battery with the stacked passivation structure is then subjected to low-temperature annealing. Using the above method, by sequentially forming a stacked passivation structure of a first passivation layer, a second passivation layer, and a barrier layer on the cut surface, and ensuring that this structure only covers the cut surface and does not extend to the contact area between the first and second electrodes, the synergistic effect of interface tunneling, gradient hydrogen passivation, and field effect is achieved. This significantly reduces carrier recombination on the laser-cut side, while the barrier layer effectively blocks water and oxygen erosion and resists UV attenuation, achieving efficient, stable, and reliable edge passivation.

[0016] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a flowchart of a passivation method for a TOPCon battery provided in an embodiment of the present invention; Figure 2 A flowchart of another passivation method for TOPCon batteries provided in an embodiment of the present invention. Detailed Implementation

[0019] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0020] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0021] In one embodiment, Figure 1 This is a flowchart of a passivation method for a TOPCon battery provided by an embodiment of the present invention. This embodiment is applicable to situations where a stacked passivation structure is formed on the cut surface of a TOPCon half-cell battery, achieving a synergistic effect of interface tunneling, gradient hydrogen passivation, and field effect. This significantly reduces carrier recombination on the laser-cut side, while the barrier layer effectively blocks water and oxygen erosion and resists UV decay, achieving efficient, stable, and reliable edge passivation. Figure 1 As shown, the method includes: S110, equipped with TOPCon battery.

[0022] The TOPCon cell includes an N-type silicon substrate, which has a front side and a back side. The front side includes a first electrode, and the back side includes a second electrode.

[0023] The TOPCon cell is a tunnel oxide passivated contact solar cell. Its structure includes at least an N-type silicon substrate, a front first electrode, and a back second electrode to improve carrier selective collection and reduce recombination losses. The first and second electrodes have opposite polarities; when the first electrode is positive, the corresponding second electrode is negative, and vice versa. In this embodiment, in addition to the first and second electrodes, the front side of the N-type silicon substrate also includes a textured surface structure obtained through texturing, an emitter layer formed by boron diffusion, and a stacked passivation and antireflection layer of alumina and silicon nitride formed by deposition. The first electrode is in contact with the emitter layer. Similarly, the back side, in addition to the second electrode, includes a deposited ultrathin SiO2 tunnel oxide layer, a phosphorus-doped polycrystalline silicon layer, and a stacked passivation and antireflection layer of alumina and silicon nitride. The second electrode is in contact with the polycrystalline silicon layer.

[0024] S120. Using a pre-set cutting process, cut at the reserved cutting position of the TOPCon battery to form a TOPCon half-cell battery.

[0025] The pre-cutting process refers to the method of dividing a complete TOPCon solar cell into two or more half-cells / small cells using a controllable separation technique, based on pre-designed cutting positions (including but not limited to the cell's symmetry center or adjacent main busbars). Its core function is to achieve cell slicing without significantly damaging the original electrode structure, passivation film, and PN junction, thereby obtaining half-cells for high-efficiency modules. Pre-cutting reduces cell operating current, decreases internal series resistance losses, improves module hot spot resistance, and provides a controllable cross-sectional shape for subsequent passivation of the cut surface. Pre-cutting positions refer to pre-defined cutting line areas on the complete solar cell for subsequent slicing into half-cells. A TOPCon half-cell refers to a half-cell obtained by dividing a complete cell along the pre-cutting positions, used to reduce internal resistance and hot spot risk at the module level.

[0026] Specifically, this step essentially involves dividing the complete TOPCon cell in two along a pre-defined cutting position using mechanical or energy beam methods, resulting in two half-cells. In this embodiment, a cutting position is pre-defined at the central axis of the TOPCon cell during fabrication. This pre-defined cutting position can be 1.2 mm wide. After cutting at the pre-defined cutting position using a preset cutting process, both resulting TOPCon half-cells are complete cell structures without damaging the electrodes; that is, the distance between the electrodes and the cutting surface is 0.6 mm. Specific implementation methods of the preset cutting process include, but are not limited to: laser stealth cutting (applying external force to split the cell after internal modification), laser ablation cutting (directly removing material), mechanical scribing (diamond blade), or waterjet cutting. Damage to non-cut areas should be minimized during the cutting process, especially avoiding the detachment or edge melting of the first and second electrodes. The exposed cutting surface exhibits a fractured microstructure of the N-type silicon substrate, containing numerous dangling bonds and lattice defects, which require passivation in subsequent steps.

[0027] S130. A first passivation layer, a second passivation layer, and a barrier layer are sequentially formed on one side of the cut surface from the N-type silicon substrate outwards to obtain a stacked passivation structure.

[0028] The cut surface is the exposed cross-sectional area of ​​the silicon substrate after slicing, which originally lacks passivation protection and is prone to carrier recombination. The stacked passivation structure is a composite film formed on the cut surface by sequentially stacking a first passivation layer, a second passivation layer, and a barrier layer. The first passivation layer is adjacent to the N-type silicon substrate and is used for chemical passivation of dangling bonds, reducing the interface state density. The second passivation layer covers the first passivation layer, providing field-effect passivation or further chemical passivation, while also acting as an ion barrier or stress buffer. The barrier layer is located on the outermost layer and is used to prevent environmental factors such as water vapor, oxygen, and metallic impurities from eroding the inner passivation layer and the N-type silicon substrate. In addition, the edges of the stacked passivation structure do not contact the first and second electrodes, ensuring that the electrode current is not affected.

[0029] Specifically, this step essentially involves depositing three different functional material layers sequentially from the inside out on the cut surface to form a composite passivation barrier. A first passivation layer is formed on the cut surface in a direction extending outward from the N-type silicon substrate (i.e., the extension direction of the N-type silicon substrate). This first passivation layer directly contacts the side surface of the N-type silicon substrate. It can be grown using processes such as atomic layer deposition (ALD) or plasma-enhanced chemical vapor deposition (PECVD). The first passivation layer saturates silicon dangling bonds through chemical passivation and simultaneously acts as a transition layer to enhance the adhesion between the hydrogenated amorphous silicon layer and the silicon wafer. The first passivation layer can include, but is not limited to, alumina (Al2O3), ultrathin silicon oxide (SiOx), or silicon nitride (SiNx). After the first passivation layer is formed, a second passivation layer is formed on the surface of the first passivation layer facing away from the N-type silicon substrate. The second passivation layer can be formed using, but is not limited to, PECVD or sputtering deposition methods, to provide additional passivation and protect the first passivation layer. The second passivation layer can include, but is not limited to, silicon nitride (SiNx), aluminum oxide / silicon nitride stacks, or silicon carbide (SiCx). After the second passivation layer is formed, a barrier layer is formed on the surface of the second passivation layer facing away from the N-type silicon substrate. The barrier layer can be formed using, but is not limited to, PECVD, ALD, or vapor deposition methods to prevent environmental corrosion. The barrier layer can include dense silicon nitride, silicon oxide, or metal oxides (such as TiO2, HfO2). After the first passivation layer, the second passivation layer, and the barrier layer are formed, a stacked passivation structure is obtained. In this embodiment, the edge of the stacked passivation structure is controlled not to contact the first electrode and the second electrode during the deposition process. Of course, after deposition, the stacked passivation structure can also be made to be non-contact with the electrode by processes such as masking, selective deposition, or edge removal after deposition. The specific method can be determined according to the actual situation and is not limited here.

[0030] S140. Perform low-temperature annealing on the TOPCon half-cell that forms a stacked passivation structure.

[0031] Low-temperature annealing refers to heat treatment performed below the metallization sintering temperature of the battery (usually ≤350℃) to activate the passivation layer performance, repair cutting damage, and prevent electrode degradation.

[0032] Specifically, this step involves placing the half-cell with the deposited stacked passivation structure in an inert gas (such as nitrogen or argon) or a mixed gas containing trace amounts of hydrogen, and holding it at a temperature of 200°C to 350°C for several minutes to tens of minutes. The annealing process promotes the reconstruction of the interfacial bond between the first passivation layer and the N-type silicon substrate, enhancing the chemical passivation effect; simultaneously, it densifies the second passivation layer and the barrier layer, reducing pinhole defects. Furthermore, low-temperature annealing enhances the interfacial bonding between the passivation layers, further activating hydrogen atoms to repair lattice defects and optimizing the passivation effect. In this embodiment, the low-temperature annealing method can be, but is not limited to, tube furnaces, chain furnaces, rapid thermal annealing, or infrared heating, etc., and the specific method can be determined according to the actual situation, without limitation. After annealing, no additional etching or electrode repair steps are required, directly obtaining a half-cell ready for module packaging.

[0033] The technical solution of this invention provides a TOPCon battery. The TOPCon battery includes an N-type silicon substrate, which has a front side and a back side. The front side includes a first electrode, and the back side includes a second electrode. A pre-defined cutting process is used to cut the TOPCon battery at a pre-reserved cutting position to form a TOPCon half-cell battery. A first passivation layer, a second passivation layer, and a barrier layer are sequentially formed on one side of the cut surface from the N-type silicon substrate outwards, resulting in a stacked passivation structure. The edge of the stacked passivation structure has no contact with the first and second electrodes. The TOPCon half-cell battery with the stacked passivation structure is then subjected to low-temperature annealing. Using the above method, by sequentially forming a stacked passivation structure of a first passivation layer, a second passivation layer, and a barrier layer on the cut surface, and ensuring that this structure only covers the cut surface and does not extend to the contact area between the first and second electrodes, the synergistic effect of interface tunneling, gradient hydrogen passivation, and field effect is achieved. This significantly reduces carrier recombination on the laser-cut side, while the barrier layer effectively blocks water and oxygen erosion and resists UV attenuation, achieving efficient, stable, and reliable edge passivation.

[0034] Optionally, the first passivation layer includes a silicon nitride interface layer with a thickness of 5 nm-15 nm and a refractive index of 2.0-2.3; and / or, the second passivation layer includes a hydrogenated amorphous silicon passivation layer with a thickness of 15 nm-50 nm, wherein the hydrogen content of the hydrogenated amorphous silicon passivation layer decreases linearly from the side closer to the first passivation layer to the side farther from the first passivation layer, wherein the hydrogen content of the hydrogenated amorphous silicon passivation layer on the side closer to the first passivation layer is 20 at.%-25 at.%, and the hydrogen content of the hydrogenated amorphous silicon passivation layer on the side farther from the first passivation layer is 7 at.%-12 at.%; and / or, the barrier layer includes a silicon oxynitride barrier layer with a thickness of 11 nm-28 nm, a refractive index of 1.55-1.85, and a film density ≥95%.

[0035] The silicon nitride interface layer is a thin film made of silicon nitride material. As the first passivation layer, it directly contacts the diced surface of the N-type silicon substrate, providing chemical passivation and saturating the dangling bonds on the silicon substrate surface. Simultaneously, its fixed positive charge characteristic forms a field-effect passivation, repelling minority carriers (holes) and reducing the recombination rate at the diced surface. It also serves as an adhesion substrate for subsequent film layers. The hydrogenated amorphous silicon passivation layer is an amorphous silicon film containing hydrogen. As the second passivation layer, it covers the silicon nitride interface layer, providing excellent chemical passivation through the dangling bonds and defect states in the hydrogen-saturated silicon. In this embodiment, the hydrogen content of the hydrogenated amorphous silicon passivation layer exhibits a gradient distribution, allowing for the control of interfacial stress and carrier transport characteristics. The silicon oxynitride barrier layer is a dense thin film made of silicon oxynitride (SiON) material. As the outermost barrier layer, it physically isolates harmful environmental factors such as water vapor, oxygen, and metal ions, protecting the inner passivation structure. It also allows for adjustment of the optical refractive index, achieving an anti-reflection effect.

[0036] In this embodiment, the thickness of the silicon nitride interface layer is 5nm-15nm. For example, the thickness of the silicon nitride interface layer can be 5nm, 7nm, 8nm, 10nm, 12nm, 13nm or 15nm, etc., which can be determined according to the actual situation and are not limited here. Silicon nitride has a high fixed positive charge density and can form an accumulation layer on the cut surface of the N-type silicon substrate, effectively suppressing the surface recombination of electron-hole pairs. By setting the thickness of the silicon nitride interface layer, a continuous and dense passivation film can be formed without causing light absorption loss or film stress cracking due to excessive thickness.

[0037] Furthermore, the refractive index of the silicon nitride interface layer is 2.0-2.3. For example, the refractive index of the silicon nitride interface layer can be 2.0, 2.1, 2.2, or 2.3, etc., and can be determined according to the actual situation, without limitation. By setting the refractive index to 2.0-2.3, a silicon-to-nitrogen ratio in silicon nitride is moderate (between silicon richness and stoichiometry). This provides good passivation quality (silicon richness is beneficial for the field effect) and also forms a graded optical match with the refractive index of the subsequent second passivation layer and air, reducing light reflection loss at the cut surface. Therefore, this silicon nitride interface layer can achieve efficient chemical and field-effect dual passivation of the cut surface without sacrificing optical performance.

[0038] The thickness of the hydrogenated amorphous silicon passivation layer is 15nm-50nm, which ensures sufficient passivation depth to cover the microcracked area without excessively increasing the carrier transport path length. For example, the thickness of the hydrogenated amorphous silicon passivation layer can be 15nm, 20nm, 22nm, 25nm, 30nm, 35nm, 40nm, 45nm, or 50nm, etc., and can be determined according to the actual situation; no limitation is imposed here. Furthermore, the hydrogen content of the hydrogenated amorphous silicon passivation layer decreases linearly from the side closest to the first passivation layer to the side furthest from the first passivation layer. Specifically, the hydrogen content of the hydrogenated amorphous silicon passivation layer closest to the first passivation layer is 20 at.%-25 at.%, and the hydrogen content of the hydrogenated amorphous silicon passivation layer furthest from the first passivation layer is 7 at.%-12 at.%. For example, the hydrogen content of the hydrogenated amorphous silicon passivation layer closest to the first passivation layer can be 20 at.%, 22 at.%, 23 at.%, 24 at.%, or 25 at.%, etc., which can be determined according to the actual situation and is not limited here. The hydrogen content of the hydrogenated amorphous silicon passivation layer furthest from the first passivation layer can be 7 at.%, 8 at.%, 9 at.%, 10 at.%, 11 at.%, or 12 at.%, which can be determined according to the actual situation and is not limited here. With this configuration, hydrogen atoms in the hydrogenated amorphous silicon passivation layer can diffuse to the N-type silicon substrate interface, saturating and cutting the dangling bonds introduced by the damage, significantly reducing the interface state density. Maintaining a high hydrogen concentration of 20 at.%–25 at.% on the inner side provides ample hydrogen for interface passivation; while linearly decreasing to 7 at.%–12 at.% on the outer side avoids excessive hydrogen content on the surface, which could lead to photodegradation or film instability (such as hydrogen evolution forming bubbles). This linear gradient of hydrogen content establishes a gradually changing band structure within the film, which is beneficial for the extraction of photogenerated minority carriers, reduces recombination losses, and simultaneously provides both strong chemical passivation and field-effect passivation. This effectively repairs lattice microcracks and damaged layers caused by cutting, significantly reduces the recombination rate of edge carriers, and achieves a highly efficient, stable, and low-photo-attenuation passivation effect.

[0039] Furthermore, the thickness of the silicon oxynitride barrier layer is 11nm-28nm, the refractive index is 1.55-1.85, and the film density is ≥95%. For example, the thickness of the silicon oxynitride barrier layer can be 11nm, 13nm, 15nm, 20nm, 22nm, 25nm, or 28nm, etc., which can be determined according to the actual situation and is not limited here. The refractive index of the silicon oxynitride barrier layer is 1.55-1.85. For example, the refractive index can be 1.55, 1.6, 1.65, 1.7, 1.75, 1.8, or 1.85, etc., which can be determined according to the actual situation and is not limited here. In this embodiment, the silicon oxynitride barrier layer serves as an external barrier layer, combining the density of silicon nitride and the low-stress characteristics of silicon oxide. A film density of ≥95% means extremely low pinhole density, effectively blocking water vapor and metal ions such as sodium and copper, preventing environmental corrosion from causing inner layer passivation failure. Setting the thickness to 11nm-28nm represents the thinnest optimized range while ensuring blocking performance. Too thin a layer would introduce localized defects, while too thick a layer would increase deposition time and cost. Furthermore, setting the refractive index to 1.55-1.85 allows the silicon oxynitride (Si) barrier layer to act as an intermediate matching layer, further reducing light reflection at the cut surface, improving the cell's light utilization efficiency, enhancing field passivation, and improving overall structural stability. Therefore, this Si oxynitride barrier layer provides high-strength environmental protection while also providing optical anti-reflection functionality, extending the reliability lifespan of the half-cell in humid and hot environments.

[0040] In another specific embodiment, Figure 2 This is a flowchart of another passivation method for TOPCon batteries provided in an embodiment of the present invention. This embodiment refines the specific implementation of S120 in the above embodiment, which involves cutting at a pre-reserved cutting position of the TOPCon battery using a preset cutting process, as follows: Using laser cutting technology, the TOPCon battery is cut at a pre-reserved cutting position under preset cutting conditions; the preset cutting conditions include a cutting power of 6W-10W and a cutting time of 0.3s-0.8s.

[0041] Furthermore, for S130, a first passivation layer, a second passivation layer, and a barrier layer are sequentially formed on one side of the diced surface from the N-type silicon substrate outwards, resulting in a stacked passivation structure. The specific implementation method is refined as follows: Using a first preset deposition process and under first preset conditions, a first passivation layer is deposited on the surface of the cut surface in the direction from the N-type silicon substrate outward. Using a second preset deposition process and under second preset conditions, a second passivation layer is deposited on the surface of the first passivation layer on the side away from the N-type silicon substrate; Using a third preset deposition process, under third preset conditions, a barrier layer is deposited on the surface of the second passivation layer on the side away from the N-type silicon substrate.

[0042] Furthermore, before forming a first passivation layer, a second passivation layer, and a barrier layer sequentially on the diced surface from the N-type silicon substrate outward in step S130 to obtain the stacked passivation structure, the following steps are added: The cut surface is pretreated using plasma treatment technology under preset pretreatment conditions.

[0043] Furthermore, the specific implementation method of low-temperature annealing for S140 and the TOPCon half-cell cell forming the stacked passivation structure is refined as follows: Under preset annealing conditions, the TOPCon half-cell cells forming the stacked passivation structure are subjected to low-temperature annealing. The preset annealing conditions include a first annealing condition, a second annealing condition, and a third annealing condition. The first annealing condition involves raising the annealing temperature to 200℃-250℃ at a heating rate of 5℃ / min-10℃ / min and holding it at that temperature for 5min-10min. The second annealing condition involves raising the annealing temperature to 280℃-320℃ at a heating rate of 3℃ / min-5℃ / min and holding it at that temperature for 10min-15min. The third annealing condition involves lowering the annealing temperature to room temperature at a cooling rate of 8℃ / min-12℃ / min. The total annealing time under the preset annealing conditions is 15min-60min.

[0044] For details not covered in this embodiment, please refer to the above embodiments, which will not be repeated here.

[0045] refer to Figure 2 As shown, the method includes: S210, equipped with TOPCon battery.

[0046] S220. Using laser cutting technology, under preset cutting conditions, the TOPCon battery is cut at the reserved cutting position.

[0047] The preset cutting conditions include a cutting power of 6W-10W and a cutting time of 0.3s-0.8s.

[0048] Among them, laser cutting is a method that uses a high-energy laser beam focused on the inside or surface of TOPCon solar cells to locally melt, vaporize or generate internal stress through photothermal effects, thereby achieving controllable separation.

[0049] Specifically, this step employs a non-destructive laser cutting process to separate the TOPCon cells into two identical halves. In this embodiment, under preset cutting conditions of 6W-10W cutting power and 0.3s-0.8s cutting time, the laser beam irradiates along the pre-defined cutting position. The silicon material absorbs the laser energy and rapidly heats to its melting or vaporization temperature, forming a narrow slit or internal stress layer. Subsequently, natural cooling or assisted cleaving separates the complete TOPCon cell along the pre-defined cutting line. By controlling the cutting precision during laser cutting, effective separation of the N-type silicon substrate is ensured without overheating that could lead to electrode melting or passivation film detachment. This avoids the formation of large-area molten reconstituted layers or microcracks at the cutting edges, preventing edge chipping and the formation of damaged cut surfaces. Simultaneously, it provides a good foundation for subsequent pretreatment and passivation deposition.

[0050] S230. Using plasma treatment technology, the cut surface is pretreated under preset pretreatment conditions.

[0051] Optionally, the preset pretreatment conditions include a first hydrogen plasma activation condition and a second hydrogen plasma activation condition. The first hydrogen plasma activation condition includes an activation power of 520W-680W and an activation time of 16s-24s; the second hydrogen plasma activation condition includes an activation power of 320W-430W and an activation time of 11s-19s.

[0052] Plasma treatment refers to a method of cleaning, activating, or modifying a material surface by bombarding it with active particles (ions, free radicals) in an ionized gas (plasma) or by causing a physicochemical reaction between the particles and the surface. The preset pretreatment conditions are combinations of process parameters set for the pretreatment of the cut surface; in this embodiment, they include a first hydrogen plasma activation condition and a second hydrogen plasma activation condition.

[0053] Specifically, due to the presence of oxide layers, organic contaminants, mechanical damage layers, and numerous dangling bonds on the cut surface of the N-type silicon substrate, direct deposition of a passivation layer would result in high interface state density and poor adhesion. Therefore, this step employs a two-stage hydrogen plasma activation treatment. First, the TOPCon battery is placed in a plasma device. Using plasma processing technology, under the first hydrogen plasma activation conditions of 520W-680W and 16s-24s, high-energy hydrogen ions and hydrogen radicals physically bombard and chemically reduce the cut surface, removing approximately 2nm-5nm of natural oxide layer and contaminants, while simultaneously reducing the roughness of the silicon surface and exposing a clean crystal structure. Subsequently, under the second hydrogen plasma activation conditions of 320W-430W and 11s-19s, the lower-energy hydrogen plasma chemically passivates the surface, allowing hydrogen atoms to diffuse into the silicon surface and saturate dangling bonds, forming stable Si-H bonds, thus initially repairing the dangling bonds. The difference in activation conditions between the two steps achieves the effect of "first high-power strong cleaning, then low-power soft passivation", avoiding the problems of over-etching the surface due to single high-power treatment or incomplete cleaning due to single low-power treatment.

[0054] S240. Using a first preset deposition process, under first preset conditions, a first passivation layer is deposited on the surface of the cut surface in the direction from the N-type silicon substrate outward.

[0055] Optionally, the first preset conditions include introducing a mixture of silane and ammonia into the reaction chamber of the first preset deposition process, wherein the flow rate of silane is 1000 sccm / min-1500 sccm / min, the flow rate of ammonia is 3000 sccm / min-4000 sccm / min, the gas volume ratio of silane to ammonia is 1:2.5-1:4, the deposition temperature is 250℃-350℃, the deposition pressure is 120Pa-300Pa, and the radio frequency power is 15000W-20000W.

[0056] Specifically, a first passivation layer is deposited on the clean cut surface activated by hydrogen plasma. In this embodiment, a first preset deposition process, preferably PECVD deposition process, is used to deposit the first passivation layer on the cut surface of an N-type silicon substrate. In other words, by placing the pretreated TOPCon half-cell battery in the reaction chamber of the first preset deposition process, a mixed gas of silane and ammonia is introduced into the reaction chamber at a volume ratio of 1:2.5-1:4, and the flow rate of silane is set to 1000 sccm / min-1500 sccm / min, and the flow rate of ammonia is set to 3000 sccm / min-4000 sccm / min. Under the first preset conditions of RF power of 15kW-20kW, deposition temperature of 250℃-350℃, and deposition pressure of 120Pa-300Pa, gas discharge is excited to generate active groups such as SiHx and NHx, which undergo a chemical reaction on the cut surface to form a SiNx thin film, i.e., the first passivation layer. By adjusting the flow rates of silane and ammonia, the silicon-to-nitrogen ratio in the film can be controlled, ensuring the refractive index falls within the range of 2.0-2.3, thus balancing field-effect passivation and optical matching. Temperature settings ensure a dense film and sufficient interfacial reaction without causing electrode oxidation or premature hydrogen escape. Pressure settings provide a suitable mean free path, beneficial for obtaining a uniform, low-stress film. This first passivation layer (i.e., the silicon nitride interface layer) directly covers the cut surface of the N-type silicon substrate, forming chemical bonds (Si-N bonds). Simultaneously, its fixed positive charge repels electrons in the N-type silicon substrate, effectively reducing the surface recombination rate of the cut surface.

[0057] S250. Using a second preset deposition process, under second preset conditions, a second passivation layer is deposited on the surface of the first passivation layer away from the N-type silicon substrate to form a second passivation layer.

[0058] Optionally, the second preset conditions include introducing a mixture of silane, hydrogen, and argon into the reaction chamber of the second preset deposition process, with the argon flow rate at 2000 sccm / min-3000 sccm / min, the silane flow rate at 800 sccm / min-1200 sccm / min, the hydrogen flow rate linearly reduced from 2500 sccm / min-3000 sccm / min to 800 sccm / min-1200 sccm / min, the deposition temperature at 220℃-300℃, the deposition pressure at 150 Pa-300 Pa, and the radio frequency power at 14000 W-18000 W.

[0059] Specifically, a hydrogenated amorphous silicon passivation layer is deposited on the first passivation layer as a second passivation layer. In this embodiment, a second preset deposition process, preferably PECVD deposition process, is used to deposit the second passivation layer on the side of the first passivation layer facing away from the N-type silicon substrate to form the second passivation layer. Specifically, maintaining a low-temperature environment within the PECVD equipment involves introducing a mixture of silane, hydrogen, and argon into the reaction chamber. The argon flow rate is 2000-3000 sccm / min to stabilize the plasma, the silane flow rate is controlled at 800-1200 sccm / min, and the hydrogen flow rate linearly decreases from 2500-3000 sccm / min to 800-1200 sccm / min during deposition. Under the second preset conditions of a deposition temperature of 220℃-300℃, a deposition pressure of 150Pa-300Pa, and an RF power of 14kW-18kW, amorphous growth and appropriate hydrogen doping efficiency are ensured, and sufficient silane decomposition capability is provided, ultimately forming the second passivation layer. This gradual flow rate variation results in a high hydrogen concentration in the initial deposition stage, with the hydrogen content in the second passivation layer reaching 20 at.%-25 at.%. As the hydrogen flow rate gradually decreases, the hydrogen content in the subsequently grown film layer decreases to 7 at.%-12 at.%, achieving a linear gradient decrease in hydrogen content from the inside to the outside of the second passivation layer. The significance of this gradient hydrogen content structure is that the high hydrogen concentration near the N-type silicon substrate can fully saturate interface defects, while the low hydrogen concentration away from the N-type silicon substrate reduces the risk of photodegradation and improves the stability of the film. Simultaneously, the formed second passivation layer itself possesses excellent chemical passivation capabilities, further covering potential pinhole defects in the silicon nitride layer, forming a synergistic effect of dual-layer passivation.

[0060] S260. Using the third preset deposition process, under the third preset conditions, a barrier layer is deposited on the surface of the second passivation layer away from the N-type silicon substrate to form a stacked passivation structure.

[0061] Optionally, the third preset conditions include introducing a mixture of silane, ammonia, and nitrous oxide into the reaction chamber of the third preset deposition process, with the silane flow rate being 1000 sccm / min-1400 sccm / min, the ammonia flow rate being 2000 sccm / min-3000 sccm / min, and the nitrous oxide flow rate being 4000 sccm / min-5000 sccm / min; the deposition time being 20 min-40 min; the deposition temperature being 250℃-350℃; the deposition pressure being 150 Pa-300 Pa; and the radio frequency power being 16000 W-21000 W.

[0062] Specifically, after forming the second passivation layer, silicon oxynitride is deposited as the outermost barrier layer on the surface of the second passivation layer facing away from the N-type silicon substrate. In this embodiment, a third preset deposition process, such as PECVD, is used to deposit the barrier layer on the surface of the second passivation layer facing away from the N-type silicon substrate. Specifically, by introducing a mixture of silane, ammonia, and nitrous oxide (laughing gas) into the reaction chamber of the third preset deposition process, and setting the flow rate of silane to 1000 sccm / min-1400 sccm / min, the flow rate of ammonia to 2000 sccm / min-3000 sccm / min, and the flow rate of nitrous oxide to 4000 sccm / min-5000 sccm / min, under the third preset conditions of deposition time of 20 min-40 min, deposition temperature of 250℃-350℃, deposition pressure of 150 Pa-300 Pa, and RF power of 16 kW-21 kW, the high flow rate of nitrous oxide provides sufficient oxygen atoms to form a Si-O-Si structure in the film, while ammonia provides nitrogen atoms to maintain certain silicon nitride properties, thereby obtaining a thin film with low stress, high density (≥95%), and adjustable refractive index (1.55-1.85). A deposition temperature of 250℃-350℃ and a pressure of 150Pa-300Pa ensure dense film growth and good matching with the underlying material. A radio frequency power of 16kW-21kW generates high-density plasma, promoting complete precursor dissociation and enhancing the ion bombardment effect, further improving film density. A deposition time of 20-40 minutes allows for precise thickness control between 11-28nm; too thin a layer results in insufficient barrier effect, while too thick a layer increases cost and may introduce internal stress. The aforementioned synergistic reaction generates a dense SiON barrier layer. This silicon oxynitride barrier layer acts as an environmental barrier, effectively blocking water vapor and metal ions such as sodium and copper. Simultaneously, its refractive index, between that of silicon and air, provides a certain degree of anti-reflection, protecting the long-term stability of the inner passivation structure during subsequent component encapsulation and outdoor use.

[0063] S270. Under preset annealing conditions, the TOPCon half-cell battery with the stacked passivation structure is subjected to low-temperature annealing.

[0064] The preset annealing conditions include a first annealing condition, a second annealing condition, and a third annealing condition. The first annealing condition involves raising the annealing temperature to 200℃-250℃ at a heating rate of 5℃ / min-10℃ / min and holding it at that temperature for 5min-10min. The second annealing condition involves raising the annealing temperature to 280℃-320℃ at a heating rate of 3℃ / min-5℃ / min and holding it at that temperature for 10min-15min. The third annealing condition involves lowering the annealing temperature to room temperature at a cooling rate of 8℃ / min-12℃ / min. The total annealing time under the preset annealing conditions is 15min-60min.

[0065] Specifically, the half-cell battery forming the stacked passivation structure is placed in an annealing furnace. Under preset annealing conditions—in this embodiment, the preset annealing conditions include a first annealing condition, a second annealing condition, and a third annealing condition—gradient low-temperature annealing is achieved to fully activate the passivation function of each film layer and repair residual damage introduced by cutting. That is, firstly, under the first annealing condition, the temperature in the annealing furnace is raised from room temperature to 200℃-250℃ at a rate of 5-10℃ / min and held for 5-10 minutes, so that the residual stress in the film layer is gradually released, and at the same time, some hydrogen atoms in the first passivation layer (SiNx) and the second passivation layer are driven to diffuse to the silicon cutting surface, initially saturating the interfacial dangling bonds. Subsequently, under the second annealing condition, the temperature in the annealing furnace is further increased to 280℃-320℃ at a slower rate (i.e., 3-5℃ / min) and held for 10-15 minutes. At this higher temperature, the hydrogen in the second passivation layer (i.e., the hydrogenated amorphous silicon passivation layer) is further activated and migrates to the interface between silicon and silicon nitride, completing the thorough passivation of deep-level defects within the dicing damage layer. Simultaneously, the fixed positive charge density in the SiNx interface layer is optimized by annealing, enhancing field-effect passivation. Furthermore, atomic rearrangement occurs at the interfaces between the three layers, resulting in tighter bonding and potentially further increasing the density of the barrier layer. Finally, under the third annealing condition, the temperature in the annealing furnace is reduced to room temperature at a rate of 8-12℃ / min to avoid excessive thermal stress that could lead to film cracking or silicon substrate warping. The total annealing time is controlled within 15-60 minutes, and the annealing temperature is consistently ≤350℃, far below the sintering temperature of the metallized electrodes (typically >700℃), thus preventing damage to the first and second electrodes. After this multi-stage annealing, the passivation effect of the stacked passivation structure reaches its optimal level, the recombination rate of the cut surface can be reduced to an extremely low level, and the open circuit voltage and fill factor of the half cell are significantly restored.

[0066] The technical solution of this invention utilizes laser cutting technology to cut at a pre-reserved cutting position on the TOPCon cell under preset cutting conditions; utilizes plasma treatment technology to pre-treat the cut surface under preset pre-treatment conditions; utilizes a first preset deposition process to deposit a first passivation layer on the surface of the cut surface in the direction outward from the N-type silicon substrate under the first preset conditions; utilizes a second preset deposition process to deposit a second passivation layer on the surface of the first passivation layer away from the N-type silicon substrate under the second preset conditions; utilizes a third preset deposition process to deposit a barrier layer on the surface of the second passivation layer away from the N-type silicon substrate under the third preset conditions; and performs low-temperature annealing on the TOPCon half-cell cell forming the stacked passivation structure under preset annealing conditions. Using the above method, through precise matching of laser cutting, two-stage hydrogen plasma pre-treatment, three-layer gradient deposition, and multi-stage low-temperature annealing, comprehensive passivation protection of the cut surface of the TOPCon half-cell cell is achieved, significantly reducing the recombination rate of the cut surface, improving the open-circuit voltage, fill factor, and long-term reliability of the half-cell cell, while avoiding electrode damage, making it suitable for large-scale production of high-efficiency photovoltaic modules.

[0067] In another specific embodiment, the passivation method for the TOPCon battery comprises the following steps: S1. Complete TOPCon cell fabrication: Select an N-type monocrystalline silicon wafer with a resistivity of 1.5 Ω·cm and a thickness of 140 μm, measuring 182 mm × 182 mm. The wafer is then texturized, a boron diffusion layer is deposited on the front side to form the emitter, a stacked passivation and antireflection layer of aluminum oxide and silicon nitride is deposited on the front side, and a metallization sintering is performed to prepare the first electrode. On the back side, a tunneling oxide layer with a thickness of 1.5 nm is prepared, a phosphorus-doped polycrystalline silicon layer is deposited, and a metallization sintering is performed to prepare the second electrode, thus obtaining a complete TOPCon cell.

[0068] S2. Half-cell processing: Using non-destructive laser cutting technology, the complete TOPCon cell is cut into two identical 182mm×91mm half-cell cells. During the cutting process, the cutting precision is controlled to avoid edge chipping and the formation of a cut surface with a damaged layer.

[0069] S3. Cut surface edge pretreatment: Place half of the cell into a plasma treatment device for two-stage hydrogen plasma activation: the first stage is treated at a high power of 600W for 20 seconds, and the second stage is treated at a low power of 380W for 15 seconds to remove oxide impurities and contaminants from the cut surface, repair dangling bonds in stages, activate the silicon surface, and introduce hydrogen atoms to initially repair dangling bonds.

[0070] S4. Deposition of the first passivation layer: Plasma-enhanced chemical vapor deposition (PECVD) is used to deposit the first passivation layer (i.e., silicon nitride interface layer) on the pre-treated cut surface. The deposition temperature is controlled at 300℃, the deposition pressure is 200Pa, and the RF power is 18000W. The gas source is a mixture of silane (SiH4) and ammonia (NH3), with a SiH4 flow rate of 1200sccm / min and an NH3 flow rate of 3600sccm / min, and a gas volume ratio of SiH4:NH3=1:3. The film thickness is monitored in real time during the deposition process to ensure that the final thickness of the first passivation layer is 10nm and the refractive index n=2.2.

[0071] S5. Second Passivation Layer Deposition: Maintaining the low-temperature environment within the PECVD equipment, a hydrogenated amorphous silicon passivation layer is deposited on the surface of the silicon nitride interface layer deposited in step S4. The deposition temperature is controlled at 260℃, the deposition pressure at 220Pa, and the RF power at 16000W. The gas source uses a mixture of SiH4, hydrogen (H2), and argon (Ar), with the Ar flow rate fixed at 2500 sccm / min, the SiH4 flow rate at 1000 sccm / min, and the H2 flow rate linearly reduced from 2800 sccm / min to 1000 sccm / min, achieving a linear gradient decrease in hydrogen content from the inside to the outside of the second passivation layer. The deposition time is 45 min, ensuring that the final second passivation layer has a thickness of 30 nm, with an inner layer hydrogen content of 22 at.% and an outer layer hydrogen content of 9 at.%.

[0072] S6. Barrier Layer Deposition: A dense silicon oxynitride barrier layer is deposited on the surface of the second passivation layer deposited in step S5 using PECVD process. The deposition temperature is controlled at 300℃, the deposition pressure is 220Pa, and the RF power is 18000W. The gas source is a mixture of SiH4, NH3, and nitrous oxide (N2O), with a SiH4 flow rate of 1200 sccm / min, an NH3 flow rate of 2500 sccm / min, and an N2O flow rate of 4500 sccm / min. The deposition time is 30 min to ensure that the final barrier layer has a film thickness of 20 nm, a refractive index n=1.7, and a film density ≥95%, forming a complete stacked passivation structure.

[0073] S7. Low-temperature annealing: The half-cell with the stacked passivation structure deposited in step S6 is placed in an annealing furnace for gradient low-temperature annealing. The annealing process is divided into three stages: the first stage is to heat from room temperature to 220℃ at a heating rate of 8℃ / min and hold for 8min; the second stage is to heat to 300℃ at a heating rate of 4℃ / min and hold for 12min; the third stage is to cool down to room temperature at a cooling rate of 10℃ / min. The total annealing temperature does not exceed 350℃ and the total annealing time is 30min. Annealing enhances the interfacial bonding between the passivation layers, further activates hydrogen atoms to repair lattice defects, and optimizes the passivation effect.

[0074] Testing revealed that the N-type TOPCon half-cell prepared in this embodiment exhibited a reduction of over 92% in the recombination rate at the cutting edge, a 0.28% increase in cell conversion efficiency, a tightly bonded and non-detached stacked passivation structure, and a film density of 96%. After a damp heat aging test (85℃, 85%RH, 1000h), the passivation performance degradation was ≤5%, meeting the requirements for long service life of photovoltaic products and making it suitable for the large-scale production of 182mm large-size half-cell cells.

[0075] In another specific embodiment, the passivation method for the TOPCon battery comprises the following steps: S1. Complete TOPCon cell fabrication: Select an N-type monocrystalline silicon wafer with a resistivity of 1.5 Ω·cm and a thickness of 130 μm, and process it sequentially through texturing, front boron diffusion to form the emitter, front deposition of a stacked passivation antireflection layer of alumina and silicon nitride, and metallization sintering to prepare the first electrode. On the back side, prepare a 1.2 nm thick tunneling oxide layer, deposit a phosphorus-doped polycrystalline silicon layer, and perform metallization sintering to prepare the second electrode to obtain a complete TOPCon cell.

[0076] S2. Half-cell processing: Using non-destructive laser cutting technology, the complete TOPCon cell is cut into two identical 210mm×105mm half-cells. During the cutting process, the cutting precision is controlled to avoid edge chipping and the formation of a cut surface with a damaged layer.

[0077] S3. Cut surface edge pretreatment: Place half of the cell into a plasma treatment device for two-stage hydrogen plasma activation: the first stage is treated at high power 580W for 18s, and the second stage is treated at low power 360W for 14s to remove oxide impurities and contaminants from the cut surface, repair dangling bonds in stages, activate the silicon surface, and introduce hydrogen atoms to initially repair dangling bonds.

[0078] S4. Deposition of the first passivation layer: Plasma-enhanced chemical vapor deposition (PECVD) was used to deposit the first passivation layer on the pre-treated cut surface. The deposition temperature was controlled at 280℃, the deposition pressure was 180Pa, and the radio frequency power was 17000W. The gas source was a mixture of silane (SiH4) and ammonia (NH3), with a SiH4 flow rate of 1100 sccm / min and an NH3 flow rate of 3300 sccm / min, and a gas volume ratio of SiH4:NH3 = 1:3. The film thickness was monitored in real time during the deposition process to ensure that the final thickness of the first passivation layer was 8nm and the refractive index n = 2.1.

[0079] S5. Second Passivation Layer Deposition: Maintaining the low-temperature environment within the PECVD equipment, a second passivation layer is deposited on the surface of the silicon nitride interface layer deposited in step S4. The deposition temperature is controlled at 250℃, the deposition pressure at 190Pa, and the RF power at 15000W. The gas source uses a mixture of SiH4, hydrogen (H2), and argon (Ar), with the Ar flow rate fixed at 2200 sccm / min, the SiH4 flow rate at 900 sccm / min, and the H2 flow rate linearly decreasing from 2600 sccm / min to 900 sccm / min, achieving a linear gradient decrease in hydrogen content from the inside to the outside of the second passivation layer. The deposition time is 40 min, ensuring that the final second passivation layer has a thickness of 25 nm, with an inner layer hydrogen content of 21 at.% and an outer layer hydrogen content of 8 at.%.

[0080] S6. Barrier Layer Deposition: A dense silicon oxynitride barrier layer is deposited on the surface of the second passivation layer deposited in step S5 using PECVD process. The deposition temperature is controlled at 280℃, the deposition pressure is 190Pa, and the RF power is 17000W. The gas source is a mixture of SiH4, NH3, and nitrous oxide (N2O), with a flow rate of 1100 sccm / min for SiH4, 2300 sccm / min for NH3, and 4200 sccm / min for N2O. The deposition time is 25 min to ensure that the final barrier layer has a thickness of 18 nm, a refractive index n=1.65, and a film density ≥95%, forming a complete stacked passivation structure.

[0081] S7. Low-temperature annealing: The half-cell with the stacked passivation structure deposited in step S6 is placed in an annealing furnace for gradient low-temperature annealing. The annealing process is divided into three stages: the first stage is to heat from room temperature to 210℃ at a heating rate of 7℃ / min and hold for 7min; the second stage is to heat to 290℃ at a heating rate of 3.5℃ / min and hold for 11min; the third stage is to cool down to room temperature at a cooling rate of 9℃ / min. The total annealing temperature does not exceed 350℃ and the total annealing time is 25min. Annealing enhances the interfacial bonding between the passivation layers, further activates hydrogen atoms to repair lattice defects, and optimizes the passivation effect.

[0082] Testing revealed that the N-type TOPCon half-cell battery prepared in this embodiment exhibited a reduction of over 91% in the recombination rate at the cutting edge, a 0.25% increase in battery conversion efficiency, a robust stacked passivation structure, a film density of 95.5%, and a passivation performance degradation of ≤4.5% after damp heat aging testing. This meets the mass production requirements for 210mm large-size half-cell and shingled batteries, demonstrating good process stability.

[0083] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0084] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A passivation method of a TOPCon cell, characterized by, include: Provides TOPCon batteries; The TOPCon cell includes an N-type silicon substrate, which has opposing front and back sides. The front side includes a first electrode, and the back side includes a second electrode; Using a pre-defined cutting process, the TOPCon battery is cut at a pre-reserved cutting position to form a TOPCon half-cell battery. A first passivation layer, a second passivation layer, and a barrier layer are sequentially formed on one side of the cut surface from the N-type silicon substrate outwards to obtain a stacked passivation structure; the edge of the stacked passivation structure has no contact with the first electrode and the second electrode; The TOPCon half-cell cell forming the stacked passivation structure is subjected to low-temperature annealing.

2. The passivation method according to claim 1, characterized in that, Using a pre-defined cutting process, cutting is performed at the reserved cutting position of the TOPCon battery, including: Using laser cutting technology, the TOPCon battery is cut at a pre-reserved cutting position under preset cutting conditions; the preset cutting conditions include a cutting power of 6W-10W and a cutting time of 0.3s-0.8s.

3. The passivation method according to claim 1, characterized in that, A first passivation layer, a second passivation layer, and a barrier layer are sequentially formed on one side of the cut surface from the N-type silicon substrate outwards to obtain a stacked passivation structure, including: Using a first preset deposition process and under first preset conditions, the first passivation layer is deposited on the surface of the cut surface in the direction outward from the N-type silicon substrate; Using a second preset deposition process and under second preset conditions, a second passivation layer is deposited on the surface of the first passivation layer facing away from the N-type silicon substrate to form the second passivation layer; Using a third preset deposition process, under third preset conditions, the barrier layer is deposited on the surface of the second passivation layer away from the N-type silicon substrate.

4. The passivation method according to claim 3, characterized in that, The first preset conditions include introducing a mixture of silane and ammonia into the reaction chamber of the first preset deposition process, with the silane flow rate being 1000 sccm / min-1500 sccm / min, the ammonia flow rate being 3000 sccm / min-4000 sccm / min, the silane to ammonia gas volume ratio being 1:2.5-1:4, the deposition temperature being 250℃-350℃, the deposition pressure being 120Pa-300Pa, and the radio frequency power being 15000W-20000W.

5. The passivation method according to claim 3, characterized in that, The second preset conditions include introducing a mixture of silane, hydrogen, and argon into the reaction chamber of the second preset deposition process. The flow rate of argon is 2000 sccm / min-3000 sccm / min, the flow rate of silane is 800 sccm / min-1200 sccm / min, the flow rate of hydrogen is linearly reduced from 2500 sccm / min-3000 sccm / min to 800 sccm / min-1200 sccm / min, the deposition temperature is 220℃-300℃, the deposition pressure is 150 Pa-300 Pa, and the radio frequency power is 14000 W-18000 W.

6. The passivation method according to claim 3, characterized in that, The third preset conditions include introducing a mixed gas of silane, ammonia, and nitrous oxide into the reaction chamber of the third preset deposition process, with the flow rate of silane being 1000 sccm / min-1400 sccm / min, the flow rate of ammonia being 2000 sccm / min-3000 sccm / min, and the flow rate of nitrous oxide being 4000 sccm / min-5000 sccm / min; the deposition time being 20 min-40 min; the deposition temperature being 250℃-350℃; the deposition pressure being 150 Pa-300 Pa; and the radio frequency power being 16000 W-21000 W.

7. The passivation method according to claim 1, characterized in that, The first passivation layer includes a silicon nitride interface layer, the thickness of which is 5 nm-15 nm and the refractive index is 2.0-2.3; and / or, The second passivation layer includes a hydrogenated amorphous silicon passivation layer with a thickness of 15 nm-50 nm. The hydrogen content of the hydrogenated amorphous silicon passivation layer decreases linearly from the side closest to the first passivation layer to the side furthest from the first passivation layer. Specifically, the hydrogen content of the hydrogenated amorphous silicon passivation layer is 20 at.%-25 at.% on the side closest to the first passivation layer and 7 at.%-12 at.% on the side furthest from the first passivation layer; and / or, The barrier layer includes a silicon oxynitride barrier layer with a thickness of 11 nm-28 nm, a refractive index of 1.55-1.85, and a film density of ≥95%.

8. The passivation method according to claim 1, characterized in that, Before forming a first passivation layer, a second passivation layer, and a barrier layer sequentially on one side of the cut surface from the N-type silicon substrate outwards to obtain the stacked passivation structure, the method further includes: The cut surface is pretreated using plasma processing technology under preset pretreatment conditions.

9. The passivation method according to claim 8, characterized in that, The preset pretreatment conditions include a first hydrogen plasma activation condition and a second hydrogen plasma activation condition. The first hydrogen plasma activation condition includes an activation power of 520W-680W and an activation time of 16s-24s. The second hydrogen plasma activation condition includes an activation power of 320W-430W and an activation time of 11s-19s.

10. The passivation method according to claim 1, characterized in that, The TOPCon half-cell cell forming the stacked passivation structure undergoes low-temperature annealing, including: Under preset annealing conditions, the TOPCon half-cell battery forming the stacked passivation structure is subjected to low-temperature annealing. The preset annealing conditions include a first annealing condition, a second annealing condition, and a third annealing condition. The first annealing condition involves raising the annealing temperature to 200℃-250℃ at a heating rate of 5℃ / min-10℃ / min and holding it at that temperature for 5min-10min. The second annealing condition involves raising the annealing temperature to 280℃-320℃ at a heating rate of 3℃ / min-5℃ / min and holding it at that temperature for 10min-15min. The third annealing condition involves lowering the annealing temperature to room temperature at a cooling rate of 8℃ / min-12℃ / min. The total annealing time under the preset annealing conditions is 15min-60min.

Images