High-speed pulse test system of transistor and signal integrity verification method

Abstract

The application provides a high-speed pulse test system and a signal integrity verification method for a transistor, comprising: a waveform generator configured to generate a high-speed pulse signal; a radio frequency probe module having an input end connected to the waveform generator and a probe end connected to a gate of a transistor to be tested, and configured to feed the high-speed pulse signal into the gate of the transistor to be tested; and a semiconductor parameter analyzer connected to a drain of the transistor to be tested, and configured to continuously apply a preset direct current bias to the drain of the transistor to be tested, and to monitor a drain current of the transistor to be tested. The technical scheme of the application associates a transient polarization process with a stable electrical state change, and realizes synchronous and accurate characterization of a dynamic switching behavior of a device under the action of a high-speed pulse and a static electrical performance.

Description

Technical Field

[0001] This invention relates to the field of transistor testing technology, and more specifically to a high-speed pulse testing system and signal integrity verification method for transistors. Background Technology

[0002] As semiconductor devices evolve towards higher speeds and lower power consumption, ferroelectric materials, with their ultrafast polarization switching and non-volatile storage properties, have shown significant potential in next-generation memory and logic devices. To characterize the dynamic response of ferroelectric thin-film transistors under ultrafast electrical excitation, it is necessary to apply high-speed pulses and simultaneously monitor changes in their electrical states.

[0003] Existing testing techniques face the following key challenges in achieving this goal: Traditional testing methods typically perform high-speed pulse excitation and static electrical measurements in a time-separated manner, failing to capture the correlation between transient polarization processes and steady-state conduction changes in real time and synchronously. Since the ferroelectric state may relax or shift after the pulse ends, time-separated testing methods struggle to accurately establish the causal relationship between the "excitation response," thus limiting in-depth research into the ultrafast switching mechanisms and non-volatile storage characteristics of devices. Summary of the Invention

[0004] The technical problem solved by this invention is to provide a high-speed pulse test system and signal integrity verification method for transistors, so as to solve the problem of time-division multiplexing of high-speed pulse excitation and static electrical measurement in the prior art.

[0005] To solve the above-mentioned technical problems, the present invention is achieved through the following technical solution: According to a first aspect of the present invention, a high-speed pulse testing system for transistors is provided, comprising: A waveform generator is used to generate high-intensity pulse signals; The radio frequency probe module has its input end connected to the waveform generator and its probe end connected to the gate of the transistor under test, and is used to feed the height pulse signal into the gate of the transistor under test. The semiconductor parameter analyzer is connected to the drain of the transistor under test (TUT) and is used to continuously apply a preset DC bias voltage to the drain of the TUT and to monitor the drain current of the TUT.

[0006] Optionally, the RF probe module includes: a probe, wherein a preset resistance matching network is provided near the probe end of the probe that connects to the gate of the transistor under test.

[0007] Optional, also includes: A power divider, connected to the output of the waveform generator, is used to split the high-speed pulse into two signals, one of which is fed into the gate of the transistor under test. An oscilloscope, connected to the power divider, is used to receive another signal from the power divider for real-time monitoring of the high-speed pulse signal.

[0008] Optionally, it also includes an amplifier connected between the waveform generator and the transistor under test.

[0009] Optionally, it also includes a signal integrity verification module for verifying the signal integrity of each device in the high-speed pulse test system.

[0010] Optionally, the cable in the high-speed pulse test system is a broadband coaxial cable with characteristic impedance matching.

[0011] Optionally, the transistor under test is a ferroelectric thin-film transistor.

[0012] Optionally, the high-speed pulse is a sub-nanosecond high-speed pulse.

[0013] According to a second aspect of the present invention, a method for verifying the signal integrity of a high-speed pulse test of a transistor is provided, which is a signal integrity verification method for a high-speed pulse test system as described in any of the above claims; The signal integrity verification method includes: The integrity of the waveform generator signal is verified. Specifically, the output of the waveform generator is directly connected to an oscilloscope via a test cable. The pulse width and amplitude of the waveform on the oscilloscope are observed to see if they match the parameter settings of the waveform generator. If they do, the signal integrity of the waveform generator is verified.

[0014] Optionally, when the high-speed pulse system includes a power divider, the signal integrity verification method further includes: verifying the signal integrity of the power divider. Specifically, the two outputs of the power divider are directly connected to an oscilloscope via test cables, and the pulse width of the waveform on the oscilloscope is observed to see if it has not widened and whether the amplitude conforms to the value calculated by the loss function of the power divider. If both are satisfied, the signal integrity of the power divider is verified.

[0015] Optionally, when the high-speed pulse test system includes an amplifier, the signal integrity verification method further includes: verifying the signal integrity of the amplifier. Specifically, the output of the amplifier is connected to an oscilloscope via a test cable, and the waveform on the oscilloscope is compared with the waveform on the oscilloscope before the amplifier is connected. The method observes whether the pulse width has not widened and whether the amplitude has increased. If both conditions are met, the signal integrity of the amplifier is verified.

[0016] The high-speed pulse test system and signal integrity verification method for transistors provided by this invention utilizes a semiconductor parameter analyzer to continuously apply a preset DC bias voltage to the drain of the device under test (DUT). This preset DC bias voltage enables the DUT to operate in an effective measurement state and serves as a probe signal, allowing the drain current to be continuously monitored by the semiconductor parameter analyzer. By comparing and analyzing the real-time changes in the channel current before, during, and after the pulse application, the non-volatile transition of the device's conductive state caused by the ultrafast switching of the ferroelectric dipole can be directly and sensitively extracted. This links the transient polarization process with the stable electrical state change, avoiding the timing mismatch and state drift problems caused by the time-division multiplexing of excitation and measurement in traditional testing. It achieves synchronous and accurate characterization of the device's dynamic switching behavior and static electrical performance under high-speed pulse action.

[0017] In an optional embodiment of the present invention, a preset resistance matching network is provided at the near-RF probe end of the RF probe, which realizes high-fidelity, reflection-free pulse transmission from the signal source to the wafer-level device under test input, thereby improving test accuracy.

[0018] In one optional embodiment of the present invention, a power divider splits the high-speed pulse signal into two paths. One path is fed into the gate of the transistor under test, and the other path is connected to an oscilloscope, which allows for real-time observation of the pulse waveform. This enables online calibration and anomaly diagnosis of the input signal while applying excitation.

[0019] In one optional embodiment of the present invention, the signal integrity of each device in the test system is verified step by step, ensuring that the high-speed pulse is free from distortion and ringing during transmission, thereby eliminating measurement artifacts introduced by the limitations of the test system itself. This provides a reliable hardware foundation for accurately characterizing the polarization switching behavior of the transistor under test on an ultrafast time scale, and further improves the test accuracy. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a schematic diagram of a high-speed pulse testing system for transistors according to an embodiment of the present invention; Figure 2 This is a schematic diagram of an radio frequency probe according to an embodiment of the present invention; Figure 3 This is a schematic diagram of a high-speed pulse testing system for transistors according to another embodiment of the present invention; Figure 4 This is a schematic diagram of a high-speed pulse testing system for transistors according to another embodiment of the present invention; Figure 5a This is a schematic diagram of signal integrity testing for a waveform generator according to an embodiment of the present invention; Figure 5b for Figure 5a The signal integrity test waveform diagram; Figure 6a This is a schematic diagram of signal integrity testing of a power divider according to an embodiment of the present invention; Figure 6b for Figure 6a The signal integrity test waveform diagram; Figure 7a This is a schematic diagram of the signal integrity test of an amplifier according to an embodiment of the present invention; Figure 7b for Figure 7a The signal integrity test waveform diagram; Explanation of reference numerals in the attached figures: 11-Waveform generator; 12-Semiconductor Parameter Analyzer; 13-RF probe module; 131-probe; 14 - Transistor under test; 15-Power divider; 16-Oscilloscope; 17-Amplifier. Detailed Implementation

[0022] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0023] In the description of this invention, it should be understood that the terms "upper part", "lower part", "upper end", "lower end", "lower surface", "upper surface", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention.

[0024] In the description of this invention, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature.

[0025] In the description of this invention, "a plurality of" means multiple, such as two, three, four, etc., unless otherwise explicitly specified.

[0026] In the description of this invention, unless otherwise explicitly specified and limited, the term "connection" and other such terms should be interpreted broadly. For example, it can refer to a fixed connection, a detachable connection, or an integral connection; it can refer to a mechanical connection, an electrical connection, or a connection that allows communication between the components; it can refer to a direct connection or an indirect connection through an intermediate medium; it can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0027] The technical solution of the present invention will be described in detail below with reference to specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0028] In one embodiment, a high-speed pulse testing system for transistors is provided; please refer to [reference needed]. Figure 1 It includes: waveform generator 11, semiconductor parameter analyzer 12, and radio frequency probe 13.

[0029] The waveform generator 11 generates a height pulse signal to feed into the gate of the transistor under test (TUT) 14. The semiconductor parameter analyzer 12 is connected to the drain of the TUT and continuously applies a preset DC bias voltage to the drain. This bias voltage can be a constant, small DC bias voltage (e.g., 100mV). This DC bias voltage allows the TUT to operate in an effective measurement state and also serves as a probe signal, enabling the semiconductor parameter analyzer to continuously monitor and record the drain current of the TUT. The input terminal of the RF probe module 13 is connected to the waveform generator 11, and the probe terminal is connected to the gate of the TUT 14 to feed the height pulse signal into the gate of the TUT.

[0030] In practice, the transistor under test can be a ferroelectric thin-film transistor.

[0031] In practice, the high-speed pulse signal can be a sub-nanosecond high-speed pulse signal.

[0032] Preferably, the RF probe module includes: probe 131, which can be multiple probes, one of which is used to connect to the gate of the transistor under test, and the other probes can be used to connect to the source and drain of the transistor under test, such as... Figure 2 The example shown uses two probes, but one probe can also be used. One probe has a preset resistance matching network near its probe end, which is used to connect to the gate of the transistor under test. In this embodiment, the preset resistance matching network is 50Ω as an example. Figure 1 , Figure 2 As shown. The above settings can solve the impedance mismatch problem in high-frequency scenarios, achieving low-loss and low-reflection signal transmission.

[0033] Preferably, the cable in the high-speed pulse test system can be a broadband coaxial cable with characteristic impedance matching.

[0034] In another embodiment, in such Figure 1 Based on the illustrated embodiment, the high-speed pulse test system may further include: a power divider 15 and an oscilloscope 16, such as Figure 3 As shown. The power divider 15 is connected to the output of the waveform generator 11 and is used to split the high-speed pulse into two signals. One signal is fed into the gate of the transistor under test 14, and the other signal is connected to the oscilloscope 16. The oscilloscope 16 monitors the high-speed pulse signal in real time and can realize online calibration and anomaly diagnosis of the input signal while the excitation is applied.

[0035] In another embodiment, the high-speed pulse testing system may further include: an amplifier 17, such as... Figure 4 As shown. Amplifier 17 is connected between waveform generator 11 and transistor 14 under test, and is used to amplify the amplitude of high-speed pulse signal.

[0036] In another embodiment, the high-speed pulse test system may further include: a signal integrity verification module, used to verify the signal integrity of each device in the high-speed pulse test system. Figure 4 Taking the system shown as an example, the signal integrity of waveform generator 11, power divider 15, and amplifier 17 can be verified, ensuring that the high-speed pulse is free from distortion and ringing during transmission, thereby eliminating measurement artifacts introduced by the limitations of the test system itself and further improving the measurement accuracy.

[0037] Specifically, the signal integrity verification of the waveform generator can be achieved through... Figure 5a The circuit shown is configured such that the output of waveform generator 11 is directly connected to the OSC of an oscilloscope via a test cable. The pulse width and amplitude of the waveform displayed on the oscilloscope are then observed to ensure they match the parameter settings of the waveform generator. Figure 5b As shown, if both the pulse width and amplitude are satisfied, the signal integrity of the waveform generator is verified.

[0038] Signal integrity verification of the power divider can be performed through Figure 6a The circuit shown is configured such that the two outputs of power divider 15 are directly connected to an oscilloscope OSC via test cables. The pulse width of the waveform on the oscilloscope is observed to ensure it does not widen and the amplitude matches the value calculated using the power divider's loss function. Figure 6b As shown, if both the pulse width and amplitude are satisfied, the signal integrity of the power divider is verified.

[0039] Signal integrity verification of amplifier 17 can be performed through Figure 7a The circuit shown is combined Figure 6a The circuit shown is operated by directly connecting the two outputs of the power divider after the amplifier to an oscilloscope, and displaying the waveforms on the oscilloscope (such as...) Figure 7b (as shown) and the waveform on the oscilloscope before the amplifier was added (as shown) Figure 6b Compare the pulse width (as shown in the image) with the amplitude to observe whether the pulse width has not widened and whether the amplitude has increased. If both the pulse width and amplitude are satisfied, the signal integrity of the amplifier is verified.

[0040] In one embodiment, a method for verifying the signal integrity of a transistor during high-speed pulse testing is also provided, which is a signal integrity verification method for the high-speed pulse testing system described in any of the above embodiments.

[0041] The signal integrity verification method includes: S11: Verify the integrity of the waveform generator's signal. Specifically, connect the waveform generator's output directly to an oscilloscope via a test cable, such as... Figure 5a As shown, observe whether the pulse width and amplitude of the waveform on the oscilloscope match the parameter settings of the waveform generator. Figure 5b As shown, if both the pulse width and amplitude are satisfied, the signal integrity of the waveform generator is verified.

[0042] In one embodiment, when the high-speed pulse test system includes a power divider, the signal integrity verification method further includes: S12: Verify the signal integrity of the power divider. Specifically, connect the two outputs of the power divider directly to an oscilloscope via test cables. Figure 6a As shown, observe whether the pulse width of the waveform on the oscilloscope has not widened, and whether the amplitude matches the value calculated by the loss function of the power divider. Figure 6b As shown, if both the pulse width and amplitude are satisfied, the signal integrity of the power divider is verified.

[0043] In one embodiment, when the high-speed pulse test system includes an amplifier, the signal integrity verification method further includes: S13: Verify the signal integrity of the amplifier. Specifically, connect the amplifier's output to an oscilloscope via a test cable, compare the waveform on the oscilloscope with the waveform on the oscilloscope before the amplifier was connected, and observe whether the pulse width has not widened and whether the amplitude has increased. If both the pulse width and amplitude are satisfied, the signal integrity of the amplifier is verified.

[0044] In practice, when verifying the signal integrity of an amplifier, this can be done by directly connecting the two outputs of the power divider following the amplifier to an oscilloscope, such as... Figure 7a As shown, its waveform is as follows Figure 7b As shown, this is the same as Figure 6b The waveforms shown can be compared and analyzed.

[0045] In other implementations, the amplifier output can be directly connected to the oscilloscope, which allows for... Figure 5b The waveforms shown are compared and analyzed.

[0046] In the description of this specification, the references to terms such as "an embodiment," "an example," "a specific implementation process," and "an example" indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0047] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A high-speed pulse testing system for transistors, characterized in that, include: A waveform generator is used to generate high-intensity pulse signals; The radio frequency probe module has its input end connected to the waveform generator and its probe end connected to the gate of the transistor under test, and is used to feed the height pulse signal into the gate of the transistor under test. The semiconductor parameter analyzer is connected to the drain of the transistor under test (TUT) and is used to continuously apply a preset DC bias voltage to the drain of the TUT and to monitor the drain current of the TUT.

2. The high-speed pulse testing system according to claim 1, characterized in that, The radio frequency probe module includes: a probe, and a preset resistance matching network is provided near the probe end of the probe that is connected to the gate of the transistor under test.

3. The high-speed pulse testing system according to claim 1, characterized in that, Also includes: A power divider, connected to the output of the waveform generator, is used to split the high-speed pulse into two signals, one of which is fed into the gate of the transistor under test. An oscilloscope, connected to the power divider, is used to receive another signal from the power divider for real-time monitoring of the high-speed pulse signal.

4. The high-speed pulse testing system according to claim 1, characterized in that, Also includes: An amplifier is connected between the waveform generator and the transistor under test.

5. The high-speed pulse testing system according to claim 1, characterized in that, Also includes: The signal integrity verification module is used to verify the signal integrity of each device in the high-speed pulse test system.

6. The high-speed pulse testing system according to any one of claims 1 to 5, characterized in that, The cable in the high-speed pulse test system is a broadband coaxial cable with characteristic impedance matching.

7. The high-speed pulse testing system according to any one of claims 1 to 5, characterized in that, The transistor under test is a ferroelectric thin-film transistor.

8. A method for verifying the integrity of a high-speed pulse test signal for a transistor, characterized in that, A signal integrity verification method for use in the high-speed pulse test system as described in any one of claims 1 to 7; The signal integrity verification method includes: The integrity of the waveform generator signal is verified. Specifically, the output of the waveform generator is directly connected to an oscilloscope via a test cable. The pulse width and amplitude of the waveform on the oscilloscope are observed to see if they match the parameter settings of the waveform generator. If they do, the signal integrity of the waveform generator is verified.

9. The high-speed pulse test signal integrity verification method according to claim 8, characterized in that, When the high-speed pulse system includes a power divider, the signal integrity verification method further includes: verifying the signal integrity of the power divider. Specifically, the two outputs of the power divider are directly connected to an oscilloscope through a test cable. The pulse width of the waveform on the oscilloscope is observed to see if it has not widened and whether the amplitude matches the value calculated by the loss function of the power divider. If both are satisfied, the signal integrity of the power divider is verified.

10. The high-speed pulse test signal integrity verification method according to claim 8 or 9, characterized in that, When the high-speed pulse test system includes an amplifier, the signal integrity verification method further includes: verifying the signal integrity of the amplifier. Specifically, the output of the amplifier is connected to an oscilloscope through a test cable, and the waveform on the oscilloscope is compared with the waveform on the oscilloscope before the amplifier is connected. The method observes whether the pulse width has not widened and whether the amplitude has increased. If both conditions are met, the signal integrity of the amplifier is verified.

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