Miller clamp double-pulse test circuit and equipment
By protecting the switching elements through the pulse circuit, optocoupler circuit, and protection circuit in the Miller clamp dual-pulse test circuit, the problem of transient high gate voltage caused by parasitic parameters in the prior art is solved, thereby improving the safety and cost-effectiveness of MOSFET/IGBT.
Patent Information
- Application Number
- CN202520155277.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-22
- Publication Date
- 2026-01-02
- Estimated Expiration
- 2035-01-22
AI Technical Summary
In the existing technology, Miller clamping circuits are difficult to effectively deal with the transient high gate voltage caused by parasitic parameters during the high-frequency switching process of MOSFETs/IGBTs, which poses a risk of device damage.
A Miller clamping dual-pulse test circuit is adopted, including a pulse circuit, an optocoupler circuit, a transistor, and a load resistor. The transistor's conduction protects the switching element from overvoltage damage. The optocoupler circuit amplifies the PWM signal and limits the current through the protection circuit. Overvoltage protection is achieved by combining the filter circuit with the PWM signal.
This improves the safety of the test circuit, reduces the risk of device damage, and lowers the testing cost.
Smart Images
Figure CN223758255U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of semiconductor power device testing, in particular to a Miller clamp double-pulse test circuit and equipment. BACKGROUND
[0002] The Miller clamp circuit is a circuit design used to protect MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) / IGBT (Insulated Gate Bipolar Transistor) from over-voltage and oscillation during switching, and it is mainly applied in power converters, inverters and other high-frequency switching applications to ensure the safe and reliable operation of MOSFET / IGBT.
[0003] During the switching of MOSFET / IGBT, especially in high-frequency applications, due to the existence of parasitic parameters (such as lead inductance, parasitic capacitance, etc.), voltage spikes and oscillations may occur, causing the delay of gate voltage change and the occurrence of Miller phenomenon.
[0004] The existing technology generally uses an RC discharge circuit to improve the Miller phenomenon of the gate, but the effect is often not good. When the MOS tube bears high voltage, due to the charging and discharging of the parasitic capacitance of its own drain-gate, the voltage will be coupled to the gate, and the existing technology is difficult to cope with the transient high voltage of the gate, and the device has a high risk of damage. CONTENT OF THE INVENTION
[0005] The purpose of the present application is to provide a Miller clamp double-pulse test circuit and equipment to solve the technical problem that the conventional double-pulse test circuit in the prior art is difficult to cope with the transient high voltage of the gate, and the device has a high risk of damage. The preferred technical solutions in many technical solutions provided by the present application can produce many technical effects, which are described in detail below.
[0006] To achieve the above-mentioned purpose, the present application provides the following technical solutions:
[0007] In a first aspect, the present application provides a Miller clamp double-pulse test circuit, comprising: a pulse circuit, an optocoupler circuit, a transistor Q2, a load resistor R7 and a switching element Q1; the pulse circuit is connected with an input end S1 of the optocoupler circuit, an output end S2 of the optocoupler circuit is connected with a first end of the switching element Q1, a second end of the switching element Q1 is connected with a power supply voltage VCC, and a third end of the switching element Q1 is connected with one end of the load resistor R7; an emitter of the transistor Q2 is connected with the first end of the switching element Q1, and a collector of the transistor Q2 is connected with the other end of the load resistor R7, wherein one end of the load resistor R7 is grounded, and when the voltage at the first end of the switching element Q1 is greater than a preset threshold value, the transistor Q2 is turned on to reduce the voltage at the first end of the switching element Q1 to ground potential.
[0008] In some embodiments, the pulse circuit comprises an MCU chip U1 and a resistor R3, one end of the resistor R3 is connected to the MCU chip U1, and the other end of the resistor R3 is connected to the input end S1 of the optocoupler circuit.
[0009] In some embodiments, the optocoupler circuit comprises an optocoupler U2, a capacitor C1 and a resistor R1; the first end of the optocoupler U2 is connected to the other end of the resistor R3 and one end of the capacitor C1, the other end of the capacitor C1 is connected to the second end of the optocoupler U2 and grounded, the third end of the optocoupler U2 is grounded, and the fourth end of the optocoupler U2 is connected to the first end of the switching element Q1 and one end of the resistor R1, wherein the other end of the resistor R1 is connected to the rated voltage.
[0010] In some embodiments, the Miller clamp double-pulse test circuit further comprises a protection circuit for limiting the current size, the input end S3 of the protection circuit is connected to the output end S2 of the optocoupler circuit, and the output end S4 of the protection circuit is connected to the first end of the switching element Q1.
[0011] In some embodiments, the protection circuit comprises a resistor R2, a resistor R4, a resistor R5 and a diode D2; one end of the resistor R2 is connected to the fourth end of the optocoupler U2, one end of the resistor R1, one end of the resistor R4 and one end of the resistor R5, the other end of the resistor R2 is connected to the cathode of the diode D2, the collector of the triode Q2 and the first end of the switching element Q1, wherein the other end of the resistor R4 is connected to the anode of the diode D2, and the other end of the resistor R5 is connected to the base of the triode Q2.
[0012] In some embodiments, the Miller clamp double-pulse test circuit further comprises a filter circuit, one end of the filter circuit is connected to the emitter of the triode Q2 and the first end of the switching element Q1, and the other end of the filter circuit is connected to the third end of the switching element Q1 and grounded.
[0013] In some embodiments, the filter circuit comprises a resistor R6 and a capacitor C3, one end of the resistor R6 is connected to one end of the capacitor C3, the emitter of the triode Q2 and the first end of the switching element Q1, and the other end of the resistor R6 is connected to one end of the load resistor R7, the other end of the capacitor C3 and the third end of the switching element Q1.
[0014] In some embodiments, the Miller clamp double-pulse test circuit further comprises a diode D1, an inductor L1 and a capacitor C2; the cathode of the diode D1, one end of the inductor L1 and one end of the capacitor C2 are connected with a power supply voltage VCC, the anode of the diode D1 and the other end of the inductor L1 are connected with the second end of the switching element Q1, and the other end of the capacitor C2 is connected with the other end of the load resistor R7 and grounded.
[0015] In some embodiments, the switching element Q1 is a MOS tube, the first end of the switching element Q1 is the gate of the MOS tube, the second end of the switching element Q1 is the drain of the MOS tube, and the third end of the switching element Q1 is the source of the MOS tube; or the switching element Q1 is an IGBT module, the first end of the switching element Q1 is the gate of the IGBT module, the second end of the switching element Q1 is the collector of the IGBT module, and the third end of the switching element Q1 is the emitter of the IGBT module.
[0016] In the second aspect, the application provides a Miller clamp double-pulse test device, which applies the Miller clamp double-pulse test circuit as described above.
[0017] The implementation of one of the technical solutions in the application has the following advantages or beneficial effects: in the application, the PWM signal generated by the pulse circuit is amplified by the optocoupler circuit and then acts on the switching element Q1, the emitter of the triode Q2 is connected with the first end of the switching element Q1, and the collector of the triode Q2 is connected with the third end of the switching element Q1 through the load resistor R7. In this case, if the voltage of the first end of the switching element Q1 is too high, the collector-emitter of the triode Q2 can be immediately turned on to pull down the voltage to the ground, thereby protecting the switching element Q1 from overvoltage damage and improving the safety of the test circuit while reducing the test cost. BRIEF DESCRIPTION OF DRAWINGS
[0018] In order to more clearly illustrate the technical solutions of the embodiments of the application, the following will briefly introduce the drawings needed to be used in the embodiment description. Obviously, the drawings in the following description are only some embodiments of the application, and other drawings can also be obtained by those skilled in the art without creative labor on the basis of these drawings. In the drawings:
[0019] Fig. 1 is a schematic diagram of the Miller clamp double-pulse test circuit of the embodiment of the application;
[0020] Fig. 2 is a schematic diagram of a current path of the Miller clamp double-pulse test circuit of the embodiment of the application;
[0021] Fig. 3 is a schematic diagram of another current path of the Miller clamp double-pulse test circuit of the embodiments of the present application. DETAILED DESCRIPTION
[0022] In order to make the objects, technical solutions and advantages of the present application clearer, the various exemplary embodiments to be described below will be described with reference to the corresponding drawings, which form part of the exemplary embodiments, and which describe various exemplary embodiments that can be used to implement the present application. The same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present disclosure. It should be understood that they are only examples of processes, methods and apparatuses, etc. consistent with some aspects of the present disclosure as detailed in the appended claims, and other implementations can be used, or structural and functional modifications can be made to the implementations listed herein, without departing from the scope and spirit of the present application.
[0023] In the description of the present application, it should be understood that the terms "center", "longitudinal", "transverse", etc. indicate the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the elements referred to must have a particular orientation, be constructed and operated in a particular orientation. The terms "first", "second", etc. are only for descriptive purposes and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. The term "a plurality of" means two or more. The terms "connected", "connected" should be interpreted broadly, for example, it can be fixed connection, detachable connection, integral connection, mechanical connection, electrical connection, communication connection, direct connection, indirect connection through intermediate medium, internal communication of two elements or interaction relationship between two elements. The term "and / or" includes any and all combinations of one or more related listed items. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.
[0024] In order to illustrate the technical solutions described in the present application, the following will be described by specific embodiments, only showing the parts related to the embodiments of the present application.
[0025] As shown in Figs. 1 to 3 The present application provides a Miller clamp double-pulse test circuit, which comprises a pulse circuit, an optocoupler circuit, a transistor Q2, a load resistor R7 and a switching element Q1.
[0026] In some embodiments, the pulse circuit can be connected with the input end S1 of the optocoupler circuit, the output end S2 of the optocoupler circuit can be connected with the first end of the switching element Q1, the second end of the switching element Q1 can be connected with the power supply voltage VCC, and the third end of the switching element Q1 can be connected with one end of the load resistor R7.
[0027] In some embodiments, the pulse circuit can generate a PWM signal and send the PWM signal to the optocoupler circuit. The optocoupler circuit can generate a driving signal according to the PWM signal from the pulse circuit and act on the first end of the switching element Q1.
[0028] In some embodiments, the emitter of the triode Q2 can be connected with the first end of the switching element Q1, the collector of the triode Q2 can be connected with the other end of the load resistor R7, and one end of the load resistor R7 can be grounded. When the voltage at the first end of the switching element Q1 is greater than a preset threshold value, the triode Q2 is turned on to reduce the voltage at the first end of the switching element Q1 to ground potential. The preset threshold value can be set according to the driving voltage at the first end of the switching element Q1.
[0029] In some embodiments, the switching element Q1 can be a MOS tube, the first end of the switching element Q1 can be the gate of the MOS tube, the second end of the switching element Q1 can be the drain of the MOS tube, and the third end of the switching element Q1 can be the source of the MOS tube; or the switching element Q1 can be an IGBT module, the first end of the switching element Q1 can be the gate of the IGBT module, the second end of the switching element Q1 can be the collector of the IGBT module, and the third end of the switching element Q1 can be the emitter of the IGBT module.
[0030] Specifically, during the double-pulse test, when the voltage fluctuates greatly, a short circuit phenomenon occurs, at this time, the Vds (drain-source voltage) of the MOS tube / the Vce (collector-emitter voltage) of the IGBT module rises rapidly, and the excessively high dv / dt (voltage change rate) charges the G pole of the MOS tube / IGBT module through the Miller capacitor. If no protection is performed, the G pole voltage will be too high and the MOS tube / IGBT module will be damaged. Therefore, the Miller clamp double-pulse test circuit of the present application can protect the G pole of the switching element Q1 during the double-pulse test, thereby reducing the damage of the switching element Q1.
[0031] In some embodiments, the pulse circuit can include an MCU chip U1 and a resistor R3. One end of the resistor R3 can be connected with the MCU chip U1, and the other end of the resistor R3 can be connected with the input end S1 of the optocoupler circuit.
[0032] In some embodiments, the optocoupler circuit can include an optocoupler U2, a capacitor C1 and a resistor R1. A first end of the optocoupler U2 can be connected to another end of the resistor R3 and one end of the capacitor C1, another end of the capacitor C1 can be connected to a second end of the optocoupler U2 and grounded, a third end of the optocoupler U2 can be grounded, and a fourth end of the optocoupler U2 can be connected to a first end of the switching element Q1 and one end of the resistor R1, wherein another end of the resistor R1 can be connected to a rated voltage. The rated voltage can be 10 volts.
[0033] In some embodiments, the optocoupler U2 can amplify the PWM signal to obtain a driving signal, and the driving signal can be output via the fourth end of the optocoupler U2. The driving voltage of the driving signal can be enhanced to 10 volts.
[0034] In some embodiments, the Miller clamp double-pulse test circuit can further include a protection circuit for limiting the current size. An input end S3 of the protection circuit can be connected to an output end S2 of the optocoupler circuit, and an output end S4 of the protection circuit can be connected to the first end of the switching element Q1. Specifically, the input end S3 of the protection circuit can be connected to one end of the resistor R1 and the fourth end of the optocoupler U2.
[0035] In some embodiments, the protection circuit can include a resistor R2, a resistor R4, a resistor R5 and a diode D2. One end of the resistor R2 can be connected to the fourth end of the optocoupler U2, one end of the resistor R1, one end of the resistor R4 and one end of the resistor R5, and another end of the resistor R2 can be connected to a cathode of the diode D2, a collector of a triode Q2 and the first end of the switching element Q1, wherein another end of the resistor R4 can be connected to an anode of the diode D2, and another end of the resistor R5 can be connected to a base of the triode Q2.
[0036] In some embodiments, the resistor R2, the resistor R4 and the diode D2 can be used to protect the switching element Q1. Specifically, when the driving signal causes the switching element Q1 to open, the on-resistance of the switching element Q1 can be R2R4 / (R2+R4), and when the switching element Q1 is off, the off-resistance of the switching element Q1 can be equal to R2. Accordingly, the resistor R5 can be used to protect the triode Q2. Thus, by setting the protection circuit, damage to the switching element Q1 and the triode Q2 can be effectively avoided, thereby improving the stability and reliability of the circuit.
[0037] In some embodiments, the Miller clamp double-pulse test circuit can further include a filter circuit, one end of the filter circuit can be connected to the emitter of the triode Q2 and the first end of the switching element Q1, and another end of the filter circuit can be connected to the third end of the switching element Q1 and grounded.
[0038] In some embodiments, the filter circuit can include a resistor R6 and a capacitor C3, one end of the resistor R6 can be connected with one end of the capacitor C3, the emitter of the transistor Q2 and the first end of the switching element Q1, and the other end of the resistor R6 can be connected with one end of the load resistor R7, the other end of the capacitor C3 and the third end of the switching element Q1. Thus, by setting the filter circuit, the switching element Q1 can be filtered and protected.
[0039] In some embodiments, the Miller clamp double-pulse test circuit can further include a diode D1, an inductor L1 and a capacitor C2. The cathode of the diode D1, one end of the inductor L1 and one end of the capacitor C2 can be connected with the power supply voltage VCC, the anode of the diode D1 and the other end of the inductor L1 can be connected with the second end of the switching element Q1, and the other end of the capacitor C2 can be connected with the other end of the load resistor R7 and grounded.
[0040] In some embodiments, when the power supply voltage VCC supplies power to the Miller clamp double-pulse test circuit, the current path of the supply current is as shown in Fig. 2 The supply current can start from the power supply voltage VCC, pass through the inductor L1 and the switching element Q1 to the ground terminal GND, and the switching element Q1 is turned on at this time.
[0041] In some embodiments, when the switching element Q1 is turned off, the current path of the drive current is as shown in Fig. 3 The supply current can pass through the transistor Q2 and the load resistor R7 to the ground terminal GND, and the transistor Q2 is turned on at this time.
[0042] In this application, when the power supply voltage VCC is too large due to external interference factors, the large voltage will be coupled to the first end of the switching element Q1, i.e. the gate, through the parasitic capacitance of the switching element Q1, causing the voltage at the first end of the switching element Q1 to increase. At this time, the emitter voltage of the transistor Q2 will be greater than the base voltage of the transistor Q2, causing the transistor Q2 to be turned on, and the voltage at the first end of the switching element Q1 will be immediately pulled to ground level. The voltage at the first end of the switching element Q1 is zero, which immediately turns off the switching element Q1, thereby protecting the switching element Q1 from being damaged by overvoltage.
[0043] In this application, the PWM signal generated by the pulse circuit is amplified by the optocoupler circuit and then acts on the switching element Q1. The emitter of the transistor Q2 is connected with the first end of the switching element Q1, and the collector of the transistor Q2 is connected with the third end of the switching element Q1 through the load resistor R7. In this case, if the voltage at the first end of the switching element Q1 is too high, the collector-emitter of the transistor Q2 can be immediately turned on to pull down the voltage to the ground, thereby protecting the switching element Q1 from being damaged by overvoltage, and further improving the safety of the test circuit while reducing the test cost.
[0044] The present application also relates to a Miller clamp double-pulse test device (not shown in the figure) which can apply the Miller clamp double-pulse test circuit as described above. The components of the Miller clamp double-pulse test circuit and the connection relationship thereof are as described above, and will not be described herein again.
[0045] The above only describes the preferred embodiments of the present application, and those skilled in the art know that various changes or equivalent replacements can be made to the features and embodiments without departing from the spirit and scope of the present application. In addition, the features and embodiments can be modified to adapt to specific conditions and materials under the guidance of the present application without departing from the spirit and scope of the present application. Therefore, the present application is not limited by the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of the present application are within the protection scope of the present application.
Claims
1. A Miller clamp double pulse test circuit characterized by, The pulse circuit, the optical coupling circuit, the transistor Q2, the load resistor R7 and the switching element Q1 are included. The pulse circuit is connected with the input end S1 of the optical coupling circuit, the output end S2 of the optical coupling circuit is connected with the first end of the switching element Q1, the second end of the switching element Q1 is connected with the power supply voltage VCC, and the third end of the switching element Q1 is connected with one end of the load resistor R7. The emitter of the transistor Q2 is connected with the first end of the switching element Q1, the collector of the transistor Q2 is connected with the other end of the load resistor R7, wherein one end of the load resistor R7 is grounded, and when the voltage of the first end of the switching element Q1 is greater than a preset threshold value, the transistor Q2 is turned on to reduce the voltage of the first end of the switching element Q1 to the ground potential. The pulse circuit includes the MCU chip U1 and the resistor R3, one end of the resistor R3 is connected with the MCU chip U1, and the other end of the resistor R3 is connected with the input end S1 of the optical coupling circuit.
2. The Miller clamp double pulse test circuit of claim 1, wherein, The optical coupling circuit includes the optical coupling U2, the capacitor C1 and the resistor R1, the first end of the optical coupling U2 is connected with the other end of the resistor R3 and one end of the capacitor C1, the other end of the capacitor C1 is connected with the second end of the optical coupling U2 and grounded, the third end of the optical coupling U2 is grounded, and the fourth end of the optical coupling U2 is connected with the first end of the switching element Q1 and one end of the resistor R1, wherein the other end of the resistor R1 is connected with the rated voltage.
3. The Miller clamp double pulse test circuit of claim 2, wherein, The Miller clamp double-pulse test circuit further includes a protection circuit for limiting the current size, the input end S3 of the protection circuit is connected with the output end S2 of the optical coupling circuit, and the output end S4 of the protection circuit is connected with the first end of the switching element Q1.
4. The Miller clamp double pulse test circuit of claim 3, wherein, The protection circuit includes the resistor R2, the resistor R4, the resistor R5 and the diode D2, one end of the resistor R2 is connected with the fourth end of the optical coupling U2, one end of the resistor R1, one end of the resistor R4 and one end of the resistor R5, the other end of the resistor R2 is connected with the cathode of the diode D2, the collector of the transistor Q2 and the first end of the switching element Q1, wherein the other end of the resistor R4 is connected with the anode of the diode D2, and the other end of the resistor R5 is connected with the base of the transistor Q2.
5. The Miller clamp double pulse test circuit of claim 4, wherein, The Miller clamp double-pulse test circuit further includes a filter circuit, one end of the filter circuit is connected with the emitter of the transistor Q2 and the first end of the switching element Q1, and the other end of the filter circuit is connected with the third end of the switching element Q1 and grounded.
6. The Miller clamp double pulse test circuit of claim 4, wherein, The filter circuit includes the resistor R6 and the capacitor C3, one end of the resistor R6 is connected with one end of the capacitor C3, the emitter of the transistor Q2 and the first end of the switching element Q1, and the other end of the resistor R6 is connected with one end of the load resistor R7, the other end of the capacitor C3 and the third end of the switching element Q1.
7. The Miller clamp double pulse test circuit of claim 6, wherein, 8. The Miller clamp double pulse test circuit of claim 1, wherein, The Miller clamp double-pulse test circuit further comprises a diode D1, an inductor L1 and a capacitor C2; the cathode of the diode D1, one end of the inductor L1 and one end of the capacitor C2 are connected with a power supply voltage VCC, the anode of the diode D1 and the other end of the inductor L1 are connected with the second end of the switch element Q1, and the other end of the capacitor C2 is connected with the other end of the load resistor R7 and grounded.
9. The Miller clamp double pulse test circuit of any of claims 1-8, wherein, The switch element Q1 is a MOS tube, the first end of the switch element Q1 is the gate of the MOS tube, the second end of the switch element Q1 is the drain of the MOS tube, and the third end of the switch element Q1 is the source of the MOS tube; or the switch element Q1 is an IGBT module, the first end of the switch element Q1 is the gate of the IGBT module, the second end of the switch element Q1 is the collector of the IGBT module, and the third end of the switch element Q1 is the emitter of the IGBT module.
10. A Miller clamp double pulse test apparatus characterized by, The Miller clamp double-pulse test circuit according to any one of claims 1-9.