Method, apparatus and system for testing semiconductor chips

Abstract

The application belongs to the chip testing technical field, and particularly relates to a semiconductor chip testing method, testing equipment and testing system. The testing method applied to finished product testing equipment comprises the following steps: in the case of performing finished product testing on the i-th semiconductor chip in the m-th detection batch, comparing and analyzing the i-th chip identification of the i-th semiconductor chip with the detected chip identification of the detected chip to obtain an analysis result; if the analysis result shows that the i-th chip identification does not exist in the detected chip identification, determining the matching result between the i-th chip identification and the wafer test file corresponding to the m-th detection batch uploaded by the wafer test equipment; determining whether to write the i-th chip identification into the finished product test file based on the matching result; and determining the finished product test result of the m-th detection batch based on the number of chip identifications in the finished product test file and the number of semiconductor chips in the m-th detection batch.

Description

Technical Field

[0001] This application belongs to the field of chip testing technology, and in particular relates to a testing method, testing equipment and testing system for semiconductor chips. Background Technology

[0002] In the semiconductor chip manufacturing process, wafer probing (CP) and final testing (FT) are two key steps to ensure product quality and reliability. As the complexity of integrated circuits increases, the requirements for error prevention, data traceability, and material management in the production process are becoming increasingly stringent.

[0003] However, in current chip testing technology, there is a lack of data interaction between wafer testing and finished product testing, which makes it difficult to accurately identify stacked and mixed components, thereby reducing the reliability of chip testing and resulting in high time costs for subsequent traceability. Summary of the Invention

[0004] In view of this, embodiments of this application provide a semiconductor chip testing method, testing equipment, and testing system to solve the problems of low reliability and high time cost of traceability in existing semiconductor chip testing methods.

[0005] A first aspect of this application provides a method for testing semiconductor chips, applied to a finished product testing device. The method includes: when performing finished product testing on an i-th semiconductor chip in an m-th testing batch, comparing and analyzing the i-th chip identifier of the i-th semiconductor chip with the detected chip identifiers of previously tested chips to obtain an analysis result, where m is an integer greater than 0 and i is an integer greater than 1; if the analysis result shows that the i-th chip identifier does not exist in the previously tested chip identifiers, determining a matching result between the i-th chip identifier and a wafer test file uploaded by the wafer testing device corresponding to the m-th testing batch; determining whether to write the i-th chip identifier into the finished product test file based on the matching result; and determining the finished product test result of the m-th testing batch based on the number of chip identifiers in the finished product test file and the number of semiconductor chips in the m-th testing batch.

[0006] According to an embodiment of this application, the semiconductor chip testing method further includes: if the analysis result shows that the detected chip identifier contains the i-th chip identifier, modifying the testing order of the i-th semiconductor chip to repeat the testing of the i-th semiconductor chip.

[0007] According to an embodiment of this application, the analysis results are obtained by comparing and analyzing the i-th chip identifier of the i-th semiconductor chip with the detected chip identifier of the detected chip, including: reading the (i-1)-th chip identifier from the storage medium of the finished product testing equipment, wherein the (i-1)-th chip identifier represents the detected chip identifier; and generating the analysis results based on the consistency between the (i-1)-th chip identifier and the i-th chip identifier.

[0008] According to an embodiment of this application, determining the matching result between the i-th chip identifier and the wafer test file uploaded by the wafer test equipment corresponding to the m-th test batch includes: transmitting the i-th chip identifier to a server, so that the server retrieves the i-th chip identifier in the wafer test file and generates a matching result; and obtaining the matching result from the server.

[0009] According to an embodiment of this application, determining whether to write the i-th chip identifier into the finished product test file based on the matching result includes: if the matching result shows that the i-th chip identifier exists in the wafer test file, determining whether the i-th chip identifier exists in the finished product test file; if the i-th chip identifier does not exist in the finished product test file, transmitting the i-th chip identifier to the server so that the server writes the i-th chip identifier into the finished product test file; if the i-th chip identifier exists in the finished product test file, not writing the i-th chip identifier into the finished product test file.

[0010] According to an embodiment of this application, the testing method further includes: if the matching result shows that the i-th chip identifier does not exist in the wafer test file, determining that the test result of the i-th semiconductor chip corresponding to the i-th chip identifier is a failure result.

[0011] According to an embodiment of this application, determining the finished product test result of the m-th test batch based on the number of chip identifiers in the finished product test file and the number of semiconductor chips in the m-th test batch includes: if the number of chip identifiers in the finished product test file is greater than or equal to the number of semiconductor chips in the m-th test batch, determining the finished product test result of the m-th test batch as a batch release result; if the number of chip identifiers in the finished product test file is less than the number of semiconductor chips in the m-th test batch, determining the finished product test result of the m-th test batch as a batch abnormal result.

[0012] A second aspect of this application provides a method for testing semiconductor chips, applied to a wafer testing equipment. The method includes: when performing wafer testing on an nth semiconductor chip in an mth testing batch, if the nth semiconductor chip is determined to be a good chip, generating an nth chip identifier for the nth semiconductor chip based on the obtained nth chip parameters, where m and n are both integers greater than 0; determining a verification result between the nth chip identifier and a wafer testing file corresponding to the mth testing batch uploaded in real time by the wafer testing equipment; determining whether to write the nth chip identifier into the wafer testing file based on the verification result; and determining the wafer testing result of the mth testing batch based on the number of chip identifiers in the wafer testing file and the number of semiconductor chips in the mth testing batch.

[0013] The wafer test file is used to determine the matching result between the i-th chip identifier of the i-th semiconductor chip and the wafer test file corresponding to the m-th inspection batch uploaded by the wafer test equipment when the finished product test equipment performs finished product testing on the i-th semiconductor chip in the m-th inspection batch. Based on the matching result, it is determined whether to write the i-th chip identifier into the finished product test file, and the finished product test result of the m-th inspection batch is determined based on the number of chip identifiers in the finished product test file and the number of semiconductor chips in the m-th inspection batch. The matching result is generated when the analysis result shows that the i-th chip identifier is not present in the detected chip identifiers. The analysis result is obtained by comparing and analyzing the i-th chip identifier of the i-th semiconductor chip with the detected chip identifiers of the detected chips.

[0014] A third aspect of this application provides a semiconductor chip testing apparatus applied to a finished product testing device. The apparatus includes: a comparison analysis module, configured to compare and analyze the i-th chip identifier of the i-th semiconductor chip with the detected chip identifier of the detected chip when performing finished product testing on the i-th semiconductor chip in the m-th testing batch, and obtain an analysis result, wherein m is an integer greater than 0 and i is an integer greater than 1; a matching determination module, configured to determine the matching result between the i-th chip identifier and the wafer test file uploaded by the wafer test device corresponding to the m-th testing batch if the analysis result shows that the detected chip identifier does not contain the i-th chip identifier; an identifier writing module, configured to determine whether to write the i-th chip identifier into the finished product test file based on the matching result; and a result determination module, configured to determine the finished product test result of the m-th testing batch based on the number of chip identifiers in the finished product test file and the number of semiconductor chips in the m-th testing batch.

[0015] A fourth aspect of this application provides a semiconductor chip testing apparatus applied to a wafer testing device. The apparatus includes: an identifier generation module, configured to generate an nth chip identifier for the nth semiconductor chip based on the obtained nth chip parameters of the nth semiconductor chip when performing wafer testing on the nth semiconductor chip in the mth testing batch, provided that the nth semiconductor chip is determined to be a good product; wherein m and n are both integers greater than 0; a verification determination module, configured to determine the verification result between the nth chip identifier and the wafer testing file corresponding to the mth testing batch uploaded in real time by the wafer testing device; an identifier writing module, configured to determine whether to write the nth chip identifier into the wafer testing file based on the verification result; and a test confirmation module, configured to determine the wafer testing result of the mth testing batch based on the number of chip identifiers in the wafer testing file and the number of semiconductor chips in the mth testing batch.

[0016] The wafer test file is used to determine the matching result between the i-th chip identifier of the i-th semiconductor chip and the wafer test file corresponding to the m-th inspection batch uploaded by the wafer test equipment when the finished product test equipment performs finished product testing on the i-th semiconductor chip in the m-th inspection batch. Based on the matching result, it is determined whether to write the i-th chip identifier into the finished product test file, and the finished product test result of the m-th inspection batch is determined based on the number of chip identifiers in the finished product test file and the number of semiconductor chips in the m-th inspection batch. The matching result is generated when the analysis result shows that the i-th chip identifier is not present in the detected chip identifiers. The analysis result is obtained by comparing and analyzing the i-th chip identifier of the i-th semiconductor chip with the detected chip identifiers of the detected chips.

[0017] A fifth aspect of this application provides a finished product testing device, including one or more first processors; and a memory for storing one or more computer programs, wherein the one or more first processors execute the one or more computer programs to implement the steps of a testing method for semiconductor chips applied to the finished product testing device.

[0018] A sixth aspect of this application provides a wafer testing apparatus, including one or more second processors; and a memory for storing one or more computer programs, wherein the one or more second processors execute the one or more computer programs to implement the steps of a testing method for semiconductor chips applied to the wafer testing apparatus.

[0019] A seventh aspect of this application provides a semiconductor chip testing system, including: a wafer testing device as described above; a finished product testing device as described above; and a server for storing wafer test files corresponding to the wafer testing device and finished product test files corresponding to the finished product testing device.

[0020] An eighth aspect of this application provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of any of the above-described semiconductor chip testing methods.

[0021] A ninth aspect of this application provides a computer program product, including a computer program that, when executed by a processor, implements the steps of any of the above-described semiconductor chip testing methods.

[0022] The beneficial effects of this application embodiment compared with the prior art are as follows: when performing finished product testing on semiconductor chips, the chip identifier is compared with the chip identifier that has been detected to achieve real-time stacking detection. After the stacking detection is passed, the chip identifier is determined to be written into the finished product test file based on the matching result between the chip identifier and the wafer test file uploaded by the wafer test equipment. This achieves real-time mixed identification, avoids chips from different testing batches being mixed for finished product testing, thereby improving the reliability of chip testing and reducing the time cost of later traceability. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 A flowchart illustrating a testing method for a semiconductor chip applied to a finished product testing equipment according to an embodiment of this application is shown; Figure 2 A flowchart illustrating a testing method for a semiconductor chip applied to a finished product testing device according to another embodiment of this application is shown; Figure 3 A flowchart illustrating a method for testing semiconductor chips applied to a wafer testing equipment according to an embodiment of this application is shown; Figure 4 A flowchart illustrating a method for testing semiconductor chips applied to a wafer testing apparatus according to another embodiment of this application is shown; Figure 5A structural block diagram of a testing apparatus for semiconductor chips applied to a finished product testing equipment according to an embodiment of this application is shown; Figure 6 A structural block diagram of a testing apparatus for semiconductor chips applied to a finished product testing equipment according to an embodiment of this application is shown; Figure 7 A block diagram of an electronic device suitable for implementing the above-described method according to an embodiment of this application is shown; Figure 8 A block diagram of a test system for a semiconductor chip according to an embodiment of this application is shown. Detailed Implementation

[0025] To make the inventive objectives, features, and advantages of this application more apparent and understandable, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the embodiments described below are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0026] It should be understood that, when used in this specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.

[0027] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the scope of the application. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0028] It should also be further understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0029] As used in this specification and the appended claims, the term "if" may be interpreted, depending on the context, as "when," "once," "in response to determination," or "in response to detection." Similarly, the phrase "if determined" or "if [the described condition or event] is detected" may be interpreted, depending on the context, as "once determined," "in response to determination," "once [the described condition or event] is detected," or "in response to detection of [the described condition or event]."

[0030] Furthermore, in the description of this application, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0031] During the FT testing phase, due to material loading or equipment malfunctions, "overlapping" (i.e., multiple chips placed in one testing station) or "mixing" (i.e., chips from other batches being mixed in) can easily occur. Traditional testing procedures typically cannot identify these anomalies in real time during testing, leading to low testing efficiency or the generation of erroneous data.

[0032] During the CP testing phase, if a communication anomaly occurs, different chips may be programmed with the same chip identifier, violating the principle of chip identifier uniqueness and leading to difficulties in product traceability.

[0033] Existing identification verification schemes typically separate the Process Control (CP) and Filtration Test (FT) stages. The CP stage is only responsible for programming and self-testing, while the FT stage usually only performs simple identification reading and limit / specification restrictions. It cannot confirm whether the chip is a good product tested in the CP stage, nor can it remove chips with duplicate identifications caused by anomalies in the CP stage.

[0034] Some complex chips have test logs that are enormous (tens to hundreds of gigabytes in size). When data tracing is required by parsing these logs, the sheer size of the files often makes parsing difficult and time-consuming.

[0035] In view of this, embodiments of this application provide a semiconductor chip testing method, testing equipment, and testing system to solve the problems of low reliability and high time cost of traceability in existing semiconductor chip testing methods.

[0036] In this embodiment, the chip identifier is compared with the detected chip identifier to achieve real-time stacking detection. After the stacking detection is passed, the chip identifier is written into the finished product test file based on the matching result between the chip identifier and the wafer test file uploaded by the wafer test equipment. This achieves real-time mixed component identification, avoids chips from different test batches being mixed for finished product testing, thereby improving the reliability of chip testing and reducing the time cost of later traceability.

[0037] Figure 1 A flowchart is shown of a testing method for a semiconductor chip applied to a finished product testing equipment according to an embodiment of this application.

[0038] Please see Figure 1 The testing method for semiconductor chips applied to finished product testing equipment in this application embodiment may include operations S101 to S104: In operation S101, when performing finished product testing on the i-th semiconductor chip in the m-th batch of inspection, the i-th chip identifier of the i-th semiconductor chip is compared and analyzed with the detected chip identifier of the inspected chip to obtain the analysis result, where m is an integer greater than 0 and i is an integer greater than 1.

[0039] In operation S102, if the analysis result shows that the detected chip identifier does not exist for the i-th chip identifier, determine the matching result between the i-th chip identifier and the wafer test file uploaded by the wafer test equipment corresponding to the m-th test batch.

[0040] In operation S103, based on the matching result, it is determined whether to write the i-th chip identifier into the finished product test file.

[0041] In operation S104, the finished product test result of the m-th test batch is determined based on the number of chip identifiers in the finished product test file and the number of semiconductor chips in the m-th test batch.

[0042] Final Test (FT) is the final testing process after the integrated circuit (IC) chip is packaged. It comprehensively tests the electrical parameters, logic functions, operating performance and environmental adaptability of the packaged chip. Combined with the unique chip identifier, it completes anti-duplicate verification, data recording and product sorting, screens out defective products, and retains test data for traceability. It is the last quality checkpoint before the chip leaves the factory.

[0043] Chip identification is a unique identifier used to distinguish and manage each chip. It is commonly divided into two categories: First, physical silkscreen markings, engraved on the chip package surface, include model number, batch number, place of origin, and production date, used for visual identification and batch traceability. Second, internal unique identifiers (UIDs), unique codes burned into the chip's storage area, read by the device during the testing phase, used for preventing duplicate testing, individual item tracking, data binding, and anomaly location. The combination of these two types of identifiers enables full lifecycle management of the chip. This embodiment uses a unique identifier as an example.

[0044] In the m-th batch of chips that are continuously processed and uniformly transferred according to the same production work order and under the same process conditions, when performing finished product testing on the i-th semiconductor chip, for example, after completing the last test item of the testing process for the i-th semiconductor chip, the list of tested chip identifiers stored in the memory or other storage media of the finished product testing equipment can be compared and analyzed with the i-th chip identifier of the i-th semiconductor chip to determine whether the i-th chip identifier exists in the list.

[0045] If the analysis results show that the i-th chip identifier is not present in the detected chip identifiers, it indicates that there is no risk of chip overlap. Then, based on the matching results between the i-th chip identifier and the wafer test file corresponding to the m-th detection batch uploaded by the wafer test equipment, it can be determined whether to write the i-th chip identifier into the finished product test file. The matching results reflect whether there is a risk of chip mixing. For example, if the matching results show that the i-th chip identifier is not present in the wafer test file, it indicates that semiconductor chips from other batches may be mixed in the m-th detection batch, and there is a risk of chip mixing.

[0046] After the m-th batch of testing is completed, the final product test result for the m-th batch is determined based on the number of chip identifiers in the final product test file and the number of semiconductor chips in the m-th batch. For example, if the two numbers are equal, the final product test result can be determined as a release result, indicating that there is no missing data in this final product test.

[0047] According to the embodiments of this application, when performing finished product testing on semiconductor chips, the chip identifier is compared with the chip identifier that has been detected to achieve real-time stacking detection. After the stacking detection is passed, the chip identifier is determined to be written into the finished product test file based on the matching result between the chip identifier and the wafer test file uploaded by the wafer test equipment. This achieves real-time mixed identification, avoids chips from different testing batches being mixed for finished product testing, thereby improving the reliability of chip testing and reducing the time cost of later traceability.

[0048] According to an embodiment of this application, the semiconductor chip testing method further includes: if the analysis result shows that the detected chip identifier contains the i-th chip identifier, the testing order of the i-th semiconductor chip is corrected so as to repeat the testing of the i-th semiconductor chip.

[0049] The analysis results indicate whether or not there is a risk of chip duplication, which refers to the repeated testing of the same chip. If the analysis results show that the i-th chip identifier is not present in the chip identifiers already tested, it means there is no risk of chip duplication, and the normal finished product testing process can proceed. If the i-th chip identifier is present, it means there is a risk of chip duplication. In this case, the i-th semiconductor chip can be placed in the last k positions of the entire testing batch for testing again, for example, it can be placed in the last 1 position of the entire testing batch.

[0050] It should be noted that the detected chip identifier can only be the most recent p detected semiconductor chips, such as the first 3. The specific value can be set based on actual needs. The reasons for the aforementioned chip stacking are varied. One possibility is that after a semiconductor chip is detected, the robotic arm fails to promptly pick it up and place it in the storage area, causing the chip to be detected again.

[0051] According to the embodiments of this application, the analysis results of the i-th chip identifier and the detected chip identifier effectively improve the accuracy of identifying stacking anomalies. Furthermore, by correcting the test order of semiconductor chips when stacking anomalies occur, the inconsistency between the final number of chips tested and the number of chips in the detection batch caused by stacking anomalies can be avoided.

[0052] According to an embodiment of this application, the i-th chip identifier of the i-th semiconductor chip is compared and analyzed with the detected chip identifier of the tested chip to obtain the analysis result, including: reading the (i-1)-th chip identifier from the storage medium of the finished product testing equipment, wherein the (i-1)-th chip identifier represents the detected chip identifier; and generating the analysis result based on the consistency between the (i-1)-th chip identifier and the i-th chip identifier.

[0053] The storage medium can refer to the memory or hard disk of the finished product testing equipment. This embodiment uses memory as an example.

[0054] In one specific embodiment, when performing stacking detection on the i-th semiconductor chip, the chip identifier of the previous finished product detection, i.e., the (i-1)-th chip identifier, can be read from memory. It is then determined whether the (i-1)-th chip identifier is consistent with the i-th chip identifier of the i-th semiconductor chip. If they are consistent, it indicates that there is a stacking risk, and an analysis result indicating the existence of a stacking risk can be generated. If they are inconsistent, an analysis result indicating that there is no stacking risk can be generated.

[0055] According to the embodiments of this application, by performing consistency analysis on the chip identifier and the chip identifier of the previous test, the risk of chip stacking can be avoided, and the chip that has stacked cannot be tested after the sequence is corrected. This effectively improves the reliability of the test and reduces the time cost of subsequent traceability.

[0056] According to an embodiment of this application, determining the matching result between the i-th chip identifier and the wafer test file uploaded by the wafer test equipment corresponding to the m-th test batch includes: transmitting the i-th chip identifier to the server so that the server retrieves the i-th chip identifier in the wafer test file and generates a matching result; and obtaining the matching result from the server.

[0057] The server stores wafer test files uploaded by wafer testing equipment for each testing batch, as well as finished product test files uploaded by finished product testing equipment. The format of the test files can be specifically set according to actual needs; for example, wafer test files are displayed as CP.txt, and finished product test files are displayed as FT.txt. The file names can also include identifiers for the testing batches.

[0058] For each semiconductor chip, during the final product testing process, the i-th chip identifier of the i-th semiconductor chip being tested needs to be uploaded to the server. After receiving the i-th chip identifier, the server can search for and match it in the wafer test files of the m-th batch of testing, thereby generating the corresponding matching result. The server then sends the matching result to the final product testing equipment.

[0059] In an alternative embodiment, before performing finished product testing on the m-th batch of tests, the finished product testing equipment can obtain the wafer test file corresponding to the m-th batch of tests from the server or the wafer testing equipment, thereby completing the lookup and matching between the i-th chip identifier and the wafer test file in the finished product testing equipment. This method can avoid the problem of reduced finished product testing efficiency due to changes in network status.

[0060] According to an embodiment of this application, by transmitting the currently detected i-th chip identifier to the server to retrieve the i-th chip identifier in the wafer test file, the risk of mixed materials can be accurately identified, breaking down the data silos between the finished product test equipment and the wafer test equipment. Through the collaboration between the two, abnormal detection conditions can be further eliminated, ensuring the accuracy of the data.

[0061] According to an embodiment of this application, determining whether to write the i-th chip identifier into the finished product test file based on the matching result includes: if the matching result shows that the i-th chip identifier exists in the wafer test file, determining whether the i-th chip identifier exists in the finished product test file; if the i-th chip identifier does not exist in the finished product test file, transmitting the i-th chip identifier to the server so that the server writes the i-th chip identifier into the finished product test file; if the i-th chip identifier exists in the finished product test file, not writing the i-th chip identifier into the finished product test file.

[0062] In one specific embodiment, if the matching result shows that the i-th chip identifier exists in the wafer test file, it indicates that the source of the i-th semiconductor chip is legitimate. At this point, it is necessary to determine whether the i-th chip identifier has already been written into the finished product test file. If it is determined that the i-th chip identifier does not exist in the finished product test file, the i-th chip identifier can be transmitted to the server so that the server writes the i-th chip identifier into the finished product test file. If it is determined that the i-th chip identifier exists in the finished product test file, it is not written again to prevent inflated data from being caused by retesting of good products.

[0063] According to an embodiment of this application, the semiconductor chip testing method further includes: if the matching result shows that the i-th chip identifier does not exist in the wafer test file, determining that the test result of the i-th semiconductor chip corresponding to the i-th chip identifier is a failure result.

[0064] In one specific embodiment, if the matching result between the i-th chip identifier and the wafer test file shows that the i-th chip identifier does not exist in the wafer test file, it indicates that the i-th semiconductor chip may not belong to the m-th inspection batch, or that the i-th semiconductor chip was missed during wafer testing. In this case, the i-th semiconductor chip can be directly classified as a defective product, i.e., a failure result, and an alarm message can be issued to the staff for reminder.

[0065] According to the embodiments of this application, if there is no chip identifier in the wafer test file, the chip is directly identified as a failed test result. This can avoid the problem of difficulty in later traceability caused by chips from illegal sources or other test batches being written into the finished product test file.

[0066] According to an embodiment of this application, determining the finished product test result of the m-th test batch based on the number of chip identifiers in the finished product test file and the number of semiconductor chips in the m-th test batch includes: if the number of chip identifiers in the finished product test file is greater than or equal to the number of semiconductor chips in the m-th test batch, determining the finished product test result of the m-th test batch as a batch release result; if the number of chip identifiers in the finished product test file is less than the number of semiconductor chips in the m-th test batch, determining the finished product test result of the m-th test batch as a batch abnormal result.

[0067] The number of semiconductor chips in the m-th batch of inspection can be obtained from the Manufacturing Execution System (MES).

[0068] After all semiconductor chips in the entire batch have been tested, the final product test result for the m-th batch can be determined based on the number of chip identifiers in the final product test file and the number of semiconductor chips in the m-th batch. For example, if the number of chip identifiers in the final product test file is greater than or equal to the number of semiconductor chips in the m-th batch, this indicates a discrepancy between the number of chips provided by the manufacturing execution system and the actual number of chips tested. This discrepancy may be due to chip loss during testing, which is permissible in actual testing. Therefore, the final product test result for the m-th batch is determined as the batch release result.

[0069] If the number of chip identifiers in the finished product test file is less than the number of semiconductor chips in the m-th test batch, it indicates that data loss has occurred during the testing process, which is not allowed. Therefore, the finished product test result of the m-th test batch can be determined as an abnormal batch result.

[0070] Figure 2 A flowchart is shown of a testing method for a semiconductor chip applied to a finished product testing device according to another embodiment of this application.

[0071] like Figure 2 As shown, in the process of performing finished product testing on a semiconductor chip IC, the UID (i.e., chip identifier) ​​of the previous chip at the same workstation (i.e., finished product testing equipment) is compared. If the two are the same, the chip can be directly determined to be defective (FAIL), and an error can be reported to the staff through a pop-up window, while preventing them from continuing the test.

[0072] If the two are different, it can be determined whether the current chip's UID exists in the CP.txt (i.e., wafer test file) uploaded by the wafer testing equipment. If it does not exist, the chip can be determined to be defective. If it exists, it can be determined whether the current chip's UID exists in the finished product test document FT.txt. If it exists, the next chip in the same test batch can be tested. If it does not exist, the current chip's UID can be written into FT.txt.

[0073] After all the IC chips in the current batch have completed the finished product test, the number of UIDs in FT.txt can be parsed by MES. If the number of UIDs in FT.txt is greater than or equal to the number of physical chips (i.e. the number of chips in the batch), the finished product test result of the batch can be determined as the batch release result, i.e., Release in the figure; otherwise, the batch is blocked (held) (Lot).

[0074] Figure 3 A flowchart illustrating a testing method for semiconductor chips applied to a wafer testing equipment according to an embodiment of this application is shown.

[0075] like Figure 3 As shown, the testing method for semiconductor chips applied to wafer testing equipment includes operations S301 to S304: In operation S301, when performing wafer testing on the nth semiconductor chip in the mth batch of inspection, if the nth semiconductor chip is determined to be a good product, the nth chip identifier of the nth semiconductor chip is generated based on the obtained nth chip parameters, where m and n are both integers greater than 0.

[0076] In operation S302, the verification result between the nth chip identifier and the wafer test file corresponding to the mth inspection batch uploaded in real time by the wafer test equipment is determined.

[0077] In operation S303, the determination is made based on the calibration results whether to write the nth chip identifier into the wafer test file.

[0078] In operation S304, the wafer test result of the m-th test batch is determined based on the number of chip identifiers in the wafer test file and the number of semiconductor chips in the m-th test batch.

[0079] Chip parameters can refer to information that reflects the type of semiconductor chip, such as the chip's batch number, wafer identification number (Wafer ID), and X / Y coordinates.

[0080] In the last test item of the wafer probing (CP) test process, when the semiconductor chip is determined to be good (Pass), the wafer probing equipment captures the chip parameters of the semiconductor chip, and then combines them to generate a unique chip identifier.

[0081] The wafer testing equipment locally reads the wafer test file under the shared path of the server, or the server uploads the nth chip identifier of the nth semiconductor chip based on the wafer testing equipment, and determines the verification result between the nth chip identifier and the wafer test file corresponding to the mth test batch, so as to determine whether the nth chip identifier exists in the wafer test file.

[0082] If the calibration results show that the nth chip identifier exists in the wafer test file, it can be determined that the semiconductor chip has an anomaly of repeated testing or chip identifier conflict. In this case, the semiconductor chip can be directly judged as defective (Fail). If the calibration results show that the nth chip identifier does not exist in the wafer test file, the nth chip identifier can be written into the wafer test file.

[0083] After all semiconductor chips in the m-th batch have completed CP testing, the wafer test results for the m-th batch can be determined based on the number of chip identifiers in the wafer test file and the number of semiconductor chips in the m-th batch.

[0084] In some embodiments, if the number of chip identifiers recorded in the wafer test file is consistent with the number of semiconductor chips in the m-th test batch, the wafer test result of the m-th test batch can be determined as the batch release result; if they are inconsistent, the wafer test result of the m-th test batch is the batch interception result, indicating that there is an anomaly in the test batch.

[0085] In the above embodiments, the wafer test file is used to determine the matching result between the i-th chip identifier of the i-th semiconductor chip and the wafer test file corresponding to the m-th inspection batch uploaded by the wafer test equipment when the finished product test equipment performs finished product testing on the i-th semiconductor chip in the m-th inspection batch. Based on the matching result, it is determined whether to write the i-th chip identifier into the finished product test file, and the finished product test result of the m-th inspection batch is determined based on the number of chip identifiers in the finished product test file and the number of semiconductor chips in the m-th inspection batch. The matching result is generated when the analysis result shows that the i-th chip identifier of the detected chip identifier does not exist. The analysis result is obtained by comparing and analyzing the i-th chip identifier of the i-th semiconductor chip with the detected chip identifier of the detected chip.

[0086] According to the embodiments of this application, when performing finished product testing on semiconductor chips, the chip identifier is compared with the chip identifier that has been detected to achieve real-time stacking detection. After the stacking detection is passed, the chip identifier is determined to be written into the finished product test file based on the matching result between the chip identifier and the wafer test file uploaded by the wafer test equipment. This achieves real-time mixed identification, avoids chips from different testing batches being mixed for finished product testing, thereby improving the reliability of chip testing and reducing the time cost of later traceability.

[0087] Figure 4 A flowchart illustrating a testing method for a semiconductor chip applied to a wafer testing apparatus according to another embodiment of this application is shown.

[0088] like Figure 4 As shown, in the last test item of the CP test for semiconductor chip ICs, i.e., the last item in the flow, it can be checked whether it is the same as the UID of the chip previously judged as good (pass). If they are the same, the chip can be judged as defective (FAIL). Otherwise, the chip's UID is written to the wafer test file CP.txt, so as to test the next chip in the current inspection batch. After the entire inspection batch is completed (i.e., batch closure), the number of UIDs in CP.txt can be parsed by MES. If the number of UIDs in CP.txt is equal to the number of actual chips (i.e., the number of chips in the inspection batch), the wafer test result of the inspection batch can be determined as the batch release result, i.e., release in the figure. If they are not equal, the wafer test of the inspection batch has an anomaly, and the batch (Lot) needs to be intercepted (hold).

[0089] Figure 5 A structural block diagram of a semiconductor chip testing apparatus applied to a finished product testing equipment according to an embodiment of this application is shown.

[0090] like Figure 5 As shown, the semiconductor chip testing device 500 applied to finished product testing equipment includes a comparison analysis module 510, a matching determination module 520, an identifier writing module 530, and a result determination module 540.

[0091] The comparison analysis module 510 is used to compare and analyze the i-th chip identifier of the i-th semiconductor chip with the detected chip identifier of the detected chip when performing finished product testing on the i-th semiconductor chip in the m-th batch of testing, and obtain the analysis result, where m is an integer greater than 0 and i is an integer greater than 1.

[0092] The matching determination module 520 is used to determine the matching result between the i-th chip identifier and the wafer test file uploaded by the wafer test equipment corresponding to the m-th test batch if the analysis result shows that the i-th chip identifier does not exist.

[0093] The identifier writing module 530 is used to determine whether to write the identifier of the i-th chip into the finished product test file based on the matching result.

[0094] The result determination module 540 is used to determine the finished product test result of the m-th test batch based on the number of chip identifiers in the finished product test file and the number of semiconductor chips in the m-th test batch.

[0095] According to the embodiments of this application, when performing finished product testing on semiconductor chips, the chip identifier is compared with the chip identifier that has been detected to achieve real-time stacking detection. After the stacking detection is passed, the chip identifier is determined to be written into the finished product test file based on the matching result between the chip identifier and the wafer test file uploaded by the wafer test equipment. This achieves real-time mixed identification, avoids chips from different testing batches being mixed for finished product testing, thereby improving the reliability of chip testing and reducing the time cost of later traceability.

[0096] According to embodiments of this application, the semiconductor chip testing apparatus further includes a sequence correction module.

[0097] The sequence correction module is used to correct the test order of the i-th semiconductor chip if the analysis results show that the i-th chip identifier is present in the detected chip identifier, so as to repeat the test of the i-th semiconductor chip.

[0098] According to an embodiment of this application, the comparison and analysis module includes an identifier reading unit and a consistency analysis unit.

[0099] The identification reading unit is used to read the (i-1)th chip identifier from the storage medium of the finished product testing equipment, wherein the (i-1)th chip identifier represents the chip identifier that has been detected; The consistency analysis unit is used to generate analysis results based on the consistency between the (i-1)th chip identifier and the i-th chip identifier.

[0100] According to an embodiment of this application, the matching determination module includes an identifier uploading unit and a result acquisition unit.

[0101] The identifier uploading unit is used to transmit the identifier of the i-th chip to the server, so that the server can retrieve the identifier of the i-th chip in the wafer test file and generate a matching result; The result retrieval unit is used to retrieve matching results from the server.

[0102] According to an embodiment of this application, the identifier writing module includes an identifier determination unit and an identifier writing unit.

[0103] The identifier determination unit is used to determine whether the i-th chip identifier exists in the finished product test file if the matching result shows that the i-th chip identifier exists in the wafer test file. The identifier writing unit is used to transmit the i-th chip identifier to the server so that the server writes the i-th chip identifier into the finished product test file if the i-th chip identifier does not exist in the finished product test file; if the i-th chip identifier exists in the finished product test file, the i-th chip identifier is not written into the finished product test file.

[0104] According to embodiments of this application, the semiconductor chip testing apparatus further includes a test failure module.

[0105] The test failure module is used to determine the test result of the i-th semiconductor chip corresponding to the i-th chip identifier as a failure result if the matching result shows that the i-th chip identifier does not exist in the wafer test file.

[0106] According to an embodiment of this application, the result determination module includes a first result determination unit and a second result determination unit.

[0107] The first result determination unit is used to determine the finished product test result of the m-th test batch as the batch release result if the number of chip identifiers in the finished product test file is greater than or equal to the number of semiconductor chips in the m-th test batch. The second result determination unit is used to determine the finished product test result of the m-th test batch as an abnormal batch result if the number of chip identifiers in the finished product test file is less than the number of semiconductor chips in the m-th test batch.

[0108] Figure 6 A structural block diagram of a semiconductor chip testing apparatus applied to a finished product testing equipment according to an embodiment of this application is shown.

[0109] like Figure 6 As shown, the semiconductor chip testing apparatus 600 applied to wafer testing equipment includes an identifier generation module 610, a calibration and determination module 620, an identifier writing module 630, and a test confirmation module 640.

[0110] The identifier generation module 610 is used to generate an nth chip identifier for the nth semiconductor chip based on the obtained nth chip parameters when the nth semiconductor chip in the mth batch of inspection is determined to be a good product during wafer testing. Here, m and n are both integers greater than 0.

[0111] The calibration determination module 620 is used to determine the calibration result between the nth chip identifier and the wafer test file corresponding to the mth test batch uploaded in real time by the wafer test equipment.

[0112] The write identifier module 630 is used to determine whether to write the nth chip identifier into the wafer test file based on the calibration result.

[0113] The test verification module 640 is used to determine the wafer test results of the m-th test batch based on the number of chip identifiers in the wafer test file and the number of semiconductor chips in the m-th test batch.

[0114] According to an embodiment of this application, a wafer test file is used to determine the matching result between the i-th chip identifier of the i-th semiconductor chip and the wafer test file uploaded by the wafer test equipment corresponding to the m-th test batch when the finished product test equipment performs finished product testing on the i-th semiconductor chip in the m-th test batch. Based on the matching result, it is determined whether to write the i-th chip identifier into the finished product test file, and the finished product test result of the m-th test batch is determined based on the number of chip identifiers in the finished product test file and the number of semiconductor chips in the m-th test batch. The matching result is generated when the analysis result shows that the i-th chip identifier is not present in the detected chip identifiers. The analysis result is obtained by comparing and analyzing the i-th chip identifier of the i-th semiconductor chip with the detected chip identifiers of the detected chips.

[0115] According to the embodiments of this application, when performing finished product testing on semiconductor chips, the chip identifier is compared with the chip identifier that has been detected to achieve real-time stacking detection. After the stacking detection is passed, the chip identifier is determined to be written into the finished product test file based on the matching result between the chip identifier and the wafer test file uploaded by the wafer test equipment. This achieves real-time mixed identification, avoids chips from different testing batches being mixed for finished product testing, thereby improving the reliability of chip testing and reducing the time cost of later traceability.

[0116] According to embodiments of this application, any multiple modules among the comparison analysis module 510, matching determination module 520, identifier writing module 530, and result determination module 540, or the identifier generation module 610, verification determination module 620, identifier writing module 630, and test confirmation module 640, can be combined into one module, or any one of these modules can be split into multiple modules. Alternatively, at least some of the functions of one or more of these modules can be combined with at least some of the functions of other modules and implemented in one module. According to embodiments of this application, at least one of the following modules can be at least partially implemented as hardware circuits: comparison analysis module 510, matching determination module 520, identifier writing module 530, result determination module 540, or identifier generation module 610, verification determination module 620, identifier writing module 630, and test confirmation module 640. These can be implemented as hardware or firmware, such as field-programmable gate arrays, programmable logic arrays, systems-on-a-chip, systems-on-a-substrate, systems-on-package, application-specific integrated circuits, or any other reasonable method of integrating or packaging circuits. Alternatively, at least one of the following three implementation methods—software, hardware, and firmware—can be at least partially implemented as a computer program module, which, when run, can perform corresponding functions.

[0117] Figure 7 A block diagram of an electronic device suitable for implementing the above-described method according to an embodiment of this application is shown.

[0118] like Figure 7 As shown, the electronic device 700 according to an embodiment of this application includes a processor 701. The electronic device 700 may refer to a finished product testing device or a wafer testing device. The processor 701 may refer to a first processor of the finished product testing device or a second processor of the wafer testing device. It can perform various appropriate actions and processes according to a program stored in the read-only memory 702 or a program loaded from the storage portion 708 into the random access memory 703. The processor 701 may include, for example, a general-purpose microprocessor, an instruction set processor and / or related chipsets and / or a dedicated microprocessor. The processor 701 may also include onboard memory for caching purposes. The processor 701 may include a single processing unit or multiple processing units for executing different steps of the method flow according to an embodiment of this application.

[0119] Random access memory 703 stores various programs and data required for the operation of electronic device 700. Processor 701, read-only memory 702, and random access memory 703 are interconnected via bus 704. Processor 701 executes various steps of the method flow according to embodiments of this application by executing programs in read-only memory 702 and / or random access memory 703. It should be noted that the programs may also be stored in one or more memories other than read-only memory 702 and random access memory 703. Processor 701 may also execute various steps of the method flow according to embodiments of this application by executing programs stored in said one or more memories.

[0120] According to embodiments of this application, the electronic device 700 may further include an input / output interface 705, which is also connected to a bus 704. The electronic device 700 may also include one or more of the following components connected to the input / output interface 705: an input section 706 including a keyboard, mouse, etc.; an output section 707 including a cathode ray tube, liquid crystal display, etc., and a speaker, etc.; a storage section 708 including a hard disk, etc.; and a communication section 709 including a network interface card, such as a local area network card, modem, etc. The communication section 709 performs communication processing via a network such as the Internet. A drive 710 is also connected to the input / output interface 705 as needed. A removable medium 711, such as a disk, optical disk, magneto-optical disk, semiconductor memory, etc., is installed on the drive 710 as needed so that computer programs read from it can be installed into the storage section 708 as needed.

[0121] Embodiments of this application also provide a computer-readable storage medium, which may be included in the device / apparatus / system described in the above embodiments; or it may exist independently and not assembled into the device / apparatus / system. The computer-readable storage medium carries one or more programs, which, when executed, implement the method according to the embodiments of this application.

[0122] According to embodiments of this application, the computer-readable storage medium can be a non-volatile computer-readable storage medium, such as including but not limited to: portable computer disks, hard disks, random access memory, read-only memory, erasable programmable read-only memory, portable compact disk read-only memory, optical storage devices, magnetic storage devices, or any suitable combination thereof. In embodiments of this application, the computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. For example, according to embodiments of this application, the computer-readable storage medium may include the read-only memory 702, and / or random access memory 703, and / or one or more memories other than read-only memory 702 and random access memory 703 described above.

[0123] Embodiments of this application also include a computer program product comprising a computer program containing program code for performing the methods shown in the flowchart. When the computer program product is run on a computer system, the program code is used to cause the computer system to implement the methods provided in the embodiments of this application.

[0124] In one embodiment, the computer program may rely on a tangible storage medium such as an optical storage device or a magnetic storage device. In another embodiment, the computer program may also be transmitted and distributed in the form of signals over a network medium, and may be downloaded and installed via the communication section 709, and / or installed from a removable medium 711. The program code contained in the computer program can be transmitted using any suitable network medium, including but not limited to: wireless, wired, etc., or any suitable combination thereof.

[0125] In embodiments of this application, the computer program can be downloaded and installed from a network via communication section 709, and / or installed from removable medium 711. When the computer program is executed by processor 701, it performs the functions defined in the system of embodiments of this application. According to embodiments of this application, the systems, devices, apparatuses, modules, units, etc., described above can be implemented by computer program modules.

[0126] According to embodiments of this application, program code for executing the computer programs provided in the embodiments of this application can be written in any combination of one or more programming languages. Specifically, these computational programs can be implemented using high-level procedural and / or object-oriented programming languages, and / or assembly / machine languages. The program code can be executed entirely on the user's computing device, partially on the user's device, partially on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0127] Figure 8 A block diagram of a test system for a semiconductor chip according to an embodiment of this application is shown.

[0128] like Figure 8 As shown, the semiconductor chip testing system 800 includes: a wafer testing device 810; a finished product testing device 820; and a server 830 for storing wafer test files corresponding to the wafer testing device and finished product test files corresponding to the finished product testing device.

[0129] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram or flowchart, and combinations of blocks in a block diagram or flowchart, may be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0130] Those skilled in the art will understand that the features described in the various embodiments of this application can be combined and / or combined in various ways, even if such combinations or combinations are not explicitly described in this application. In particular, the features described in the various embodiments of this application can be combined and / or combined in various ways without departing from the spirit and teachings of this application. All such combinations and / or combinations fall within the scope of this application.

Claims

1. A testing method for semiconductor chips, applied to finished product testing equipment, characterized in that, The method includes: When performing finished product testing on the i-th semiconductor chip in the m-th batch of inspection, the i-th chip identifier of the i-th semiconductor chip is compared and analyzed with the detected chip identifier of the tested chips to obtain the analysis result, where m is an integer greater than 0 and i is an integer greater than 1. If the analysis results show that the i-th chip identifier does not exist among the detected chip identifiers, determine the matching result between the i-th chip identifier and the wafer test file uploaded by the wafer test equipment corresponding to the m-th detection batch; Based on the matching results, determine whether to write the i-th chip identifier into the finished product test file; The final product test result of the m-th test batch is determined based on the number of chip identifiers in the final product test file and the number of semiconductor chips in the m-th test batch.

2. The semiconductor chip testing method according to claim 1, characterized in that, Also includes: If the analysis results show that the detected chip identifier contains the i-th chip identifier, the test order of the i-th semiconductor chip is corrected so that the i-th semiconductor chip can be tested repeatedly.

3. The method for testing semiconductor chips according to claim 1, characterized in that, The i-th chip identifier of the i-th semiconductor chip is compared and analyzed with the detected chip identifier of the detected chip to obtain the analysis results, including: Read the (i-1)th chip identifier from the storage medium of the finished product testing equipment, wherein the (i-1)th chip identifier represents the detected chip identifier; The analysis result is generated based on the consistency between the (i-1)th chip identifier and the i-th chip identifier.

4. The semiconductor chip testing method according to claim 1, characterized in that, Determining the matching result between the i-th chip identifier and the wafer test file uploaded by the wafer test equipment corresponding to the m-th inspection batch includes: The i-th chip identifier is transmitted to the server, so that the server can retrieve the i-th chip identifier in the wafer test file and generate a matching result; The matching result is obtained from the server.

5. The method for testing semiconductor chips according to claim 1, characterized in that, Determining whether to write the i-th chip identifier into the finished product test file based on the matching result includes: If the matching result shows that the i-th chip identifier exists in the wafer test file, determine whether the i-th chip identifier exists in the finished product test file; If the i-th chip identifier is not present in the finished product test file, the i-th chip identifier is transmitted to the server so that the server writes the i-th chip identifier into the finished product test file; If the i-th chip identifier exists in the finished product test file, the i-th chip identifier shall not be written into the finished product test file; The test method further includes: If the matching result shows that the i-th chip identifier does not exist in the wafer test file, the test result of the i-th semiconductor chip corresponding to the i-th chip identifier is determined to be a failure result.

6. The method for testing a semiconductor chip according to any one of claims 1 to 5, characterized in that, The final product test result for the m-th test batch is determined based on the number of chip identifiers in the final product test file and the number of semiconductor chips in the m-th test batch, including: If the number of chip identifiers in the finished product test file is greater than or equal to the number of semiconductor chips in the m-th test batch, the finished product test result of the m-th test batch is determined as the batch release result; If the number of chip identifiers in the finished product test file is less than the number of semiconductor chips in the m-th test batch, the finished product test result of the m-th test batch is determined to be an abnormal batch result.

7. A method for testing semiconductor chips, applied to wafer testing equipment, characterized in that, The method includes: When performing wafer testing on the nth semiconductor chip in the mth batch of inspection, if the nth semiconductor chip is determined to be a good product, an nth chip identifier is generated based on the obtained nth chip parameters of the nth semiconductor chip, where m and n are both integers greater than 0; Determine the verification result between the nth chip identifier and the wafer test file corresponding to the mth detection batch uploaded in real time by the wafer test equipment; Based on the calibration results, determine whether to write the nth chip identifier into the wafer test file; The wafer test result of the m-th test batch is determined based on the number of chip identifiers in the wafer test file and the number of semiconductor chips in the m-th test batch. The wafer test file is used to determine the matching result between the i-th chip identifier of the i-th semiconductor chip and the wafer test file corresponding to the m-th inspection batch uploaded by the wafer test equipment when the finished product test equipment performs finished product testing on the i-th semiconductor chip in the m-th inspection batch. Based on the matching result, it is determined whether to write the i-th chip identifier into the finished product test file, and the finished product test result of the m-th inspection batch is determined based on the number of chip identifiers in the finished product test file and the number of semiconductor chips in the m-th inspection batch. The matching result is generated when the analysis result shows that the i-th chip identifier is not present in the detected chip identifiers. The analysis result is obtained by comparing and analyzing the i-th chip identifier of the i-th semiconductor chip with the detected chip identifiers of the detected chips.

8. A finished product testing device, comprising: One or more first processors; Memory, used to store one or more computer programs. The characteristic feature is that the one or more first processors execute the one or more computer programs to implement the steps of the testing method for the semiconductor chip according to any one of claims 1 to 6.

9. A wafer testing device, comprising: One or more second processors; Memory, used to store one or more computer programs. The characteristic feature is that the one or more second processors execute the one or more computer programs to implement the steps of the semiconductor chip testing method according to claim 7.

10. A testing system for semiconductor chips, characterized in that, The system includes: The wafer testing equipment as described in claim 9; The finished product testing equipment as described in claim 8; and The server is used to store wafer test files corresponding to the wafer testing equipment and finished product test files corresponding to the finished product testing equipment.

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