A high-transient-response ldo for gaN half-bridge driver power supply
By using adaptive bias circuitry and dynamic slew rate enhancement circuitry, the problem of traditional LDOs being unable to respond quickly to load changes in GaN half-bridge drivers is solved, achieving an LDO design with high transient response, low power consumption, and high stability, suitable for powering GaN half-bridge drivers.
Patent Information
- Application Number
- CN202610761891.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-05-29
- Publication Date
- 2026-08-25
AI Technical Summary
Traditional LDOs cannot respond quickly to nanosecond-level load changes in GaN half-bridge drivers, resulting in output voltage overshoot or undershoot. Furthermore, increasing the response speed increases static power consumption, which violates the requirement for high efficiency.
An adaptive bias circuit, a transimpedance amplifier, and a dynamic slew rate enhancement circuit were designed. By detecting sudden load changes, a large instantaneous current was injected to accelerate charging and discharging, bypassing the main error amplifier loop and achieving rapid voltage regulation.
It achieves nanosecond-level transient response, suppresses output voltage fluctuations, maintains high stability and low static power consumption, protects the GaN gate, and improves system robustness.
Smart Images
Figure CN122639633A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of low dropout linear regulator technology, and more specifically to a high transient response LDO for powering a GaN half-bridge driver. Background Technology
[0002] With the widespread application of gallium nitride (GaN), a third-generation semiconductor material, in power electronics, high-frequency, high-efficiency power converters based on GaN (such as LCC resonant converters and Buck converters) have developed rapidly. GaN transistors, due to their high electron mobility and low parasitic capacitance, can achieve switching speeds of tens of nanoseconds, far faster than traditional silicon-based MOSFETs. In a half-bridge topology, the upper transistor driver is typically powered by a bootstrap circuit or an isolated power supply. Regardless of the method used, an LDO is ultimately required to provide a stable and clean gate drive voltage (typically 5V).
[0003] However, the extremely fast switching speed of GaN devices causes their gate drivers to draw in / discharge huge peak currents (amperes) in a very short time (several nanoseconds or tens of nanoseconds). This dramatic load transient poses unprecedented challenges to the LDOs powering them. The limitations of traditional LDOs are mainly twofold:
[0004] 1. Due to limited bandwidth, its feedback loop cannot respond to nanosecond-level current surges in a timely manner, resulting in severe undershoot of the output voltage when the load suddenly increases or severe overshoot when the load suddenly decreases.
[0005] 2. In order to improve the response speed, it is usually necessary to increase the bias current of the error amplifier, but this will directly lead to an increase in static power consumption and a reduction in system efficiency, which contradicts the original intention of GaN devices to pursue high efficiency.
[0006] Therefore, there is an urgent need for a GaN half-bridge driver power supply LDO circuit with fast transient response, high stability and low static power consumption. Summary of the Invention
[0007] In view of this, this application discloses a high transient response LDO for power supply of GaN half-bridge drivers to solve the problems in the prior art, including: a bandgap reference, an error amplifier EA, a power regulation transistor MP, a feedback resistor network, an adaptive bias circuit, a transimpedance amplifier, and a dynamic slew rate enhancement circuit; wherein:
[0008] The inverting input of EA is connected to a bandgap reference source, and the non-inverting input of EA receives the sampling signal of the output voltage through a feedback resistor network. The gate of MP is connected to the output of the error amplifier EA and the output of the dynamic slew rate enhancement circuit, respectively. The drain of MP is connected to the input of the adaptive bias circuit, the input of the transimpedance amplifier, and one end of the feedback resistor network, respectively. The other end of the feedback resistor network is grounded. The output of the adaptive bias circuit is connected to the tail current source of the error amplifier EA. The source of MP serves as the power supply terminal of the LDO, and the drain of MP serves as the output terminal of the LDO.
[0009] The beneficial effects of this application include:
[0010] This application provides a design of an adaptive bias circuit-transimpedance amplifier-dynamic slew rate enhancement circuit. On the one hand, by detecting the deviation of the output voltage due to load changes, a large instantaneous current is injected into the tail current source of the error amplifier, increasing the transconductance and slew rate of the error amplifier, thereby accelerating the charging and discharging speed of the power transistor gate. On the other hand, by converting the change in output voltage into a transient current signal, a large current in the same direction as the transient current signal is generated to directly drive the gate of the power regulation transistor MP for rapid charging and discharging, bypassing the relatively slow main error amplifier loop for rapid charging and discharging of the gate capacitor, thereby achieving rapid adjustment of the output voltage. Through the dual mechanisms of adaptive bias and dynamic slew rate enhancement, the LDO designed in this application can respond promptly to nanosecond-level load current changes generated by the GaN driver, suppressing the overshoot / undershoot amplitude of the output voltage to a very small range, and achieving nanosecond-level transient response.
[0011] During steady-state operation, the circuit returns to a low bias current state, and the main feedback loop has sufficient phase margin to ensure that the system can operate stably under any load conditions without the need for large-area off-chip capacitors, thus exhibiting high stability.
[0012] The transient enhancement function is activated only during load changes. Under steady-state or light-load conditions, the circuit operates in a low bias current mode, and the overall static power consumption is comparable to that of a traditional LDO, meeting the requirements of a high-efficiency power supply system with low static power consumption.
[0013] It effectively protects the GaN gate, preventing device damage or system failure caused by power supply voltage fluctuations, and improves the robustness of the entire power converter system. Attached Figure Description
[0014] Figure 1 A schematic diagram of a high transient response LDO used to power a GaN half-bridge driver in an embodiment of this application;
[0015] Figure 2 This is a schematic diagram of the adaptive bias circuit in an embodiment of this application;
[0016] Figure 3 This is a schematic diagram of the transimpedance amplifier and dynamic slew rate enhancement circuit in the embodiments of this application. Detailed Implementation
[0017] To make the objectives, technical solutions, features, and advantages of this application clearer and to facilitate a better understanding of the technical solutions of this application by those skilled in the art, the following detailed description of this application is provided in conjunction with the accompanying drawings and embodiments.
[0018] This embodiment includes a high transient response LDO for powering a GaN half-bridge driver, such as... Figure 1 As shown, it includes: a bandgap reference, an error amplifier EA, a power adjustment transistor MP, a feedback resistor network, an adaptive bias circuit, a transimpedance amplifier, and a dynamic slew rate enhancement circuit; wherein:
[0019] The inverting input of EA is connected to a bandgap reference source, and the non-inverting input of EA receives the sampling signal of the output voltage through a feedback resistor network. The gate of MP is connected to the output of the error amplifier EA and the output of the dynamic slew rate enhancement circuit, respectively. The drain of MP is connected to the input of the adaptive bias circuit, the input of the transimpedance amplifier, and one end of the feedback resistor network, respectively. The other end of the feedback resistor network is grounded. The output of the adaptive bias circuit is connected to the tail current source of the error amplifier EA. The source of MP serves as the power supply terminal of the LDO, and the drain of MP serves as the output terminal of the LDO.
[0020] The bandgap reference is used to generate the reference voltage Vref.
[0021] The feedback resistor network, consisting of resistors connected in series, is used to perform voltage division sampling of the output voltage and feed the sampled value back to the input of the error amplifier. In this embodiment, the feedback resistor network consists of resistors R1 and R2.
[0022] The adaptive bias circuit monitors the transient voltage changes at the output terminal in real time. When it detects that the output voltage deviates rapidly from the design value due to a sudden load change, the adaptive bias circuit instantly injects an additional pulse current into the tail current source terminal of the error amplifier. In this embodiment, the adaptive bias circuit is as follows: Figure 2 As shown, it consists of two high-bandwidth comparators and a current mirror. The two comparators are connected in parallel and continuously monitor the output voltage VOUT and the slightly offset reference voltage (Vref±ΔV). When the fluctuation of VOUT exceeds the voltage window of Vref±ΔV, the output of the comparator flips and is amplified by the current mirror (four times in this embodiment), injecting a large instantaneous current into the tail current source of the error amplifier, which drastically increases the transconductance and slew rate of the error amplifier, thereby accelerating the charging and discharging speed of the power transistor gate.
[0023] The transimpedance amplifier is used to detect high-frequency glitches or rapid jumps in the output voltage caused by changes in load current, and converts the voltage change signal into a transient current signal. In this embodiment, the transimpedance amplifier and dynamic slew rate enhancement circuit are as follows: Figure 3 As shown, the transimpedance amplifier is implemented by a common-source amplifier, which converts the high-frequency change of VOUT into a transient current signal. The transient current signal is converted into a voltage signal through the load resistor and transmitted to the dynamic slew rate enhancement circuit.
[0024] The dynamic slew rate enhancement circuit, during load transients, captures the transient current signal from the transimpedance amplifier, generates a large current in the same direction as the transient current signal, and directly drives the gate of the power regulation transistor MP for rapid charging / discharging, thereby bypassing the relatively slow main error amplifier loop and achieving extremely rapid adjustment of the output voltage. Figure 3 As shown, the dynamic slew rate enhancement circuit consists of two comparators and two switches controlled by the comparators. The dynamic slew rate enhancement circuit can instantly connect a large current source / sink to the gate of the power transistor, realizing rapid charging and discharging of the gate capacitor.
[0025] The LDO designed in this application was tested. The input voltage range was 6V~15V, the output voltage was 5V, and the maximum instantaneous load current was 2A. When the load current changed from 0.1A to 2A within 10ns, the LDO in this embodiment could maintain the output change within 40mV, and the output voltage recovery time was less than 50ns. The LDO quiescent current was less than 200uA.
[0026] Finally, it should be noted that the above description only depicts some embodiments of this application. For those skilled in the art, various changes, modifications, substitutions, and variations can be conceived of these embodiments without departing from the principles and spirit of this application. The scope of protection of this application is defined by the appended claims and their equivalents, and all the above-mentioned behaviors should be covered within the scope of protection of this application.
Claims
1. A high transient response LDO for powering a GaN half-bridge driver, characterized in that, include: Bandgap reference, error amplifier EA, power regulator MP, feedback resistor network, adaptive bias circuit, transimpedance amplifier, dynamic slew rate enhancement circuit; among which: The inverting input of EA is connected to a bandgap reference source, and the non-inverting input of EA receives the sampling signal of the output voltage through a feedback resistor network. The gate of MP is connected to the output of the error amplifier EA and the output of the dynamic slew rate enhancement circuit, respectively. The drain of MP is connected to the input of the adaptive bias circuit, the input of the transimpedance amplifier, and one end of the feedback resistor network, respectively. The other end of the feedback resistor network is grounded. The output of the adaptive bias circuit is connected to the tail current source of the error amplifier EA. The source of MP serves as the power supply terminal of the LDO, and the drain of MP serves as the output terminal of the LDO.
2. The high transient response LDO for powering a GaN half-bridge driver according to claim 1, characterized in that, The bandgap reference is used to generate the reference voltage Vref.
3. The high transient response LDO for powering a GaN half-bridge driver according to claim 1, characterized in that, The feedback resistor network, consisting of resistors connected in series, is used to perform voltage division sampling of the output voltage and feed the sampled value back to the input of the error amplifier.
4. The high transient response LDO for powering a GaN half-bridge driver according to claim 1, characterized in that, The adaptive bias circuit is used to monitor transient changes in the output voltage. When it detects that the output voltage deviates rapidly from the design value due to a sudden change in load, it injects an additional pulse current into the tail current source of the error amplifier.
5. The high transient response LDO for powering a GaN half-bridge driver according to claim 1, characterized in that, The adaptive bias circuit consists of two comparators and a current mirror. The two comparators are connected in parallel to continuously monitor the output voltage VOUT and the slightly offset reference voltage Vref±ΔV. When the fluctuation of VOUT exceeds the voltage window of Vref±ΔV, the output of the comparator flips and is amplified by the current mirror to inject current into the tail current source of the error amplifier, thereby increasing the transconductance and slew rate of the error amplifier.
6. The high transient response LDO for powering a GaN half-bridge driver according to claim 1, characterized in that, The transimpedance amplifier is used to detect high-frequency glitches or rapid jumps in the output voltage caused by changes in load current, and to convert the voltage change signal into a transient current signal.
7. The high transient response LDO for powering a GaN half-bridge driver according to claim 6, characterized in that, The transimpedance amplifier is implemented using a common-source amplifier.
8. The high transient response LDO for powering a GaN half-bridge driver according to claim 1, characterized in that, The dynamic slew rate enhancement circuit captures the transient current signal from the transimpedance amplifier and generates a large current in the same direction as the transient current signal to drive the gate of the power regulation transistor MP to charge or discharge.