Data transmission method, apparatus and electronic device

Abstract

The application discloses a data transmission method and device and electronic equipment, and relates to the technical field of chips. The method comprises the following steps: determining a proportion of back pressure events triggered by a transmission link in a sliding window; evaluating a congestion degree of the transmission link in the sliding window according to the proportion of back pressure events; determining a target adjustment time length for adjusting the congestion of the transmission link according to the congestion degree; and adjusting the transmission priority of different bandwidth flows waiting to be transmitted in the transmission link within the target adjustment time length, so as to reduce the proportion of events triggering back pressure in the subsequent sliding window. Through the above steps, the application can relieve the persistent back pressure of the transmission link, reduce the accumulation of high-bandwidth flows, suppress the rise of access delay, and improve the overall data throughput and computing performance of the chip.

Description

Technical Field

[0001] This application relates to the field of chip technology, and in particular to a data transmission method, apparatus and electronic device. Background Technology

[0002] Network on Chip (NoC) is a core interconnect architecture within a multi-core, heterogeneous System on Chip (SoC) that replaces the traditional shared bus to complete data interaction between master and slave devices within the chip. NoC consists of a network of numerous routers and transmission links. A single output transmission link of the same router carries traffic from multiple master devices and various service types. Different bandwidth traffic has differentiated bandwidth carrying capacity, and link arbitration resources are limited, making it highly susceptible to congestion problems.

[0003] In real-world chip application scenarios, there is a clear distinction in the bandwidth limits for different transaction flows. For example, L2 cache requests are high-bandwidth flows that can occupy nearly full line-rate bandwidth. In contrast, L3 mixed read / write requests are low-bandwidth flows that can only obtain limited transmission bandwidth. When high-bandwidth flows and low-bandwidth flows queue up simultaneously and compete for the same router output port, a typical head-of-line (HOL) phenomenon occurs. That is, low-bandwidth flows occupy the head of the queue for an extended period, thus securing arbitration opportunities, while high-bandwidth flows behind them are continuously blocked and cannot be transmitted in a timely manner.

[0004] This head-of-line congestion causes persistent backpressure on the link, preventing downstream slave devices from receiving valid data and causing high-bandwidth transaction backlog and significantly increased access latency on upstream master devices, directly reducing the overall data throughput and computing performance of the chip. Therefore, a congestion control method is urgently needed to alleviate the above-mentioned congestion problem. Summary of the Invention

[0005] In view of this, this application provides a data transmission method, apparatus and electronic device that can adjust the transmission priority of different bandwidth traffic waiting to be transmitted in the transmission link according to the degree of congestion of the transmission link, so as to reduce the proportion of backpressure events triggered in the subsequent sliding window, thereby reducing access latency and improving the overall data throughput and computing performance of the chip.

[0006] In a first aspect, this application provides a data transmission method, including: Determine the percentage of backpressure events that trigger backpressure within the sliding window of the transmission link.

[0007] Based on the proportion of backpressure events, assess the degree of congestion in traffic transmission within the sliding window of the transmission link.

[0008] Based on the degree of congestion, determine the target adjustment duration for adjusting the congestion on the transmission link.

[0009] Within the target adjustment period, the transmission priority of different bandwidth traffic waiting to be transmitted in the transmission link is adjusted to reduce the proportion of events that trigger backpressure in the subsequent sliding window.

[0010] Optionally, determine the percentage of backpressure events that trigger backpressure within the sliding window on the transmission link, including: Acquire the request and ready signals of the transmission link in each clock cycle.

[0011] If the request signal indication for the target clock cycle is valid and the ready signal indication is invalid, it is determined that the transmission link triggers back pressure in the target clock cycle; the target clock cycle is any clock cycle in the series of clock cycles. Update the sliding window according to the timing of each clock cycle.

[0012] The percentage of backpressure events is obtained based on the number of the first clock cycles that trigger backpressure within the updated sliding window of the transmission link and the total number of clock cycles of the sliding window.

[0013] Optionally, the sliding window can be updated according to the timing progression of each clock cycle, including: A statistical window is defined as a preset number of clock cycles. After all clock cycles of a statistical window have passed, the sliding window is updated. The total number of clock cycles in the sliding window is an integer multiple of the number of clock cycles in a single statistical window.

[0014] Optionally, multiple sliding windows of different lengths can be configured, with each sliding window containing a number of statistical windows that are powers of 2.

[0015] Optionally, the proportion of backpressure events is obtained based on the number of the first clock cycles in which backpressure is triggered within the updated sliding window and the total number of clock cycles in the sliding window, including: Normalization operations are performed based on the number of clock cycles in which the transmission link triggers backpressure within each updated sliding window, and the number of statistical windows corresponding to each updated sliding window, to obtain the normalized value of each updated sliding window.

[0016] The proportion of backpressure events is determined based on the normalized values ​​of each updated sliding window.

[0017] Optionally, for any one of the updated sliding windows, perform the following steps: The number of binary shift bits is determined based on the number of statistical windows in any updated sliding window.

[0018] Perform a right shift operation on the first clock cycle number corresponding to any updated sliding window, based on the number of binary shift bits.

[0019] The result of the right shift operation is rounded based on the bits discarded during the right shift operation to obtain the normalized value corresponding to any updated sliding window.

[0020] Optionally, based on the degree of congestion, the target adjustment duration for adjusting the transmission link congestion can be determined, including: Based on the degree of blocking, the number of second clock cycles used for blocking adjustment is determined, and the degree of blocking is positively correlated with the size of the number of second clock cycles.

[0021] Optionally, the transmission priority of different bandwidth traffic waiting to be transmitted in the transmission link can be adjusted to reduce the proportion of events triggering backpressure within the subsequent sliding window, including: Set the transmission priority of the first traffic to first priority and the transmission priority of the second traffic to second priority, where the first priority is higher than the second priority.

[0022] Secondly, this application provides a data transmission apparatus, which includes a first determining module, an evaluation module, a second determining module, and an adjustment module; wherein: The first determining module is configured to determine the percentage of backpressure events that trigger backpressure within a sliding window on the transmission link.

[0023] The evaluation module is configured to assess the degree of congestion in traffic transmission within a sliding window based on the proportion of backpressure events.

[0024] The second determining module is configured to determine the target adjustment duration for adjusting the transmission link based on the degree of congestion.

[0025] The adjustment module is configured to adjust the transmission priority of different bandwidth traffic waiting to be transmitted in the transmission link within the target adjustment duration, so as to reduce the proportion of backpressure events triggered in the subsequent sliding window.

[0026] Thirdly, this application provides an electronic device including a storage medium, a processor, and a computer program stored on the storage medium and executable on the processor, wherein the processor executes the computer program to implement the method described in the first aspect.

[0027] In view of the above embodiments, this application provides a data transmission method, apparatus, and electronic device. This application first determines the proportion of backpressure events triggering backpressure on the transmission link within a sliding window, assesses the degree of congestion on the transmission link based on this proportion, then determines the target adjustment duration corresponding to the congestion adjustment based on the congestion degree, and adjusts the transmission priority of different bandwidth traffic waiting for transmission on the transmission link within the target adjustment duration, thereby reducing the proportion of events triggering backpressure in subsequent sliding windows. Through the above steps, this application can alleviate continuous backpressure on the transmission link, reduce the accumulation of high-bandwidth traffic, suppress the increase in access latency, and improve the overall data throughput and computing performance of the chip.

[0028] It should be noted that the above content is only a general overview of the technical solution of this application. In order to enable those skilled in the art to clearly understand the core technical means of this application and to accurately implement this solution based on the content disclosed in the specification, the technical details of this application will be described in detail below in conjunction with specific embodiments. Attached Figure Description

[0029] The accompanying drawings, which are incorporated in and form a part of this specification, illustrate embodiments consistent with this application and, together with the specification, serve to explain the principles of this application.

[0030] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0031] Figure 1 This illustration shows a schematic diagram of an on-chip network architecture provided in an embodiment of this application; Figure 2 A schematic flowchart of a data transmission method provided in an embodiment of this application is shown; Figure 3 This paper shows a schematic diagram of the structural framework of a data transmission system provided in an embodiment of this application; Figure 4 A schematic diagram of a data transmission device provided in an embodiment of this application is shown. Detailed Implementation

[0032] To facilitate understanding of the technical scenarios and related terminology corresponding to the embodiments of this application, the following is combined with... Figure 1 The diagram below illustrates the on-chip network architecture: This application applies to integrated circuit systems such as multi-core processors, heterogeneous computing platforms, high-performance computing chips, systems-on-chips (SoCs) integrating direct memory access (DMA) and high-speed peripheral interfaces, and artificial intelligence (AI) inference acceleration chips. It is particularly applicable to network-on-chip (NoC) scenarios within the aforementioned integrated circuit systems where multiple bandwidth-attribute traffic-sharing transmission paths or router output ports exist.

[0033] Network on-chip (NoC) is the internal interconnect network of a multi-core, heterogeneous system-on-a-chip (SoC), such as... Figure 1 As shown, the network consists of a mesh topology formed by multiple routers and inter-chip transmission links. Each router is configured with a network interface, and the master device IP (Master IP) connects to the corresponding router node via the network interface. Data packets are forwarded between the router nodes via interconnection links, thereby enabling data exchange between the master and slave devices within the chip. For example, except... Figure 1 In addition to the mesh topology shown, the technical solution of this application can also be applied to cross switches, ring topologies, and other on-chip networks with multi-route and multi-output port interconnection architectures.

[0034] The same master device generates multiple types of service traffic, and the processing capabilities of the slave devices for each type of traffic differ, resulting in varying bandwidth limits. Among them, L2 cache requests, as high-bandwidth traffic, can complete data transmission close to the full line bandwidth. L3 read / write requests, as low-bandwidth traffic, consume a maximum of 0.5 times the line bandwidth in pure read or pure write scenarios, and the bandwidth limit is only 0.3 times the line bandwidth in mixed read / write scenarios.

[0035] A single router output port will aggregate traffic from multiple upstream master devices. High-bandwidth traffic and low-bandwidth traffic share the same transmission path and compete for the same output port. When both types of traffic queue simultaneously, low-bandwidth traffic will occupy arbitration resources for a long time, hindering the delivery of high-bandwidth traffic, forming head-of-line (HOL) congestion, continuously causing backpressure on the link, increasing access latency, and reducing the overall data throughput of the chip.

[0036] Existing on-chip networks use static Quality of Service (QoS) scheduling, which cannot dynamically allocate transmission priorities for traffic with different bandwidth attributes based on the real-time congestion status of the link, making it difficult to handle the aforementioned congestion problems.

[0037] This application provides a data transmission method that uses traffic as the control object, assesses the degree of congestion by statistically analyzing the proportion of backpressure events in the sliding window, adjusts the duration of corresponding traffic priority, and adaptively distinguishes the scheduling priority of high and low bandwidth traffic, so that high bandwidth traffic is transmitted first, thereby alleviating head-of-line congestion and persistent backpressure.

[0038] In one embodiment, the data transmission method described in this application is implemented by a traffic control module deployed on the output port of an on-chip network router. Each transmission link of each router in the on-chip network is independently configured with a traffic control module, and these modules operate independently and in a distributed manner. Each traffic control module can independently execute the data transmission method described in this application, independently performing backpressure statistics, congestion level determination, and dynamic adjustment of traffic priority for its corresponding transmission link. The control logic of each router port does not interfere with each other, and simultaneous control by multiple port modules can create a system-level collaborative congestion mitigation effect.

[0039] The embodiments of this application will now be described in more detail with reference to the accompanying drawings. It should be noted that, unless otherwise specified, the embodiments and features described herein can be combined with each other.

[0040] This embodiment provides a data transmission method, such as... Figure 2 The diagram shows a flowchart of a data transmission method, which includes: S101. Determine the percentage of backpressure events that trigger backpressure within the sliding window of the transmission link.

[0041] Among them, the transmission link refers to the output transmission path of the on-chip network router, which is used to carry access requests corresponding to various types of traffic and complete data interaction between upstream and downstream devices.

[0042] A sliding window is a time-series statistical interval consisting of several consecutive clock cycles. For example, the sliding window slides backward along the time-series cycle. The backward sliding represents the advancement of time in the time-series dimension. During the sliding process, the state data of the earlier historical periods (backpressure / normal) in the window are removed, and the state data of the latest period are synchronously included to realize the rolling and continuous monitoring of the transmission link blocking status.

[0043] Back pressure refers to a situation where downstream devices are unable to receive data, and the handshake signal satisfies the clock cycle state of "axvalid is valid, axready is invalid," indicating a data transmission blockage in the transmission link. Here, "axvalid" is the upstream valid request signal; a high level indicates the existence of a valid access request awaiting transmission. "axready" is the downstream ready-to-receive signal; a high level indicates that the downstream has a free buffer to receive data.

[0044] It is known that if the handshake signals satisfy the conditions of axvalid being valid and axready being valid, then it is a normal transmission state.

[0045] In one implementation, the axvalid and axready handshake signals are acquired in real time for each clock cycle within a sliding window. The total number of clock cycles generating backpressure within the sliding window is counted, and combined with the total number of clock cycles in the sliding window, the proportion of backpressure events corresponding to the transmission link is obtained. This proportion of backpressure events characterizes the severity of continuous congestion on the current transmission link during the statistical period; a higher proportion indicates more strained downstream receiving resources and a more prominent persistent congestion problem.

[0046] S102. Based on the proportion of backpressure events, assess the degree of congestion in traffic transmission within the sliding window of the transmission link.

[0047] In one implementation, a one-to-one mapping relationship between the proportion of backpressure events and the congestion level is pre-configured. The calculated proportion of backpressure events is matched to the corresponding congestion level to characterize the current degree of congestion of the transmission link. The higher the proportion of backpressure events, the higher the corresponding congestion level and the more severe the link transmission congestion.

[0048] S103. Based on the degree of congestion, determine the target adjustment duration for adjusting the transmission link to reduce congestion.

[0049] In one implementation, the degree of congestion is positively correlated with the target adjustment duration. A lookup mapping table between congestion levels and adjustment durations is pre-configured. The target adjustment duration for this traffic priority rewriting is obtained by looking up the table according to the congestion level corresponding to the current link. The more severe the link congestion, the longer the corresponding target adjustment duration.

[0050] S104. Within the target adjustment period, adjust the transmission priority of different bandwidth traffic waiting to be transmitted in the transmission link to reduce the proportion of events that trigger backpressure in the subsequent sliding window.

[0051] In one implementation, within the period corresponding to the target adjustment duration, the transmission priority of high-bandwidth traffic is increased, and the transmission priority of low-bandwidth traffic is decreased. This causes the router to prioritize allocating transmission path resources to high-bandwidth traffic during scheduling arbitration. By adjusting the transmission priority of different bandwidth traffic waiting to be transmitted in the transmission link, the continuous congestion caused by the long-term accumulation of low-bandwidth traffic in the link queue can be reduced, thereby reducing the proportion of backpressure events obtained from subsequent sliding window statistics, forming a self-correcting closed-loop control.

[0052] Compared with existing technologies, this application first determines the proportion of backpressure events that trigger backpressure on the transmission link within a sliding window, assesses the degree of congestion on the transmission link based on this proportion, and then determines the target adjustment duration corresponding to the congestion adjustment based on the degree of congestion. Within the target adjustment duration, the transmission priority of different bandwidth traffic waiting for transmission on the transmission link is adjusted, thereby reducing the proportion of events triggering backpressure in subsequent sliding windows. Through the above steps, this application can alleviate continuous backpressure on the transmission link, reduce the accumulation of high-bandwidth traffic, suppress the increase in access latency, and improve the overall data throughput and computing performance of the chip.

[0053] The data transmission method provided in the embodiments of this application will now be described in detail.

[0054] Optionally, this application also provides an embodiment for determining the proportion of backpressure events triggered by a transmission link within a sliding window. In this embodiment, the request signal and ready signal of the transmission link in each clock cycle are obtained. If the request signal in the target clock cycle indicates that it is valid and the ready signal indicates that it is invalid, it is determined that the transmission link triggers backpressure in the target clock cycle. The target clock cycle is any clock cycle among the clock cycles. The sliding window is updated according to the timing of each clock cycle. Based on the number of first clock cycles in which the transmission link triggers backpressure within the updated sliding window and the total number of clock cycles in the sliding window, the proportion of backpressure events is obtained.

[0055] In one implementation, the flow control module collects the request signal (i.e., the axvalid signal) and ready signal (i.e., the axready signal) of the current transmission link in real time and on a cycle-by-cycle basis. Then, for each clock cycle, it verifies the state matching relationship between the two sets of signals in real time. When a valid request signal and an invalid ready signal are detected, it is determined that backpressure has occurred on the transmission link within that target clock cycle, and the backpressure state of that clock cycle is recorded. Subsequently, as the system timing continues to advance, a fixed-length sliding window is updated in real time, continuously removing clock cycle state data with earlier timings and synchronously incorporating the link transmission state data of the latest clock cycle. After the sliding window is updated, the flow control module summarizes the number of the first clock cycles in which backpressure has occurred on the transmission link within the current sliding window. Then, by using the ratio of this first clock cycle number to the total number of clock cycles in the sliding window, the proportion of backpressure events corresponding to the current transmission link is obtained, providing accurate data for subsequent link congestion assessment and flow priority control.

[0056] For example, the flow control module follows the system global clock timing and continuously and synchronously samples the request signal and ready signal of the transmission link, completing one signal sampling and state latching in each clock cycle.

[0057] For example, the flow control module performs real-time logical verification and discrimination on the link handshake signals collected in each clock cycle. The module captures the latched request signal and ready signal status cycle by cycle. When it detects a combination of a valid high request signal and an invalid low ready signal in the current cycle, it immediately determines that the transmission link has a flow transmission blockage in that clock cycle, triggers a backpressure event, and marks, counts, and stores the backpressure clock cycle, completing the automatic judgment and recording of the single-cycle backpressure status.

[0058] For example, the flow control module continuously advances along with the system's global clock. After completing signal sampling and status determination in each clock cycle, it synchronously triggers the rolling update of the sliding window, removes the historical status data with the earliest time sequence in the window, and incorporates the link transmission status data of the latest clock cycle. It always maintains a fixed statistical length of the sliding window to achieve continuous rolling monitoring of the link blocking status.

[0059] For example, the traffic control module can also adopt a periodic batch update mechanism. A fixed update step size can be preset, and a sliding window iterative update can be performed uniformly at intervals of multiple clock cycles. Multiple sets of historical state data with earlier time sequences in the window are removed in batches, and the latest link transmission status data of the corresponding time period are simultaneously included in batches. While ensuring the continuity of link congestion monitoring, the hardware computing power and power consumption caused by high-frequency updates are greatly reduced.

[0060] For example, after the sliding window is updated, the traffic control module counts the total number of clock cycles marked as backpressure events within the current sliding window. By calculating the ratio of the total number of backpressure clock cycles to the total number of clock cycles in the sliding window, the real-time backpressure event ratio of the current transmission link is obtained, thus completing the quantitative calculation of the link blocking status.

[0061] This embodiment is based on a cycle-by-cycle signal sampling, logical discrimination, and sliding window statistical mechanism, which can accurately quantify the link back pressure ratio and effectively avoid statistical deviations caused by instantaneous traffic fluctuations.

[0062] Optionally, this application also provides an embodiment of updating the sliding window based on the timing progression of each clock cycle. In this embodiment, a preset number of clock cycles is used as a statistical window, and the sliding window is updated after all clock cycles of a statistical window have passed; the total number of clock cycles of the sliding window is an integer multiple of the number of clock cycles of a single statistical window.

[0063] The statistical window is a pre-configured, fixed-duration basic statistical timing granularity, consisting of a fixed number of consecutive system clock cycles. It is the smallest time-series unit that triggers the sliding window update. Compared to the update granularity of a single clock cycle, the statistical window has a natural filtering capability for instantaneous and scattered link status jitter. Aggregating link transmission status in units of statistical windows can improve the stability and reliability of the overall statistical results.

[0064] In one implementation, the sliding window performs iterative updates at the level of a complete statistical window. As the system timing progresses, the flow control module triggers a full update of the sliding window after accumulating all clock cycles of a statistical window. During the update process, the earliest historical link status data corresponding to the number of clock cycles in the statistical window are removed in batches, while all link status data corresponding to the latest statistical window are added in batches. Since the total number of clock cycles in the sliding window is an integer multiple of the number of clock cycles in a single statistical window, the total duration and statistical granularity remain fixed after the window update, which can stably achieve phased rolling statistics of link blocking status, while effectively reducing the hardware power consumption and logic operation overhead caused by frequent window updates.

[0065] For example, the overall timing is divided into 8 consecutive and non-overlapping clock cycles "adjustment windows" as statistical windows for the flow control module to count back pressure events. At the same time, a 3-bit loop counter tick_cnter is configured to perform timing counting. The counter counts from 0 to 7 cycle by cycle. After completing one round of 8-cycle counting, it is automatically reset to zero and counts again. This process is repeated to stably divide the statistical window into fixed 8 cycles, providing a standard timing granularity for the update of the sliding window.

[0066] This embodiment optimizes the update timing logic of the sliding window based on the batch update mechanism of the statistical window, avoids the resource consumption of high-frequency updates in a single cycle, further suppresses the interference of instantaneous traffic jitter on the statistical results, and improves the hardware adaptability and energy efficiency of on-chip network traffic control while ensuring the accuracy of link blocking status statistics.

[0067] Optionally, multiple sliding windows of different lengths can be configured, with each sliding window containing a number of statistical windows that are powers of 2.

[0068] In one implementation, to adapt to the varying bandwidth traffic fluctuations, congestion monitoring accuracy, and real-time requirements of the on-chip network, multiple adaptable sliding window specifications can be configured based on the actual transmission scenario and link load characteristics. All sliding windows use a fixed 8-clock-cycle statistical adjustment window as the statistical window, and the number of statistical windows contained in each sliding window is an integer power of 2.

[0069] For example, the sliding window size supports five specifications: 8, 16, 32, 64, and 128 clock cycles, corresponding to 1, 2, 4, 8, and 16 statistical windows respectively, perfectly matching the unit number configuration rule of powers of 2. Specifically, the window specification selection configuration is implemented through a 3-bit binary configuration register cfg_ob_auto_bw_mon_win_size. This 3-bit binary register can define multiple sets of window configuration codes, with the code value, the number of statistical windows, and the total clock cycles of the sliding window corresponding one-to-one. The specific configuration logic and numerical meanings are as follows: 3'b111 corresponds to a sliding window of 128 clock cycles, which contains 16 statistical windows; 3'b110 corresponds to a sliding window of 64 clock cycles, which contains 8 statistical windows; 3'b101 corresponds to a sliding window of 32 clock cycles, which contains 4 statistical windows; 3'b100 corresponds to a sliding window of 16 clock cycles, which contains 2 statistical windows; The remaining registers are configured by default to a sliding window of 8 clock cycles, including 1 statistics window.

[0070] Sliding windows of different lengths can selectively filter occasional link congestion events. By matching observation intervals of different durations, they can accurately reflect the instantaneous, short-term, and long-term global congestion status of the links, adapting to differentiated traffic monitoring and control needs.

[0071] For example, based on the above register configuration rules, each sliding window size has differentiated performance advantages and application scenarios: Small sliding windows with 8 or 16 clock cycles offer fast response and extremely low computational overhead, suitable for monitoring instantaneous traffic fluctuations in the link, quickly capturing short-term sudden congestion, and adapting to real-time traffic control scenarios with high-speed dynamic switching. Medium sliding windows with 32 clock cycles balance real-time monitoring with statistical stability, filtering out sporadic traffic fluctuations and accurately reflecting the normal load status of the link, adapting to most normal traffic transmission scenarios. Large sliding windows with 64 or 128 clock cycles have a longer statistical range, effectively filtering out accidental and instantaneous congestion interference, avoiding mis-control caused by short-term abnormal traffic, and accurately reflecting the long-term, stable global congestion state of the link, suitable for high-precision monitoring scenarios such as link steady-state performance evaluation and long-term traffic balancing scheduling. The traffic control module can flexibly switch sliding window sizes according to the real-time traffic load and transmission scenario of the on-chip network to achieve refined and adaptive link congestion statistics and traffic control.

[0072] Optionally, this application also provides an embodiment for obtaining the proportion of backpressure events based on the first clock cycle number of backpressure events triggered by the transmission link within each updated sliding window and the total clock cycle number of the sliding window. In this embodiment, normalization operations are performed on the first clock cycle number of backpressure events triggered by the transmission link within each updated sliding window and the number of statistical windows corresponding to each updated sliding window to obtain the normalized value of each updated sliding window. The proportion of backpressure events is determined based on the normalized value of each updated sliding window.

[0073] In one implementation, the flow control module uses a hardware accumulation tree to perform high-speed accumulation and summation of backpressure counts within a sliding window. It leverages a 16-level accumulation tree structure, sum_0_x[15:0], to perform bit-by-bit aggregation calculations on the backpressure status data of all statistical windows within the sliding window. To match the maximum statistical range of 128 backpressure counts and avoid data overflow, the flow control module expands the high-order bits of the 4-bit backpressure status data of a single statistical window to an 8-bit width before performing the accumulation operation, ensuring the accuracy of numerical storage and calculation.

[0074] This scheme uses a step-by-step iterative accumulation formula to complete the aggregation operation of multi-unit back pressure state data. The entire operation logic relies on a combination accumulation chain, a combination accumulation tree, or step-by-step accumulation logic to achieve batch data summation. The specific iterative logic of the accumulation formula is as follows: The initial assignment formula for the first level is shown below: sum_0_x[0]=valid_unready_chain[0]; The above formula is the initialization operation of the accumulator tree. valid_unready_chain[0] corresponds to the number of back pressure clock cycles obtained in the first basic statistical window, which is the number of the first clock cycles corresponding to the statistical window. After the flow control module completes the 4-bit to 8-bit high bit width expansion of this data, it assigns it to the initial register node of the accumulator tree to complete the loading of the initial accumulation value and provide the reference data for the subsequent step-by-step accumulation operation.

[0075] For the range i from 1 to 15, perform iterative accumulation operations level by level, as shown in the following formula: sum_0_x[i]=sum_0_x[i-1]+valid_unready_chain[i]; The above formula is the progressive iterative operation logic. valid_unready_chain[i] is the number of the first clock cycles corresponding to the i-th basic statistical window. The operation result of each level node is the sum of the cumulative total value of the previous level node sum_0_x[i-1] and the number of the first clock cycles of the current sequence statistical window. By iterating step by step, the batch accumulation and aggregation of the number of the first clock cycles corresponding to the 16 statistical windows are completed in sequence, avoiding the hardware operation congestion caused by a single large-scale summation.

[0076] Based on the iterative calculation of the above two-level formula, the total number of backpressures in all 16 statistical windows in the current sliding window is finally output through sum_0_x

[15] , which is also the number of the first clock cycle of the sliding window. The hardware design of the 16-level accumulator tree matches the formula iteration logic. The maximum statistical range is 16×8=128, which can completely cover the backpressure statistical requirements of all sliding windows of all specifications from 8 cycles to 128 cycles in this application. At the same time, the step-by-step iterative formula calculation method has a regular hardware timing, simple logic, and low calculation delay, which can realize the real-time high-speed aggregation of backpressure status data.

[0077] In one implementation, to eliminate data bias caused by inconsistencies in statistical dimensions across sliding windows of different lengths and to achieve horizontal comparison and unified assessment of congestion states across multiple window sizes, the traffic control module standardizes and normalizes the accumulated total number of backpressure events. Since the original total number of backpressure events under different window lengths is not directly comparable—for example, the link congestion levels corresponding to 100 backpressure events within a 128-cycle window differ significantly from those corresponding to 10 backpressure events within a 16-cycle window—this solution uniformly normalizes the total number of backpressure events for sliding windows of different sizes to a standard dimension of "average number of backpressure events per 8 cycles," thereby obtaining a unified standard backpressure index. This normalization method uses an 8-clock-cycle basic statistical window as the benchmark granularity, adapting to the configuration characteristic that all sliding windows in this application are integer multiples of 8 cycles, effectively unifying the statistical standards for each window size.

[0078] For example, the flow control module performs parallel high-speed summation by combining accumulation chains, combining accumulation trees, or hierarchical accumulation logic, sequentially accumulating the backpressure counts of all statistical windows within the sliding window to accurately output the total global backpressure count. Then, it performs normalization by combining the number of statistical windows corresponding to the current sliding window, uniformly mapping the statistical data of windows of different durations to a single 8-period benchmark dimension to obtain the standardized average backpressure index, i.e., the normalized value.

[0079] This embodiment achieves high-speed and accurate aggregation of backpressure status data through a multi-level accumulator tree. At the same time, it solves the problem of the inability to horizontally compare statistical results of multi-size sliding windows through standardized normalization operations, unifies the quantitative evaluation standard of link congestion, and greatly improves the accuracy, universality and comparability of link blocking status assessment under different bandwidth traffic scenarios, providing standardized data support for subsequent accurate and unified adaptive traffic priority control.

[0080] Optionally, for any updated sliding window among the updated sliding windows, the following steps are performed: determine the number of binary shift bits based on the number of statistical windows of any updated sliding window, perform a right shift operation on the first clock cycle number corresponding to any updated sliding window according to the number of binary shift bits, and round the result of the right shift operation based on the bits discarded in the right shift operation to obtain the normalized value corresponding to any updated sliding window.

[0081] In one implementation, the flow control module achieves low-overhead hardware normalization calculation based on binary shift operations. Leveraging the configuration characteristic of the sliding window statistical window number being an integer power of 2, the division operation is converted into a hardware-efficient right shift operation, eliminating the need for a complex divider and significantly saving logic resources. The flow control module first reads the number of statistical windows corresponding to the current sliding window, and matches the corresponding number of binary shift bits based on the statistical window number. The number of statistical windows and the number of shift bits are strictly correlated; the number of shift bits increases by one every time the number of units doubles. Based on this, the flow control module performs a binary right shift operation on the total number of backpressure cycles (i.e., the number of the first clock cycles) obtained within the sliding window, according to the matched number of shift bits. Simultaneously, it captures the low-order bits discarded during the right shift, and performs carry-over or rounding operations on the right shift result based on the value of the discarded bits to correct the precision error caused by shift truncation. Finally, it outputs the normalized value, completing the unified quantization conversion of backpressure data under different window specifications.

[0082] This embodiment achieves high-speed and accurate aggregation of backpressure data through a multi-level accumulator tree. At the same time, it solves the problem of the inability to compare statistical results of multiple sliding windows horizontally through standardized normalization operations, unifies the quantitative evaluation standard of link congestion, and greatly improves the accuracy, universality and comparability of link blocking status assessment under different bandwidth traffic scenarios, providing standardized data support for subsequent accurate and unified adaptive traffic priority control.

[0083] In one implementation, after obtaining the normalized value corresponding to the sliding window, the traffic control module performs a quantitative determination of the link blocking level based on the normalized value and generates a 3-bit backpressure index sum_index to characterize the degree of congestion.

[0084] For example, the traffic control module matches the corresponding normalized value according to the currently configured sliding window specification and performs overflow verification on the normalized value. The overflow judgment rule is: if the most significant bit of the normalized value is 1, it is determined that the average backpressure value has overflowed, indicating that the average backpressure clock cycle number of the current single statistical window is greater than or equal to 8, and the link congestion level has reached the upper limit threshold. The traffic control module generates a backpressure index based on the overflow verification result: when the highest bit of the normalized value is detected to be 1 and the value overflows, it directly assigns sum_index=7, corresponding to the highest blocking level of the link. When the normalized value does not overflow, the lower 3 bits of the normalized value are truncated as the valid value of sum_index, and the value range of sum_index is 0 to 7.

[0085] Among them, the backpressure index sum_index is the core parameter for quantifying the degree of link congestion. The overall value range is fixed from 0 to 7. The index value is positively correlated with the degree of backpressure congestion of the link. The larger the value, the more frequent the average backpressure phenomenon of the link within the current sliding window and the more severe the congestion. It can be directly used as the basis for subsequent link traffic scheduling and priority adaptive control.

[0086] Optionally, this application also provides an embodiment for determining the target adjustment duration for congestion adjustment of the transmission link based on the degree of congestion. In this embodiment, a second clock cycle number for congestion adjustment is determined based on the degree of congestion, and the degree of congestion is positively correlated with the magnitude of the second clock cycle number.

[0087] In one implementation, after the traffic control module completes the link blocking level determination and obtains the 3-bit backpressure index sum_index, it performs a quantitative mapping from the blocking level to the target adjustment duration through a QoS rewrite duration lookup table.

[0088] For example, the traffic control module has a built-in QoS rewrite duration lookup table with a depth of 8 and a single entry width of 4 bits. The one-dimensional address range of this lookup table is [7:0], which corresponds one-to-one with the value range of sum_index from 0 to 7. The two-dimensional data width is [3:0], which is used to store the number of QoS priority rewrite duration clock cycles (i.e., the number of second clock cycles) corresponding to different blocking levels.

[0089] In one implementation, to adapt to the hierarchical control rules of an 8-clock-cycle adjustment window, a single 8-clock-cycle basic adjustment window is used as the control cycle base. For the eight levels of backpressure index sum_index (0-7), a second clock cycle number with a uniformly decreasing gradient is set to ensure a linear positive correlation between the blocking level and the control intensity, avoiding control gaps caused by irregular jumps. The specific standardized mapping configuration, target adjustment duration, and technical implications are shown in the table below:

[0090] Optionally, this application also provides an embodiment for adjusting the transmission priority of different bandwidth traffic waiting to be transmitted in a transmission link, so as to reduce the proportion of events triggering backpressure within a subsequent sliding window. In this embodiment, the transmission priority of the first traffic is set to the first priority, and the transmission priority of the second traffic is set to the second priority, wherein the first priority is higher than the second priority.

[0091] In one implementation, the traffic control module is configured with two sets of 16-bit wide QoS mapping tables with identical specifications and indexing rules. Both use the 4-bit original QoS value axqos as the index x (x ranges from 0 to 15), and output a 1-bit arbitration priority when looking up the table, distinguishing only between 0 (low priority) and 1 (high priority). The two mapping tables are the default QoS mapping table cfg_qos_map_array[15:0] and the automatic bandwidth adjustment (Auto-BWQoS) mapping table cfg_ob_auto_bw_qos_map_array[15:0]. The default QoS mapping table serves as the system's normal scheduling benchmark, mapping the original axqos to arbitration priority according to preset static rules. The Auto-BWQoS mapping table is configured for link congestion control scenarios, mapping high-bandwidth traffic (first traffic) to high arbitration priority and low-bandwidth traffic (second traffic) to low arbitration priority, thereby achieving traffic resource tilt scheduling during congestion periods.

[0092] For example, the traffic control module first performs a lookup of the congestion level based on the sliding window statistics to obtain the target adjustment duration for QoS priority rewriting. Then, within each 8-clock-cycle adjustment window, a QoS coverage enable signal `qos_override_en` is generated as the trigger for switching between the two mapping tables and dynamically rewriting traffic priorities. The determination logic is as follows: the traffic control module reads the cycle counter `tick_cnter` (value 0-7) within the adjustment window and compares it in real-time with the QoS priority rewriting duration clock cycle number (second clock cycle number) `cfg_ob_auto_bw_qos_vld_win[sum_index]` output from the lookup table; if `tick_cnter` is less than the second clock cycle number, `qos_override_en` is pulled high, and dynamic QoS rewriting (i.e., transmission priority adjustment) is performed in the current clock cycle; in other clock cycles, `qos_override_en` remains low, using the default priority mapping rules. For example, if the backpressure index sum_index=5, and the table shows that the rewrite cycle number is 6, then within the current 8-cycle adjustment window, tick_cnter=0~5 (6 cycles in total), qos_override_en will remain high, and dynamic QoS rewriting will be performed. When tick_cnter=6 or 7, dynamic QoS rewriting will be disabled, and normal scheduling will resume.

[0093] For example, the traffic control module combines the global enable signal cfg_ob_auto_bw_en and the window override enable signal qos_override_en to achieve dynamic switching between the two tables: the Auto-BWQoS mapping table is switched to only when cfg_ob_auto_bw_en=1 (automatic bandwidth adjustment function is enabled) and qos_override_en=1 (in a valid override window); in other operating conditions, the default QoS mapping table is called to ensure stable normal transmission.

[0094] For example, the switching-effective mapping table ultimately affects the router's output queue arbitration logic. Each traffic item to be transmitted in the queue carries a 4-bit original axqos value, which is converted twice through the currently effective mapping table to output the final arbitration priority. During the QoS rewriting effective period (cfg_ob_auto_bw_en=1, qos_override_en=1), the enabled Auto-BWQoS mapping table maps high-bandwidth traffic (first traffic) to priority 1, giving it priority in preempting transmission resources and sending in arbitration, while low-bandwidth traffic (second traffic) is mapped to priority 0, reducing its transmission preemption rights and delaying its transmission.

[0095] This embodiment relies on adaptive switching of dual QoS mapping tables to achieve congestion self-regulation. When different degrees of congestion occur in the transmission link, the priority of high-bandwidth traffic is raised in stages, the transmission of low-bandwidth traffic is suppressed, the allocation of link resources is optimized, transmission congestion is relieved, back pressure generation is reduced from the source, the proportion of back pressure events in the subsequent sliding window is reduced, and the on-chip network transmission efficiency and the balance of multi-type traffic scheduling are taken into account.

[0096] According to the above embodiments, such as Figure 3 The diagram shows the structural framework of a data transmission system. This system is deployed within the crossbar switch of a Network on a Chip (NoC), and its overall architecture includes a Virtual Output Queue (VOQ), a request queue, an arbitration and QoS rewriting unit, a control register module, and an Auto-BW module.

[0097] The upstream master device sends a first / second traffic request carrying axqos priority information to the request queue; the request queue outputs the first / second traffic request to the arbitration and QoS rewriting unit. The arbitration and QoS rewriting unit outputs handshake signals (axvalid, axready) to the Auto-BW module to provide feedback on the link backpressure status, which is then collected and identified by the backpressure monitoring module inside the Auto-BW module.

[0098] The Auto-BW module, also known as the traffic control module mentioned earlier, internally consists of a cascaded backpressure monitoring module, a sliding window statistics module, a backpressure index calculation module, a QoS rewrite duration determination module, and a QoS mapping table switching module, along with an external independent timer. The interaction logic between these units is as follows: the backpressure monitoring module collects handshake signals and identifies backpressure events, sending these events to the sliding window statistics module; the timer provides timing count signals to the sliding window statistics module; and the control register module sends the sliding window size configuration parameter `cfg_ob_auto_bw_mon_win_size` to the sliding window statistics module.

[0099] The sliding window statistics module completes statistical calculations based on timing and configuration parameters, and outputs the historical backpressure total value (number of first clock cycles) to the backpressure index calculation module. The backpressure index calculation module performs a normalization operation on the historical backpressure total value to obtain the normalized backpressure index sum_index, and uses this index as the addressing index of the QoS rewrite duration determination module to look up the table to obtain the QoS rewrite cycle number (i.e., the target adjustment duration) cfg_ob_auto_bw_qos_vld_win[sum_index].

[0100] The control register module loads the QoS rewrite duration lookup table cfg_ob_auto_bw_qos_vld_win into the QoS rewrite duration determination module. Simultaneously, it inputs the default QoS mapping table cfg_qos_map_array and the Auto-BW QoS mapping table cfg_ob_auto_bw_qos_map_array, as described above, into the QoS mapping table switching module, and outputs the Auto-BW global enable signal cfg_ob_auto_bw_en.

[0101] The QoS rewriting duration determination module outputs the number of QoS rewriting cycles to the QoS mapping table switching module. The QoS mapping table switching module combines the number of rewriting cycles with the Auto-BW global enable signal cfg_ob_auto_bw_en, and the window rewriting enable signal qos_override_en generated by the window counter tick_cnter, to select and output the final effective QoS mapping table, and outputs the mapping table to the arbitration and QoS rewriting unit.

[0102] The arbitration and QoS rewriting unit rewrites the axqos priority of the transmission requests in the request queue based on the currently effective QoS mapping table, and finally sends the first / second traffic request that has completed arbitration to the downstream cross switch or slave device.

[0103] Furthermore, this embodiment provides a data transmission device, such as... Figure 4 The diagram shows a data transmission device, which includes: a first determining module 410, an evaluation module 420, a second determining module 430, and an adjustment module 440; wherein: The first determining module 410 is configured to determine the proportion of backpressure events that trigger backpressure within a sliding window in the transmission link.

[0104] Evaluation module 420 is configured to evaluate the degree of congestion in traffic transmission within a sliding window based on the proportion of backpressure events.

[0105] The second determining module 430 is configured to determine the target adjustment duration for adjusting the transmission link based on the degree of congestion.

[0106] The adjustment module 440 is configured to adjust the transmission priority of different bandwidth traffic waiting to be transmitted in the transmission link within the target adjustment duration, so as to reduce the proportion of backpressure events triggered in the subsequent sliding window.

[0107] It should be noted that other corresponding descriptions of the functional units involved in the data transmission device provided in this embodiment can be found in the description of the data transmission method in the above embodiments, and will not be repeated here.

[0108] Based on the data transmission method shown in the above embodiments, this embodiment also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the method shown in the above embodiments.

[0109] Based on the methods shown in the above embodiments, this embodiment also provides a computer program product on which a computer program is stored, and when the computer program product is executed by a processor, it implements the methods shown in the above embodiments.

[0110] Based on this understanding, the technical solution of this application can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (such as CD-ROM, USB flash drive, mobile hard drive, etc.) and includes several instructions to cause a computer device (such as personal computer, server, or network device, etc.) to execute the methods of various implementation scenarios of this application.

[0111] Based on the method shown in the above embodiments, and Figure 4 To achieve the above objectives, the present application also provides an electronic device, such as a terminal device, in the virtual device embodiment shown. The electronic device includes a storage medium and a processor; the storage medium is used to store a computer program; the processor is used to execute the computer program to implement the method shown in the above embodiment.

[0112] Optionally, the aforementioned physical devices may also include a user interface, a network interface, a camera, radio frequency (RF) circuitry, sensors, audio circuitry, a Wi-Fi module, etc. The user interface may include a display screen, input units such as a keyboard, etc., and optional user interfaces may also include USB interfaces, card reader interfaces, etc. The network interface may optionally include standard wired interfaces, wireless interfaces (such as Wi-Fi interfaces), etc.

[0113] Those skilled in the art will understand that the physical device structure provided in this embodiment does not constitute a limitation on the physical device, and may include more or fewer components, or combine certain components, or have different component arrangements.

[0114] The storage medium may also include an operating system and a network communication module. The operating system is a program that manages the hardware and software resources of the aforementioned physical device, supporting the operation of information processing programs and other software and / or programs. The network communication module is used to enable communication between the various components within the storage medium, as well as communication with other hardware and software in the information processing physical device.

[0115] Through the above description of the embodiments, those skilled in the art can clearly understand that this application can be implemented using software plus necessary general-purpose hardware platforms, or it can be implemented in hardware. Compared with the current related technologies, this application first determines the proportion of backpressure events that trigger backpressure in the transmission link within a sliding window, assesses the degree of congestion of the transmission link based on this proportion, then determines the target adjustment duration corresponding to the congestion adjustment based on the degree of congestion, and adjusts the transmission priority of different bandwidth traffic waiting to be transmitted in the transmission link within the target adjustment duration, thereby reducing the proportion of events that trigger backpressure in the subsequent sliding window. Through the above steps, this application can alleviate the continuous backpressure of the transmission link, reduce the accumulation of high-bandwidth traffic, suppress the increase in access latency, and improve the overall data throughput and computing performance of the chip.

[0116] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0117] The above description is merely a specific embodiment of this application, enabling those skilled in the art to understand or implement this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments described herein, but is to be accorded the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A data transmission method, characterized in that, include: Determine the percentage of backpressure events that trigger backpressure within the sliding window of the transmission link; Based on the proportion of backpressure events, assess the degree of congestion in traffic transmission of the transmission link within the sliding window; Based on the degree of congestion, determine the target adjustment duration for adjusting the congestion on the transmission link; Within the target adjustment period, the transmission priority of different bandwidth traffic waiting to be transmitted in the transmission link is adjusted to reduce the proportion of events that trigger backpressure within the subsequent sliding window.

2. The method according to claim 1, characterized in that, The determination of the proportion of backpressure events triggering backpressure within the sliding window of the transmission link includes: Obtain the request signal and ready signal of the transmission link in each clock cycle; If the request signal indication is valid and the ready signal indication is invalid during the target clock cycle, it is determined that the transmission link triggers back pressure during the target clock cycle; the target clock cycle is any one of the clock cycles. The sliding window is updated according to the timing progression of each clock cycle; The proportion of backpressure events is obtained based on the number of the first clock cycles of backpressure triggered within the updated sliding window of the transmission link and the total number of clock cycles of the sliding window.

3. The method according to claim 2, characterized in that, The step of updating the sliding window according to the timing progression of each clock cycle includes: A statistical window is defined as a preset number of clock cycles. After all clock cycles of a statistical window have passed, the sliding window is updated. The total number of clock cycles of the sliding window is an integer multiple of the number of clock cycles of a single statistical window.

4. The method according to claim 3, characterized in that, Configure multiple sliding windows of different lengths, with each sliding window containing a number of statistical windows that are powers of 2.

5. The method according to claim 4, characterized in that, The percentage of backpressure events is obtained based on the first clock cycle number of backpressure events triggered within the updated sliding window of the transmission link and the total clock cycle number of the sliding window, including: Normalization operations are performed based on the number of first clock cycles in which the transmission link triggers back pressure within each of the updated sliding windows, and the number of statistical windows corresponding to each of the updated sliding windows, to obtain the normalized value of each of the updated sliding windows. The proportion of backpressure events is determined based on the normalized values ​​of each updated sliding window.

6. The method according to claim 5, characterized in that, For any of the updated sliding windows, perform the following steps: The number of binary shift bits is determined based on the number of statistical windows in any of the updated sliding windows; Perform a right shift operation on the first clock cycle number corresponding to any updated sliding window according to the binary shift bit number; The result of the right shift operation is rounded based on the bits discarded during the right shift operation to obtain the normalized value corresponding to any updated sliding window.

7. The method according to any one of claims 1-6, characterized in that, The step of determining the target adjustment duration for adjusting the transmission link based on the degree of congestion includes: Based on the degree of blocking, a second number of clock cycles for blocking adjustment is determined, wherein the degree of blocking is positively correlated with the magnitude of the second number of clock cycles.

8. The method according to any one of claims 1-6, characterized in that, The different bandwidth traffic includes a first traffic and a second traffic, wherein the bandwidth of the first traffic is greater than the bandwidth of the second traffic; The adjustment of the transmission priority of different bandwidth traffic waiting to be transmitted in the transmission link, in order to reduce the proportion of backpressure events triggered in the subsequent sliding window, includes: The transmission priority of the first traffic is set to the first priority, and the transmission priority of the second traffic is set to the second priority, wherein the first priority is higher than the second priority.

9. A data transmission device, characterized in that, The device includes a first determining module, an evaluation module, a second determining module, and an adjustment module; wherein: The first determining module is configured to determine the percentage of backpressure events that trigger backpressure within a sliding window in the transmission link; The evaluation module is configured to evaluate the degree of congestion of the transmission link during traffic transmission within a sliding window based on the proportion of backpressure events. The second determining module is configured to determine a target adjustment duration for adjusting the blockage of the transmission link based on the degree of blockage. The adjustment module is configured to adjust the transmission priority of different bandwidth traffic waiting to be transmitted in the transmission link within the target adjustment duration, so as to reduce the proportion of events that trigger backpressure in the subsequent sliding window.

10. An electronic device comprising a storage medium, a processor, and a computer program stored on the storage medium and executable on the processor, characterized in that, When the processor executes the computer program, it implements the data transmission method according to any one of claims 1 to 8.

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