Image encoder excitation generation method, apparatus, image encoder verification method, and computer program

Abstract

The application discloses an image encoder excitation generation method and device, an image encoder verification method and a computer program, relates to the technical field of image testing, and comprises the following steps: determining an internal boundary state of at least one to-be-verified module in a target image encoder; wherein the internal boundary state is a working state triggered by the to-be-verified module under target input; constructing a frequency domain coefficient matrix based on the internal boundary state, and inversely solving the frequency domain coefficient matrix through inverse discrete cosine transformation to generate a spatial domain pixel block corresponding to the internal boundary state; and constructing an image excitation for verifying the target image encoder by using the spatial domain pixel block. The application can automatically generate an image excitation for triggering the internal boundary state, improves the coverage completeness of the verification excitation, reduces the redundancy of the verification excitation, and is favorable for improving the simulation resource utilization efficiency.

Description

Technical Field

[0001] This invention relates to the field of image testing technology, and in particular to an image encoder excitation generation method, apparatus, image encoder verification method, and computer program. Background Technology

[0002] Traditional verification stimuli are mostly derived from real photographs or standard test images. However, because the DCT (Discrete Cosine Transform) coefficients of real images typically exhibit the data distribution characteristics of natural images, low-probability protocol scenarios such as high-frequency coefficients, special Huffman coding codewords, and quantization rounding boundaries are difficult to fully occur, resulting in insufficient coverage completeness of the verification stimuli. Furthermore, since these boundary scenarios are difficult to trigger stably using real images, the verification process often requires supplementing stimuli based on the coverage results after simulation, making the verification process rather passive and increasing manpower and time costs. Simultaneously, in high-resolution test scenarios, real image data is prone to repetition or similar content, causing the DUT (Design Under Test) to process stimuli with minimal effective differences during long simulations, resulting in high redundancy of verification stimuli and low effective coverage density, thereby reducing the efficiency of simulation resource utilization.

[0003] Therefore, traditional methods suffer from drawbacks such as insufficient verification stimulus coverage, passive verification process, high stimulus redundancy, and low simulation resource utilization efficiency, making it difficult to efficiently support the full verification of the boundary functions of JPEG (Joint Photographic Experts Group) encoders. Summary of the Invention

[0004] In view of this, the purpose of this invention is to provide an image encoder stimulus generation method, apparatus, image encoder verification method, and computer program, which can actively generate image stimuli for triggering internal boundary states, improve the coverage completeness of verification stimuli, reduce the redundancy of verification stimuli, and improve the efficiency of simulation resource utilization. The specific solution is as follows: In a first aspect, this application discloses an image encoder excitation generation method, comprising: Determine the internal boundary state of at least one module to be verified in the target image encoder; wherein, the internal boundary state is the working state triggered by the module to be verified under the target input; A frequency domain coefficient matrix is ​​constructed based on the internal boundary state, and the frequency domain coefficient matrix is ​​solved in reverse by inverse discrete cosine transform to generate spatial domain pixel blocks corresponding to the internal boundary state. Using the spatial domain pixel blocks, an image stimulus is constructed to verify the target image encoder.

[0005] Optionally, determining the internal boundary state of at least one module to be verified in the target image encoder includes: Obtain the target configuration information of the target image encoder; Based on the target configuration information, the rare codewords to be covered are determined, and the corresponding run-length symbols are determined according to the rare codewords to be covered. Then, the run-length symbols are used as the target input. Obtain the internal boundary state triggered by at least one of the modules to be verified under the run-length symbol.

[0006] Optionally, constructing the frequency domain coefficient matrix based on the internal boundary states includes: The frequency domain matrix of the preset size is initialized to obtain the initialized frequency domain matrix; The target coefficient value to be filled is determined based on the internal boundary state; The target coefficient values ​​to be filled are entered into the initialized frequency domain matrix at the positions corresponding to the internal boundary states to obtain the frequency domain coefficient matrix.

[0007] Optionally, determining the target coefficient value to be filled based on the internal boundary state includes: Identify the preset boundary type corresponding to the internal boundary state; The target coefficient value to be filled is directly determined based on the preset boundary type.

[0008] Optionally, the step of solving the frequency domain coefficient matrix in reverse using inverse discrete cosine transform to generate spatial domain pixel blocks corresponding to the internal boundary states includes: Perform an inverse discrete cosine transform on the frequency domain coefficient matrix to obtain the initial pixel block; According to a preset pixel adjustment strategy, the initial pixel block is clamped and its brightness is adjusted to generate the spatial domain pixel block corresponding to the internal boundary state.

[0009] Optionally, using the spatial domain pixel blocks, an image stimulus for verifying the target image encoder is constructed, including: A pixel library is constructed based on multiple spatial domain pixel blocks; The filling method is determined based on the image resolution of the test image; The spatial domain pixel blocks in the pixel library are filled into the test image based on the filling method to obtain the filled image; The padded image is normalized to generate an image stimulus for verifying the target image encoder.

[0010] Optionally, determining the filling method based on the image resolution of the test image includes: If the image resolution is greater than the resolution threshold, then the filling method is determined to be random filling; the random filling is to randomly extract the spatial domain pixel blocks in the pixel library and fill the extracted spatial domain pixel blocks into the test image in sequence until the test image is filled. If the image resolution is not greater than the resolution threshold, then the filling method is determined to be tiling fill; the tiling fill is to select at least one spatial domain pixel block from the pixel library and cyclically fill the test image with at least one spatial domain pixel block until the test image is filled.

[0011] Secondly, this application discloses an image encoder excitation generation apparatus, comprising: A boundary state determination module is used to determine the internal boundary state of at least one module to be verified in the target image encoder; wherein, the internal boundary state is the working state triggered by the module to be verified under the target input; The pixel block generation module is used to construct a frequency domain coefficient matrix based on the internal boundary state, and to solve the frequency domain coefficient matrix in reverse by inverse discrete cosine transform to generate a spatial domain pixel block corresponding to the internal boundary state. An image stimulus generation module is used to construct an image stimulus for verifying the target image encoder using the spatial domain pixel blocks.

[0012] Thirdly, this application discloses an image encoder verification method, including: The image stimulus generated by the image encoder stimulus generation method described above is input into the image encoder to be verified and the corresponding algorithm model. The verification result of the image encoder to be verified is obtained based on the output of the image encoder to be verified and the output of the algorithm model.

[0013] Fourthly, this application discloses a computer program that, when executed by a processor, implements the aforementioned image encoder excitation generation method or the aforementioned image encoder verification method.

[0014] As can be seen, this application proposes an image encoder excitation generation method, comprising: determining the internal boundary state of at least one module to be verified in a target image encoder; wherein, the internal boundary state is the working state triggered by the module to be verified under a target input; constructing a frequency domain coefficient matrix based on the internal boundary state, and performing inverse solution on the frequency domain coefficient matrix through inverse discrete cosine transform to generate a spatial domain pixel block corresponding to the internal boundary state; and using the spatial domain pixel block to construct an image excitation for verifying the target image encoder. As can be seen, this application first determines the internal boundary state of at least one module to be verified in the target image encoder, then constructs a frequency domain coefficient matrix based on the internal boundary state, and performs inverse solution on the frequency domain coefficient matrix through inverse discrete cosine transform to obtain a spatial domain pixel block corresponding to the internal boundary state, and then uses the spatial domain pixel block to construct an image excitation for verifying the target image encoder. Since the generated image stimuli are constructed from the internal boundary states of the module to be verified, rather than directly using real photos or standard test images as verification stimuli, the limitations imposed by the natural distribution characteristics of real images on the verification stimuli are reduced. This ensures that the image stimuli correspond to the working state triggered by the module under the target input, thereby improving the problem of insufficient occurrence of low-probability protocol scenarios and enhancing the coverage completeness of the verification stimuli. Furthermore, since the internal boundary states of the module to be verified are determined before the image stimuli are generated, and corresponding spatial domain pixel blocks are generated accordingly, the need to supplement the stimuli based on the coverage results after simulation is reduced, decreasing the passivity of the verification process and the manpower and time costs required for manual stimuli construction. Simultaneously, since the image stimuli are constructed from spatial domain pixel blocks corresponding to the internal boundary states, stimuli unrelated to the internal boundary states to be verified are reduced, which helps to reduce verification stimuli redundancy, improve effective coverage density and simulation resource utilization efficiency, and thus efficiently support the full verification of the target image encoder's boundary functions. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0016] Figure 1 This is a flowchart of an image encoder excitation generation method disclosed in this application; Figure 2 This is a flowchart of an image encoder verification method disclosed in this application; Figure 3 This is a flowchart of a specific image encoder excitation generation method disclosed in this application; Figure 4 This is a schematic diagram of the structure of an image encoder excitation generation device disclosed in this application; Figure 5 This is a structural diagram of an electronic device disclosed in this application. Detailed Implementation

[0017] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0018] Traditional verification stimuli are mostly derived from real photos or standard test images. Since the DCT coefficients of real images usually have the data distribution characteristics of natural images, low-probability protocol scenarios are difficult to fully appear, resulting in insufficient coverage completeness of verification stimuli. The aforementioned boundary scenarios are difficult to trigger stably through real images. The verification process often requires supplementing the stimuli based on the coverage results after simulation, making the verification process relatively passive and increasing manpower and time costs. In high-resolution test scenarios, real image data are prone to repetition or similar content, causing the DUT to process stimuli with small effective differences during a long simulation process. This results in high redundancy of verification stimuli and low effective coverage density, thereby reducing the efficiency of simulation resource utilization.

[0019] To address this, this application proposes an image encoder stimulus generation scheme that can proactively generate image stimuli to trigger internal boundary states, thereby improving the coverage completeness of verification stimuli, reducing the redundancy of verification stimuli, and improving the efficiency of simulation resource utilization.

[0020] This application discloses an image encoder excitation generation method. (See also...) Figure 1 As shown, the method includes: Step S11: Determine the internal boundary state of at least one module to be verified in the target image encoder; wherein the internal boundary state is the working state triggered by the module to be verified under the target input.

[0021] In this embodiment, the target image encoder can be a JPEG encoder to be verified, or a hardware encoding module with JPEG encoding functionality. The target image encoder may include multiple functional modules during the encoding process, such as a DCT module, a quantization module, and an entropy encoding module. The module to be verified can be one or more of the aforementioned functional modules. The internal boundary state refers to the working state triggered by the module to be verified under the target input, used to characterize the boundary processing state entered by the module to be verified under specific input conditions.

[0022] For example, if the module to be verified is a quantization module, the internal boundary state can be the working state triggered when a target DCT coefficient value, after quantization, falls into the rounding point of the rounding function. That is, a target DCT coefficient value can be predetermined, such that after quantization, it corresponds to the rounding boundary, and this quantization boundary can be used as the internal boundary state to be covered. For example, if the module to be verified is a Huffman coding-related module, a longer or rarer Huffman codeword can be found based on the Huffman table currently used by the target image encoder. Then, the run (run length) and size (amplitude category) run symbols corresponding to these Huffman codewords can be determined in reverse, and these run symbols can be used as the target input. In this case, the internal boundary state can be the working state triggered when the module to be verified processes these run symbols and generates the corresponding Huffman codeword.

[0023] Based on this, the internal boundary states of at least one module to be verified in the target image encoder are determined, including: obtaining the target configuration information of the target image encoder; determining the rare codewords to be covered based on the target configuration information, determining the corresponding run symbols according to the rare codewords to be covered, and using the run symbols as target inputs; and obtaining the internal boundary states triggered by at least one module to be verified under the run symbols. Specifically, the target configuration information may include the Huffman table configuration currently used by the target image encoder, such as a custom AC Huffman (Alternating Current Huffman Coding) table configuration. Since the correspondence between codewords and run symbols may be different under different Huffman table configurations, the rare codewords to be covered under the current configuration can be determined by obtaining the target configuration information. The rare codeword can be a codeword with a long code length in the Huffman table or a codeword that is different from the codewords before and after in the Huffman table. After determining the rare codewords to be covered, the run symbols corresponding to the rare codewords are further searched, and the run symbols are used as target inputs. The run symbols can be used to represent the zero run length and amplitude category in the AC coefficient coding process, such as the combination of run and size. Furthermore, after obtaining the run-length symbol, at least one internal boundary state triggered by the module to be verified under that run-length symbol can be obtained. For example, when the run-length symbol corresponds to a long-length or rare Huffman codeword, the codeword generation state in the Huffman coding related module corresponding to the run-length symbol can be determined as the internal boundary state.

[0024] Step S12: Construct a frequency domain coefficient matrix based on the internal boundary state, and solve the frequency domain coefficient matrix in reverse by inverse discrete cosine transform to generate spatial domain pixel blocks corresponding to the internal boundary state.

[0025] In this embodiment, the frequency domain coefficient matrix refers to the matrix used to represent the values ​​of each coefficient of an image block in the frequency domain. For the JPEG encoding process, images are typically processed using DCT in blocks of a preset size; therefore, this preset size can be 8×8. A spatial domain pixel block refers to a pixel block that can serve as a unit of image excitation, which can be obtained by performing an inverse discrete cosine transform on the frequency domain coefficient matrix. That is, this embodiment does not prepare a real image first and then observe its frequency domain results; instead, it first constructs the frequency domain coefficient matrix according to the required internal boundary states, and then solves in reverse to obtain the corresponding spatial domain pixel block.

[0026] In this embodiment, constructing a frequency domain coefficient matrix based on internal boundary states includes: initializing a frequency domain matrix of a preset size to obtain an initialized frequency domain matrix; determining the target coefficient value to be filled according to the internal boundary states; and filling the target coefficient value into the initialized frequency domain matrix at the position corresponding to the internal boundary states to obtain the frequency domain coefficient matrix. Specifically, the frequency domain matrix of a preset size can be initialized first to obtain an initialized frequency domain matrix. For example, an 8×8 frequency domain matrix can be constructed, and each coefficient position in the frequency domain matrix can be initialized to zero. Then, the target coefficient value to be filled is determined according to the aforementioned internal boundary states, and the target coefficient value is filled into the initialized frequency domain matrix at the position corresponding to the internal boundary states to obtain the frequency domain coefficient matrix. The target coefficient value can be a DCT coefficient value used to trigger the corresponding internal boundary states. For example, when the internal boundary state corresponds to the boundary rounding point of the quantization module, the corresponding target DCT coefficient value can be determined according to the boundary rounding point, and the target DCT coefficient value can be filled into the specified position of the frequency domain matrix.

[0027] In one specific implementation, a preset boundary type corresponding to the internal boundary state can be identified first, and then the target coefficient value to be filled can be directly determined based on the preset boundary type. The preset boundary type can include a quantization boundary type or a codeword coverage boundary type. For the quantization boundary type, the DCT coefficient value that falls into the rounding function boundary position after quantization can be used as the target coefficient value to be filled; for the codeword coverage boundary type, the position and category of the non-zero coefficients to be formed in the frequency domain matrix can be determined based on the run and size symbols to be covered, and the target coefficient value to be filled can be determined accordingly.

[0028] In this embodiment, the frequency domain coefficient matrix is ​​solved in reverse by inverse discrete cosine transform to generate spatial domain pixel blocks corresponding to the internal boundary states. This includes: performing inverse discrete cosine transform on the frequency domain coefficient matrix to obtain initial pixel blocks; and performing clamping and brightness adjustments on the initial pixel blocks according to a preset pixel adjustment strategy to generate the spatial domain pixel blocks corresponding to the internal boundary states. Specifically, after obtaining the frequency domain coefficient matrix, inverse discrete cosine transform can be performed on the frequency domain coefficient matrix to convert the frequency domain matrix into initial pixel blocks in the spatial domain. Since the initial pixel blocks obtained by inverse discrete cosine transform may contain values ​​that exceed the range of pixel values, clamping and brightness adjustments can be performed on the initial pixel blocks according to a preset pixel adjustment strategy. Clamping adjustment can be used to limit pixel values ​​to a preset pixel range, such as between 0 and 255; brightness adjustment can include reference brightness adjustment, such as setting the reference brightness to 128.

[0029] In this way, the internal boundary states of the module to be verified can be converted into a frequency domain coefficient matrix, and then solved in reverse to obtain spatial domain pixel blocks through inverse discrete cosine transform. Since these spatial domain pixel blocks correspond to the internal boundary states, when constructing image stimuli using these spatial domain pixel blocks, the dependence on the natural distribution of the real image can be reduced, allowing the image stimuli to be used to trigger the corresponding internal boundary states.

[0030] Step S13: Using the spatial domain pixel blocks, construct an image stimulus for verifying the target image encoder.

[0031] In this embodiment, since the aforementioned spatial domain pixel blocks are obtained by inverse solving based on internal boundary states, constructing an image stimulus using these spatial domain pixel blocks can include image blocks used to trigger corresponding internal boundary states. The image stimulus can be image data used as input to the target image encoder, such as test image data in YUV (Luminance-Chrominance Color Space) format. Specifically, constructing an image stimulus for verifying the target image encoder using the spatial domain pixel blocks includes: constructing a pixel library based on multiple spatial domain pixel blocks; determining a filling method based on the image resolution of the test image; filling the test image with the spatial domain pixel blocks from the pixel library based on the filling method to obtain a filled image; and standardizing the filled image to generate an image stimulus for verifying the target image encoder. For example, a pixel library can be constructed based on multiple spatial domain pixel blocks. This pixel library can be used to store the aforementioned multiple spatial domain pixel blocks, for example, multiple 8×8 pixel blocks. Different spatial domain pixel blocks can correspond to different internal boundary states or different boundary combinations. In this way, when constructing the test image later, spatial domain pixel blocks can be selected from the pixel library and filled into the test image to obtain the image stimulus used to verify the target image encoder.

[0032] In another embodiment, edge enhancement and texture detail enhancement can be performed on the spatial domain pixel blocks first to improve the clarity and sense of hierarchy of the spatial domain pixel blocks. The resulting new spatial domain pixel blocks are then used to construct the image stimulus for verifying the target image encoder.

[0033] In one specific implementation, the filling method is determined based on the image resolution of the test image, including: if the image resolution is greater than a resolution threshold, the filling method is determined to be random filling; random filling involves randomly selecting spatial domain pixel blocks from the pixel library and sequentially filling the test image with the selected spatial domain pixel blocks until the test image is filled. This filling method allows high-resolution test images to contain combinations of different spatial domain pixel blocks, reducing excitation redundancy caused by the repeated appearance of a single image block. If the image resolution is not greater than the resolution threshold, the filling method is determined to be tiling filling; tiling filling involves selecting at least one spatial domain pixel block from the pixel library and cyclically filling the test image with at least one spatial domain pixel block until the test image is filled. This filling method is suitable for low-resolution or basic function testing scenarios and can be used for centralized testing of a sub-functional module in the target image encoder, facilitating debugging and problem localization.

[0034] In this embodiment, the spatial domain pixel blocks from the pixel library are filled into the test image based on the filling method to obtain the filled image. This includes: if the filling method is random filling, a spatial domain pixel block is randomly selected from the pixel library and filled into the current block position in the test image; after the current block position is filled, the next spatial domain pixel block is randomly selected and filled into the next block position in the test image, until the test image is filled. If the filling method is tiling filling, at least one spatial domain pixel block can be selected from the pixel library and repeatedly tiled into various block positions in the test image until the test image is filled.

[0035] In this embodiment, after obtaining the padded image, the padded image is standardized to generate an image stimulus for verifying the target image encoder. This includes: organizing the padded image according to the input image format required by the target image encoder to generate an image stimulus that can be used to verify the target image encoder. For example, if the input image format required by the target image encoder is YUV format, then when generating the YUV format image stimulus, the data obtained by filling the spatial domain pixel blocks is used as the Y luminance plane data, and the U chrominance plane and V chrominance plane are set to preset fixed values, such as 128. In this way, an image stimulus is obtained for inputting into the target image encoder for verification.

[0036] As can be seen, this application proposes an image encoder excitation generation method, comprising: determining the internal boundary state of at least one module to be verified in a target image encoder; wherein, the internal boundary state is the working state triggered by the module to be verified under a target input; constructing a frequency domain coefficient matrix based on the internal boundary state, and performing inverse solution on the frequency domain coefficient matrix through inverse discrete cosine transform to generate a spatial domain pixel block corresponding to the internal boundary state; and using the spatial domain pixel block to construct an image excitation for verifying the target image encoder. As can be seen, this application first determines the internal boundary state of at least one module to be verified in the target image encoder, then constructs a frequency domain coefficient matrix based on the internal boundary state, and performs inverse solution on the frequency domain coefficient matrix through inverse discrete cosine transform to obtain a spatial domain pixel block corresponding to the internal boundary state, and then uses the spatial domain pixel block to construct an image excitation for verifying the target image encoder. Since the generated image stimuli are constructed from the internal boundary states of the module to be verified, rather than directly using real photos or standard test images as verification stimuli, the limitations imposed by the natural distribution characteristics of real images on the verification stimuli are reduced. This ensures that the image stimuli correspond to the working state triggered by the module under the target input, thereby improving the problem of insufficient occurrence of low-probability protocol scenarios and enhancing the coverage completeness of the verification stimuli. Furthermore, since the internal boundary states of the module to be verified are determined before the image stimuli are generated, and corresponding spatial domain pixel blocks are generated accordingly, the need to supplement the stimuli based on the coverage results after simulation is reduced, decreasing the passivity of the verification process and the manpower and time costs required for manual stimuli construction. Simultaneously, since the image stimuli are constructed from spatial domain pixel blocks corresponding to the internal boundary states, stimuli unrelated to the internal boundary states to be verified are reduced, which helps to reduce verification stimuli redundancy, improve effective coverage density and simulation resource utilization efficiency, and thus efficiently support the full verification of the target image encoder's boundary functions.

[0037] Accordingly, this application also discloses an image encoder verification method, see [link to relevant documentation]. Figure 2 As shown, it includes: Step S21: Input the image stimulus generated by the image encoder stimulus generation method into the image encoder to be verified and the corresponding algorithm model.

[0038] Step S22: Obtain the verification result of the image encoder to be verified based on the output of the image encoder to be verified and the output of the algorithm model.

[0039] In this embodiment, the image stimulus generated by the aforementioned image encoder stimulus generation method is input to the image encoder to be verified and the corresponding algorithm model. The image encoder to be verified can be a JPEG encoder hardware module to be verified, and the algorithm model can be a JPEG encoding algorithm model implemented in C language. To ensure consistency in the comparison basis, the same image stimulus can be input to the image encoder to be verified and the corresponding algorithm model respectively, so that the image encoder to be verified performs hardware encoding of the image stimulus, and the algorithm model performs software encoding of the same image stimulus.

[0040] Furthermore, the verification result of the image encoder to be verified is obtained based on the output of the image encoder to be verified and the output of the algorithm model. Specifically, the encoding result output by the image encoder to be verified and the encoding result output by the algorithm model can be obtained, and then the two can be compared. The comparison objects can include the output bitstream obtained after encoding, or key intermediate results in the encoding process, such as DCT processing results, quantization processing results, etc. If the output of the image encoder to be verified is consistent with the output of the algorithm model, it can be determined that the image encoder to be verified has passed the verification in the verification scenario corresponding to the image stimulus; if the two are inconsistent, it is determined that the image encoder to be verified may have an anomaly in the corresponding functional processing, and the problem can be located based on the inconsistent output position or intermediate result.

[0041] In this embodiment, image stimuli generated based on internal boundary states are input to the image encoder to be verified and the corresponding algorithm model, and the verification result is obtained by comparing the outputs of the two. Since the image stimuli input to both are the same, the output of the algorithm model can be used as a reference result to determine whether the processing result of the image encoder to be verified on the image stimuli meets expectations.

[0042] The image encoder stimulus generation method and image encoder verification method of this scheme are explained in detail below through a specific example. The target image encoder is a JPEG encoder as an example, the image encoder to be verified can be a JPEG encoder hardware module, the algorithm model can be a JPEG encoding algorithm model implemented in C language, and the image stimulus can be YUV format test image data. See [link to relevant documentation] Figure 3 : (1) Determine the internal boundary state that needs to be covered.

[0043] Before generating image stimuli, the internal boundary states to be covered can be determined. Traditional methods typically use real photographs or standard test images as input and observe whether the DUT covers the corresponding boundaries through a forward encoding process. This solution, however, can start from the internal boundary states of the module to be verified and generate spatial domain pixel blocks that can form those internal boundary states. For example, if the internal boundary state corresponds to a DCT boundary, the working state triggered when the DCT coefficients at a specific frequency domain position reach a preset boundary value can be used as the internal boundary state to be covered. Then, when constructing the 8×8 target DCT coefficient matrix, the corresponding coefficient value is filled into the corresponding frequency domain position. For instance, for the quantization module in a JPEG encoder, a target DCT coefficient value, coeff_val (Coefficient Value), can be predefined so that after quantization, this target DCT coefficient value falls exactly at the rounding point of the rounding function, such as the boundary position corresponding to round(-4.5). This quantization rounding boundary can then be used as the internal boundary state to be covered. For entropy coding modules in the JPEG encoder, codewords or symbols in the JPEG protocol that are difficult to be naturally triggered by real images can be used as objects to be covered. Examples include the ZRL(15,0) codeword representing a long string of zeros, the EOB(0,0) codeword representing the end of a data block, or other rare Huffman codewords. Here, ZRL (Zero Run Length) represents zero run length, and EOB (End of Block) represents the end of a block. For AC coefficient encoding, run symbols can be represented by combinations of run and size, where run represents zero run length and size represents amplitude category. In one example, multiple preset key boundary states in JPEG encoding, such as 162 combinations of run and size, can be traversed, and the internal boundary states corresponding to each combination can be used as objects to be covered.

[0044] (2) Determine the run-length symbol corresponding to the rare codeword based on the configuration of the target image encoder.

[0045] In one example, if the target image encoder uses a custom AC Huffman table, an adaptive sensing approach can be used to determine the internal boundary states to be covered. Specifically, the Huffman table definition currently loaded by the DUT can be read first, for example, the custom AC Huffman table currently used by the DUT can be filled in by the verification personnel through a configuration file. Then, the codewords in the Huffman table are traversed and analyzed to find the codeword and length corresponding to each run-length symbol (run, size), i.e., to find the mapping relationship between each run-length symbol, codeword, and code length. Next, codewords with longer, rarer, or more difficult-to-cover lengths are identified, and the corresponding run-length symbols (run, size) are searched in reverse. Finally, the found run-length symbols (run, size) are used as target inputs to obtain the internal boundary states triggered by the module to be verified under this target input. In this way, in the case of a custom Huffman table, it is not necessary to blindly traverse all preset combinations; instead, the rare codewords to be covered and their corresponding run-length symbols can be determined based on the current DUT configuration.

[0046] (3) Construct the frequency domain coefficient matrix.

[0047] After determining the internal boundary states, a frequency domain coefficient matrix can be constructed. Taking an 8×8 image block as an example, an 8×8 target_dct_matrix (target DCT coefficient matrix) can be constructed first, and each coefficient position in the target_dct_matrix can be initialized to 0. Then, the target coefficient value to be filled is determined according to the aforementioned internal boundary states, and the target coefficient value is filled into the specified position in the target_dct_matrix. For example, when the internal boundary state corresponds to the rounding boundary of the quantization module, the coeff_val used to trigger the rounding boundary can be filled into the specified position of the 8×8 frequency domain matrix; when the internal boundary state corresponds to the Huffman codeword coverage boundary, the filling position and target coefficient value in the frequency domain matrix can be determined according to the corresponding run and size run length symbols, thereby obtaining the frequency domain coefficient matrix corresponding to the internal boundary state.

[0048] (4) Solve the spatial domain pixel block by inverse IDCT.

[0049] After obtaining the frequency domain coefficient matrix, an inverse discrete cosine transform (IDCT) can be performed on it to convert the frequency domain coefficient matrix into initial pixel blocks in the spatial domain. Since the initial pixel blocks obtained by IDCT may contain values ​​outside the range of pixel values, they can be clamped, for example, by limiting the pixel values ​​to between 0 and 255. Simultaneously, a reference brightness adjustment can be performed, for example, setting the base_level to 128, to obtain 8×8 spatial domain pixel blocks that can serve as image excitation units.

[0050] (5) Generate multiple spatial domain pixel blocks and construct a pixel library.

[0051] For multiple internal boundary states to be covered, the process of determining the internal boundary states, constructing an 8×8 frequency domain coefficient matrix, performing IDCT inverse solution, and adjusting pixels can be repeated to generate multiple 8×8 spatial domain pixel blocks. These generated 8×8 spatial domain pixel blocks are then stored in a pixel library. For example, this pixel library can be denoted as `atomic_tiles_list`. This `atomic_tiles_list` stores multiple 8×8 pixel blocks, where each 8×8 pixel block can correspond to a key boundary state.

[0052] (6) Perform basic tiling in low-resolution or basic function testing scenarios.

[0053] When constructing the image stimulus, the filling method can be determined based on the image resolution of the test image. If the test image is a low-resolution image or is used for basic functional testing, a basic tiling method can be used. Specifically, a small number of 8×8 pixel blocks can be selected from the atomic_tiles_list, and these selected 8×8 pixel blocks can be repeatedly tiled onto the corresponding areas in the YUV frame until the test image is filled. This method can be used to perform concentrated testing of a specific sub-functional node in the JPEG encoder, facilitating debugging and problem localization.

[0054] (7) Perform random boundary filling in high-resolution test scenarios.

[0055] If the test image is a high-resolution image, a random boundary filling method can be used. Specifically, all 8×8 pixel blocks in the atomic_tiles_list can be used as randomized filling objects. When it is detected that the environment configuration ENV_WIDTH and ENV_HEIGHT correspond to a high resolution, such as when ENV_WIDTH and ENV_HEIGHT correspond to an 8192×8192 image resolution, an 8×8 pixel block can be randomly selected using a random function and filled into the current block position in the test image; after the current 8×8 block is filled, the next random selection and filling continues until the entire Y brightness area is filled.

[0056] (8) Generate image stimulus in YUV format.

[0057] When generating YUV format image excitation, the data filled with 8×8 spatial domain pixel blocks can be used as the Y luminance plane data. Considering that the JPEG core coding algorithm mainly processes luminance data, the U and V chrominance planes can be set to fixed values, such as 128, to form a grayscale chrominance plane. By setting the U and V planes to 128, the interference of chrominance data on luminance plane boundary testing can be reduced, thus reducing excitation complexity while maintaining the ability to verify luminance-related boundary scenes, and shortening the excitation generation time to some extent. Therefore, the image excitation used as input to the target image encoder can be obtained.

[0058] (9) Perform image encoder verification using image stimulus.

[0059] After obtaining the image stimulus, an image encoder verification method can be executed using this stimulus. Specifically, the same image stimulus can be input into both the JPEG encoder hardware module to be verified and the corresponding C-language JPEG encoding algorithm model. The JPEG encoder hardware module to be verified performs hardware encoding on the image stimulus, while the C-language JPEG encoding algorithm model performs software encoding on the same image stimulus. Then, the outputs of the JPEG encoder hardware module and the C-language JPEG encoding algorithm model are obtained and compared. The comparison objects can include the encoded output bitstream, or key intermediate node data such as DCT transform results and quantization results. If the output of the JPEG encoder hardware module to be verified matches the output of the algorithm model, it can be determined that the JPEG encoder to be verified functions correctly in the verification scenario corresponding to the image stimulus; if they do not match, it can be determined that the JPEG encoder to be verified may have a design flaw, and the problem can be located based on the inconsistent output bitstream position or intermediate node position.

[0060] Through the above examples, this solution can generate specified 8×8 spatial domain pixel blocks based on the internal boundary states of the module to be verified through inverse IDCT, and further construct a pixel library based on multiple 8×8 spatial domain pixel blocks, and then generate image stimuli through basic tiling or random boundary filling. Compared with the verification method of directly using real photos or standard test images, this solution can improve the coverage of protocol boundaries and internal boundary states, reduce image stimulus redundancy, and improve verification density and simulation resource utilization efficiency. For example, under the condition of achieving 100% boundary coverage, taking 1080P resolution image frames as an example, the number of image frames required by this solution can be reduced to 1 / 2000 of the traditional method; the verification efficiency can be improved by 3 to 4 orders of magnitude; and the verification cycle can be shortened from about one month to a few hours. At the same time, since this solution can read the DUT configuration and analyze the custom Huffman table, it can also adaptively generate corresponding boundary 8×8 pixel blocks for custom codewords, improving the flexibility of coverage of rare codeword boundaries under specific configurations.

[0061] Accordingly, embodiments of this application also disclose an image encoder excitation generation apparatus, see [link to relevant documentation]. Figure 4 As shown, the device includes: Boundary state determination module 11 is used to determine the internal boundary state of at least one module to be verified in the target image encoder; wherein, the internal boundary state is the working state triggered by the module to be verified under the target input; The pixel block generation module 12 is used to construct a frequency domain coefficient matrix based on the internal boundary state, and to solve the frequency domain coefficient matrix in reverse by inverse discrete cosine transform to generate a spatial domain pixel block corresponding to the internal boundary state. The image stimulus generation module 13 is used to construct an image stimulus for verifying the target image encoder using the spatial domain pixel blocks.

[0062] For more detailed information on the working process of each of the above modules, please refer to the relevant content disclosed in the foregoing embodiments, which will not be repeated here.

[0063] Furthermore, embodiments of this application also disclose a computer program that, when executed by a processor, implements the aforementioned image encoder excitation generation method or the aforementioned image encoder verification method.

[0064] Furthermore, embodiments of this application also provide an electronic device. Figure 5 This is a structural diagram of an electronic device 20 according to an exemplary embodiment. The content of the diagram should not be construed as limiting the scope of this application.

[0065] Figure 5This is a schematic diagram of the structure of an electronic device 20 provided in an embodiment of this application. Specifically, the electronic device 20 may include: at least one processor 21, at least one memory 22, a display screen 23, an input / output interface 24, a communication interface 25, a power supply 26, and a communication bus 27. The memory 22 stores a computer program, which is loaded and executed by the processor 21 to implement the relevant steps in the methods disclosed in any of the foregoing embodiments. Furthermore, the electronic device 20 in this embodiment may specifically be an electronic computer.

[0066] In this embodiment, the power supply 26 is used to provide operating voltage for each hardware device on the electronic device 20; the communication interface 25 can create a data transmission channel between the electronic device 20 and external devices, and the communication protocol it follows can be any communication protocol applicable to the technical solution of this application, and is not specifically limited here; the input / output interface 24 is used to acquire external input data or output data to the outside world, and its specific interface type can be selected according to specific application needs, and is not specifically limited here.

[0067] Furthermore, the memory 22, as a carrier for resource storage, can be a read-only memory, random access memory, disk, or optical disk, etc. The resources stored thereon may include computer programs 221, and the storage method may be temporary storage or permanent storage. The computer programs 221 may include, in addition to computer programs capable of performing the methods executed by the electronic device 20 as disclosed in any of the foregoing embodiments, computer programs capable of performing other specific tasks.

[0068] Furthermore, embodiments of this application also disclose a computer-readable storage medium for storing a computer program; wherein, when the computer program is executed by a processor, it implements the aforementioned disclosed method.

[0069] For the specific steps of this method, please refer to the relevant content disclosed in the foregoing embodiments, which will not be repeated here.

[0070] The various embodiments in this application are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. For the same or similar parts between the various embodiments, refer to each other. As for the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple, and relevant parts can be referred to in the method section.

[0071] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0072] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.

[0073] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0074] The above provides a detailed description of the image encoder excitation generation method, apparatus, image encoder verification method, and computer program provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A method for generating excitations for an image encoder, characterized in that, include: Determine the internal boundary state of at least one module to be verified in the target image encoder; wherein, the internal boundary state is the working state triggered by the module to be verified under the target input; A frequency domain coefficient matrix is ​​constructed based on the internal boundary state, and the frequency domain coefficient matrix is ​​solved in reverse by inverse discrete cosine transform to generate spatial domain pixel blocks corresponding to the internal boundary state. Using the spatial domain pixel blocks, an image stimulus is constructed to verify the target image encoder.

2. The image encoder excitation generation method according to claim 1, characterized in that, Determining the internal boundary state of at least one module to be verified in the target image encoder includes: Obtain the target configuration information of the target image encoder; Based on the target configuration information, the rare codewords to be covered are determined, and the corresponding run-length symbols are determined according to the rare codewords to be covered. Then, the run-length symbols are used as the target input. Obtain the internal boundary state triggered by at least one of the modules to be verified under the run-length symbol.

3. The image encoder excitation generation method according to claim 1, characterized in that, The construction of the frequency domain coefficient matrix based on the internal boundary state includes: The frequency domain matrix of the preset size is initialized to obtain the initialized frequency domain matrix; The target coefficient value to be filled is determined based on the internal boundary state; The target coefficient values ​​to be filled are entered into the initialized frequency domain matrix at the positions corresponding to the internal boundary states to obtain the frequency domain coefficient matrix.

4. The image encoder excitation generation method according to claim 3, characterized in that, Determining the target coefficient value to be filled based on the internal boundary state includes: Identify the preset boundary type corresponding to the internal boundary state; The target coefficient value to be filled is directly determined based on the preset boundary type.

5. The image encoder excitation generation method according to claim 3, characterized in that, The step of solving the frequency domain coefficient matrix in reverse using inverse discrete cosine transform to generate spatial domain pixel blocks corresponding to the internal boundary states includes: Perform an inverse discrete cosine transform on the frequency domain coefficient matrix to obtain the initial pixel block; According to a preset pixel adjustment strategy, the initial pixel block is clamped and its brightness is adjusted to generate the spatial domain pixel block corresponding to the internal boundary state.

6. The image encoder excitation generation method according to claim 1, characterized in that, Using the spatial domain pixel blocks, an image stimulus for verifying the target image encoder is constructed, including: A pixel library is constructed based on multiple spatial domain pixel blocks; The filling method is determined based on the image resolution of the test image; The spatial domain pixel blocks in the pixel library are filled into the test image based on the filling method to obtain the filled image; The padded image is normalized to generate an image stimulus for verifying the target image encoder.

7. The image encoder excitation generation method according to claim 6, characterized in that, The step of determining the filling method based on the image resolution of the test image includes: If the image resolution is greater than the resolution threshold, then the filling method is determined to be random filling; the random filling is to randomly extract the spatial domain pixel blocks in the pixel library and fill the extracted spatial domain pixel blocks into the test image in sequence until the test image is filled. If the image resolution is not greater than the resolution threshold, then the filling method is determined to be tiling fill; the tiling fill is to select at least one spatial domain pixel block from the pixel library and cyclically fill the test image with at least one spatial domain pixel block until the test image is filled.

8. An image encoder excitation generation device, characterized in that, include: A boundary state determination module is used to determine the internal boundary state of at least one module to be verified in the target image encoder; wherein, the internal boundary state is the working state triggered by the module to be verified under the target input; The pixel block generation module is used to construct a frequency domain coefficient matrix based on the internal boundary state, and to solve the frequency domain coefficient matrix in reverse by inverse discrete cosine transform to generate a spatial domain pixel block corresponding to the internal boundary state. An image stimulus generation module is used to construct an image stimulus for verifying the target image encoder using the spatial domain pixel blocks.

9. An image encoder verification method, characterized in that, include: The image stimulus generated by the image encoder stimulus generation method as described in any one of claims 1 to 7 is input into the image encoder to be verified and the corresponding algorithm model. The verification result of the image encoder to be verified is obtained based on the output of the image encoder to be verified and the output of the algorithm model.

10. A computer program, characterized in that, When the computer program is executed by the processor, it implements the image encoder excitation generation method as described in any one of claims 1 to 7 or the image encoder verification method as described in claim 9.

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