A gate leakage detection device and detection method of a power device

By designing a gate leakage detection device for power devices, the gate leakage of silicon carbide power devices can be detected within a preset detection period and a fault signal can be output, thus solving the problem of difficult detection of gate leakage and improving the safety and reliability of the system.

CN123029347APending Publication Date: 2026-11-03SOUTHEAST UNIV +1
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202611376448.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-09-07
Publication Date
2026-11-03

AI Technical Summary

Technical Problem

The gate leakage current of silicon carbide power devices is relatively small and difficult to detect accurately. Furthermore, the detection circuit can easily affect the normal operation of the drive circuit, thus impacting system safety and reliability.

Method used

A gate leakage current detection device for power devices is designed, including a driving circuit, a FAULT signal processing module, a gate leakage current detection switch control module, a switch state detection module, an input control module, and a gate leakage current detection module. The device detects gate leakage current within a preset detection period and outputs a fault signal to shut down the main path output of the driving circuit.

Benefits of technology

This improves the gate leakage current detection capability of silicon carbide power devices, reduces the impact of detection on the drive circuit, and enhances the operational safety and reliability of the devices and their application systems.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN123029347A_ABST
    Figure CN123029347A_ABST
Patent Text Reader

Abstract

A gate leakage detection device and method of a power device, comprising a driving circuit, an input control module, a gate leakage detection switch control module, a gate leakage detection module, a switch state detection module and a FAULT signal processing module. The input control module controls the driving circuit output according to the external input signal, the switch state signal and the FAULT signal; the gate leakage detection module detects the gate leakage current of the power device in the preset detection period, and converts the weak gate leakage current into a detectable electrical signal; after detecting the gate leakage abnormality, the FAULT signal processing module outputs the FAULT signal, prohibits the driving circuit to continue outputting the driving signal, and controls the gate leakage detection module to stop detecting. The present application realizes the gate leakage detection of the power device on the basis of reducing the influence on the normal work of the driving circuit, and improves the safety and reliability of the device and the application system thereof.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to the field of power integrated circuit technology, and in particular to a gate leakage current detection device and detection method for power devices. Background Technology

[0002] With the rapid development of new energy vehicles, photovoltaic energy storage, rail transit, and high-frequency, high-efficiency power electronic systems, power semiconductor devices are evolving towards higher voltage withstand, higher switching frequency, higher power density, and higher operating temperature. Compared with traditional silicon-based power devices, silicon carbide (SiC) power devices exhibit significant advantages in high-voltage, high-frequency, and high-temperature applications due to their large bandgap, high critical breakdown electric field, high thermal conductivity, and high electron saturation drift velocity. In particular, SiC MOSFETs have gradually become key switching devices in medium- and high-voltage power conversion systems.

[0003] While silicon carbide power devices possess excellent overall performance, their gate oxide reliability remains a significant factor affecting long-term stable operation. Insulated-gate power devices, such as SiC MOSFETs, typically isolate the gate from the channel region through an oxide layer. Ideally, the gate circuit should have extremely high input impedance, with the gate current existing only briefly during the charging and discharging transients, and approaching zero under steady-state bias conditions.

[0004] For silicon carbide (SiC) power devices, the formation mechanism of gate leakage current is more complex than that of traditional silicon devices. On the one hand, the SiC / SiO2 interface has a high density of interface states and near-interface traps, which easily induce carrier trapping and release behavior under high field and high temperature conditions, resulting in a more obvious temperature dependence and time-varying characteristic of the gate current. On the other hand, SiC devices often operate under higher gate electric fields and faster switching dv / dt environments, and the gate oxide layer is subjected to greater electrical stress. Local weak areas are more likely to form tunneling current channels or trap-assisted conduction paths. When the device is subjected to repeated switching shocks, short-circuit shocks, avalanche stress, or high-temperature gate bias, the degradation of the gate oxide layer will be further aggravated, causing the gate leakage current to gradually evolve from an initial small leakage to a significant abnormality, and in severe cases, even leading to gate breakdown failure.

[0005] Gate leakage current is not only an important external manifestation of gate oxide degradation in silicon carbide power devices, but it also usually occurs earlier than complete device failure and can be treated as a fault warning signal. When gate leakage current increases, it may lead to the following problems: First, the static power consumption of the drive circuit increases, affecting the amplitude and stability of the drive signal; second, the device threshold voltage, transconductance, and switching behavior may drift, affecting system efficiency and electromagnetic compatibility performance; third, in multi-device parallel applications, leakage current differences may cause uneven dynamic distribution among devices, thereby reducing system reliability; fourth, if the gate oxide layer has entered the accelerated degradation stage and is not identified in time, it may further induce false turn-on, gate failure, or even main power circuit failure.

[0006] Furthermore, gate leakage current in silicon carbide power devices is typically small in magnitude and changes slowly, and is influenced by temperature, gate voltage, electric field distribution, and aging conditions, resulting in significant differences in leakage current characteristics under different operating conditions. Especially under high-frequency switching conditions, the gate circuit simultaneously experiences drive current, displacement current, parasitic coupling current, and noise components, making the extraction of weak leakage current signals even more difficult. Therefore, developing a detection method that balances sensitivity, anti-interference capability, applicability, and engineering feasibility, based on the formation mechanism and signal characteristics of gate leakage current in silicon carbide power devices, is of great significance for improving the safety and reliability of silicon carbide power devices and their application systems. Summary of the Invention

[0007] Objective: To address the problems of small gate leakage current in existing silicon carbide power devices, difficulty in accurate detection, and the potential impact of detection circuits on the normal operation of drive circuits, this invention provides a gate leakage current detection device and method for power devices, specifically related to the field of power integrated circuit technology. This detection circuit can detect gate leakage current during a preset detection period when the power device is on, and outputs a fault signal when an abnormal gate leakage current is detected, thereby shutting down the main output path of the drive circuit and improving the safety and reliability of silicon carbide power devices and their application systems.

[0008] Technical solution: The present invention provides a gate leakage current detection device for power devices, including a driving circuit, a FAULT signal processing module, a gate leakage current detection switch control module, a switch state detection module, a gate leakage current detection module, an input control module, and a driving circuit.

[0009] The input control module is connected to an external input signal IN. Based on the state of the input signal IN, the output of the FAULT signal processing module, and the output of the switch state detection module, the input control module controls the output state of the drive circuit, thereby controlling the on and off states of the power device under test.

[0010] The gate leakage detection switch control module is connected to an external input signal IN. The gate leakage detection switch control module controls the working state of the gate leakage detection module according to the state of the input signal IN and the output of the FAULT signal processing module. When the power device under test is in the on state, the gate leakage detection switch control module controls the gate leakage detection module to start detecting the gate leakage of the power device under test within a preset detection period after the power device under test is turned on.

[0011] The FAULT signal processing module receives the gate leakage signal of the power device under test from the gate leakage detection module. When the gate leakage signal meets the preset conditions, the FAULT signal processing module outputs the FAULT signal.

[0012] The switch status detection module detects the working status of the gate leakage current detection module. If the gate leakage current detection module is not in working state, the switch status detection module outputs a stop detection signal to the input control module.

[0013] Furthermore, when the external input signal IN has a rising edge, and the input control module does not detect the FAULT signal but detects the stop detection signal, the input control module controls the drive circuit to output a drive signal that turns on the power device.

[0014] When the external input signal IN has a falling edge, and the input control module does not detect the FAULT signal but detects the stop detection signal, the input control module controls the drive circuit to output a drive signal that turns off the power device.

[0015] During the leakage current cycle, after the input control module detects the FAULT signal and the stop detection signal, the input control module controls the drive circuit to output a drive signal that turns off the power device.

[0016] Furthermore, when the external input signal IN has a rising edge and the gate leakage detection switch control module does not detect the FAULT signal, the gate leakage detection switch control module controls the gate leakage detection module to start detecting gate leakage within a preset detection period after the power device is turned on; the preset detection period is located after the power device under test enters a stable on state and before the drive circuit outputs a drive signal to turn off the power device under test.

[0017] When the external input signal IN has a falling edge and the gate leakage detection switch control module does not detect the FAULT signal, the gate leakage detection switch control module controls the gate leakage detection module to stop gate leakage detection.

[0018] During the leakage cycle, if the gate leakage detection switch control module detects the FAULT signal, the gate leakage detection switch control module controls the gate leakage detection module to stop gate leakage detection.

[0019] Furthermore, when the gate leakage signal voltage is greater than the threshold voltage Vref, the FAULT signal processing module outputs the FAULT signal.

[0020] Furthermore, the FAULT signal processing module includes: a first comparator CMP1 and a first D flip-flop DFF1; the non-inverting input of the first comparator CMP1 receives the gate leakage signal output by the gate leakage detection module, the inverting input of the first comparator CMP1 is connected to the threshold voltage Vref, the output of the first comparator CMP1 is connected to the clock signal clk of the first D flip-flop DFF1, the reset signal R of the first D flip-flop is connected to the Reset signal, the input data port D of the first D flip-flop is connected to the logic power supply VDD, and the output Q of the first D flip-flop is connected to the input control module and the gate leakage detection switch control module; the FAULT signal processing module keeps the FAULT signal valid until it receives the reset signal.

[0021] Furthermore, the input control module includes: a first inverter INV1, a second inverter INV2, a first AND gate AND1, a second AND gate AND2, a first OR gate OR1, and a first SR latch SRL1;

[0022] The input of the first inverter INV1 is connected to the output of the FAULT signal processing module, and the output of the first inverter INV1 is connected to the first input of the first AND gate AND1; the external input signal IN is connected to the second input of the first AND gate AND1, and the output of the switch state detection module is connected to the third input of the first AND gate AND1.

[0023] The output of the first AND gate AND1 is connected to the set signal S terminal of the first SR latch SRL1. The input of the second inverter INV2 is connected to the external input signal IN, and the output of the second inverter INV2 is connected to the first input terminal of the second AND gate AND2. The output of the switch state detection module is connected to the second input terminal of the second AND gate AND2, and the output of the second AND gate AND2 is connected to the first input terminal of the first OR gate OR1. The output of the FAULT signal processing module is connected to the second input terminal of the first OR gate OR1, and the output of the first OR gate OR1 is connected to the reset signal R terminal of the first SR latch SRL1. The output Q terminal of the first SR latch SRL1 is connected to the drive circuit.

[0024] Furthermore, the gate leakage detection switch control module includes: a third inverter INV3, a delay unit Delay, a third AND gate AND3, and a fourth AND gate AND4. The input of the third inverter INV3 is connected to the output of the FAULT signal processing module, and the output of the third inverter INV3 is connected to the first input of the fourth AND gate AND4. The input of the delay unit Delay is connected to the external input signal IN, and the output of the delay unit Delay is connected to the first input of the third AND gate AND3. The external input signal IN is also connected to the second input of the third AND gate AND3. The output of the third AND gate AND3 is connected to the second input of the fourth AND gate AND4, and the output of the fourth AND gate AND4 is connected to the gate leakage detection module.

[0025] Furthermore, the gate leakage detection module includes: a first differential amplifier AMP1, a first gate leakage detection resistor Rs1, a first switching device Tg1, a first gate resistor Rg1, and a fourth inverter INV4; one end of the first gate resistor Rg1 is connected to the output terminal of the drive circuit, and the other end is connected to one end of the first gate leakage detection resistor Rs1 and the non-inverting input terminal of the first differential amplifier AMP1; the other end of the first gate leakage detection resistor Rs1 is connected to the gate of the power device under test and the phase input terminal of the first differential amplifier AMP1; the output terminal of the first differential amplifier AMP1 is connected to the FAULT signal processing module; the first switching device Tg1 is connected in parallel across the first gate leakage detection resistor Rs1; the output terminal of the gate leakage detection switch control module is connected to the inverting control terminal of the first switching device Tg1 and the input terminal of the fourth inverter INV4; the output terminal of the fourth inverter INV4 is connected to the non-inverting control terminal of the first switching device Tg1.

[0026] Furthermore, the switch state detection module includes: a first Schmitt trigger ST1, the input of which is connected to the inverting control terminal of the first switching device Tg1; and the output of the first Schmitt trigger ST1 is connected to the input control module.

[0027] A method for detecting gate leakage current in a power device includes the following steps: During a normal cycle, when the external input signal IN has a rising edge, the input control module does not detect the FAULT signal but detects the stop detection signal output by the switch detection module. The input control module controls the drive circuit to output a drive signal to turn on the power device, the gate-source capacitance of the power device is fully charged, and the power device enters the on state. At the start time of a preset detection period, when the gate leakage current detection switch control module does not detect the FAULT signal, it controls the gate leakage current detection module to detect gate leakage current. The gate leakage current detection module outputs a gate leakage current signal to the FAULT signal processing module. At this time, the gate leakage current signal does not meet the preset conditions; and at this time, the switch state detection module detects that the gate leakage current detection module is working normally, so it does not output a stop detection signal. When the external input signal IN has a falling edge, the gate leakage current detection switch control module controls the gate leakage current detection module to stop working, the switch state detection module outputs a stop detection signal, the input control module does not detect the FAULT signal but detects the stop detection signal, and controls the drive circuit to output a drive signal to turn off the power device.

[0028] During the leakage period, when the external input signal IN has a rising edge, the input control module does not detect the FAULT signal but detects the stop detection signal. The input control module controls the drive circuit to output a drive signal to turn on the power device. When the preset detection period begins, the gate leakage detection switch control module does not detect the FAULT signal and controls the gate leakage detection module to start detecting gate leakage. At this time, leakage occurs at the gate of the power device. The gate leakage signal output by the gate leakage detection module meets the preset conditions, and the FAULT signal processing module outputs the FAULT signal. The gate leakage detection switch control module detects the FAULT signal and thus controls the gate leakage detection module to stop working. The switch state detection module detects that the gate leakage detection module has stopped working and outputs a stop detection signal. The input control module detects the FAULT signal and the stop detection signal and controls the drive circuit to output a drive signal to turn off the power device before the falling edge of the external input signal arrives.

[0029] Beneficial effects:

[0030] (1) The present invention improves the detection capability of gate leakage current of power devices by setting a gate leakage current detection module in the relevant circuit of the driving circuit to convert the weak gate leakage current of power devices into a detectable electrical signal.

[0031] (2) The present invention achieves timing control of the detection process through the cooperation between the gate leakage detection switch control module, the switch state detection module and the input control module, thereby reducing the impact of the gate leakage detection module on the normal operation of the drive circuit.

[0032] (3) The present invention responds to gate leakage abnormality through FAULT signal processing module. After detecting gate leakage abnormality, FAULT signal is output and the main path output of the drive circuit is turned off, thereby improving the operational safety and reliability of silicon carbide power devices and their application systems. Attached Figure Description

[0033] Figure 1 This is a structural block diagram of the gate leakage current detection device for the power device of the present invention;

[0034] Figure 2 This is a specific example diagram of a gate leakage current detection circuit for a power device provided in an embodiment of the present invention;

[0035] Figure 3 This is a schematic diagram of the working waveform of a gate leakage current detection device for a power device according to an embodiment of the present invention. Detailed Implementation

[0036] The accompanying drawings, which form part of this invention, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an improper limitation of the invention.

[0037] In the following description, numerous technical details are provided to facilitate the reader's understanding of this application. However, those skilled in the art will understand that the technical solutions claimed in the claims of this application can be implemented even without these technical details and with various variations and modifications based on the following embodiments.

[0038] Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present invention, and should not be construed as limiting the present invention.

[0039] Figure 1 This is a block diagram of the gate leakage current detection device for this power device.

[0040] Specifically, in combination Figure 1 As shown, this embodiment tests silicon carbide power devices, and the working process is as follows:

[0041] The external input signal IN first enters the input control module 005. The input control module 005 controls the output state of the drive circuit based on the FAULT signal output by the FAULT signal processing module 001 and the switch state signal output by the switch state detection module 003. When the external input signal IN has a rising edge, and the input control module 005 does not detect a valid FAULT signal (high level) but detects a valid stop detection signal, the input control module 005 controls the drive circuit to output a drive signal to turn on the power device. When the external input signal IN has a falling edge, and the input control module 005 does not detect a valid FAULT signal but detects a valid stop detection signal, the input control module 005 controls the drive circuit to output a drive signal to turn off the power device. When the FAULT signal processing module 001 outputs the FAULT signal during the power device's conduction period, the input control module 005, after detecting a valid stop detection signal, controls the drive circuit to output a drive signal to turn off the power device.

[0042] The external input signal IN simultaneously enters the gate leakage detection switch control module 002. The gate leakage detection switch control module 002 determines the state of the switch control signal based on the FAULT signal output by the FAULT signal processing module 001. When the external input signal IN has a rising edge and the gate leakage detection switch control module 002 does not detect a valid FAULT signal, the gate leakage detection switch control module 002 outputs a switch control signal, controlling the gate leakage detection module 004 to start detecting gate leakage during a preset detection period after the power device is turned on. The preset detection period is preferably located within... After the power device enters a stable conduction state and before the drive circuit outputs a turn-off signal; when the external input signal IN has a falling edge and the gate leakage detection switch control module 002 does not detect a valid FAULT signal, the gate leakage detection switch control module 002 outputs a switch control signal to control the gate leakage detection module 004 to stop gate leakage detection; when the gate leakage detection switch control module 002 detects a valid FAULT signal, the gate leakage detection switch control module 002 outputs a switch control signal to control the gate leakage detection module 004 to stop detecting gate leakage.

[0043] The gate leakage detection module 004 further includes a differential amplifier AMP, a gate leakage detection resistor Rs, and a switch SW; wherein the first input terminal of the differential amplifier AMP receives the first detection terminal voltage of the gate leakage detection resistor Rs, and the second input terminal of the differential amplifier AMP receives the second detection terminal voltage of the gate leakage detection resistor Rs; when the gate leakage detection switch control module 002 outputs a switch control signal to control the gate leakage detection module 004 to start detecting gate leakage during a preset detection period, the switch SW is placed in the second state (switch open), the gate leakage detection resistor Rs is connected to the detection circuit, the gate leakage detection module 004 starts detecting gate leakage, the differential amplifier AMP amplifies the detection voltage difference across the detection resistor, and outputs a gate leakage signal; when the gate leakage detection switch control module 002 outputs a switch control signal to control the gate leakage detection module 004 to stop detecting gate leakage, the switch SW is placed in the first state (switch off), the gate leakage detection resistor Rs is bypassed, and the gate leakage detection module 004 stops detecting.

[0044] When the FAULT signal processing module 001 receives the gate leakage signal output by the differential amplifier AMP in the gate leakage detection module 004, and the gate leakage signal voltage is greater than the threshold voltage Vref, the FAULT signal processing module 001 outputs a valid FAULT signal. The control input control module 005 controls the drive circuit to output a drive signal that turns off the power device, and at the same time controls the gate leakage detection switch control module 002 to output a switch control signal to control the gate leakage detection module 004 to stop gate leakage detection. The FAULT signal processing module 001 keeps the FAULT signal valid until it receives a reset signal.

[0045] The switch state detection module 003 detects the state of switch SW in the gate leakage current detection module 004. When the first switch is in the first state, the switch state detection module 003 outputs a valid stop detection signal (high level); when the first switch is in the second state, the switch state detection module 003 outputs an invalid stop detection signal (low level).

[0046] The above describes the circuit modules involved in the core idea of ​​this invention. To further illustrate the technical solution of this invention, Figure 2 The diagram shows a specific example of a gate leakage current detection structure for a silicon carbide power device provided in an embodiment of the present invention.

[0047] like Figure 2As shown, in one embodiment of the present invention, the FAULT signal processing module 201 includes: a first comparator CMP1 and a first D flip-flop DFF1; wherein the first comparator CMP1 detects that the gate leakage signal voltage output by the gate leakage detection module 204 is greater than the threshold voltage Vref, outputs a high-level comparison signal, and inputs it to the clock signal clk terminal of the first D flip-flop DFF1; the first D flip-flop DFF1 detects the rising edge signal input to the clock signal clk terminal and latches the high-level FAULT signal.

[0048] The connection relationship of the FAULT signal processing module 201 is as follows: the non-inverting input terminal of the first comparator CMP1 receives the gate leakage signal output by the gate leakage detection module 204; the inverting input terminal of the first comparator CMP1 receives the threshold voltage Vref; the output terminal of the first comparator CMP1 is connected to the clock signal clk terminal of the first D flip-flop DFF1; the reset signal R terminal of the first D flip-flop is connected to the Reset signal; and the input data port D terminal of the first D flip-flop is connected to the logic power supply VDD.

[0049] In one embodiment of the present invention, the input control module 205 includes: a first inverter INV1, a second inverter INV2, a first AND gate AND1, a second AND gate AND2, a first OR gate OR1, and a first SR latch SRL1. The first inverter INV1 inverts the FAULT signal; the first AND gate AND1 performs an AND operation on the inverted FAULT signal, the external input signal IN, and the stop detection signal output by the switch state detection module 203, and its output is used as the set signal S terminal input to the first SR latch SRL1; the second inverter INV2 inverts the external input signal IN; the second AND gate AND2 performs an AND operation on the inverted external input signal and the stop detection signal; the first OR gate OR1 performs an OR operation on the output signal of the second AND gate AND2 and the FAULT signal, and its output is used as the reset signal R terminal input to the first SR latch SRL1; the output terminal Q of the first SR latch SRL1 is used to control the output state of the drive logic circuit.

[0050] The input control module 205 is connected as follows: the input of the first inverter INV1 is connected to the FAULT signal output by the FAULT signal processing module 201, and the output of the first inverter INV1 is connected to the first input of the first AND gate AND1; the external input signal IN is connected to the second input of the first AND gate AND1; the stop detection signal output by the switch state detection module 203 is connected to the third input of the first AND gate AND1; and the output of the first AND gate AND1 is connected to the set signal S of the first SR latch SRL1. The input of the second inverter INV2 is connected to the external input signal IN, and the output of the second inverter INV2 is connected to the first input of the second AND gate AND2; the stop detection signal is connected to the second input of the second AND gate AND2; and the output of the second AND gate AND2 is connected to the first input of the first OR gate OR1; the FAULT signal is connected to the second input of the first OR gate OR1; and the output of the first OR gate OR1 is connected to the reset signal R of the first SR latch SRL1. The output Q of the first SR latch SRL1 is connected to the input of the drive logic circuit to control the output state of the drive logic circuit.

[0051] In one embodiment of the present invention, the gate leakage detection switch control module 202 includes: a third inverter INV3, a delay unit Delay, a third AND gate AND3, and a fourth AND gate AND4. The third inverter INV3 inverts the FAULT signal, the delay unit Delay delays the external input signal IN, the third AND gate AND3 performs an AND operation on the external input signal IN and the delayed external input signal IN, and the fourth AND gate AND4 performs an AND operation on the inverted FAULT signal and the output of the third AND gate AND3. The output of the fourth AND gate AND4 is used to control the operating state of the gate leakage detection module 204.

[0052] The connection relationship of the gate leakage detection switch control module 202 is as follows: the input terminal of the third inverter INV3 is connected to the FAULT signal output by the FAULT signal processing module 201, and the output terminal of the third inverter INV3 is connected to the first input terminal of the fourth AND gate AND4; the input terminal of the delay unit Delay is connected to the external input signal IN, and the output terminal of the delay unit Delay is connected to the first input terminal of the third AND gate AND3; the external input signal IN is also connected to the second input terminal of the third AND gate AND3; the output terminal of the third AND gate AND3 is connected to the second input terminal of the fourth AND gate AND4, and the output terminal of the fourth AND gate AND4 is connected to the gate leakage detection module 204.

[0053] In one embodiment of the present invention, the gate leakage detection module 204 includes: a first differential amplifier AMP1, a first gate leakage detection resistor Rs1, a first switching device Tg1, and a fourth inverter INV4. Figure 1 In this embodiment, the switch SW can be implemented by the first switching device Tg1. Figure 1 In this embodiment, the gate leakage current detection resistor Rs corresponds to the first gate leakage current detection resistor Rs1. The first gate leakage current detection resistor Rs1 is located between the first gate resistor Rg1 at the output of the driving circuit and the gate of the silicon carbide power device, and is used to convert the gate leakage current of the silicon carbide power device into a detection voltage signal. The first differential amplifier AMP1 is used to detect and amplify the detection voltage difference across the first gate leakage current detection resistor Rs1, and output a gate leakage current signal. The first switching device Tg1 is used to selectively bypass the first gate leakage current detection resistor Rs1. The fourth inverter INV4 is used to invert the switching control signal and then drive the first switching device Tg1.

[0054] The connection relationship of the gate leakage detection module 204 is as follows: the first end of the first gate leakage detection resistor Rs1 is connected to the first gate resistor Rg1, and the second end of the first gate leakage detection resistor Rs1 is connected to the gate of the silicon carbide power device; the first input end of the first differential amplifier AMP1 is connected to the first end of the first gate leakage detection resistor Rs1, the second input end of the first differential amplifier AMP1 is connected to the second end of the first gate leakage detection resistor Rs1, and the output end of the first differential amplifier AMP1 is connected to the FAULT signal processing module 201; the first switching device Tg1 is connected in parallel across the first gate leakage detection resistor Rs1; the input end of the fourth inverter INV4 is connected to the output end of the gate leakage detection switch control module 202, the output end of the fourth inverter INV4 is connected to the non-inverting control end of the first switching device Tg1, and the output end of the gate leakage detection switch control module 202 is connected to the inverting control end of the first switching device Tg1.

[0055] In this embodiment, when the gate leakage detection switch control module 202 outputs a control signal to turn off the first switching device Tg1, the first gate leakage detection resistor Rs1 is connected to the detection circuit, and the gate leakage detection module 204 starts detecting gate leakage; when the gate leakage detection switch control module 202 outputs a control signal to turn on the first switching device Tg1, the first gate leakage detection resistor Rs1 is bypassed, and the gate leakage detection module 204 stops detecting.

[0056] In one embodiment of the present invention, the switch state detection module 203 includes a first Schmitt trigger ST1. The first Schmitt trigger ST1 is used to detect the state of the first switching device Tg1 in the gate leakage current detection module 204. When the first Schmitt trigger ST1 detects that the first switching device Tg1 is in the on state, it outputs a high-level (valid) stop detection signal; when the first switching device Tg1 is in the off state, it outputs a low-level (invalid) stop detection signal. Because the first Schmitt trigger ST1 has hysteresis characteristics, it can improve the anti-interference capability of the stop detection signal and avoid erroneous switching of the stop detection signal due to node jitter.

[0057] The connection relationship of the switch state detection module 203 is as follows: the input terminal of the first Schmitt trigger ST1 is connected to the inverting control terminal of the first switching device Tg1; the output terminal of the first Schmitt trigger ST1 is connected to the input control module 205.

[0058] Figure 3 This is a schematic diagram of the working circuit waveform of a gate leakage current detection structure for a silicon carbide power device provided in an embodiment of the present invention.

[0059] like Figure 3As shown, within the normal cycle, at time t1, the external input signal IN experiences a rising edge, and the input control module 205 detects an invalid FAULT signal (low level) and a valid stop detection signal output by the switch detection module 203; at time t2, the input control module 205 controls the drive circuit to output a drive signal that turns on the silicon carbide power device; at time t3, the gate-source capacitor of the silicon carbide power device completes charging, and the power device enters the conduction state; time t4 is the start time of the preset detection period, which is determined by the delay duration of the delay unit Delay. If the gate leakage detection switch control module 202 does not detect a valid FAULT signal, it outputs a valid switch control signal. The first switching device Tg1 in the gate leakage detection module 204 is turned off, and the first gate leakage detection resistor Rs1 is connected to the detection circuit. The gate leakage detection module 204 begins detecting gate leakage. At this time, the first differential amplifier AMP1 in the gate leakage detection module 204 amplifies the detection voltage difference across the first gate leakage detection resistor Rs1 and outputs a gate leakage signal. The FAULT signal processing module 201 compares the gate leakage signal voltage... Because the gate leakage signal voltage is less than the threshold voltage Vref, the FAULT signal processing module 201 always outputs an invalid FAULT signal. At time t5, the switch state detection module 203 detects that the first switching device Tg1 is turned off and outputs an invalid stop detection signal. At time t6, the external input signal IN has a falling edge. Since the input control module 205 does not detect a valid stop detection signal, the drive circuit still outputs a drive signal to turn on the power device. At time t7, which is the off time of the preset detection period, the gate leakage detection switch control module 202 does not detect a valid FAULT signal and outputs an invalid switch control signal. The first switching device Tg1 in the gate leakage detection module 204 is turned on, the first gate leakage detection resistor Rs1 is bypassed, and the gate leakage detection module 204 stops detection. At time t8, the switch state detection module 203 detects that the first switching device Tg1 is turned on and outputs a valid stop detection signal. At time t9, the input control module 205 does not detect a valid FAULT signal but detects a valid stop detection signal, and controls the drive circuit to output a drive signal to turn off the power device.

[0060] like Figure 3As shown, during the leakage period, at time t10, the external input signal IN has a rising edge, and the input control module 205 detects an invalid FAULT signal and a valid stop detection signal; at time t11, the input control module 205 controls the drive circuit to output a drive signal to turn on the silicon carbide power device; at time t12, the preset detection period begins, the gate leakage detection switch control module 202 does not detect a valid FAULT signal, outputs a valid switch control signal, the first switch device Tg1 in the gate leakage detection module 204 is turned off, the first gate leakage detection resistor Rs1 is connected to the detection circuit, the gate leakage detection module 204 starts to detect gate leakage, at this time the gate of the silicon carbide power device has leakage, the first differential amplifier AMP1 in the gate leakage detection module 204 amplifies the detection voltage difference across the first gate leakage detection resistor Rs1, and outputs a gate leakage signal; at time t13, the switch state detection module 203 detects that the first switch device Tg1 is turned off and outputs an invalid stop detection signal; at time t14... At time t15, the FAULT signal processing module 201 receives the gate leakage signal output by the first differential amplifier AMP1, compares the gate leakage signal voltage with the threshold voltage Vref, and outputs a valid FAULT signal because the gate leakage signal voltage is greater than the threshold voltage Vref. At time t16, the switch state detection module 203 detects that the first switch device Tg1 in the gate leakage detection module 204 is turned on, the first gate leakage detection resistor Rs1 is bypassed, the gate leakage detection module 204 stops detection, and stops outputting the gate leakage signal. At time t17, the input control module 205 detects the valid FAULT signal and the valid stop detection signal, and controls the drive circuit to output a drive signal to turn off the power device before the falling edge of the external input signal at time t18.

[0061] like Figure 3 As shown, during the FAULT trigger cycle, the first D flip-flop DFF1 in the FAULT signal processing module 201 latches and continuously outputs a high-level valid FAULT signal; at time t19, the input control module 205 detects the valid FAULT signal and continuously controls the drive circuit to output a drive signal that turns off the power device.

[0062] The gate leakage current detection structure of the silicon carbide power device of the present invention improves the detection capability of gate leakage current of silicon carbide power devices by setting a gate leakage current detection module in the drive-related circuit to convert the weak gate leakage current of the power device into a detectable electrical signal. Through the cooperation between the gate leakage current detection switch control module, the switch state detection module and the input control module, the timing control of the detection process is realized, thereby reducing the impact of the gate leakage current detection module on the normal operation of the drive circuit. The FAULT signal processing module responds to the gate leakage current anomaly, outputs the FAULT signal and shuts down the main path output of the drive circuit after detecting the gate leakage current anomaly, thereby improving the operational safety and reliability of silicon carbide power devices and their application systems.

[0063] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0064] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined with "first" or "second" may explicitly or implicitly include at least one of that feature.

[0065] Although the invention has been illustrated and described with reference to certain preferred embodiments thereof, those skilled in the art will understand that various changes in form and detail may be made therein without departing from the spirit and scope of the invention.

Claims

1. A gate leakage current detection device for a power device, characterized in that, It includes a drive circuit, a FAULT signal processing module, a gate leakage detection switch control module, a switch status detection module, a gate leakage detection module, an input control module, and a drive circuit. The input control module is connected to an external input signal IN. Based on the state of the input signal IN, the output of the FAULT signal processing module, and the output of the switch state detection module, the input control module controls the output state of the drive circuit, thereby controlling the on and off states of the power device under test. The gate leakage detection switch control module is connected to an external input signal IN. The gate leakage detection switch control module controls the working state of the gate leakage detection module according to the state of the input signal IN and the output of the FAULT signal processing module. When the power device under test is in the on state, the gate leakage detection switch control module controls the gate leakage detection module to start detecting the gate leakage of the power device under test within a preset detection period after the power device under test is turned on. The FAULT signal processing module receives the gate leakage signal of the power device under test from the gate leakage detection module. When the gate leakage signal meets the preset conditions, the FAULT signal processing module outputs the FAULT signal. The switch status detection module detects the working status of the gate leakage current detection module. If the gate leakage current detection module is not in working state, the switch status detection module outputs a stop detection signal to the input control module.

2. The gate leakage current detection device for a power device according to claim 1, characterized in that, When the external input signal IN has a rising edge, and the input control module does not detect the FAULT signal but detects the stop detection signal, the input control module controls the drive circuit to output a drive signal that turns on the power device. When the external input signal IN has a falling edge, and the input control module does not detect the FAULT signal but detects the stop detection signal, the input control module controls the drive circuit to output a drive signal that turns off the power device. During the leakage current cycle, after the input control module detects the FAULT signal and the stop detection signal, the input control module controls the drive circuit to output a drive signal that turns off the power device.

3. The gate leakage current detection device for a power device according to claim 1, characterized in that, When the external input signal IN has a rising edge and the gate leakage detection switch control module does not detect the FAULT signal, the gate leakage detection switch control module controls the gate leakage detection module to start detecting gate leakage within a preset detection period after the power device is turned on; the preset detection period is located after the power device under test enters a stable on state and before the drive circuit outputs a drive signal to turn off the power device under test. When the external input signal IN has a falling edge and the gate leakage detection switch control module does not detect the FAULT signal, the gate leakage detection switch control module controls the gate leakage detection module to stop gate leakage detection. During the leakage cycle, if the gate leakage detection switch control module detects the FAULT signal, the gate leakage detection switch control module controls the gate leakage detection module to stop gate leakage detection.

4. The gate leakage current detection device for a power device according to claim 1, characterized in that, When the gate leakage signal voltage is greater than the threshold voltage Vref, the FAULT signal processing module outputs the FAULT signal.

5. The gate leakage current detection device for a power device according to claim 1, characterized in that, The FAULT signal processing module includes: a first comparator CMP1 and a first D flip-flop DFF1; the non-inverting input of the first comparator CMP1 receives the gate leakage signal output by the gate leakage detection module, the inverting input of the first comparator CMP1 is connected to the threshold voltage Vref, the output of the first comparator CMP1 is connected to the clock signal clk of the first D flip-flop DFF1, the reset signal R of the first D flip-flop is connected to the Reset signal, the input data port D of the first D flip-flop is connected to the logic power supply VDD, and the output Q of the first D flip-flop is connected to the input control module and the gate leakage detection switch control module; the FAULT signal processing module keeps the FAULT signal valid until it receives the reset signal.

6. The gate leakage current detection device for a power device according to claim 1, characterized in that, The input control module includes: a first inverter INV1, a second inverter INV2, a first AND gate AND1, a second AND gate AND2, a first OR gate OR1, and a first SR latch SRL1; The input of the first inverter INV1 is connected to the output of the FAULT signal processing module, and the output of the first inverter INV1 is connected to the first input of the first AND gate AND1; the external input signal IN is connected to the second input of the first AND gate AND1, and the output of the switch state detection module is connected to the third input of the first AND gate AND1. The output of the first AND gate AND1 is connected to the set signal S terminal of the first SR latch SRL1. The input of the second inverter INV2 is connected to the external input signal IN, and the output of the second inverter INV2 is connected to the first input terminal of the second AND gate AND2. The output of the switch state detection module is connected to the second input terminal of the second AND gate AND2, and the output of the second AND gate AND2 is connected to the first input terminal of the first OR gate OR1. The output of the FAULT signal processing module is connected to the second input terminal of the first OR gate OR1, and the output of the first OR gate OR1 is connected to the reset signal R terminal of the first SR latch SRL1. The output Q terminal of the first SR latch SRL1 is connected to the drive circuit.

7. The gate leakage current detection device for a power device according to claim 1, characterized in that, The gate leakage detection switch control module includes: a third inverter INV3, a delay unit Delay, a third AND gate AND3, and a fourth AND gate AND4. The input of the third inverter INV3 is connected to the output of the FAULT signal processing module, and the output of the third inverter INV3 is connected to the first input of the fourth AND gate AND4. The input of the delay unit Delay is connected to the external input signal IN, and the output of the delay unit Delay is connected to the first input of the third AND gate AND3. The external input signal IN is also connected to the second input of the third AND gate AND3. The output of the third AND gate AND3 is connected to the second input of the fourth AND gate AND4, and the output of the fourth AND gate AND4 is connected to the gate leakage detection module.

8. The gate leakage current detection device for a power device according to claim 1, characterized in that, The gate leakage detection module includes: a first differential amplifier AMP1, a first gate leakage detection resistor Rs1, a first switching device Tg1, a first gate resistor Rg1, and a fourth inverter INV4; one end of the first gate resistor Rg1 is connected to the output terminal of the drive circuit, and the other end is connected to one end of the first gate leakage detection resistor Rs1 and the non-inverting input terminal of the first differential amplifier AMP1; the other end of the first gate leakage detection resistor Rs1 is connected to the gate of the power device under test and the phase input terminal of the first differential amplifier AMP1; the output terminal of the first differential amplifier AMP1 is connected to the FAULT signal processing module; the first switching device Tg1 is connected in parallel across the first gate leakage detection resistor Rs1; the output terminal of the gate leakage detection switch control module is connected to the inverting control terminal of the first switching device Tg1 and the input terminal of the fourth inverter INV4; the output terminal of the fourth inverter INV4 is connected to the non-inverting control terminal of the first switching device Tg1.

9. A gate leakage current detection device for a power device according to claim 8, characterized in that, The switch state detection module includes: a first Schmitt trigger ST1, the input of which is connected to the inverting control terminal of the first switching device Tg1; and the output of the first Schmitt trigger ST1 is connected to the input control module.

10. A detection method using the gate leakage current detection device for a power device as described in claim 1, characterized in that, During the normal cycle, when the external input signal IN has a rising edge, the input control module does not detect the FAULT signal but detects the stop detection signal output by the switch detection module. The input control module controls the drive circuit to output a drive signal to turn on the power device. The gate-source capacitor of the power device is fully charged, and the power device enters the on state. At the start time of the preset detection period, the gate leakage detection switch control module does not detect the FAULT signal. The gate leakage detection switch control module controls the gate leakage detection module to detect gate leakage. The gate leakage detection module outputs a gate leakage signal to the FAULT signal processing module. At this time, the gate leakage signal does not meet the preset conditions. At this time, the switch state detection module detects that the gate leakage detection module is working normally, so it does not output a stop detection signal. When the external input signal IN has a falling edge, the gate leakage detection switch control module controls the gate leakage detection module to stop working. The switch state detection module outputs a stop detection signal. The input control module does not detect the FAULT signal but detects the stop detection signal, and controls the drive circuit to output a drive signal to turn off the power device. During the leakage period, the external input signal IN has a rising edge. The input control module does not detect the FAULT signal but detects the stop detection signal. The input control module controls the drive circuit to output a drive signal to turn on the power device. When the preset detection period is turned on, the gate leakage detection switch control module does not detect the FAULT signal and controls the gate leakage detection module to start detecting gate leakage. At this time, leakage occurs at the gate of the power device. The gate leakage signal output by the gate leakage detection module meets the preset conditions, and the FAULT signal processing module outputs the FAULT signal. The gate leakage detection switch control module detects the FAULT signal and thus controls the gate leakage detection module to stop working. The switch status detection module detects that the gate leakage detection module has stopped working and outputs a stop detection signal. The input control module detects the FAULT signal and the stop detection signal, and controls the drive circuit to output a drive signal that turns off the power device before the falling edge of the external input signal arrives.