A bandgap reference circuit with high order temperature compensation and low noise operational amplifier
By introducing a high-order compensation branch and a low-noise operational amplifier circuit, the curvature error and noise problems of traditional bandgap reference circuits over a wide temperature range are solved, realizing a high-precision, low-noise bandgap reference circuit and improving system stability and power supply suppression capability.
Patent Information
- Application Number
- CN202611109183.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-07-24
- Publication Date
- 2026-11-03
AI Technical Summary
Traditional first-order bandgap reference circuits suffer from significant curvature errors, poor noise performance, low power supply rejection ratio, and current mismatch over a wide temperature range, making it difficult to meet the requirements of high-precision systems.
By employing a high-order compensation branch and a low-noise operational amplifier circuit, and by introducing a high-order compensation network and a pseudo-differential symmetric structure with no tail current source, combined with the bias voltage of the internal voltage regulation node, a bandgap reference circuit with high accuracy and low noise is constructed.
It achieves high-precision reference output with ultra-low temperature drift (<8ppm/℃), eliminates flicker noise and current mismatch, improves power supply interference resistance and system stability, and reduces power consumption and area overhead.
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Figure CN123030031A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of integrated circuit design technology, and in particular to a bandgap reference circuit with high-order temperature compensation and low-noise operational amplifier. Background Technology
[0002] In analog integrated circuits and mixed-signal systems, the bandgap reference is a crucial core module. Its main function is to provide a highly stable DC reference voltage or current that remains stable over a wide temperature range, under power supply voltage fluctuations, and process variations, providing accurate reference levels or reference currents for modules such as analog-to-digital converters, digital-to-analog converters, low-dropout linear regulators, and phase-locked loops in the system.
[0003] Currently, traditional first-order bandgap reference circuits generally employ the classic ΔVBE generation structure. Its basic principle is to extract the base-emitter voltage difference ΔVBE of the transistor through the forced clamping effect of an operational amplifier to generate a voltage or current proportional to absolute temperature (PTAT). This PTAT is then superimposed on VBE, which has a negative temperature coefficient (CTAT), with specific weights, thereby achieving first-order temperature compensation near room temperature and obtaining a reference voltage with an approximate zero temperature coefficient.
[0004] Traditional architectures simply use resistor ratios to perform a first-order linear combination of PTAT and CTAT currents. This first-order linear compensation method produces significant curvature errors over a wide temperature range (e.g., -40℃ to 125℃), making it difficult to meet the requirements of high-precision systems for ultra-low temperature drift coefficients. The op-amp uses MOS differential pairs and active loads, and inherent flicker noise and threshold offset are amplified through the loop, degrading the output noise performance. The op-amp is directly biased by the external power supply VDD, and power supply ripple and noise are easily coupled into the internal circuit, resulting in a low power supply rejection ratio (PSRR). The inconsistent drain voltage of the PMOS transistors and the channel length modulation effect cause current mismatch, further reducing the accuracy of the reference voltage. Summary of the Invention
[0005] The present invention was made in view of the above-mentioned problems, and its object is to provide a bandgap reference circuit with high-order temperature compensation and low-noise operational amplifier.
[0006] The objective of this invention is achieved through the following technical solution: This invention provides a bandgap reference circuit with high-order temperature compensation and low-noise operational amplifier, comprising: a bandgap reference main circuit, a high-order compensation branch, and an operational amplifier circuit; The bandgap reference main circuit includes transistors. , and resistance ,transistor , The base is connected, transistor , The emitters are connected to resistors respectively. The two ends of the resistor Connecting transistors One end is also connected to a configurable resistor. ; The operational amplifier circuit includes a main operational amplifier A0 and an auxiliary operational amplifier A1; The main operational amplifier A0 is used to force the current of each circuit in the main bandgap reference circuit to be the same. The higher-order compensation branch includes transistors. Configurable resistors and resistor networks; The configurable resistor Connected across the transistor The transistor has a base and emitter junction for drawing current. The collector injects a compensation current with high-order temperature characteristics into the core branch. The reference voltage ultimately output by the resistor network Satisfy the following formula: ; Where M is a constant coefficient determined by the resistance; The resistor in the resistor network is specifically 20K ohms; For transistors The base-emitter voltage; For transistors The base-emitter voltage.
[0007] Furthermore: the main operational amplifier A0 includes a first-stage amplifier and a second-stage amplifier; The first-stage amplifier is used to optimize noise and offset performance, and consists of transistors. , The input differential pair consists of a first pure resistor Rsp1 and a second pure resistor Rsp1; The second-stage amplifier uses transistors. , This forms the second-stage differential pair, with the active load consisting of the first PMOS transistor and the second PMOS transistor.
[0008] Furthermore, the first PMOS transistor is also connected to a diode.
[0009] Furthermore, the main operational amplifier A0 also includes a third pure resistor Rsp1 and a transistor. This forms the bias branch, which serves as the tail current source. , Provide bias branches; The transistor It also connects to a diode; The bias branch is connected to the internal voltage regulator node VDD1; The internal voltage regulator node VDD1 is a low temperature coefficient voltage node after the bandgap reference circuit has been stabilized.
[0010] Furthermore, the auxiliary operational amplifier A1 is connected across the two output terminals of the second stage amplifier of the main operational amplifier A0.
[0011] Furthermore, the auxiliary operational amplifier A1 adopts a pseudo-differential symmetric structure with a tailless current source.
[0012] Furthermore, the input stage bias of the auxiliary operational amplifier A1 is provided by the output stage node of the main operational amplifier A0, specifically by the clamping DC level provided by the OUTN node at the output of the second stage amplifier of the main operational amplifier A0.
[0013] Furthermore, the bandgap reference circuit is characterized by being integrated using a 40nm CMOS process.
[0014] In summary, the beneficial effects of the present invention are as follows: 1. Introduction and The constructed high-order compensation network enables high-precision reference output with ultra-low temperature drift (<8ppm / ℃).
[0015] 2. The first stage amplifier of the main operational amplifier A0 uses pure transistors as input pairs and pure resistors as loads, which eliminates flicker noise and suppresses offset temperature drift.
[0016] 3. The main operational amplifier A0 extracts the bias voltage VDD1 from the low temperature coefficient node after the internal bandgap is stabilized, which greatly improves the circuit's power supply interference immunity and system stability.
[0017] 4. An auxiliary operational amplifier A1 is connected across the output of the main operational amplifier A0. In addition, A1 adopts a self-biased pseudo-differential symmetric structure with a tailless current source, which eliminates current mismatch and further reduces power consumption and area overhead. Attached Figure Description
[0018] To more clearly illustrate the technical solutions in the embodiments of this drawing or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this drawing. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.
[0019] Figure 1This is a structural diagram of the bandgap reference circuit of the present invention; Figure 2 This is a circuit diagram of the main operational amplifier A0 of the present invention; Figure 3 This is a circuit diagram of the auxiliary operational amplifier A1 of the present invention; Figure 4 This is a schematic diagram of a conventional bandgap reference circuit provided by the present invention. Figure 1 Comparison chart; Figure 5 This is a circuit diagram of a conventional symmetrical operational amplifier provided by the present invention. Figure 3 The comparison chart.
[0020] The purpose, features, and advantages of this accompanying drawing will be further explained in conjunction with the embodiments and with reference to the accompanying drawing. Detailed Implementation
[0021] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be described and illustrated below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. All other embodiments obtained by those skilled in the art based on the embodiments provided by this invention without inventive effort are within the scope of protection of this invention.
[0022] Obviously, the accompanying drawings described below are merely some examples or embodiments of the present invention. Those skilled in the art can apply the present invention to other similar scenarios based on these drawings without any inventive effort. Furthermore, it is understood that although the efforts made in this development process may be complex and lengthy, for those skilled in the art related to the content disclosed in this invention, modifications to design, manufacturing, or production based on the technical content disclosed in this invention are merely conventional technical means and should not be construed as insufficient disclosure of the present invention.
[0023] Unless otherwise specified, all embodiments and optional embodiments of the present invention can be combined with each other to form new technical solutions.
[0024] Unless otherwise specified, all technical features and optional technical features of this invention can be combined to form new technical solutions.
[0025] Unless otherwise specified, all steps of the present invention may be performed sequentially or randomly, preferably sequentially. For example, the method includes steps (a) and (b), indicating that the method may include steps (a) and (b) performed sequentially, or it may include steps (b) and (a) performed sequentially. For example, the mention that the method may also include step (c) indicates that step (c) may be added to the method in any order. For example, the method may include steps (a), (b), and (c), or it may include steps (a), (c), and (b), or it may include steps (c), (a), and (b), etc.
[0026] Unless otherwise specified, the terms "comprising" and "including" as used in this invention can be open-ended or closed-ended. For example, "comprising" and "including" can mean that other components not listed may also be included, or that only the listed components may be included.
[0027] Unless otherwise specified, the term "or" is inclusive in this invention. For example, the phrase "A or B" means "A, B, or both A and B". More specifically, the condition "A or B" is satisfied by any of the following conditions: A is true (or exists) and B is false (or does not exist); A is false (or does not exist) and B is true (or exists); or both A and B are true (or exist).
[0028] Please see Figures 1 to 3 : This invention includes: a bandgap reference main circuit, a high-order compensation branch, and an operational amplifier circuit.
[0029] like Figure 1 As shown, the main circuit of the bandgap reference includes transistors. , and resistance ,transistor , The base is connected, transistor , The emitters are connected to resistors respectively. The two ends of the resistor Connecting transistors One end is also connected to a configurable resistor. Under the forced action of the operational amplifier circuit, , The branches with the same current produce a base-emitter voltage difference ∆VBE, which falls within the resistor. The PTAT current is generated and fed into a configurable resistor. ; Meanwhile, to address the nonlinear curvature error inherent in traditional first-order compensation, a transistor-based [component / mechanism] was introduced on the right side. ,resistance and higher-order compensation branches composed of resistor networks; among which, resistors bridging The current drawn between the base and emitter is [value missing]. Configurable resistors Connecting transistors One end of the emitter is also connected to a transistor. collector, compensation transistor collector current through After voltage division / transformation by the resistor network, the voltage is superimposed to the output node with inverse weights, and then fed to the core branch (the core branch is...). , and resistance (Composition) Injecting a current containing high-order temperature characteristics, establishing the overall loop equation according to Kirchhoff's current law, and finally outputting a reference voltage. Satisfy the following formula: ; Where M is a constant coefficient determined by the resistance, in this circuit, M = , This is the resistor in the resistor network, with a resistance of 20K ohms. For transistors The base-emitter voltage, For transistors The base-emitter voltage; This indicates negative injection, because It has a negative temperature coefficient, which, after being divided by a resistor, is superimposed on the output node with an inverse weight, forming a higher-order curvature compensation with the PTAT term, thereby offsetting the negative temperature coefficient. Higher-order error components in nonlinear terms; Specifically, through adjustment The slope of the term proportional to absolute temperature (PTAT) can be changed to adjust... The weight of the negative temperature coefficient term (CTAT) can be fine-tuned, and the last term... This involves injecting a high-order nonlinear compensation term into the loop, which greatly smooths the reference voltage curve over a wide temperature range.
[0030] and Figure 1 Corresponding comparison charts—such as Figure 4 As shown, this is a traditional low-supply-voltage bandgap reference circuit, which consists of an operational amplifier A0 and a PMOS transistor ( ),transistor and resistor networks Composition; Op-amp A0 forced The drain voltages are equal, thus in the resistor The PTAT current is generated on the resistor. The CTAT current on After superimposing on the branches, the image is mirrored. Finally, the current flows through the resistor. Generate reference voltage This architecture simply uses the resistor ratio to perform a first-order linear combination of the PTAT and CTAT currents, but due to the bipolar transistor... This circuit exhibits high-order nonlinearity with temperature variations, resulting in significant curvature errors over a wide temperature range. The operational amplifier A0 typically uses conventional MOSFET differential input pairs and active loads, inherently possessing severe flicker noise. These errors are amplified through the loop, affecting the reference output. In existing circuits, the operational amplifier A0 is powered and biased by an external power supply VDD, making it highly susceptible to power supply ripple and noise coupling internally and impacting the output.
[0031] like Figure 2 The circuit diagram of the main operational amplifier A0 is shown below. The main operational amplifier includes a first-stage amplifier (preamplifier Stage 1) and a second-stage amplifier (high-gain stage Stage 2). The first-stage amplifier is used to optimize noise and offset performance, and consists of transistors. , The input differential pair is formed with the first pure resistor Rsp1 and the second pure resistor Rsp1 as the loads. This avoids the use of MOSFETs and utilizes the inherent low flicker noise characteristics of the BJT differential pair. Combined with the pure resistive load, it significantly suppresses input stage noise and offset temperature drift. The second-stage amplifier provides the system's open-loop gain and employs transistors. , This forms the second-stage differential pair, with the first PMOS transistor at the top. ), second PMOS transistor ( As an active load, although PMOS active loads themselves generate noise and offset, the error generated by the second-stage amplifier is divided by the gain of the first stage when the first-stage amplifier provides the initial gain, thus further reducing the error. The first PMOS transistor is also connected to a diode (an equivalent diode formed by shorting the gate and drain of the PMOS transistor itself), which clamps the first PMOS transistor at a stable DC level for use by the auxiliary operational amplifier; The left side of the main operational amplifier A0 circuit diagram also includes a third pure resistor Rsp1 and a transistor. This forms the bias branch, which serves as the tail current source. , Provide bias current; transistor It also connects to a diode; This bias branch is not connected to the external power supply VDD, but rather to the internal voltage regulator node VDD1. Since VDD1 is a low temperature coefficient voltage after the bandgap reference has been stabilized, this internal self-biasing structure greatly cuts off the interference path of external VDD noise, significantly improving the power supply rejection ratio. Furthermore, the current generated by this bias branch exhibits PTAT characteristics; for a transistor, its transconductance and tail current source... Injected collector quiescent current and thermal voltage Related, can be represented as This ensures that the transconductance of the op-amp input transistor remains highly constant across the entire temperature range, in order to maintain the stability of the op-amp closed-loop system.
[0032] Auxiliary amplifier A1 is connected between the two output terminals of the second stage amplifier, and the power transistor... As an output driver, when the entire system is stable in closed loop, the extremely high gain of A1 forces the voltages at its positive and negative input terminals to be strictly equal, thus... The drain voltages are completely identical, which completely eliminates the current mismatch caused by the channel length modulation effect and perfectly balances the differential pair of the second-stage amplifier. like Figure 3 The circuit diagram of auxiliary operational amplifier A1 is shown below. This op-amp does not use a traditional tail current source; see the comparison diagram—as shown below. Figure 5 Compared to traditional symmetrical operational amplifiers, the input transistor pair The source stage is connected to a tail current source. It is used to suppress common-mode interference and establish a static operating point; however, in the A1 circuit of this invention, the tail current source in the traditional pseudo-differential structure is removed. This is omitted because the input of op-amp A1 is connected to the output stage of main operational amplifier A0, and the OUTN node of main operational amplifier A0 is already connected to the PMOS transistor via an internal diode. Forced clamping at This stable DC level naturally provides a perfect bias for the input stage of A1 and avoids low-frequency noise from the tail current source.
[0033] This invention introduces and The constructed high-order compensation network cleverly injects into the core branches... The high-order nonlinear compensation current enables high-precision reference output with ultra-low temperature drift (<8ppm / ℃); The first stage amplifier (Stage 1) of the main operational amplifier A0 innovatively uses pure transistors as input pairs and pure resistors as loads, which eliminates flicker noise from a physical structure perspective and greatly suppresses offset temperature drift. The main operational amplifier A0 does not use an external independent bias. Instead, it extracts the bias voltage VDD1 from the low temperature coefficient node after the internal bandgap has been stabilized, which cuts off the noise coupling path of the external power supply VDD and greatly improves the circuit's power supply interference resistance and system stability. An auxiliary operational amplifier A1 is also used, which is connected across the output of the main operational amplifier A0. In addition, A1 adopts a self-biased pseudo-differential symmetric structure with a tailless current source, which eliminates current mismatch and further reduces power consumption and area overhead.
[0034] It should be noted that the present invention is not limited to the above-described embodiments. The above embodiments are merely examples, and any embodiments that have the same structure and perform the same effects as the technical concept within the scope of the present invention are included within the scope of the present invention. Furthermore, various modifications that can be conceived by those skilled in the art to the embodiments, and other ways of constructing by combining some of the constituent elements of the embodiments, without departing from the spirit of the present invention, are also included within the scope of the present invention.
Claims
1. A bandgap reference circuit with high order temperature compensation and low noise operational amplifier, characterized by, Comprise: Bandgap reference main body circuit, high order compensation branch, operational amplifier circuit; The bandgap reference main circuit comprises transistors , and resistors , the bases of the transistors , are connected, the emitters of the transistors , are connected to the two ends of the resistors respectively, and the resistor is connected to one end of the transistor and also to the configurable resistor ; The operational amplifier circuit comprises a main operational amplifier A0 and an auxiliary operational amplifier A1; The main operational amplifier A0 is used for forcing the same current in each circuit of the bandgap reference main body circuit; The high order compensation branch includes a transistor , a configurable resistance and a resistance network; The configurable resistor Connected across the transistor The transistor has a current-draining space between its base and emitter. The collector injects a compensation current with high-order temperature characteristics into the core branch. The reference voltage outputted finally by the resistance network satisfies the following equation: ; Where M is a constant coefficient determined by the resistance; The resistor in the resistor network is specifically 20K ohms; For transistors The base-emitter voltage; For transistors The base-emitter voltage.
2. The bandgap reference circuit with high order temperature compensation and low noise operational amplifier of claim 1, wherein, The main operational amplifier A0 comprises a first stage amplifier and a second stage amplifier; The first stage amplifier is used to optimize the noise and offset performance, consisting of a transistor 、 input differential pair, loaded with a first pure resistance Rsp1 and a second pure resistance Rsp1; The second stage amplifier employs transistors 、 comprise a second differential pair, with the active load being a first PMOS transistor and a second PMOS transistor.
3. The bandgap reference circuit with high order temperature compensation and low noise operational amplifier of claim 2, wherein, The first PMOS tube is further connected with a diode.
4. The bandgap reference circuit with high order temperature compensation and low noise operational amplifier of claim 2, wherein, The main operational amplifier A0 further comprises a bias branch consisting of a third pure resistance Rsp1 and a transistor composing a tail current source , providing a bias branch; The transistor Also connected is a diode; The bias branch is connected with an internal voltage stabilizing node VDD1; The internal voltage stabilizing node VDD1 is a low temperature coefficient voltage node after the bandgap reference circuit is stabilized.
5. The bandgap reference circuit with high order temperature compensation and low noise operational amplifier of claim 1, wherein, The auxiliary operational amplifier A1 is connected across two output terminals of the second stage amplifier of the main operational amplifier A0.
6. The bandgap reference circuit with high order temperature compensation and low noise operational amplifier of claim 5, wherein, The auxiliary operational amplifier A1 adopts a pseudo differential symmetric structure of a tailless current source.
7. The bandgap reference circuit with high order temperature compensation and low noise operational amplifier of claim 6, wherein, The input stage bias of the auxiliary operational amplifier A1 is provided by the output stage node of the main operational amplifier A0, specifically by the clamping DC level provided by the output terminal OUTN node of the second stage amplifier of the main operational amplifier A0.
8. The bandgap reference circuit with high order temperature compensation and low noise operational amplifier according to any one of claims 1 to 7, characterized in that, The bandgap reference circuit is integrated by using a 40nm CMOS process.
