Multilayer flexible circuit board based on magnetron sputtering and manufacturing method thereof

Abstract

The application discloses a multilayer flexible circuit board based on magnetron sputtering and a manufacturing method thereof, and the method comprises the following steps: providing an inner layer circuit board on which an inner layer circuit has been formed; covering a medium layer on the inner layer circuit board, performing laser processing on the covered medium layer, forming a blind hole penetrating through the medium layer and exposing the inner side inner layer circuit, and obtaining an outer layer circuit board substrate; performing magnetron sputtering on the outer layer circuit board substrate, forming a metal seed layer on the surface of the medium layer and the inner wall of the blind hole; based on the metal seed layer, performing whole-plate electroplating on the outer layer circuit board substrate after magnetron sputtering, and performing outer layer circuit manufacturing on the outer layer circuit board substrate after whole-plate electroplating, thereby forming a target multilayer board with outer layer circuits. The application forms a double-layer structure metal seed layer through magnetron sputtering, thereby reducing chemical waste liquid discharge and improving the combination stability of the seed layer and the medium layer; the blind hole is formed by directly processing the medium layer through laser, and the number of single-hole laser processing times is smaller, and the processing efficiency is higher.

Description

Technical Field

[0001] This invention relates to the field of flexible circuit board manufacturing technology, specifically to a multilayer flexible circuit board based on magnetron sputtering and its manufacturing method. Background Technology

[0002] Flexible printed circuits (FPCs) are widely used in consumer electronics, automotive electronics, and medical devices due to their advantages such as flexibility, thinness, and high wiring density. As electronic products become thinner, lighter, and more multifunctional, the demand for multilayer flexible printed circuits is increasing.

[0003] Traditional multilayer flexible circuit boards use copper-clad laminate lamination to add layers. Taking the preparation of a three-layer board as an example: First, a double-sided PI (polyimide) copper-clad laminate is used as the substrate, and the inner layer circuit is prepared by pattern transfer and etching. Then, the outer single-sided PI copper-clad laminate is laminated with the inner layer circuit by hot pressing. Subsequently, interlayer connection holes are processed by laser drilling, and the holes are metallized by wet processes such as black shadow and chemical copper plating. Then, the copper in the holes and the surface is thickened by electroplating copper. Finally, the outer layer circuit is formed by etching, realizing interlayer electrical conduction.

[0004] The aforementioned traditional processes have the following inherent defects: First, laser drilling is inefficient: because the copper-clad laminate has copper foil on the outer layer, laser drilling requires drilling through the surface copper foil and the dielectric layer in sequence. The same hole needs to be processed about 6 times. In addition, it needs to be adapted to a 25μm small spot laser equipment, which results in a long processing cycle and limited production efficiency. Second, it is environmentally unfriendly and has high operating costs: Hole metallization relies on wet processes such as black shadow and chemical copper plating, which generate a large amount of organic pollutants and acid and alkali waste liquids during the production process. The waste liquid treatment cost is high, which does not meet the requirements of green manufacturing development. Third, high raw material costs: Adding layers requires purchasing finished single-sided copper-clad laminates, resulting in high material procurement costs. Moreover, the more layers there are (four layers and above), the higher the proportion of material costs, which compresses the product's profit margin. Fourth, fine circuit fabrication is difficult: traditional processes easily create height differences in the hole rings at the hole positions, resulting in poor board surface flatness, making it difficult to stably fabricate fine circuits with line widths and spacings within 30μm.

[0005] Therefore, there is an urgent need for a multilayer flexible circuit board manufacturing solution that is more efficient, has lower production costs, is more environmentally friendly, and can stably produce high-precision and fine circuits, in order to meet the application requirements of the new generation of electronic products for multilayer flexible circuit boards. Summary of the Invention

[0006] In view of this, the present invention provides a multilayer flexible circuit board based on magnetron sputtering and its manufacturing method, so as to solve the problems of low production efficiency, high environmental pressure, high material cost and difficulty in stable processing of fine circuits in the existing multilayer FPC manufacturing process.

[0007] This invention provides a method for fabricating a multilayer flexible circuit board based on magnetron sputtering, the method comprising: Provides an inner layer circuit board with pre-formed inner layer circuitry; A dielectric layer is covered on the inner circuit board, and the covered dielectric layer is laser-processed to form blind holes that penetrate the dielectric layer and expose the inner circuitry on the inside, thereby obtaining an outer circuit board substrate. The outer circuit board substrate is subjected to magnetron sputtering to form a metal seed layer on both the surface of the dielectric layer and the inner wall of the blind via; Based on the metal seed layer, the outer circuit board substrate after magnetron sputtering is subjected to whole-board electroplating, and the outer circuit is fabricated on the whole-board electroplated outer circuit board substrate to form a target multilayer board with outer circuit.

[0008] Optionally, the covered dielectric layer is laser-processed to form blind vias that penetrate the dielectric layer and expose the inner layer circuitry, resulting in an outer layer circuit board substrate, comprising: Using a laser drilling device, only the dielectric layer covering the inner circuit board is laser-drilled to form at least one blind hole that penetrates the dielectric layer and exposes the inner circuit board on the inside, thereby obtaining the outer circuit board substrate. The laser spot diameter of the laser drilling equipment is in the range of 30~50μm, and each blind hole is drilled 4 times.

[0009] Optionally, the dielectric layer can be covered by any one of lamination, printing, and coating. When using a lamination method, the process of covering the dielectric layer on the inner circuit board includes, in sequence: micro-etching → baking → hot pressing → high-temperature baking. When using a printing method, the process of covering the dielectric layer on the inner circuit board includes, in sequence: micro-etching → printing → pre-baking → high-temperature baking. When using a coating method, the process of coating the dielectric layer on the inner circuit board includes, in sequence: micro-etching → coating → pre-baking → high-temperature baking.

[0010] Optionally, the dielectric layer is any one or more of liquid crystal polymer, dielectric ink, or thermosetting polyimide.

[0011] Optionally, the outer circuit board substrate is subjected to magnetron sputtering to form a metal seed layer on both the surface of the dielectric layer and the inner wall of the blind via, including: The cavity containing the outer circuit board substrate is evacuated to bring the cavity pressure below a preset pressure and the cavity temperature within a preset temperature range. According to preset cleaning parameters, argon gas is used to perform plasma treatment on the outer circuit board substrate after vacuuming. According to the first sputtering parameters, a metal adhesion layer is sputtered onto the dielectric layer and the inner wall of the blind hole on the outer circuit board substrate after plasma treatment. According to the second sputtering parameters, copper is sputtered on the outer circuit board substrate after the sputtering of the metal adhesion layer, so that copper layers are formed on the outer surface of the dielectric layer and the chromium layer of the inner wall of the blind hole of the outer circuit board substrate, resulting in a metal seed layer composed of the metal adhesion layer and the copper layer.

[0012] Optionally, the preset pressure is 10. -2 Pa; the preset temperature range is 90~120℃.

[0013] Optionally, the preset cleaning parameters include cleaning time and cleaning air flow rate, the first sputtering parameters include chromium layer sputtering power and chromium layer sputtering time, and the second sputtering parameters include copper layer sputtering power and copper layer sputtering time; The cleaning time ranges from 5 to 10 minutes, and the cleaning air flow rate ranges from 150 to 400 SCCM. And / or, the sputtering power of the adhesion layer ranges from 300 to 500 W, and the sputtering time of the adhesion layer ranges from 5 to 10 min; And / or, the copper layer sputtering power ranges from 300 to 500W, and the copper layer sputtering time ranges from 20 to 30 minutes.

[0014] Optionally, the outer layer circuit board substrate after electroplating is subjected to outer layer circuit fabrication to form a target multilayer board with outer layer circuitry, including: The outer circuit board substrate after electroplating is etched to form the outer circuit; According to preset flash etching parameters, the etched outer circuit board substrate is flash-etched to remove the residual metal seed layer in the area where the outer circuit is located, so as to obtain the target multilayer board with the outer circuit.

[0015] Optionally, the preset flash erosion parameters include flash erosion time; The flash erosion time ranges from 1 to 2 minutes.

[0016] In addition, the present invention also provides a multilayer flexible circuit board based on magnetron sputtering, which is manufactured using the aforementioned method.

[0017] The beneficial effects of this invention are as follows: By directly covering the inner layer circuit board with a dielectric layer that has already formed the inner layer circuitry, and then performing laser processing on the covered dielectric layer, the repeated processing steps of penetrating the copper foil of the outer copper-clad laminate in traditional processes can be avoided, effectively reducing the number of laser drilling operations per hole, significantly shortening the drilling cycle, and effectively improving the production efficiency of the drilling process for multilayer boards; after the outer layer circuit board substrate with blind holes is formed by laser processing, a metal seed layer is formed on the surface of the dielectric layer of the outer layer circuit board and the inner wall of the blind holes using a magnetron sputtering process, replacing the black shadow in the traditional process. Wet processes such as chemical copper plating do not require the use of large amounts of chemical reagents, and the production process does not generate large amounts of organic pollutants or acid and alkaline waste liquids, significantly reducing waste liquid treatment costs and better meeting the development requirements of green manufacturing. Finally, the entire board is electroplated based on the metal seed layer formed by magnetron sputtering, and the outer layer circuit is fabricated. There is no need to purchase finished single-sided copper-clad laminates as add-layer materials to form the outer layer circuits, and multi-layer flexible circuit boards can be produced. This can significantly reduce the cost of raw material procurement, and the more circuit layers there are, the more prominent the cost advantage becomes. It also effectively avoids the problem of height difference between hole positions and hole rings. The present invention relates to a multilayer flexible circuit board based on magnetron sputtering and its manufacturing method. Compared with the traditional process that requires purchasing finished single-sided copper-clad laminates for layer addition and lamination, the present invention only requires directly covering the dielectric layer on the existing inner circuit board to complete the layer addition, without the need to purchase finished copper-clad laminates. This can effectively reduce the cost of raw materials. It also eliminates the need to laminate the outer copper-clad laminate with copper foil, avoiding the problem of hole position and hole ring height difference in the traditional process. The overall flatness of the board surface is better, and it can stably produce fine lines with line width and line spacing within 30μm. It can better meet the application requirements of high-density wiring and adapt to the performance requirements of multilayer flexible circuit boards for the new generation of thin and light, multi-functional electronic products. Attached Figure Description

[0018] The features and advantages of the invention will be more clearly understood by referring to the accompanying drawings, which are schematic and should not be construed as limiting the invention in any way. In the drawings: Figure 1 A flowchart of a method for fabricating a multilayer flexible circuit board based on magnetron sputtering according to Embodiment 1 of the present invention is shown; Figure 2 A cross-sectional view of the double-sided copper-clad laminate in Embodiment 1 of the present invention is shown. Figure 3 This diagram shows a cross-sectional view of the double-sided copper-clad laminate after laser drilling in Embodiment 1 of the present invention. Figure 4 This shows a cross-sectional view of the double-sided copper-clad laminate after electroplating and hole filling in Embodiment 1 of the present invention; Figure 5 A cross-sectional view of the inner circuit board formed after etching in Embodiment 1 of the present invention is shown. Figure 6 This diagram shows a cross-sectional view of the inner circuit board after the dielectric layer is covered, according to Embodiment 1 of the present invention. Figure 7 A cross-sectional view of the outer circuit board substrate formed after laser processing in Embodiment 1 of the present invention is shown. Figure 8 A cross-sectional view of the outer circuit board substrate after magnetron sputtering in Embodiment 1 of the present invention is shown. Figure 9 This diagram shows a cross-sectional view of the outer circuit board substrate after electroplating of the entire board in Embodiment 1 of the present invention. Figure 10 This diagram shows a cross-sectional view of the outer layer substrate after the outer layer circuitry has been fabricated, as shown in Embodiment 1 of the present invention. Figure 11 A cross-sectional view of the target multilayer board obtained by flash etching in Embodiment 1 of the present invention is shown.

[0019] Explanation of reference numerals in the attached figures: 1. PI layer, 2. Copper layer, 3. Inner layer via, 4. Inner layer circuitry, 5. Dielectric layer, 6. Blind via, 7. Metal seed layer, 8. Electroplated copper layer, 9. Outer layer circuitry. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] In this embodiment of the invention, the term "and / or" describes the relationship between associated objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. The character " / " generally indicates that the preceding and following associated objects have an "or" relationship.

[0022] It should be noted that the terms "first," "second," etc., in the specification, claims, and drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0023] In this embodiment of the invention, the term "multiple" refers to two or more, and other quantifiers are similar.

[0024] Example 1

[0025] This embodiment provides a method for fabricating a multilayer flexible circuit board based on magnetron sputtering, such as... Figure 1 As shown, the method includes: S1: Provides an inner layer circuit board with pre-formed inner layer circuitry; S2: Cover the inner circuit board with a dielectric layer, and perform laser processing on the covered dielectric layer to form blind holes that penetrate the dielectric layer and expose the inner circuit board inside, thereby obtaining the outer circuit board substrate. S3: Perform magnetron sputtering on the outer circuit board substrate to form a metal seed layer on both the surface of the dielectric layer and the inner wall of the blind hole; S4: Based on the metal seed layer, the outer circuit board substrate after magnetron sputtering is electroplated as a whole, and the outer circuit is fabricated on the outer circuit board substrate after electroplating as a whole, to form a target multilayer board with outer circuit.

[0026] In this embodiment, by directly covering the inner circuit board with the formed inner circuitry with a dielectric layer and then performing laser processing on the covered dielectric layer, the repeated processing steps of penetrating the copper foil of the outer copper-clad laminate in the traditional process can be avoided. This effectively reduces the number of laser drilling operations per hole, significantly shortens the drilling cycle, and effectively improves the production efficiency of the multilayer board drilling process. After the outer circuit board substrate with blind holes is formed by laser processing, a magnetron sputtering process is used to form a metal seed layer on the surface of the dielectric layer of the outer circuit board and the inner wall of the blind holes, replacing the black shadow and chemical processes in the traditional process. In wet processes such as copper plating, no large amount of chemical reagents are needed, and no large amount of organic pollutants or acid and alkali waste liquids are generated during the production process, which significantly reduces waste liquid treatment costs and is more in line with the development requirements of green manufacturing. Finally, the entire board is electroplated based on the metal seed layer formed by magnetron sputtering, and the outer layer circuit is fabricated. There is no need to purchase finished single-sided copper-clad laminates as add-layer materials to form the outer layer circuit, and multi-layer flexible circuit boards can be produced. This can significantly reduce the cost of raw material procurement, and the more circuit layers there are, the more prominent the cost advantage becomes. It also effectively avoids the problem of height difference between hole positions and hole rings.

[0027] The method for fabricating a multilayer flexible circuit board based on magnetron sputtering in this embodiment, compared to the traditional process that requires purchasing finished single-sided copper-clad laminates for layer addition and lamination, only requires directly covering the dielectric layer on the existing inner circuit board to complete the layer addition. There is no need to purchase finished copper-clad laminates, which can effectively reduce the cost of raw materials. It also avoids the problem of hole position and hole ring height difference in the traditional process, resulting in better overall board surface flatness. It can stably produce fine lines with line width and line spacing within 30μm, which can better meet the application requirements of high-density wiring and adapt to the performance requirements of multilayer flexible circuit boards for the new generation of thin and light, multifunctional electronic products.

[0028] It should be understood that in the manufacturing method of this embodiment, the covering dielectric layer, laser processing, magnetron sputtering, whole-board electroplating, and outer layer circuit fabrication described in steps S2 to S4 can all be performed on one side of the inner layer circuit board or simultaneously on both sides. When performed simultaneously on both sides, both outer surfaces of the inner layer circuit board have inner layer circuits, and the inner layer circuits on both outer surfaces can be the same or different; the outer layer circuits formed on both sides can also be the same or different, depending on the specific product design requirements.

[0029] The following is a detailed description of each step of the manufacturing method in this embodiment.

[0030] In step S1, the provided inner layer circuit board can be a circuit board with a single-sided inner layer circuit made based on a single-sided copper clad laminate, or a circuit board with a double-sided inner layer circuit made based on a double-sided copper clad laminate; it can also be a multilayer circuit board with multiple layers of copper foil, and a circuit is formed on at least one outer surface of the multilayer circuit board, which is regarded as the inner layer circuit of the multilayer circuit board.

[0031] For ease of explanation, this embodiment uses a double-sided copper-clad laminate as an example. Step S1 includes: S11: Provide a double-sided copper-clad laminate and perform laser drilling on the double-sided copper-clad laminate; S12: Electroplating is performed on the double-sided copper-clad laminate after laser drilling to fill the holes and form inner layer through holes; S13: Etch the double-sided copper-clad board after electroplating and filling the holes to form the inner layer circuitry, and obtain the inner layer circuit board.

[0032] By using the above process to manufacture inner layer circuit boards with inner layer circuits, the dimensional accuracy of the inner layer circuits and the reliability of interlayer conductivity can be guaranteed, providing a stable and reliable processing foundation for subsequent layer addition and avoiding the impact of inner layer circuit defects on the final yield of multilayer flexible circuit boards.

[0033] In this embodiment, the double-sided copper-clad laminate can be a conventional flexible circuit board copper-clad laminate, and its dielectric substrate can be a conventional flexible dielectric material such as PI (i.e., polyimide), LCP (i.e., liquid crystal polymer) or modified epoxy. The copper foil thickness can be selected according to the inner layer circuit design requirements to meet the design requirements of different wiring densities.

[0034] The cross-sectional structure of the double-sided copper-clad laminate provided in this embodiment is as follows: Figure 2 As shown, the cross-sectional structure of the double-sided copper-clad laminate after laser drilling is as follows: Figure 3 As shown, the cross-sectional structure of the double-sided copper-clad laminate after electroplating and hole filling is as follows. Figure 4 As shown, the cross-sectional structure of the inner layer circuit board formed after etching is as follows: Figure 5 As shown. In Figures 2-5 In the diagram, 1 is the PI layer, 2 is the copper layer, 3 is the inner layer via, and 4 is the inner layer circuitry.

[0035] In step S2, the dielectric layer is any one or more of liquid crystal polymer, dielectric ink, or thermosetting polyimide.

[0036] The dielectric layer of the above materials can all adapt to the bending and wiring requirements of flexible circuit boards, and at the same time have good insulation performance and processing adaptability. They can form a stable bond with the surface of the inner circuit board, avoiding problems such as dielectric layer peeling and delamination during subsequent processing.

[0037] Based on the different materials of the media layer mentioned above, a suitable coverage method can be selected.

[0038] Preferably, the medium layer is covered by any one of lamination, printing, and coating.

[0039] This embodiment allows for flexible selection of processing methods based on the material of the dielectric layer, the processing efficiency of mass production, and the accuracy requirements of the dielectric layer thickness. When the dielectric layer is a solid sheet-type liquid crystal polymer or thermosetting polyimide, the preferred covering method in step S2 is lamination. The corresponding process flow is as follows: micro-etching → baking → hot pressing → high-temperature baking. In this process flow, micro-etching removes oxide impurities and oil stains from the surface of the inner layer circuit board, improves the surface roughness of the inner layer board, and enhances the adhesion between the dielectric layer and the inner layer board surface; baking removes moisture adsorbed on the inner layer board surface, preventing bubbles from forming due to moisture evaporation during hot pressing; hot pressing tightly adheres the dielectric sheet to the surface of the inner layer circuit board at a preset temperature and pressure; and high-temperature baking fully cures the dielectric layer, stabilizing its dimensions and bonding strength.

[0040] When the dielectric layer is liquid dielectric ink, the printing method can be selected for coverage in step S2. The corresponding process flow is as follows: micro-etching → printing → pre-baking → high-temperature baking. In this process flow, the micro-etching treatment has the same effect as the micro-etching treatment in the aforementioned lamination coverage method. Printing can be performed by screen printing or inkjet printing to directly transfer the dielectric ink to the surface of the inner circuit board, flexibly adapting to different dielectric layer thickness requirements. Pre-baking can evaporate some of the solvent in the ink, avoiding ink flow from affecting dimensional accuracy. The subsequent high-temperature baking completely cures the dielectric ink, meeting insulation and processing requirements.

[0041] When the dielectric layer is a liquid dielectric ink or a liquid thermosetting polyimide, the coating method can be selected in step S2. The corresponding process flow is as follows: micro-etching → coating → pre-baking → high-temperature baking. In this process flow, the micro-etching process serves the same purpose as above. Coating can be performed using methods such as comma coating or slot coating to uniformly coat the liquid dielectric onto the surface of the inner circuit board. This allows for precise control of the dielectric layer thickness, meeting the processing requirements of ultra-thin overlays. Subsequent pre-baking and high-temperature baking complete the curing process, resulting in a uniform and stable dielectric layer.

[0042] After the dielectric layer is covered, in step S2, the covered dielectric layer is laser-processed to form blind vias that penetrate the dielectric layer and expose the inner layer circuitry, resulting in an outer layer circuit board substrate, including: Using a laser drilling device, only the dielectric layer covering the inner circuit board is laser-drilled to form at least one blind hole that penetrates the dielectric layer and exposes the inner circuit board on the inside, thereby obtaining the outer circuit board substrate. The laser spot diameter of the laser drilling equipment is in the range of 30~50μm, and each blind hole is drilled 4 times.

[0043] The aforementioned laser drilling equipment is used to laser process the covering dielectric layer. Only the dielectric layer needs to be penetrated, without needing to penetrate the outer copper foil, thus reducing the processing difficulty. In this embodiment, the laser spot diameter of the laser drilling equipment ranges from 30 to 50 μm, and each blind hole only requires four laser passes to form. Compared to the traditional process that requires approximately six laser passes per hole, the processing time per hole is significantly reduced, and the overall processing efficiency of the drilling process is significantly improved. After laser processing, blind holes penetrating the dielectric layer and exposing the inner layer circuitry are obtained; these are the through holes used to achieve interlayer electrical connections, thus obtaining the outer circuit board substrate.

[0044] Laser drilling equipment can be either commonly used CO2 laser drilling machines or UV laser drilling machines on the market, both of which can be adapted to the processing requirements of this solution. Existing mature equipment can be flexibly selected according to actual conditions, without the need for additional customized equipment, and without increasing equipment modification costs. It is also compatible with the production requirements of existing mass production lines.

[0045] The cross-sectional structure of the inner circuit board after the dielectric layer is covered in this embodiment is as follows: Figure 6 As shown, the cross-sectional structure of the outer circuit board substrate formed after laser processing is as follows: Figure 7 As shown. In Figure 6 and Figure 7 In the diagram, 5 represents the dielectric layer, and 6 represents the blind via.

[0046] Furthermore, in this embodiment, after the outer circuit board substrate is processed and before magnetron sputtering is performed in step S3, the method further includes: The outer circuit board substrate is surface-treated using fluorine-containing plasma.

[0047] By etching the surface of the dielectric layer and the inner wall of the blind hole with fluorine-containing plasma, the surface roughness is improved, which can effectively enhance the bonding force between the subsequent metal seed layer and the dielectric layer, and avoid the problem of metal layer peeling off during subsequent electroplating or use.

[0048] After obtaining the outer circuit board substrate with blind vias, this embodiment proceeds to step S3, where magnetron sputtering is performed on the outer circuit board substrate to form metal seed layers on both the surface of the dielectric layer and the inner wall of the blind vias. Compared to the traditional wet process that relies on chemical copper plating to form the initial seed layer, magnetron sputtering is a dry process of pure physical vapor deposition. The entire process does not require the use of chemical plating solutions, resulting in no waste liquid discharge, making it more environmentally friendly. Furthermore, the formed metal seed layer has better uniformity in thickness and stronger adhesion to the dielectric layer, which can avoid the problem of metal layer peeling off during subsequent electroplating.

[0049] Specifically, step S3 in this embodiment includes: S31: Vacuum treatment is performed on the cavity where the outer circuit board substrate is located, so that the cavity pressure reaches below the preset pressure, and the cavity temperature rises to the preset temperature range. S32: According to the preset cleaning parameters, the outer circuit board substrate after vacuum treatment is subjected to plasma treatment using argon gas; S33: According to the first sputtering parameters, a metal adhesion layer is sputtered onto the dielectric layer and the inner wall of the blind hole on the outer circuit board substrate after plasma treatment; S34: According to the second sputtering parameters, copper is sputtered on the outer circuit board substrate after the sputtering of the metal adhesion layer, so that copper layers are formed on the outer surface of the dielectric layer and the chromium layer of the inner wall of the blind hole of the outer circuit board substrate, and a metal seed layer composed of the metal adhesion layer and the copper layer is obtained.

[0050] Magnetron sputtering, performed through the above steps, ensures uniform and stable adhesion between the dielectric layer surface and the metal seed layer on the inner wall of the blind via, providing a uniform conductive substrate for subsequent whole-board electroplating and further improving the reliability of interlayer electrical connections. Simultaneously, the two-layer structure design, employing a metal adhesion layer followed by copper sputtering, results in stronger adhesion between the metal adhesion layer and the dielectric layer. This serves as a transition layer, enhancing the bonding stability between the copper layer and the dielectric layer and preventing metal layer delamination during use. Furthermore, copper's superior conductivity makes it more suitable as a substrate for electroplating growth, ensuring the deposition rate and coating uniformity of subsequent whole-board electroplating.

[0051] In step S31 above, the preset pressure is 10. -2 Pa; the preset temperature range is 90~120℃.

[0052] By designing the vacuuming process using these parameters, residual air and moisture inside the chamber can be effectively removed, preventing moisture and impurities from reacting with the metal target during sputtering and causing impurities to mix into the metal seed layer, affecting its purity and conductivity. Raising the chamber temperature to the preset range of 90~120℃ ensures a stable atomic deposition rate of the target during sputtering, preventing temperature fluctuations from causing uneven thickness of the metal seed layer, and further ensuring coating uniformity and bonding stability.

[0053] In step S32 above, the preset cleaning parameters include cleaning time and cleaning air flow rate, wherein the cleaning time ranges from 5 to 10 minutes and the cleaning air flow rate ranges from 150 to 400 SCCM.

[0054] By using the aforementioned preset cleaning parameters, the minute impurities and adsorbed gases remaining on the surface of the outer circuit board substrate can be effectively cleaned, further improving the surface cleanliness of the substrate and providing a clean interface for subsequent atomic deposition of metal target materials. This avoids impurity residues weakening the bonding force between the metal seed layer and the dielectric layer, ensuring the processing quality of magnetron sputtering.

[0055] In step S33 above, the first sputtering parameters include the sputtering power of the adhesion layer and the sputtering time of the adhesion layer, wherein the sputtering power of the adhesion layer is in the range of 300~500W and the sputtering time of the adhesion layer is in the range of 5~10min.

[0056] By using the first sputtering parameters mentioned above to sputter the metal adhesion layer, it is possible to ensure that the metal adhesion layer has a uniform thickness. This not only fully utilizes the role of the transition layer and strengthens the bonding stability between the copper layer and the dielectric layer, but also avoids unnecessary material costs and processing time due to an excessively thick metal adhesion layer, thus balancing processing costs and processing quality.

[0057] Specifically, the metal adhesion layer can be a chromium layer or a titanium layer.

[0058] In step S34 above, the second sputtering parameters include copper layer sputtering power and copper layer sputtering time, wherein the copper layer sputtering power ranges from 300 to 500W and the copper layer sputtering time ranges from 20 to 30 minutes.

[0059] By using the aforementioned second sputtering parameters to sputter the copper layer, a uniform copper seed layer thickness can be ensured. This provides a sufficiently high-quality conductive substrate for subsequent full-board electroplating, guaranteeing a consistent deposition rate, while avoiding excessive processing time and copper consumption due to an overly thick copper layer. This controls processing costs and ensures the efficiency and quality of the magnetron sputtering process. After magnetron sputtering, a uniform and complete double-layer metal seed layer is obtained on the surface of the dielectric layer and the inner wall of the blind via, preparing the substrate for subsequent full-board electroplating processes.

[0060] In this embodiment, the cross-sectional structure of the outer circuit board substrate after magnetron sputtering is as follows: Figure 8 As shown, in Figure 8 In the diagram, 7 represents a metal seed layer composed of a metal adhesion layer and a copper layer.

[0061] After magnetron sputtering is completed, the process proceeds to step S4. In step S4, electroplating is performed directly on the entire board based on the metal seed layer. This allows for the simultaneous deposition of copper metal on the inner wall of the blind via and the surface of the dielectric layer. This not only rapidly thickens the metal layer to meet the thickness requirements of the outer layer circuitry but also ensures that the plating on the inner wall of the blind via is uniform and complete. This effectively reduces interlayer connection resistance, improves the reliability of interlayer electrical connections, and avoids connection failures caused by incomplete plating on the inner wall of the blind via in traditional processes.

[0062] In this embodiment, the cross-sectional structure of the outer circuit board substrate after electroplating is as follows: Figure 9 As shown, in Figure 9 In the middle, 8 represents the electroplated copper layer.

[0063] After the electroplating of the entire board is completed, the process proceeds to step S4, where the outer layer circuitry is fabricated on the thickened copper layer of the board.

[0064] Specifically, in step S4, the outer layer circuit board substrate after electroplating is processed to form a target multilayer board with outer layer circuitry, including: S41: Etch the outer circuit board substrate after electroplating the entire board to form the outer circuit; S42: According to the preset flash etching parameters, the etched outer circuit board substrate is flash-etched to remove the residual metal seed layer in the area where the outer circuit is located, so as to obtain the target multilayer board with the outer circuit.

[0065] Using the above process to fabricate target multilayer boards with outer layer circuitry can ensure the dimensional accuracy of the outer layer circuitry, eliminate the risk of short circuits between circuits that may be caused by residual metal seed layers, improve the circuit insulation reliability of the final product, and ensure the stable electrical performance of the multilayer flexible circuit board.

[0066] Among them, the flash etching process has a short time and shallow etching depth, which can only remove a thin residual seed layer. It will not cause excessive etching to the already formed outer layer circuit and will not change the design size of the outer layer circuit. It can eliminate the risk of short circuit while ensuring that the line width accuracy of fine circuit meets the design requirements, and is suitable for the manufacturing requirements of high-density fine circuit.

[0067] Specifically, the preset flash erosion parameters include flash erosion time; The flash erosion time ranges from 1 to 2 minutes.

[0068] The aforementioned flash etching time ensures that the extremely thin metal seed layer remaining between the circuits is fully removed, while avoiding excessive corrosion of the thicker outer circuits. This eliminates the risk of short circuits between the circuits and ensures that the line width of the outer circuits meets the design accuracy requirements, thus balancing the yield of finished products and the processing precision.

[0069] During the flash etching process, preset flash etching parameters can also include the type and concentration of the flash etching solution. The type of flash etching solution can be either an ammonium persulfate system or an acidic copper chloride system. The corresponding flash etching solution concentration can be adjusted according to the actual etching rate of the production line, thus adapting to the flash etching requirements of this process without requiring additional adjustments to the existing production line's reagent system, resulting in greater adaptability.

[0070] The cross-sectional structure of the outer layer substrate after the outer layer circuitry is fabricated is as follows: Figure 10 As shown, after flash etching, the final target multilayer board can be obtained, and the corresponding cross-sectional structure is as follows. Figure 11 As shown, in Figures 10-11 In the middle, 9 represents the outer layer circuit.

[0071] It should be understood that after the target multilayer board is fabricated according to the above-described method of this embodiment, the target multilayer board can be used as an inner circuit board, and the steps of covering the dielectric layer, laser processing, magnetron sputtering, whole-board electroplating, and outer layer circuit fabrication can be repeated. Multiple rounds of layer-addition processing can be performed on the outer layer circuits already formed on the target multilayer board to obtain a multilayer flexible circuit board with four or more layers. The repeated steps will not be described in detail here.

[0072] To further illustrate the manufacturing method of this embodiment, the following three specific manufacturing examples are provided.

[0073] Example 1: Using a double-sided copper-clad board with a copper thickness of 12 micrometers on both sides and a PI thickness of 25 micrometers in the middle, 100-micrometer holes are laser-drilled. Electroplating is performed to fill the holes through black shadow and pattern electroplating processes to achieve metallization inside the holes and obtain inner layer vias. Then, the circuits on both sides are prepared through pattern transfer and etching processes to form an inner layer circuit board with inner layer circuits. A 25-micron-thick liquid crystal polymer (LCP) is laminated onto the surface of the inner layer circuitry. Laser drilling is then used to create blind vias connecting the outer and inner layers, with only the LCP being laser-processed. A 50-nanometer-thick titanium layer is first deposited on the LCP surface and the inner walls of the blind vias using magnetron sputtering, followed by a 300-nanometer-thick copper layer, resulting in a metal seed layer composed of titanium and copper. The entire board is then electroplated to achieve a 12-micron-thick copper layer on the surface of the metal seed layer, while simultaneously electroplating within the blind vias. Finally, the outer layer circuitry is fabricated using pattern transfer, etching, and flash etching processes, yielding the target multilayer board.

[0074] Example 2: Using a double-sided copper-clad board with a copper thickness of 18 micrometers on both sides and a PI thickness of 50 micrometers in the middle, a 120-micrometer hole is laser-drilled. The hole is filled by electroplating through a black shadow and pattern electroplating process to achieve metallization inside the hole and obtain an inner layer via. Then, the circuits on both sides are prepared through pattern transfer and etching processes to form an inner layer circuit board with inner layer circuits. A 30-micron thick dielectric ink is printed on the surface of the inner layer circuitry and cured after baking at 200°C for 30 minutes to complete the dielectric layer coverage. Laser drilling is then used to drill blind vias connecting the outer and inner layers, with only the dielectric ink being laser-processed. A 50-nanometer thick titanium layer is first deposited on the dielectric ink surface and the inner wall of the blind vias using magnetron sputtering, followed by a 300-nanometer thick copper layer, resulting in a metal seed layer composed of titanium and copper layers. The entire board is then electroplated with copper to achieve an 18-micron thick copper layer on the surface of the metal seed layer, while simultaneously electroplating within the blind vias. Finally, the outer layer circuitry is fabricated through pattern transfer, etching, and flash etching processes to obtain the target multilayer board.

[0075] Example 3: Using a double-sided copper-clad board with a copper thickness of 9 micrometers on both sides and a PI thickness of 12 micrometers in the middle, a 75-micrometer hole is laser-drilled. The hole is filled by electroplating through a black shadow and pattern electroplating process to achieve metallization inside the hole and obtain an inner layer via. Then, the circuits on both sides are prepared through pattern transfer and etching processes to form an inner layer circuit board with inner layer circuits. A 12-micron-thick thermosetting polyimide (PI) layer is coated on the inner layer circuit surface and cured after baking at 250°C for 30 minutes to complete the dielectric layer coverage. Laser drilling is then used to create blind vias connecting the outer and inner layers, with only the thermosetting PI being laser-processed. A 50-nanometer-thick chromium layer is first deposited on the surface of the thermosetting PI and the inner wall of the blind vias using magnetron sputtering, followed by a 300-nanometer-thick copper layer, resulting in a metal seed layer composed of titanium and copper layers. Electroplating is then performed on the entire board to achieve a 9-micron-thick copper layer on the surface of the metal seed layer, while simultaneously plating inside the blind vias. Finally, the outer layer circuitry is fabricated through pattern transfer, etching, and flash etching to obtain the target multilayer board.

[0076] The complete method for fabricating a multilayer flexible circuit board based on magnetron sputtering described in this embodiment has the following beneficial effects: 1. Laser drilling efficiency is improved by approximately 50%, significantly shortening the production cycle. This method only laser drills the copper-free dielectric layer, eliminating the need to penetrate the surface copper foil. Compared to traditional processes that require sequential laser drilling through the outer copper foil and dielectric layer, with six processing steps for the same hole and the use of a 25μm small spot laser, this method can use a 40μm large spot laser, completing the same blind hole in only four processing steps. This improves drilling efficiency by approximately 50%, effectively shortening the overall production cycle of multilayer boards.

[0077] 2. Dry hole metallization is employed, which is environmentally friendly and has low process operating costs. This method forms a conductive seed layer through magnetron sputtering physical vapor deposition, simultaneously achieving metallization of the hole walls and board surface, completely replacing traditional wet processes such as black shadowing and chemical copper plating. On the one hand, it avoids the generation and discharge of organic pollutants and acid / alkali waste liquids, significantly reducing environmental protection pressure and meeting green manufacturing requirements; on the other hand, it reduces chemical reagent consumption and waste liquid treatment costs, significantly lowering process operating costs.

[0078] 3. In-situ film deposition replaces purchased copper clad laminates, reducing raw material costs and highlighting the advantages of multilayer structures. Traditional layer-addition processes require the purchase of finished single-sided PI copper clad laminates as outer layer substrates, resulting in high material procurement costs. This method only requires the in-situ preparation of conductive copper layers on the surface of the dielectric layer through magnetron sputtering and electroplating. The preparation cost of the conductive layer per unit area is lower than the purchase cost of finished copper clad laminates. Furthermore, the more circuit layers (four layers and above), the more repeated the cost savings on copper clad laminate materials can be achieved with each layer addition, further amplifying the overall cost advantage as the number of layers increases.

[0079] 4. Excellent board surface flatness, supporting stable fabrication of fine lines within 30μm. Traditional lamination copper-clad laminates easily form hole ring height differences after drilling, which are further amplified by the step effect after subsequent electroplating, resulting in poor board surface flatness and restricting the accuracy of fine line fabrication. This method uses magnetron sputtering to continuously form a film on a flat dielectric layer surface, combined with uniform thickness increase of the entire board by electroplating. The copper layer on the hole wall and the surface copper layer transition smoothly, without obvious hole ring steps, greatly improving the board surface flatness. With subsequent flash etching to optimize the surface condition, it can stably achieve the fabrication of high-density fine lines within 30μm line width and spacing.

[0080] 5. Excellent uniformity of hole metallization and high reliability of interlayer conductivity. Magnetron sputtering has excellent step coverage capability, forming a uniform, continuous, and uninterrupted metal seed layer on the inner wall of blind holes, providing a consistent conductive substrate for subsequent electroplating. Compared with the defects such as uneven deep hole plating, hole wall voids, and thin copper that are prone to occur in traditional wet hole metallization, the hole copper prepared by this method has good uniformity of thickness, no typical conductivity risks, and significantly improved reliability and long-term stability of interlayer electrical connections.

[0081] 6. Strong process compatibility and scalability, adaptable to diverse product needs. The dielectric layer of this method can be flexibly prepared using three processes: hot pressing, screen printing, and coating. Different dielectric solutions, such as LCP lamination film, printing dielectric ink, and coated thermosetting PI, can be selected according to the product's dielectric performance requirements, thickness specifications, and cost positioning. Furthermore, by repeating the layer-addition process of "dielectric layer-laser-sputtering-electroplating-etching," multilayer flexible circuit boards with three, four, or more layers can be flexibly prepared. The process scalability is strong and can cover product needs in different application scenarios.

[0082] Example 2

[0083] This embodiment provides a multilayer flexible circuit board based on magnetron sputtering, which is manufactured using the method described in Embodiment 1.

[0084] The multilayer flexible circuit board fabricated in this embodiment, based on magnetron sputtering, utilizes the optimized layer-addition process described in Embodiment 1. It forms a double-layer metal seed layer through magnetron sputtering, replacing the traditional chemical copper plating seed layer. This reduces chemical waste discharge and improves the bonding stability between the seed layer and the dielectric layer, effectively preventing metal layer delamination during subsequent use. Furthermore, blind vias are formed directly from the dielectric layer using laser processing, eliminating the need for pre-pressing the entire copper foil surface. This results in a shorter processing flow, fewer laser passes per via, higher processing efficiency, and eliminates the need for additional customized processing equipment. It is compatible with existing mass production lines, thus reducing overall processing costs.

[0085] The manufacturing method used in this embodiment is the same as the method described in Embodiment 1. Therefore, for details not covered in this embodiment, please refer to Embodiment 1 and... Figures 1-11 The specific description will not be repeated in this embodiment.

[0086] Although embodiments of the invention have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the invention, and such modifications and variations all fall within the scope defined by the appended claims.

Claims

1. A method for fabricating a multilayer flexible circuit board based on magnetron sputtering, characterized in that, The method includes: Provides an inner layer circuit board with pre-formed inner layer circuitry; A dielectric layer is covered on the inner circuit board, and the covered dielectric layer is laser-processed to form blind holes that penetrate the dielectric layer and expose the inner circuitry on the inside, thereby obtaining an outer circuit board substrate. The outer circuit board substrate is subjected to magnetron sputtering to form a metal seed layer on both the surface of the dielectric layer and the inner wall of the blind via; Based on the metal seed layer, the outer circuit board substrate after magnetron sputtering is subjected to whole-board electroplating, and the outer circuit is fabricated on the whole-board electroplated outer circuit board substrate to form a target multilayer board with outer circuit.

2. The manufacturing method according to claim 1, characterized in that, Laser processing is performed on the covered dielectric layer to form blind vias that penetrate the dielectric layer and expose the inner layer circuitry, resulting in an outer layer circuit board substrate, comprising: Using a laser drilling device, only the dielectric layer covering the inner circuit board is laser-drilled to form at least one blind hole that penetrates the dielectric layer and exposes the inner circuit board on the inside, thereby obtaining the outer circuit board substrate. The laser spot diameter of the laser drilling equipment is in the range of 30~50μm, and each blind hole is drilled 4 times.

3. The manufacturing method according to claim 1, characterized in that, The medium layer can be covered by any one of lamination, printing, and coating. When using a lamination method, the process of covering the dielectric layer on the inner circuit board includes, in sequence: micro-etching → baking → hot pressing → high-temperature baking. When using a printing method, the process of covering the dielectric layer on the inner circuit board includes, in sequence: micro-etching → printing → pre-baking → high-temperature baking. When using a coating method, the process of coating the dielectric layer on the inner circuit board includes, in sequence: micro-etching → coating → pre-baking → high-temperature baking.

4. The manufacturing method according to claim 1, characterized in that, The dielectric layer is any one or more of liquid crystal polymer, dielectric ink, or thermosetting polyimide.

5. The manufacturing method according to claim 1, characterized in that, The outer circuit board substrate is subjected to magnetron sputtering to form a metal seed layer on both the surface of the dielectric layer and the inner wall of the blind via, including: The cavity containing the outer circuit board substrate is evacuated to bring the cavity pressure below a preset pressure and the cavity temperature within a preset temperature range. According to preset cleaning parameters, argon gas is used to perform plasma treatment on the outer circuit board substrate after vacuuming. According to the first sputtering parameters, a metal adhesion layer is sputtered onto the dielectric layer and the inner wall of the blind hole on the outer circuit board substrate after plasma treatment. According to the second sputtering parameters, copper is sputtered on the outer circuit board substrate after the sputtering of the metal adhesion layer, so that copper layers are formed on the outer surface of the dielectric layer and the chromium layer of the inner wall of the blind hole of the outer circuit board substrate, resulting in a metal seed layer composed of the metal adhesion layer and the copper layer.

6. The manufacturing method according to claim 5, characterized in that, The preset pressure is 10. -2 Pa; the preset temperature range is 90~120℃.

7. The manufacturing method according to claim 5, characterized in that, The preset cleaning parameters include cleaning time and cleaning air flow rate; the first sputtering parameters include adhesion layer sputtering power and adhesion layer sputtering time; the second sputtering parameters include copper layer sputtering power and copper layer sputtering time. The cleaning time ranges from 5 to 10 minutes, and the cleaning air flow rate ranges from 150 to 400 SCCM. And / or, the sputtering power of the adhesion layer ranges from 300 to 500 W, and the sputtering time of the adhesion layer ranges from 5 to 10 min; And / or, the copper layer sputtering power ranges from 300 to 500W, and the copper layer sputtering time ranges from 20 to 30 minutes.

8. The manufacturing method according to claim 1, characterized in that, The outer layer circuit board substrate after electroplating is processed to form a target multilayer board with outer layer circuitry, including: The outer circuit board substrate after electroplating is etched to form the outer circuit; According to preset flash etching parameters, the etched outer circuit board substrate is flash-etched to remove the residual metal seed layer in the area where the outer circuit is located, so as to obtain the target multilayer board with the outer circuit.

9. The manufacturing method according to claim 8, characterized in that, The preset flash erosion parameters include flash erosion time; The flash erosion time ranges from 1 to 2 minutes.

10. A multilayer flexible circuit board based on magnetron sputtering, characterized in that, It is manufactured using the manufacturing method described in any one of claims 1 to 9.

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