Power module and vehicle

CN123035953APending Publication Date: 2026-11-03FAW QI NEW POWER (CHANGCHUN) TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202611263240.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-08-19
Publication Date
2026-11-03

AI Technical Summary

Technical Problem

The current packaging method of power modules limits the high-temperature potential of SiC devices, resulting in low conversion efficiency and the risk of failure due to mechanical stress.

Method used

An embedded design is adopted, which buries power devices and heat dissipation channels inside the PCB. Multiple PAD areas are formed through the device connection layer, eliminating external bonding connection points and optimizing the cooling method to improve heat dissipation.

Benefits of technology

It achieves higher module integration and reliability, reduces size and weight, and lowers the risk of failure caused by mechanical stress, thus improving long-term reliability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application relates to the technical field of power modules, and discloses a power module and a vehicle. The power module comprises at least one power device, a device connection layer, a heat dissipation layer and a packaging substrate layer; the heat dissipation layer is located on the surface of the packaging substrate layer, and at least one heat dissipation channel is arranged in the heat dissipation layer; the packaging substrate layer is provided with at least one heat dissipation medium inlet and at least one heat dissipation medium outlet, and the heat dissipation medium inlet and the heat dissipation medium outlet are communicated with each heat dissipation channel; the power device is located on the side, away from the packaging substrate layer, of the heat dissipation layer and forms a plurality of PAD areas through the device connection layer at least. The application can at least achieve double embedded integration of the power device and the heat dissipation channel, can realize higher module integration, can reduce the volume and weight of the power module while guaranteeing the heat dissipation effect, can reduce external bonding connection points through the embedded design, can reduce the failure risk of the power module caused by mechanical stress, and improves the long-term use reliability.
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Description

Technical Field

[0001] This invention relates to the field of power module technology, and in particular to a power module and a vehicle. Background Technology

[0002] With the rapid development of the new energy vehicle industry, the core three-electric systems of new energy vehicles—battery, electric drive, and electronic control systems—are also constantly being upgraded. To improve the range of new energy vehicles, the main approach is to improve the efficiency of the electric drive system; and the inverter, as one of the core components of the electric drive system, is primarily affected by the power module's efficiency. Therefore, reducing the power module's stray inductance and thermal resistance, and optimizing cooling methods to lower the switching and conduction losses of the power module, helps to improve the efficiency of the inverter system.

[0003] Currently, power modules used for AC / DC conversion in main drive inverters typically use copper-clad ceramic substrates with high thermal conductivity and electrical insulation as the carrier for power chips. Electrical connections between the chips and the substrate are achieved via wire bonding or integrated clips, followed by frame-type or plastic-encapsulated packaging. For example, silicon carbide (SiC) materials can withstand high temperatures, with theoretical operating temperatures reaching 400℃ or even above 600℃. Currently, automotive-grade power modules generally have a long-term operating junction temperature of 175℃, with some modules reaching 185℃ or 200℃. The main factors limiting the full potential of SiC devices at high temperatures are packaging methods and heat dissipation technology. The aforementioned two packaging methods significantly limit the overall heat dissipation and electrical performance of the module. Wire bonding or integrated clips can lead to higher stray inductance in the module circuit, ultimately resulting in lower conversion efficiency. Summary of the Invention

[0004] The purpose of this invention is to provide a power module and vehicle that can achieve dual embedded integration of power devices and heat dissipation channels, that is, embedding power devices and heat dissipation channels inside the PCB. This can achieve higher module integration, save space, and reduce the size and weight of the power module while ensuring heat dissipation. At the same time, this embedded design can also reduce external bonding connection points, which can reduce the risk of failure of the power module due to mechanical stress and improve the reliability of long-term use.

[0005] To address the aforementioned technical problems, in a first aspect, the present invention provides a power module, comprising at least one power device, a device interconnection layer, a heat dissipation layer, and a packaging substrate layer; The heat dissipation layer is located on the surface of the packaging substrate layer, and the heat dissipation layer has at least one heat dissipation channel inside; The packaging substrate layer is provided with at least one heat dissipation medium inlet and at least one heat dissipation medium outlet, and the heat dissipation medium inlet and the heat dissipation medium outlet are connected to each of the heat dissipation channels; The power device is located on the side of the heat dissipation layer away from the packaging substrate layer, and forms multiple PAD areas at least through the device connection layer.

[0006] Optionally, the channel parameters of the heat dissipation channel are configured at least according to the thermal coupling of the power device.

[0007] Optionally, the heat dissipation channel is arranged at least in the vertical direction of the power device.

[0008] Optionally, the device interconnect layer includes at least a first bottom interconnect layer, a second bottom interconnect layer, a support layer, a top interconnect layer, an insulating dielectric layer, and a PAD layer; The first bottom connection layer is located on the side of the heat dissipation layer away from the packaging substrate layer; the second bottom connection layer is located on the side of the first bottom connection layer away from the heat dissipation layer; the support layer and the power device are located on the same layer, and both the support layer and the power device are located on the side of the second bottom connection layer away from the first bottom connection layer; the top connection layer is located on the side of the power device and the support layer away from the second bottom connection layer; the PAD layer is located on the side of the top connection layer away from the power device and the support layer; the insulating dielectric layer covers the non-connection surfaces of the heat dissipation layer, the first bottom connection layer, the second bottom connection layer, the support layer, the top connection layer, and / or the PAD layer.

[0009] Optionally, the multiple PAD regions include at least a common PAD region, a lower bridge gate PAD region, a lower bridge source PAD region, an upper bridge gate PAD region, and an upper bridge drain PAD region; The support layer consists of at least two support pads.

[0010] Optionally, the first bottom connection layer is electrically connected to the drain of the power device.

[0011] Optionally, the two support blocks are the lower bridge support block and the upper bridge support block, respectively; The lower bridge support pad is electrically connected to the first bottom connection layer and the top connection layer respectively, and is used to lead out the lower bridge drain and electrically connect it to the common PAD area. The upper bridge support pad is electrically connected to the first bottom connection layer and the top connection layer, respectively, and is used to lead out the upper bridge drain and electrically connect it to the upper bridge drain PAD area.

[0012] Optionally, the shared PAD area leads out the drain of the lower bridge power device and the source of the upper bridge power device, at least for applying a voltage signal or acquiring the drain signal of the lower bridge and the source signal of the upper bridge; The lower bridge gate PAD region leads out the gate of the lower bridge power device and is used at least to apply a drive voltage or to acquire the lower bridge gate signal. The lower bridge source PAD region leads out the source of the lower bridge power device for applying voltage signals or acquiring lower bridge source signals.

[0013] Optionally, the upper bridge gate PAD region is used to bring out the gate of the upper bridge power device for applying a drive voltage or acquiring the upper bridge gate signal; The upper bridge drain PAD region leads out the drain of the upper bridge power device for applying voltage signals or acquiring upper bridge drain signals.

[0014] Based on the same concept, in a second aspect, the present invention also provides a vehicle that integrates at least the power module described in any one of the first aspects.

[0015] The power module provided by this invention includes at least one power device, a device connection layer, a heat dissipation layer, and a packaging substrate layer. The heat dissipation layer is located on the surface of the packaging substrate layer, and at least one heat dissipation channel is provided inside the heat dissipation layer. The packaging substrate layer has at least one heat dissipation medium inlet and at least one heat dissipation medium outlet, and the heat dissipation medium inlet and outlet are connected to each heat dissipation channel. The power device is located on the side of the heat dissipation layer away from the packaging substrate layer, and forms multiple PAD areas at least through the device connection layer. Therefore, this invention can achieve at least dual embedded integration of the power device and the heat dissipation channel, i.e., embedding the power device and the heat dissipation channel inside the PCB, which can achieve higher module integration, save space, and reduce the size and weight of the power module while ensuring heat dissipation effect. At the same time, this embedded design can also reduce external bonding connection points, which can reduce the risk of failure of the power module due to mechanical stress and improve the reliability of long-term use. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of a longitudinal section structure of a power module provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of a planar cross-sectional structure of a power module provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of the external structure of a heat dissipation medium inlet / outlet provided in an embodiment of the present invention. Detailed Implementation

[0017] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this invention, and not all of them. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0018] It should be noted that any symbols and / or numbers present in the specification that are not marked in the accompanying drawings are not reference numerals.

[0019] Figure 1 This is a schematic diagram of a longitudinal section of a power module provided in an embodiment of the present invention. Figure 2 This is a schematic diagram of a planar cross-sectional structure of a power module provided in an embodiment of the present invention. Figure 2 This is a horizontal cross-sectional view of the heat dissipation layer with embedded heat dissipation channels. It does not show the horizontal cross-section of the inlet and outlet of the heat dissipation medium, but only the horizontal cross-section of the heat dissipation channel portion. Figure 3 This is a schematic diagram of the external structure of a heat dissipation medium inlet / outlet provided in an embodiment of the present invention. This embodiment is applicable at least to the embedded integration scenario of power modules in any vehicle (e.g., a vehicle). The power module and its fabrication, control, and other processes can be implemented using software and / or hardware. Figure 1 , Figure 2 and Figure 3 As shown, the power module includes at least one power device, a device connection layer, a heat dissipation layer, and a packaging substrate layer.

[0020] The heat dissipation layer is located on the surface of the packaging substrate layer, and the heat dissipation layer has at least one heat dissipation channel inside (there can be multiple heat dissipation channels, and multiple heat dissipation channels can be arranged in the same layer or distributed in multiple layers).

[0021] The packaging substrate layer has at least one heat dissipation medium inlet and at least one heat dissipation medium outlet, and the heat dissipation medium inlet and heat dissipation medium outlet are connected to each heat dissipation channel.

[0022] The power device is located on the side of the heat dissipation layer away from the package substrate layer, and forms multiple PAD areas at least through the device interconnect layer.

[0023] During operation of the power module, coolant can circulate within the heat dissipation channels. Additionally, the packaging substrate layer can be made of copper.

[0024] In one specific implementation, the channel parameters of the heat dissipation channel (e.g., the number of heat dissipation channels, the number of layers, etc.) may be configured at least according to the thermal coupling of the power device.

[0025] In another specific implementation, the heat dissipation channel may optionally be arranged at least in the vertical direction of the power device.

[0026] In another specific embodiment, the device interconnect layer may optionally include at least a first bottom interconnect layer, a second bottom interconnect layer, a support layer, a top interconnect layer, an insulating dielectric layer, and a PAD layer; The first bottom connection layer is located on the side of the heat dissipation layer away from the packaging substrate layer; the second bottom connection layer is located on the side of the first bottom connection layer away from the heat dissipation layer; the support layer and the power device are located on the same layer, and both the support layer and the power device are located on the side of the second bottom connection layer away from the first bottom connection layer; the top connection layer is located on the side of the power device and the support layer away from the second bottom connection layer; the PAD layer is located on the side of the top connection layer away from the power device and the support layer; the insulating dielectric layer covers the non-connection surfaces of the heat dissipation layer, the first bottom connection layer, the second bottom connection layer, the support layer, the top connection layer and / or the PAD layer.

[0027] In another specific implementation, optionally, the plurality of PAD regions include at least a shared PAD region (which may refer to a PAD region shared by the lower bridge drain and the upper bridge source), a lower bridge gate PAD region, a lower bridge source PAD region, an upper bridge gate PAD region, and an upper bridge drain PAD region. The support layer consists of at least two support pads (such as copper pads, which can provide mechanical support, electrical conductivity, and thermal conductivity).

[0028] In yet another specific implementation, the first bottom connection layer is optionally electrically connected to the drain of the power device.

[0029] In yet another specific embodiment, the two support pads may optionally be a lower bridge support pad and an upper bridge support pad. The lower bridge support pad is electrically connected to the first bottom connection layer and the top connection layer respectively, and is used to lead out the lower bridge drain and electrically connect it to the common PAD area. The upper bridge support pad is electrically connected to the first bottom connection layer and the top connection layer respectively, and is used to lead out the upper bridge drain and electrically connect the upper bridge drain PAD area.

[0030] In another specific implementation, optionally, the PAD area is shared to bring out the drain of the lower bridge power device and the source of the upper bridge power device, at least for applying a voltage signal or acquiring the drain signal of the lower bridge and the source signal of the upper bridge. The lower bridge gate PAD region is used to bring out the gate of the lower bridge power device, and is at least used to apply the drive voltage or to acquire the lower bridge gate signal. The PAD region of the lower bridge source is used to bring out the source of the lower bridge power device for applying voltage signals or acquiring lower bridge source signals.

[0031] In another specific implementation, optionally, the upper bridge gate PAD region is used to bring out the gate of the upper bridge power device for applying a drive voltage or acquiring the upper bridge gate signal. The upper bridge drain PAD region leads out the drain of the upper bridge power device and is used to apply voltage signals or acquire upper bridge drain signals.

[0032] Taking SiC MOSFETs as an example of power devices, see below. Figure 1 The aforementioned embedded power module and its heat dissipation channel structure include at least: 1. The bottom copper layer of the chip (i.e., the aforementioned first bottom connection layer), for example, can be the first copper layer of a copper-clad ceramic substrate, which is electrically interconnected with the drain (i.e., the aforementioned drain) of the SiC MOSFET; 2. The lower bridge copper pad (i.e. the aforementioned lower bridge support pad) is interconnected with the bottom and top copper layers (i.e., it is electrically connected to the first bottom connection layer and the top connection layer respectively), and the lower bridge drain is connected to the external PAD area (i.e., the lower bridge drain is electrically connected to the common PAD area). 3. Blind vias can be created using laser drilling and micro-via metallization processes, allowing the SiC MOSFET lead-out electrode lines to interconnect with the external PAD area; 4. The copper layer on the top of the chip (i.e., the aforementioned top connection layer) interconnects the electrodes of the SiC MOSFET with the external PAD region; 5. The lower bridge D-PAD area (i.e. the aforementioned shared PAD area) leads out the lower bridge chip D and the upper bridge chip S (i.e. the aforementioned lower bridge power device drain and upper bridge power device source) for applying voltage signals or acquiring signals (i.e., at least for applying voltage signals or acquiring lower bridge drain signals and upper bridge source signals). 6. The lower bridge gate-PAD region (i.e., the aforementioned lower bridge gate PAD region) leads out the lower bridge chip gate (i.e., the aforementioned lower bridge power device gate) for applying drive voltage or acquiring signals (i.e., at least for applying drive voltage or acquiring lower bridge gate signals). 7. The lower bridge S-PAD region (i.e., the aforementioned lower bridge source PAD region) leads out the lower bridge chip S-terminal (i.e., the aforementioned lower bridge power device source) for applying voltage signals or acquiring signals (i.e., for applying voltage signals or acquiring lower bridge source signals). 8. SiC chip (i.e., the aforementioned power device; in other embodiments, corresponding to step 10 below, in order to enhance the reliability of the power device, a remetallized copper layer can be disposed in the electrode region of the power device). 9. Insulating dielectric layer, mainly used for electrical insulation and thermal conductivity; 10. The upper bridge gate-PAD region (i.e., the aforementioned upper bridge gate PAD region) leads out the upper bridge chip gate (i.e., the aforementioned upper bridge power device gate) for applying drive voltage or acquiring signal (i.e., for applying drive voltage or acquiring upper bridge gate signal). 11. The upper bridge drain-PAD region (i.e., the aforementioned upper bridge drain PAD region) leads out the upper bridge chip drain (i.e., the aforementioned upper bridge power device drain) for applying voltage signals or acquiring signals (i.e., for applying voltage signals or acquiring upper bridge drain signals). 12. The upper bridge copper pad (i.e. the aforementioned upper bridge support pad) is interconnected with the bottom and top copper layers, and the upper bridge drain is led out to be interconnected with the external PAD area (i.e., the aforementioned upper bridge drain is used to lead out the upper bridge drain PAD area for electrical connection). 13. A sintered layer (i.e., the aforementioned second bottom connection layer; it is understood that this example shows that the second bottom connection layer can be formed by a sintering process, and in other embodiments, if other processes are used, it can also be replaced with the corresponding process layer) interconnects the SiC chip with the bottom copper layer and the copper pad with the bottom copper layer. 14. Embedded water channels (i.e., the aforementioned heat dissipation channels) can be created by etching microchannels in the ceramic layer using picosecond lasers. While ensuring mechanical strength, the microchannels are positioned as close to the chip as possible to facilitate heat dissipation. The water channels are mainly distributed directly beneath the chip, and their coverage area can be flexibly adjusted according to the chip area and the number of parallel connections (i.e., the aforementioned thermal coupling parameters of the power devices; it is understood that in other embodiments, parameters such as the spacing between power devices may also be considered). A parallel water channel design with upper and lower bridges can be adopted, where the coolant enters from the inlet and flows in parallel into the cooling channels of the upper and lower bridges, resulting in stronger heat dissipation. 15. The second copper layer of the copper-clad ceramic substrate (i.e., the aforementioned encapsulation substrate layer) is mainly used for heat conduction and support of the intermediate ceramic layer. It can be combined with specific assembly designs and can be used for welding assembly with inverter bricks or base plates. 16. The ceramic layer (i.e., the aforementioned heat dissipation layer) primarily functions as insulation and thermal conductivity, while also embedding microchannels. For example... Figure 2 As shown, microchannels can be etched into the ceramic layer using a picosecond laser to allow coolant to flow and dissipate heat from the chip (which is understandable). Figure 2 The example shows a straight heat dissipation channel; in other embodiments, the microchannels can take any shape, such as mesh, ring, etc. 17. Water inlet (i.e., the aforementioned heat dissipation medium inlet), coolant inflow channel, 1 piece, appearance as shown Figure 3 As shown; 18. Water outlet (i.e., the aforementioned heat dissipation medium outlet), coolant outflow channel, 2 in number, appearance as shown Figure 3 As shown (which is understandable), Figure 3 An example is shown with one heat dissipation medium inlet and two heat dissipation medium outlets, both of which are tubular; in other embodiments, the number and shape of the heat dissipation medium inlet and outlet can be configured according to the actual vehicle application, and the present invention does not limit this).

[0033] As can be seen, this embodiment proposes an embedded power module and water channel structure with high power density and integration, and better heat dissipation performance, as detailed below: (1) An embedded microchannel cooling structure: The embedded water channel structure saves system space and can reduce system volume and weight. The parallel water channel cooling structure of the upper and lower bridges has a better heat dissipation effect compared with the traditional unidirectional cooling water channel. The attached drawings of this invention are all single-phase structures. In automotive-grade applications, three of these structures need to be connected in parallel to form a three-phase (U / V / W phase) six-bridge arm. The three-phase six-bridge arm is independently connected in parallel for heat dissipation, which has a better heat dissipation effect. Common cooling water channels are unidirectional heat dissipation, that is, from U phase → W phase or from W phase → U phase. The closer to the outlet, the worse the heat dissipation effect. The thermal coupling effect between phases cannot be ignored. (2) A power module structure with high integration, low thermal resistance, and strong heat dissipation: By placing components (such as capacitors, gate resistors, SiC chips, etc.) directly inside the PCB, a more compact circuit design can be achieved. Since the bonding wires are eliminated and electrical connections are achieved through blind vias and copper interconnect layers, system noise can be reduced. However, due to the low thermal conductivity of solder and insulating media, heat dissipation problems will arise. Therefore, an embedded water channel structure is designed simultaneously to make the cooling water channel closer to the chip, thereby bringing better heat dissipation. In this way, the power module of the present invention can achieve high integration, small size, and low noise while ensuring heat dissipation, thus giving full play to the high performance advantages of SiC devices. In practical applications, due to good heat dissipation and low thermal resistance, fewer chips can be connected in parallel to achieve a larger output current, thereby reducing costs. Small size, lightweight, and high performance are also important development trends for automotive-grade devices; (3) High integration, small size and light weight: Embedded components (such as capacitors, gate resistors, SiC chips, etc.) are placed directly inside the PCB, which can realize a more compact circuit design. Embedded cooling channels replace conventional external channels, which improves heat dissipation and saves space, and helps to reduce the volume and weight of the inverter housing after assembly. (4) Improved electrical performance: By eliminating the bonding wires and using the micro-via metallization process, the signal transmission path is shortened, and parasitic inductance and capacitance are reduced. This helps to reduce signal interference and electromagnetic interference (EMI), thereby improving signal integrity. (5) Thermal management: By embedding heat dissipation microchannels on the ceramic layer, the distance between the heat dissipation channel and the heat source - the chip is shortened, thereby improving the heat dissipation effect, which is particularly obvious in high-power applications; by optimizing the heat dissipation path, the thermal resistance is reduced and the device outflow capability is improved; (6) Reliability: The embedded design reduces external bonding connection points, lowers the risk of failure due to mechanical stress, and improves the reliability of long-term use.

[0034] Based on the above power module structure, the fabrication process of the power module is provided below: Step 1: Prepare a single-layer green ceramic sheet by casting AlN / Al2O3 ceramic powder (corresponding to the aforementioned ceramic layer). Step 2: Picosecond laser etching is used to create microchannel trenches and inlet / outlet through-holes on a single-layer green ceramic wafer. Depending on the cooling requirements, microchannels can be etched on one or several single-layer green ceramic wafers. The wafers with etched microchannels need to be simultaneously connected to the through-holes of the inlet / outlet (corresponding to the aforementioned embedded water channels). Step 3: Fill the flow channel with sacrificial slurry (which is completely decomposed and vaporized during high-temperature sintering to form a cavity and prevent lamination from blocking the channel) (corresponding to the aforementioned embedded water channel). Step 4: Precise alignment and stacking of multiple layers of green ceramic: "grooved layer + cover plate green ceramic layer" are hot-pressed into a single body. Adhesive is applied between different ceramic pieces to facilitate interlayer bonding. Then, the multiple ceramic pieces are stacked and laminated using a dry lamination method to reduce the deformation of the green ceramic pieces during the lamination process (corresponding to the aforementioned ceramic layers). Step 5: Hot cutting of the green body shape, debinding, co-firing at 1600℃~1850℃, sacrificial material is burned off, and a closed microchannel is formed inside; a whole ceramic structure with built-in microchannel is obtained (the ceramic body has a closed flow channel + inlet and outlet through holes) (corresponding to the aforementioned ceramic layer). Step 6: Plasma cleaning and activation on both sides of the ceramic substrate; Step 7: AMB active soldering process to apply copper to both sides of the ceramic (AMB copper plating is performed on the already formed HTCC ceramic with flow channels to realize circuit wiring) (corresponding to the bottom copper layer of the chip and the second copper layer of the copper-plated ceramic substrate mentioned above). Step 8: Photolithography etching of the copper layer, followed by nickel and gold plating, to create power circuit pads (corresponding to the aforementioned surface treatment process of the bottom copper layer of the chip and the second copper layer of the copper-clad ceramic substrate). Step 9: Sealing interface processing: Brazing metal connectors (stainless steel / copper threaded nozzles) into ceramic inlet and outlet holes to form external water channels; sealing pressure test (corresponding to the aforementioned inlet and outlet); Step 10: Chip Remetallization: A copper layer of a certain thickness is deposited on the chip's Al pads (PAD area) using a physical vapor deposition process; Step 11: Chip bottom interconnection: Fix the chip and copper pads (i.e. the aforementioned lower bridge copper pads and upper bridge copper pads) to the AMB substrate manufactured in step 9 by sintering (or soldering) (corresponding to the aforementioned sintering layer, which can of course be a soldering layer). Step 12: Vacuum lamination, top interconnect of the chip: a piece of molding compound (i.e., insulating medium, corresponding to the aforementioned insulating medium layer) is laminated to the base copper layer; Step 13: Drilling and electroplating: Micro-vias (corresponding to the aforementioned blind vias) are made above the chip pads and copper pads using laser drilling technology, and then filled with copper metal by electroplating (in other embodiments, the molding compound that was attached to the surface of the copper pads away from the packaging substrate after step 12 can be completely removed, and then filled with copper metal by electroplating. The thickness of the filled copper metal can be equal to the depth of the micro-via). Step 14: Press the copper foil (corresponding to the copper layer on the top of the chip) onto the molding compound (corresponding to the insulating dielectric layer), and then etch out the interconnect circuit; Step 15: Second vacuum lamination: Press a piece of molding compound onto the top interconnect layer; Step 16: Laser drilling and electroplating: A laser drilling process is used to drill holes in the molding compound of Step 15, and then metal is filled by electroplating to bring out the chip PAD area for assembly and interconnection with external systems (corresponding to the aforementioned lower bridge D-PAD area, lower bridge G-PAD area, lower bridge S-PAD area, upper bridge G-PAD area, and upper bridge D-PAD area).

[0035] The power module provided in this embodiment includes at least one power device, a device connection layer, a heat dissipation layer, and a packaging substrate layer. The heat dissipation layer is located on the surface of the packaging substrate layer, and at least one heat dissipation channel is provided inside the heat dissipation layer. The packaging substrate layer has at least one heat dissipation medium inlet and at least one heat dissipation medium outlet, and the heat dissipation medium inlet and outlet are connected to each heat dissipation channel. The power device is located on the side of the heat dissipation layer away from the packaging substrate layer, and forms multiple PAD areas at least through the device connection layer. Therefore, this embodiment can achieve at least dual embedded integration of the power device and the heat dissipation channel, i.e., embedding the power device and the heat dissipation channel inside the PCB, which can achieve higher module integration, save space, and reduce the size and weight of the power module while ensuring heat dissipation effect. At the same time, this embedded design can also reduce external bonding connection points, which can reduce the risk of failure of the power module due to mechanical stress and improve the reliability of long-term use.

[0036] It should be noted that the power module proposed in this invention is not only applicable to SiC MOSFETs, but also to other types of power devices, such as IGBTs, other MOSFETs, GANs, etc.

[0037] The present invention also provides a vehicle that integrates at least the power module described in any of the foregoing embodiments or implementations.

[0038] Optionally, the power module includes at least one power device, a device interconnect layer, a heat dissipation layer, and a packaging substrate layer; The heat dissipation layer is located on the surface of the packaging substrate layer, and the heat dissipation layer has at least one heat dissipation channel inside; The packaging substrate layer is provided with at least one heat dissipation medium inlet and at least one heat dissipation medium outlet, and the heat dissipation medium inlet and heat dissipation medium outlet are connected to each heat dissipation channel; The power device is located on the side of the heat dissipation layer away from the package substrate layer, and forms multiple PAD areas at least through the device interconnect layer.

[0039] Optionally, the channel parameters of the heat dissipation channel are configured at least according to the thermal coupling of the power device.

[0040] Optionally, the heat dissipation channel is arranged at least in the vertical direction of the power device.

[0041] Optionally, the device interconnect layer includes at least a first bottom interconnect layer, a second bottom interconnect layer, a support layer, a top interconnect layer, an insulating dielectric layer, and a PAD layer; The first bottom connection layer is located on the side of the heat dissipation layer away from the packaging substrate layer; the second bottom connection layer is located on the side of the first bottom connection layer away from the heat dissipation layer; the support layer and the power device are located on the same layer, and both the support layer and the power device are located on the side of the second bottom connection layer away from the first bottom connection layer; the top connection layer is located on the side of the power device and the support layer away from the second bottom connection layer; the PAD layer is located on the side of the top connection layer away from the power device and the support layer; the insulating dielectric layer covers the non-connection surfaces of the heat dissipation layer, the first bottom connection layer, the second bottom connection layer, the support layer, the top connection layer and / or the PAD layer.

[0042] Optionally, the multiple PAD regions include at least a common PAD region, a lower bridge gate PAD region, a lower bridge source PAD region, an upper bridge gate PAD region, and an upper bridge drain PAD region; The support layer consists of at least two support pads.

[0043] Optionally, the first bottom connection layer is electrically connected to the drain of the power device.

[0044] Optionally, the two support blocks are the lower bridge support block and the upper bridge support block, respectively; The lower bridge support pad is electrically connected to the first bottom connection layer and the top connection layer respectively, and is used to lead out the lower bridge drain and electrically connect it to the common PAD area. The upper bridge support pad is electrically connected to the first bottom connection layer and the top connection layer respectively, and is used to lead out the upper bridge drain and electrically connect the upper bridge drain PAD area.

[0045] Optionally, the PAD area is shared, and the drain of the lower bridge power device and the source of the upper bridge power device are brought out, at least for applying voltage signals or acquiring the drain signal of the lower bridge and the source signal of the upper bridge. The lower bridge gate PAD region is used to bring out the gate of the lower bridge power device, and is at least used to apply the drive voltage or to acquire the lower bridge gate signal. The PAD region of the lower bridge source is used to bring out the source of the lower bridge power device for applying voltage signals or acquiring lower bridge source signals.

[0046] Optionally, the upper bridge gate PAD region is used to bring out the gate of the upper bridge power device for applying drive voltage or acquiring upper bridge gate signal; The upper bridge drain PAD region leads out the drain of the upper bridge power device and is used to apply voltage signals or acquire upper bridge drain signals.

[0047] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A power module, characterized in that, It includes at least one power device, a device interconnect layer, a heat dissipation layer, and a packaging substrate layer; The heat dissipation layer is located on the surface of the packaging substrate layer, and the heat dissipation layer has at least one heat dissipation channel inside; The packaging substrate layer is provided with at least one heat dissipation medium inlet and at least one heat dissipation medium outlet, and the heat dissipation medium inlet and the heat dissipation medium outlet are connected to each of the heat dissipation channels; The power device is located on the side of the heat dissipation layer away from the packaging substrate layer, and forms multiple PAD areas at least through the device connection layer.

2. The power module according to claim 1, characterized in that, The channel parameters of the heat dissipation channel are configured based at least on the thermal coupling of the power device.

3. The power module according to claim 1, characterized in that, The heat dissipation channel is arranged at least in the vertical direction of the power device.

4. The power module according to claim 1, characterized in that, The device interconnect layer includes at least a first bottom interconnect layer, a second bottom interconnect layer, a support layer, a top interconnect layer, an insulating dielectric layer, and a PAD layer; The first bottom connection layer is located on the side of the heat dissipation layer away from the packaging substrate layer; the second bottom connection layer is located on the side of the first bottom connection layer away from the heat dissipation layer; the support layer and the power device are located on the same layer, and both the support layer and the power device are located on the side of the second bottom connection layer away from the first bottom connection layer; the top connection layer is located on the side of the power device and the support layer away from the second bottom connection layer; the PAD layer is located on the side of the top connection layer away from the power device and the support layer; The insulating dielectric layer covers the heat dissipation layer, the first bottom connection layer, the second bottom connection layer, the support layer, the top connection layer, and / or the non-connection surface of the PAD layer.

5. The power module according to claim 4, characterized in that, The multiple PAD regions include at least a common PAD region, a lower bridge gate PAD region, a lower bridge source PAD region, an upper bridge gate PAD region, and an upper bridge drain PAD region; The support layer consists of at least two support pads.

6. The power module according to claim 5, characterized in that, The first bottom connection layer is electrically connected to the drain of the power device.

7. The power module according to claim 5, characterized in that, The two support pads are the lower bridge support pad and the upper bridge support pad, respectively; The lower bridge support pad is electrically connected to the first bottom connection layer and the top connection layer respectively, and is used to lead out the lower bridge drain and electrically connect it to the common PAD area. The upper bridge support pad is electrically connected to the first bottom connection layer and the top connection layer, respectively, and is used to lead out the upper bridge drain and electrically connect it to the upper bridge drain PAD area.

8. The power module according to claim 5, characterized in that, The shared PAD area leads out the drain of the lower bridge power device and the source of the upper bridge power device, and is used at least to apply voltage signals or to acquire the drain signal of the lower bridge and the source signal of the upper bridge. The lower bridge gate PAD region leads out the gate of the lower bridge power device and is used at least to apply a drive voltage or to acquire the lower bridge gate signal. The lower bridge source PAD region leads out the source of the lower bridge power device for applying voltage signals or acquiring lower bridge source signals.

9. The power module according to claim 5, characterized in that, The upper bridge gate PAD region leads out the gate of the upper bridge power device for applying drive voltage or acquiring upper bridge gate signal. The upper bridge drain PAD region leads out the drain of the upper bridge power device for applying voltage signals or acquiring upper bridge drain signals.

10. A vehicle, characterized in that, It integrates at least the power module as described in any one of claims 1-9.