A photodetector module package structure and electronic device

Abstract

The embodiment of the present application provides a kind of photoelectric detector module packaging structure and electronic equipment.The photoelectric detector module packaging structure includes: first glass substrate and second glass substrate, the first glass substrate and the second glass substrate are all with top surface and bottom surface being arranged oppositely;Each top surface and bottom surface are provided with redistribution layer circuit;The bottom surface of the first glass substrate and the top surface of the second glass substrate are interconnected, and ASIC chip is embedded in the first glass substrate, and the top surface of the first glass substrate is bonded with photoelectric detector chip;The bottom surface of the second glass substrate is provided with circuit board, and the circuit board is connected with connector.

Description

Technical Field

[0001] This application relates to the field of photoelectric detection equipment technology, and more specifically, to a photoelectric detector module packaging structure and an electronic device. Background Technology

[0002] With the continuous development of semiconductor packaging technology, photodetector modules are increasingly widely used in medical imaging, communications, industrial inspection and other fields. Photodetector modules typically require high-density integration of photodetector chips with application-specific integrated circuits (ASICs) to achieve efficient acquisition and processing of optical signals.

[0003] In existing technologies, photodetector modules are typically packaged using traditional printed circuit boards (PCBs) or laminated substrates as carriers. However, these substrates have significant shortcomings in surface flatness, failing to meet the stringent flatness requirements for high-precision photodetector chip bonding. Larger surface roughness can lead to gaps or stress concentrations at the bonding interface, affecting the reliability of the interconnection between the chip and the substrate and reducing the quality of high-frequency signal transmission. Furthermore, in packaging structures using flexible substrates interconnected with carrier boards, the underfill material easily overflows to the edge of the carrier board before curing. This overflow can encroach on the bending space of the flexible substrate, preventing it from bending within the predetermined unit outline. This limits the module's three-dimensional layout flexibility and can even cause mechanical damage to the flexible substrate or electrical connection failure.

[0004] Therefore, there is an urgent need for a new type of photodetector module packaging structure that can overcome the defects of the traditional packaging substrate, achieve high-density and high-reliability integration of photodetector chips and ASIC chips, and solve the problem of limited bending of flexible substrate caused by bottom filler overflow. Summary of the Invention

[0005] The purpose of this application is to provide a photodetector module packaging structure and electronic device to solve at least one technical defect existing in the prior art.

[0006] According to a first aspect of this application, a photodetector module packaging structure is provided. The photodetector module packaging structure includes: a first glass substrate and a second glass substrate, wherein the first glass substrate and the second glass substrate each have a top surface and a bottom surface disposed opposite to each other; a redistribution layer circuit is evenly distributed on each of the top surface and the bottom surface; The bottom surface of the first glass substrate and the top surface of the second glass substrate are interconnected, and an ASIC chip is embedded inside the first glass substrate, and a photodetector chip is bonded to the top surface of the first glass substrate. A circuit board is provided on the bottom surface of the second glass substrate, and the circuit board is connected to a connector.

[0007] Optionally, a cavity is formed inside the first glass substrate, and the ASIC chip is embedded in the cavity.

[0008] Optionally, the ASIC chip is embedded in the cavity of the first glass substrate by epoxy adhesive or chip bonding film mounting.

[0009] Optionally, the ASIC chip is encapsulated with a dielectric material, and a fan-out circuit is formed on the top of the dielectric material.

[0010] Optionally, the surface roughness of both the first glass substrate and the second glass substrate is less than 100 nm.

[0011] Optionally, the coefficients of thermal expansion of the first glass substrate and the second glass substrate range from 2ppm / K to 9ppm / K. Optionally, a filler adhesive is provided on the side surface of the circuit board facing the second glass substrate, and the filler adhesive is bonded to the redistribution layer circuit on the bottom surface of the second glass substrate.

[0012] Optionally, the second glass substrate is further provided with grooves, which surround the area where the filler adhesive is applied.

[0013] Optionally, the trench extends through the redistribution layer circuit on the bottom surface of the second glass substrate and into the first glass substrate.

[0014] Optionally, the circuit board is a flexible circuit board, which is configured such that at least a portion of its area can be bent to a direction perpendicular to the bottom surface of the second glass substrate.

[0015] Optionally, the bending position of the flexible circuit board corresponds to the setting position of the groove.

[0016] According to a second aspect of this application, an electronic device is also provided. The electronic device includes the photodetector module packaging structure as described in the first aspect.

[0017] One technical advantage of this application is: The technical solution provided in this application adopts a double-layer glass substrate stacking design, replacing the traditional organic substrate with a glass substrate with high flatness and high thermal stability, which meets the high-precision bonding requirements of large-size photodetector chips and multi-core arrays, ensures the coplanarity of the photosensitive area, and avoids imaging defects caused by assembly deviations.

[0018] In this application, a photodetector chip is bonded to the top surface of a first glass substrate, and an ASIC chip is embedded within it. The photodetector chip and the ASIC chip form a vertically and tightly stacked layout, shortening the interconnection distance between them, reducing signal delay, and achieving high-density integrated detection and processing of the chips. Simultaneously, the physical encapsulation of the glass substrate enhances the mechanical protection and long-term stability of the ASIC chip.

[0019] In this application, a multi-layer interconnect architecture is formed by deploying redistribution layer circuits on both sides of the glass substrate, thus constructing a complete and efficient signal transmission path. A flexible circuit board and connectors are integrated at the bottom of the second glass substrate, simplifying multi-stage assembly processes, reducing structural stress caused by repeated high-temperature welding, effectively compressing the manufacturing process, improving integration and product yield, and facilitating mass production.

[0020] Other features and advantages of this specification will become clear from the following detailed description of exemplary embodiments with reference to the accompanying drawings. Attached Figure Description

[0021] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments of this specification and, together with their description, serve to explain the principles of this specification.

[0022] Figure 1 The diagram shows the structure of the photodetector module packaging structure provided in an embodiment of this application. Figure 1 .

[0023] Figure 2 The diagram shows the structure of the photodetector module packaging structure provided in an embodiment of this application. Figure 2 .

[0024] Explanation of reference numerals in the attached figures: 1. First glass substrate; 100. Cavity; 101. First redistribution layer circuit; 102. Second redistribution layer circuit; 2. Second glass substrate; 201. Third redistribution layer circuit; 202. Fourth redistribution layer circuit; 3. Photodetector chip; 4. ASIC chip; 5. Heat dissipation component; 6. Circuit board; 7. Connector; 8. Connection part; 9. Thermally conductive adhesive layer; 10. Filler adhesive; 11. Passive component; 12. Trench. Detailed Implementation

[0025] Various exemplary embodiments of the present application will now be described in detail with reference to the accompanying drawings. It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps set forth in these embodiments do not limit the scope of the present application.

[0026] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the scope of this application and its application or use.

[0027] Technologies and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such technologies and equipment should be considered part of the specification.

[0028] In all the examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values.

[0029] It should be noted that similar labels and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.

[0030] The technical solution of this application will be further described below with reference to the embodiments and accompanying drawings.

[0031] This application provides a photodetector module packaging structure. For example... Figure 1 and Figure 2 As shown, the photodetector module packaging structure includes: A first glass substrate 1 and a second glass substrate 2, each having a top surface and a bottom surface disposed opposite to each other; a redistribution layer circuit is evenly distributed on each of the top surface and the bottom surface. The bottom surface of the first glass substrate 1 and the top surface of the second glass substrate 2 are interconnected, and the first glass substrate 1 contains an ASIC chip 4, and a photodetector chip 3 is bonded to the top surface of the first glass substrate 1. A circuit board 6 is provided on the bottom surface of the second glass substrate 2, and the circuit board 6 is connected to the connector 7.

[0032] This application provides a photodetector module packaging structure. Please refer to... Figure 1 and Figure 2 The photodetector module packaging structure mainly consists of a first glass substrate 1, a second glass substrate 2, a redistribution layer circuit, a photodetector chip 3, an ASIC chip 4, a circuit board 6, and a connector 7. The components work together to form a complete packaging system.

[0033] In this embodiment, the photodetector module packaging structure adopts a double-layer glass substrate stacking design: with the first glass substrate 1 and the second glass substrate 2 stacked and interconnected, an ASIC chip 4 is embedded inside the first glass substrate 1, and a photodetector chip 3 is disposed on the top surface of the first glass substrate 1; a circuit board 6 is disposed on the bottom surface of the second glass substrate 2. This structure relies on the excellent surface flatness and thermal stability of the glass substrates to construct a compact, complete circuit path, and reliable signal transmission packaging system. Its working principle is as follows: An external power supply is connected to the module via connector 7 on circuit board 6. Electrical energy is transmitted sequentially through circuit board 6 and the second glass substrate 2 to the ASIC chip 4 inside the first glass substrate 1, which drives the entire system to operate normally. At the same time, the ASIC chip 4 synchronously drives its internal pixel circuit and the pixel array of the photodetector chip 3 on the top surface of the first glass substrate 1, enabling the photodetector chip 3 to fully perform its signal detection function, thereby realizing the acquisition, transmission and processing of photon signals.

[0034] Specifically, such as Figure 1 and Figure 2 As shown, the first glass substrate 1 and the second glass substrate 2 adopt a double-layer glass substrate architecture stacked vertically. Both glass substrates have excellent surface flatness and thermal stability, providing a flat and reliable base carrier for the fabrication of high-density redistribution layer circuits, fine wiring, and high-precision chip bonding. Specifically, the top surface of the first glass substrate 1 is provided with a first redistribution layer circuit 101, and its bottom surface is provided with a second redistribution layer circuit 102; the top surface of the second glass substrate 2 is provided with a third redistribution layer circuit 201, and its bottom surface is provided with a fourth redistribution layer circuit 202. The photodetector chip 3 is bonded to the first redistribution layer circuit 101. The first glass substrate 1 and the second glass substrate 2 are interconnected through the second redistribution layer circuit 102 and the third redistribution layer circuit 201, and the fourth redistribution layer circuit 202 is bonded to the circuit board 6, thereby forming a complete signal transmission path from top to bottom.

[0035] In some exemplary embodiments, the overall surface roughness of the glass substrate used in this application is strictly controlled within 100nm. This low surface roughness design can effectively reduce the transmission loss of wiring conductors, optimize signal transmission quality under high-frequency conditions, and avoid problems such as poor wiring contact and signal interference caused by uneven surface. On the other hand, this low-roughness glass substrate can be well adapted to the high-precision bonding assembly of large-size integrated photodetector chips 3, and can also meet the application requirements of array integration of multiple photodetector sub-chips, ensuring the connection stability between the chip and the substrate and improving the reliability of the overall packaging structure.

[0036] Specifically, the surface roughness of the glass substrate is controlled below 100nm, eliminating the need for additional chemical planarization treatment before it can be directly used for subsequent wiring and chip bonding operations. This simplifies the manufacturing process, ensures the accuracy of the bonding process, and avoids bonding failures caused by surface unevenness. The low surface roughness allows for stable connections between the photodetector chip and other devices and the substrate, providing a solid foundation for subsequent signal transmission. This ensures low loss and high stability during high-frequency signal transmission, further adapting to the requirements of the overall packaging structure and improving the overall performance and operational stability of the photodetector module.

[0037] In this embodiment, since the glass substrate is made of highly flat glass, no additional processing steps such as chemical planarization, optical waveguide fabrication, and hydrophilic modification are required, reducing processing costs and complexity. During actual assembly, the photodetector chip 3 and the first glass substrate 1 can be fixed and electrically connected using solder paste welding, gold ball bonding, or silver paste adhesion. These various connection methods adapt to different process scenarios and can all form a stable and reliable electrical connection, effectively ensuring the accurate transmission of photoelectric signals.

[0038] This can also be understood as follows: the proposed solution eliminates the need for additional surface modification of the glass substrate, abandoning the complex traditional process of first chemically planarizing the glass substrate, preparing a hydrophilic structure, and then bonding the optical chip via glass / silicon interface. The entire process eliminates the need for special interface modification and pretreatment, directly completing chip bonding and interconnection, significantly simplifying processing steps, shortening the process cycle, and avoiding the performance risks introduced by surface treatment processes. While ensuring assembly accuracy and connection stability, it further improves packaging yield and production efficiency.

[0039] For example, this application involves printing low-temperature solder paste, silver paste, or fabricating gold balls on the surface of the first glass substrate 1, and then encapsulating it with the photodetector chip 3.

[0040] Of course, the connection method between the photodetector chip 3 and the first glass substrate 1 is not limited to low-temperature solder paste, gold balls, or silver paste. The connection method between the photodetector chip 3 and the first glass substrate 1 can also be: mutual bonding through the interaction of metal bumps (gold bumps, copper bumps, solder caps on copper bumps, solder balls) grown on the surface of the photodetector chip 3 and the first glass substrate 1.

[0041] The semiconductor sensor element of the photodetector chip 3 can be selected from the following group: cadmium zinc telluride (CZT), cadmium telluride (CdTe), silicon (Si), germanium (Ge), indium gallium arsenide (InGaAs), and silicon germanium (SiGe).

[0042] Furthermore, in this application, the coefficient of thermal expansion of the glass substrate is controlled within the range of 2ppm / K to 9ppm / K. Due to its excellent low thermal expansion characteristics, the glass substrate possesses superior dimensional thermal stability, effectively suppressing deformation caused by temperature fluctuations, alleviating internal structural stress under alternating hot and cold conditions, and avoiding reliability risks such as bonding interface cracking and interlayer delamination.

[0043] The material properties enable the glass substrate to be well-suited for high-precision bonding and assembly of large-size integrated photodetector chips 3, while also meeting the application requirements of array integration of multiple photodetector sub-chips, significantly improving the environmental adaptability and long-term reliability of the overall packaging structure.

[0044] For example, in the packaging structure in which the glass substrate is used as the substrate to support the photodetector chip 3, the effective photosensitive area of ​​the photodetector chip 3 can reach up to 75mm×50mm. Even under the condition of large area and arrayed chip arrangement, the glass substrate can still maintain the overall flatness and structural consistency, ensuring the assembly accuracy and working stability of the large area photosensitive device.

[0045] Furthermore, the thickness range of both the first glass substrate 1 and the second glass substrate 2 is set to 200μm to 2000μm. This thickness range, combined with the ultra-low surface roughness of the glass substrate, allows for better adaptation to the fabrication of high-density redistribution layer circuits and multilayer wiring processes, reducing conductor losses during high-frequency transmission. Simultaneously, a reasonable substrate thickness optimizes the overall heat conduction path, synergistically improving structural thermal stability and adapting to the long-term assembly and use conditions of large-size photodetector chips 3 and multi-core arrays.

[0046] For example, the preferred thickness range of the first glass substrate 1 and the second glass substrate 2 is 500 μm to 1500 μm.

[0047] Based on the above limitations, the redistribution layer circuits arranged on the first glass substrate 1 and the second glass substrate 2 in this embodiment of the application have excellent fine wiring capabilities, which can achieve line width / spacing (L / S) as fine as 5 / 5μm. That is, the line width and the spacing between adjacent lines can both reach 5μm. The high-density wiring design can meet the signal interaction requirements of high-frequency signal transmission and multi-chip collaborative operation of the photodetector module, effectively improve signal transmission efficiency and reduce signal loss.

[0048] Simultaneously, both the first glass substrate 1 and the second glass substrate 2 are provided with through-glass vias (TGV structures). The diameter of these TGV structures can be as small as 10 μm, and the pitch between adjacent TGVs is controlled at 15 μm. This refined TGV design, combined with the high-density redistribution layer circuitry, ensures efficient signal transmission between chips while simultaneously improving the signal stability and integration of the overall package structure. This adapts to the mounting and signal transmission requirements of the large-size photodetector chip 3, further optimizing the electrical performance of the package structure and ensuring smooth and reliable signal transmission.

[0049] In addition, the redistribution layer circuit on the glass substrate works in tandem with the TGV structure. The 5 / 5μm linewidth / spacing, combined with the 10μm diameter and 15μm pitch TGV, forms a high-density interconnect system, which not only meets the signal transmission requirements of multi-chip integration, but also improves the overall stability of the packaging structure, meeting the high precision and high reliability requirements of semiconductor packaging.

[0050] It should be noted that the two glass substrates mentioned above are not fundamentally different in material. The first glass substrate 1 and the second glass substrate 2 can be made of a variety of glass materials suitable for semiconductor packaging scenarios, including: alkali-free glass, microcrystalline glass, chemically strengthened glass, glass ceramic, borosilicate glass, quartz, and fused silica.

[0051] Meanwhile, the glass substrate can be prepared using a glass composition comprising silicon dioxide, boron oxide, aluminum oxide, lithium oxide, sodium oxide, phosphorus oxide, zirconium oxide, magnesium oxide, calcium oxide, strontium oxide, barium oxide, zinc oxide, and titanium dioxide. By rationally controlling the types and proportions of each chemical component, the thermal, mechanical, and electrical insulation properties required for packaging can be precisely matched to meet the application requirements of high-precision chip packaging.

[0052] In this embodiment, the ASIC chip 4 is embedded inside the first glass substrate 1, rather than being disposed between the first glass substrate 1 and the second glass substrate 2. This design integrates the ASIC chip 4 into the cavity 100 structure of the first glass substrate 1, forming a vertically stacked, tightly arranged layout with the photodetector chip 3, thereby effectively shortening the interconnection distance between the two and reducing signal transmission delay. Simultaneously, with the ASIC chip 4 embedded inside the first glass substrate 1, the excellent thermal conductivity and mechanical protection properties of the glass substrate enable good heat dissipation and physical protection, preventing damage to the chip from external stress or environmental factors. Furthermore, this layout allows the connection portion 8 between the first glass substrate 1 and the second glass substrate 2 to only perform the function of inter-substrate interconnection, simplifying the interface design and improving the integration and reliability of the overall packaging structure.

[0053] In some exemplary embodiments, a connecting portion 8 is provided between the first glass substrate 1 and the second glass substrate 2, through which the two are interconnected. The connecting portion 8 can be formed by means of standard conductive epoxy adhesive, nano copper paste, nano silver paste, direct copper-to-copper bonding, van der Waals forces, hydrogen bonds, covalent bonds, or mechanical interlocking, thereby establishing a reliable mechanical connection and electrical conduction between the first glass substrate 1 and the second glass substrate 2.

[0054] In some exemplary embodiments, the circuit board 6 is a flexible circuit board 6. The flexible circuit board 6 includes a flexible substrate; the substrate film material of the flexible substrate can be selected from polyimide, liquid crystal polymer, fluoropolymer, etc., and the thickness of the substrate film ranges from 12.5 μm to 100 μm. To achieve a stable connection between the flexible circuit board 6 and the second glass substrate 2 and ensure reliable electrical conductivity, this embodiment uses a suitable bonding medium for bonding and fixing. Specifically, it can be achieved by using any one of anisotropic conductive film (ACF), anisotropic conductive adhesive (ACP), non-conductive film (NCF), or non-conductive adhesive (NCP) to complete the precise bonding between the flexible circuit board 6 and the second glass substrate 2. This bonding method not only achieves mechanical fixation between the two but also ensures the stability of the electrical connection, avoiding problems such as poor contact and signal interruption. Furthermore, it is adapted to the bendable characteristics of the flexible circuit board 6, and the bonding effect is not affected by substrate deformation. In addition, the connection between the connector 7 pins and the flexible circuit board 6 is achieved by reflow soldering. By precisely controlling the soldering temperature and time, a strong electrical connection is formed between the connector 7 pins and the corresponding pads on the flexible circuit board 6, ensuring smooth signal transmission and reliable contact between the connector 7 and the flexible circuit board 6. This provides a stable connection foundation for the electrical docking of the entire package structure with external devices, further ensuring the overall operational stability of the package module.

[0055] In some exemplary embodiments, passive components 11 such as resistors and capacitors can be arranged in the bottom area of ​​the second glass substrate 2. By adding decoupling and noise reduction devices, the circuit loop can be optimized, signal interference and electromagnetic noise can be suppressed, and the signal transmission quality and working stability of the overall packaging structure can be guaranteed.

[0056] In summary, the photodetector module packaging structure provided in this application has achieved significant technical effects by adopting a double-layer glass substrate stacking design and embedding an ASIC chip 4 inside the first glass substrate 1.

[0057] 1) The structure uses a first glass substrate 1 and a second glass substrate 2 with high flatness and high thermal stability as the substrate. Compared with traditional organic substrates, the glass substrate has lower surface roughness, excellent overall flatness and controllable low thermal expansion coefficient, which can fully meet the high-precision bonding and assembly requirements of large-size photodetector chip 3 and multi-core array, ensure the overall coplanarity of the photosensitive area, and avoid imaging defects caused by assembly deviation from the packaging level.

[0058] 2) In this application, the photodetector chip 3 is bonded to the top surface of the first glass substrate 1, and the ASIC chip 4 is embedded inside the first glass substrate 1. The two form a vertically stacked layout, which effectively shortens the interconnection distance between chips, reduces signal transmission delay, realizes high-density integrated integration of the detector device and the processing chip, and improves the integration and compactness of the packaging structure.

[0059] 3) In this application, the ASIC chip 4 is embedded inside the first glass substrate 1. The embedded ASIC chip 4 is physically covered and protected by the glass substrate, which further enhances the mechanical damage resistance and long-term working stability of the packaging structure.

[0060] 4) This application forms a top-down multi-layer interconnect architecture by deploying redistribution layer circuits on the top and bottom surfaces of two glass substrates. External signals are transmitted sequentially through connector 7, circuit board 6, and the second glass substrate 2 to the ASIC chip 4 inside the first glass substrate 1 and the photodetector chip 3 on the top surface, thus constructing a complete and efficient signal transmission system and realizing a complete functional path for signal acquisition, processing, and transmission. The design of the integrated circuit board 6 at the bottom of the second glass substrate 2 and the external connector 7 simplifies the multi-level assembly process. Compared with the traditional method that requires multiple independent assemblies, the double-layer glass substrate integration scheme of this application can complete the fabrication of the main interconnect structure at the substrate level, reducing the cumulative error of step-by-step assembly and the structural stress and performance loss caused by multiple high-temperature welding. This effectively compresses the process flow, improves the module integration and product yield, and is conducive to achieving mass production and consistent manufacturing.

[0061] According to the embodiments of this application, please continue to refer to Figure 1 and Figure 2 The first glass substrate 1 has a cavity 100 inside, and the ASIC chip 4 is embedded in the cavity 100.

[0062] In some exemplary embodiments, the ASIC chip 4 is embedded in the cavity 100 of the first glass substrate 1 by means of thermally conductive adhesive layer 9 or chip adhesive film mounting.

[0063] In a further embodiment, the ASIC chip 4 is embedded in the cavity 100, and the ASIC chip 4 is encapsulated by a dielectric material, and a fan-out circuit is formed on the top of the dielectric material.

[0064] In this embodiment, a cavity 100 is formed inside the first glass substrate 1. The cavity 100 is formed at a predetermined position on the first glass substrate 1 by processes such as laser etching, mechanical polishing, or chemical etching. Its shape and size are adapted to the shape of the ASIC chip 4 to ensure that the chip can be accurately embedded and stably positioned. During the embedding process, the ASIC chip 4 can be fixed to the bottom of the cavity 100 by means of thermally conductive adhesive layer 9 or chip adhesive film. Epoxy adhesive is flexible and suitable for bonding and fixing non-standard sized chips, while chip adhesive film has uniform thickness and no risk of adhesive overflow, making it more suitable for high-density packaging scenarios. The thermally conductive adhesive layer 9 can be made of thermally conductive epoxy resin or other types of thermally conductive adhesive to achieve efficient thermal conduction and bonding at the interface.

[0065] After the ASIC chip 4 is embedded, the cavity 100 is filled and encapsulated with a dielectric material, so that the ASIC chip 4 is completely encapsulated within the dielectric material. The dielectric material can be ABF multilayer film or other novel low-dielectric-loss materials to provide good electrical insulation and mechanical support. After encapsulation, a fan-out circuit is fabricated on top of the dielectric material, redistributing the original pins of the ASIC chip 4 to a larger area, forming an interconnection interface with the upper photodetector chip 3 and the lower redistribution layer circuit. This achieves vertical signal penetration and horizontal expansion, improving the interconnection density and signal transmission efficiency of the package structure.

[0066] According to the embodiments of this application, such as Figure 2 As shown, a filler 10 is provided on the side surface of the circuit board 6 facing the second glass substrate 2, and the filler 10 is bonded to the redistribution layer circuit on the bottom surface of the second glass substrate 2.

[0067] In this embodiment, the filler adhesive 10 forms a mechanical support layer after curing, which enhances the connection strength between the circuit board 6 and the second glass substrate 2, and fills the micro gaps between them, thus playing a role in moisture protection and environmental protection.

[0068] In a further embodiment, such as Figure 2 As shown, the second glass substrate 2 is also provided with a groove 12, which surrounds the area where the filler adhesive 10 is applied.

[0069] During the interconnection process between the circuit board 6 and the second glass substrate 2, the filler adhesive 10 is in a fluid state before curing and is easily diffused to the surroundings due to capillary action or pressure. If the filler adhesive 10 overflows to the edge area of ​​the second glass substrate 2 and cures, it will form a hard protrusion structure. This protrusion will encroach on the preset bending space of the flexible circuit board 6, causing the flexible circuit board 6 to be unable to bend within the outline of the photodetector module packaging structure, limiting the three-dimensional layout flexibility of the module, and even causing the flexible circuit board 6 to crack or fail in electrical connection due to forced large-angle bending.

[0070] To address the aforementioned issues, this embodiment provides a groove 12 formed on the bottom surface of the second glass substrate 2, surrounding the area where the filler adhesive 10 is applied. This groove 12 can be formed by laser cutting or mechanical sawing, and its function is to block the flow and diffusion path of the filler adhesive 10 before curing, effectively confining it within a predetermined application area inside the groove 12. When the filler adhesive 10 flows towards the edge, the groove 12 forms a physical barrier, stopping its diffusion and preventing it from overflowing to the edge area of ​​the second glass substrate 2. Consequently, the flexible circuit board 6 can be freely bent within the outline of the packaging structure, with the bending position corresponding to the location of the groove 12. This ensures a compact module layout and avoids mechanical damage or electrical connection failures to the flexible circuit board 6 caused by the overflow of the filler adhesive 10, significantly improving the reliability and assembly flexibility of the packaging structure.

[0071] In some exemplary embodiments, such as Figure 2 As shown, the depth of the trench 12 penetrates the redistribution layer circuit on the bottom surface of the second glass substrate 2 and extends into the first glass substrate 1.

[0072] In this embodiment, by setting the depth of the trench 12 to penetrate the redistribution layer circuit through the bottom surface of the second glass substrate 2 and further extending into the interior of the first glass substrate 1, a more effective physical barrier can be formed, ensuring that the filler adhesive 10 is completely confined within the preset layout area, preventing it from overflowing to the edge of the carrier board and encroaching on the bending space of the flexible circuit board 6. Thus, the flexible circuit board 6 can be freely bent within the outline of the photodetector module packaging structure to a direction perpendicular to the bottom surface of the second glass substrate 2, with its bending position corresponding to the location of the trench 12. This ensures the flexibility of the module's three-dimensional layout while avoiding mechanical damage or electrical connection failure of the flexible circuit board 6 due to the overflow of the filler adhesive 10.

[0073] According to the embodiments of this application, such as Figure 2 As shown, the circuit board 6 is a flexible circuit board 6, which is configured such that at least a portion of its area can be bent to a direction perpendicular to the bottom surface of the second glass substrate 2.

[0074] In this embodiment, since the groove 12 effectively blocks the overflow of the filler adhesive 10 to the edge area, the flexible circuit board 6 obtains sufficient bending space and can be bent freely within the outer contour of the photodetector module packaging structure without being hindered by the cured adhesive, thereby making the overall structure of the module more compact and meeting the strict requirements of high-density integrated systems for packaging size.

[0075] In some exemplary embodiments, such as Figure 2 As shown, the bending position of the flexible circuit board 6 corresponds to the setting position of the groove 12.

[0076] In this embodiment, the bending position of the flexible circuit board 6 corresponds to the location of the groove 12. This correspondence means that the groove 12 is located on the inner edge of the preset bending path of the flexible circuit board 6, and the bending position is exactly located in the glue-free area outside the groove 12, ensuring that the flexible circuit board 6 will not interfere with the cured filler adhesive 10 during the bending process. Therefore, the flexible circuit board 6 can smoothly complete the transition from a horizontal bonding state to a vertical bending state, with a controllable bending radius and uniform stress distribution. This avoids problems such as excessive bending, local stress concentration, or circuit breakage caused by adhesive obstruction, further ensuring the electrical connection reliability and long-term operational stability of the packaging structure.

[0077] like Figure 1 and Figure 2 As shown, the photodetector module packaging structure of this application is further configured with a heat dissipation component 5, which is disposed on the bottom surface of the second glass substrate 2. The heat dissipation component 5 is preferably a heat sink, and the material of the heat sink can be copper, aluminum, silver, nickel, or their alloys. Alternatively, it can be Kovar alloy, Invar steel, copper-tungsten, copper-molybdenum, silicon carbide aluminum, aluminum nitride, beryllium oxide, silicon carbide, diamond, graphite, and diamond-based composite materials such as copper / diamond and aluminum / diamond.

[0078] The heat sink and the second glass substrate are also bonded together by a thermally conductive adhesive layer 9; wherein the thermally conductive adhesive layer 9 can have a thermal conductivity greater than 2W / m. K uses thermally conductive epoxy resin. Of course, other types of thermally conductive materials can also be used, such as solder, thermal grease, thermal adhesive film, thermal gel, elastic thermal pads, diamond film, and other TIM thermally conductive materials. By filling the interface gaps with a thermally conductive material with a high thermal conductivity, contact thermal resistance can be reduced, creating a continuous and unobstructed heat dissipation path. This allows the heat from the ASIC chip 4 to be quickly conducted to the bottom heatsink and released outwards, significantly improving overall heat dissipation efficiency and meeting the heat dissipation requirements of the device under long-term high-load operation.

[0079] This application also provides an electronic device. The electronic device includes the photodetector module packaging structure described above.

[0080] This electronic device can be used as a medical imaging diagnostic device, including but not limited to CT scanners and MRI machines. Its integrated photodetector module can accurately acquire photon signals, perform signal processing through ASIC chip 4, and then interact with external systems through connector 7 to achieve high-quality medical image acquisition and analysis, meeting the stringent requirements for imaging accuracy and stability in clinical diagnosis. In addition, this electronic device can also be applied to other scenarios that require high-precision signal acquisition and processing. Relying on the excellent performance of the glass substrate, it ensures the reliability and long-term effectiveness of the equipment operation.

[0081] The above embodiments mainly describe the differences between the various embodiments. As long as the different optimization features between the various embodiments are not contradictory, they can be combined to form a better embodiment. For the sake of brevity, they will not be elaborated here.

[0082] While specific embodiments of this application have been described in detail by way of examples, those skilled in the art should understand that the above examples are for illustrative purposes only and are not intended to limit the scope of this application. Those skilled in the art should understand that modifications can be made to the above embodiments without departing from the scope and spirit of this application. The scope of this application is defined by the appended claims.

Claims

1. A photodetector module packaging structure, characterized in that, include: A first glass substrate (1) and a second glass substrate (2), each having a top surface and a bottom surface disposed opposite to each other; a redistribution layer circuit is evenly distributed on each of the top surface and the bottom surface; The bottom surface of the first glass substrate (1) and the top surface of the second glass substrate (2) are interconnected, and an ASIC chip (4) is embedded inside the first glass substrate (1), and a photodetector chip (3) is bonded to the top surface of the first glass substrate (1). A circuit board (6) is provided on the bottom surface of the second glass substrate (2), and the circuit board (6) is connected to the connector (7).

2. The photodetector module packaging structure according to claim 1, characterized in that, A cavity (100) is formed inside the first glass substrate (1), and the ASIC chip (4) is embedded in the cavity (100).

3. The photodetector module packaging structure according to claim 2, characterized in that, The ASIC chip (4) is embedded in the cavity (100) of the first glass substrate (1) by means of thermally conductive adhesive layer (9) or chip adhesive film mounting.

4. The photodetector module packaging structure according to claim 3, characterized in that, The ASIC chip (4) is encapsulated with a dielectric material, and a fan-out circuit is formed on the top of the dielectric material.

5. The photodetector module packaging structure according to claim 1, characterized in that, The surface roughness of both the first glass substrate (1) and the second glass substrate (2) is less than 100 nm.

6. The photodetector module packaging structure according to claim 1 or 5, characterized in that, The coefficients of thermal expansion of the first glass substrate (1) and the second glass substrate (2) range from 2ppm / K to 9ppm / K.

7. The photodetector module packaging structure according to claim 1, characterized in that, The circuit board (6) has a filler adhesive (10) on one side of the surface facing the second glass substrate (2), and the filler adhesive (10) is bonded to the redistribution layer circuit on the bottom surface of the second glass substrate (2).

8. The photodetector module packaging structure according to claim 7, characterized in that, The second glass substrate (2) is also provided with a groove (12), which is arranged around the area where the filler adhesive (10) is applied.

9. The photodetector module packaging structure according to claim 8, characterized in that, The depth of the trench (12) penetrates the redistribution layer circuit on the bottom surface of the second glass substrate (2) and extends into the first glass substrate (1).

10. The photodetector module packaging structure according to claim 8, wherein the circuit board (6) is a flexible circuit board (6), and the flexible circuit board (6) is configured such that at least a portion thereof can be bent to a direction perpendicular to the bottom surface of the second glass substrate (2).

11. The photodetector module packaging structure according to claim 10, characterized in that, The bending position of the flexible circuit board (6) corresponds to the setting position of the groove (12).

12. An electronic device, characterized in that, The photodetector module packaging structure includes any one of claims 1-11.

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