Plasma processing apparatus, power supply system, and control method

Abstract

A disclosed plasma processing apparatus determines a degree of reflection of source high-frequency power in a waveform period of an electric bias or a degree of reflection of source high-frequency power in each of a plurality of phase periods within the waveform period, based on a plurality of digital values obtained by A / D converting an envelope signal of a sensor signal in the waveform period. A power supply control section adjusts a source frequency for each of the plurality of phase periods based on the determined degree of reflection, so as to reduce the degree of reflection in a subsequent waveform period. A sampling frequency of the A / D conversion is twice or more a product of a bias frequency of the electric bias and a number of the plurality of phase periods within the waveform period, and is below an adjustable minimum frequency of the source high-frequency power.

Description

Technical Field

[0001] The exemplary embodiments of this disclosure relate to plasma processing apparatus, power supply systems, and control methods. Background Technology

[0002] A plasma processing apparatus is used to perform plasma processing on a substrate. In this apparatus, a bias high-frequency power is used to introduce ions from a plasma generated within a chamber onto the substrate. Patent Document 1 below discloses a plasma processing apparatus that modulates the power level and frequency of the bias high-frequency power.

[0003] Existing technical documents Patent documents Patent Document 1: Japanese Patent Application Publication No. 2009-246091 Summary of the Invention

[0004] The problem that the invention aims to solve This invention provides a low-cost technique for determining the degree of reflection of source high-frequency power in the waveform period of an electrically biased circuit and adjusting the source frequency of the source high-frequency power.

[0005] Methods for solving problems In one exemplary embodiment, a plasma processing apparatus is disclosed. The plasma processing apparatus includes a chamber, a substrate support within the chamber, a high-frequency power supply, a bias power supply, a sensor, a detector, an A / D converter, and a power control unit. The high-frequency power supply is configured to supply source high-frequency power for generating plasma from gas within the chamber. The bias power supply is configured to supply electrical bias to the substrate support for introducing ions from the plasma onto the substrate. The sensor is configured to acquire a sensor signal reflecting the degree of reflection of the source high-frequency power. The detector is configured to detect the envelope signal of the sensor signal. The A / D converter is configured to perform A / D conversion on the envelope signal output from the detector. The power control unit is configured to adjust the source frequency of the source high-frequency power used in each of the multiple phase periods, corresponding to the degree of reflection within the waveform period determined by the multiple digital values ​​generated from the envelope signal by the A / D converter based on the electrical bias, or the degree of reflection in each of the multiple phase periods dividing the waveform period, so as to reduce the degree of reflection in subsequent electrical bias waveform periods. The sampling frequency of an A / D converter is more than twice the product of the bias frequency and the number of phase periods within the waveform period, which is the reciprocal of the waveform period's duration, and is below the source frequency of the high-frequency power source.

[0006] Invention Effects According to an exemplary embodiment, a technique is provided for determining the degree of reflection of source high-frequency power in the waveform period of an electrically biased circuit and adjusting the source frequency of the source high-frequency power at low cost. Attached Figure Description

[0007] Figure 1 This is a diagram illustrating a structural example of a plasma processing system.

[0008] Figure 2 This is a diagram illustrating a structural example of a capacitively coupled plasma processing device.

[0009] Figure 3 This is a diagram illustrating a plasma processing apparatus according to an exemplary embodiment.

[0010] Figure 4 This is a diagram illustrating an example of a waveform representing electrical bias.

[0011] Figure 5 (a) and Figure 5 (b) is a timing diagram of an example of the source high-frequency power and electrical bias in a plasma processing apparatus of an exemplary embodiment.

[0012] Figure 6 This is a flowchart illustrating a control method of an exemplary implementation.

[0013] Figure 7 This is a flowchart illustrating an example of feedback processing.

[0014] Figure 8 It means Figure 7 The flowchart shows an example of the processing in step ST9.

[0015] Figure 9 This is a flowchart illustrating another example of feedback processing.

[0016] Figure 10 It means Figure 9 The flowchart shows an example of the processing in process ST9a.

[0017] Figure 11 This is a timing diagram of an example of the source high-frequency power and electrical bias in a plasma processing apparatus of an exemplary embodiment.

[0018] Figure 12 This is a timing diagram related to a power supply system of an exemplary implementation.

[0019] Figure 13 This is a timing diagram related to a power supply system of an exemplary implementation.

[0020] Figure 14 This is a flowchart illustrating the control method in the first example.

[0021] Figure 15 It is used for explanation Figure 14 The diagram shows the control method of the first example.

[0022] Figure 16 This is a flowchart illustrating the control method in the second example.

[0023] Figure 17 It is used for explanation Figure 16 The diagram shows the control method for the second example.

[0024] Figure 18 It is used for explanation Figure 16 The diagram shows the control method for the second example.

[0025] Figure 19 It is used for explanation Figure 16 The diagram shows the control method for the second example.

[0026] Figure 20 It is used for explanation Figure 16 The diagram shows the control method for the second example.

[0027] Figure 21 This is a flowchart illustrating the control method in the third example.

[0028] Figure 22 It is used for explanation Figure 21 The diagram shows the control method for the third example.

[0029] Figure 23 This is a block diagram of a processing circuit that performs the actions described in this manual on a computer. Detailed Implementation

[0030] Hereinafter, various exemplary embodiments will be described in detail with reference to the accompanying drawings. Furthermore, in each drawing, the same or corresponding parts are labeled with the same reference numerals.

[0031] Figure 1 This is a diagram illustrating a structural example of a plasma processing system. In one embodiment, the plasma processing system includes a plasma processing apparatus 1 and a control unit 2. The plasma processing system is an example of a substrate processing system, and the plasma processing apparatus 1 is an example of a substrate processing apparatus. The plasma processing apparatus 1 includes a plasma processing chamber 10, a substrate support 11, and a plasma generation unit 12. The plasma processing chamber 10 has a plasma processing space. Furthermore, the plasma processing chamber 10 has at least one gas supply port for supplying at least one processing gas to the plasma processing space and at least one gas outlet for discharging gas from the plasma processing space. The gas supply port is connected to the gas supply unit 20 (described later), and the gas outlet is connected to the exhaust system 40 (described later). The substrate support 11 is disposed within the plasma processing space and has a substrate support surface for supporting a substrate.

[0032] The plasma generation unit 12 is configured to generate plasma from at least one process gas supplied to the plasma processing space. The plasma generated in the plasma processing space can be capacitively coupled plasma (CCP), inductively coupled plasma (ICP), electron-cyclotron-resonance plasma (ECR), helicon wave plasma (HWP), or surface wave plasma (SWP), etc. Alternatively, various types of plasma generation units, including AC (alternating current) plasma generation units and DC (direct current) plasma generation units, can be used. In one embodiment, the AC signal (AC power) used in the AC plasma generation unit has a frequency in the range of 100 kHz to 10 GHz. Therefore, the AC signal includes both RF (radio frequency) and microwave signals. In one embodiment, the RF signal has a frequency in the range of 100 kHz to 150 MHz.

[0033] The control unit 2 processes computer-executable commands that cause the plasma processing apparatus 1 to perform the various processes described herein. The control unit 2 can be configured to control various elements of the plasma processing apparatus 1 in a manner that executes the various processes described herein. In one embodiment, part or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 may include a processing unit 2a1, a storage unit 2a2, and a communication interface 2a3. The control unit 2 is implemented, for example, by a computer 2a. The processing unit 2a1 can be configured to perform various control actions by reading a program from the storage unit 2a2 and executing the read program. The program may be pre-stored in the storage unit 2a2 or retrieved via a medium when needed. The retrieved program is stored in the storage unit 2a2 and read and executed by the processing unit 2a1. The medium may be various storage media readable by the computer 2a, or a communication line connected to the communication interface 2a3. The processing unit 2a1 may be a CPU (Central Processing Unit). The storage unit 2a2 may include RAM (Random Access Memory), ROM (Read Only Memory), HDD (Hard Disk Drive), SSD (Solid State Drive), or a combination thereof. The communication interface 2a3 can communicate with the plasma processing device 1 via a communication line such as a LAN (Local Area Network).

[0034] Hereinafter, a structural example of a capacitively coupled plasma processing device, which is one example of plasma processing device 1, will be described. Figure 2 This is a diagram illustrating a structural example of a capacitively coupled plasma processing device.

[0035] The capacitively coupled plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply unit 20, a power supply 30, and an exhaust system 40. Additionally, the plasma processing apparatus 1 includes a substrate support 11 and a gas inlet. The gas inlet is configured to introduce at least one processing gas into the plasma processing chamber 10. The gas inlet includes a spray head 13. The substrate support 11 is disposed within the plasma processing chamber 10. The spray head 13 is disposed above the substrate support 11. In one embodiment, the spray head 13 constitutes at least a portion of the ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space 10s defined by the spray head 13, the sidewall 10a of the plasma processing chamber 10, and the substrate support 11. The plasma processing chamber 10 is grounded. The spray head 13 and the substrate support 11 are electrically insulated from the housing of the plasma processing chamber 10.

[0036] The substrate support portion 11 includes a main body portion 111 and a ring assembly 112. The main body portion 111 has a central region 111a for supporting a substrate W and an annular region 111b for supporting the ring assembly 112. A wafer is an example of a substrate W. The annular region 111b of the main body portion 111 surrounds the central region 111a of the main body portion 111 when viewed from above. The substrate W is disposed on the central region 111a of the main body portion 111, and the ring assembly 112 is disposed on the annular region 111b of the main body portion 111 in such a way that it surrounds the substrate W on the central region 111a of the main body portion 111. Therefore, the central region 111a is also referred to as a substrate support surface for supporting the substrate W, and the annular region 111b is also referred to as an annular support surface for supporting the ring assembly 112.

[0037] In one embodiment, the main body 111 includes a base 1110 and an electrostatic chuck 1111. The base 1110 includes a conductive component. The conductive component of the base 1110 can function as a lower electrode. The electrostatic chuck 1111 is disposed on the base 1110. The electrostatic chuck 1111 includes a ceramic component 1111a and an electrostatic electrode 1111b disposed within the ceramic component 1111a. The ceramic component 1111a has a central region 111a. In one embodiment, the ceramic component 1111a also has an annular region 111b. Alternatively, other components surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck or an annular insulating component, may have an annular region 111b. In this case, the ring assembly 112 may be disposed on either the annular electrostatic chuck or the annular insulating component, or on both the electrostatic chuck 1111 and the annular insulating component. Alternatively, at least one RF / DC electrode coupled to the RF power supply 31 and / or DC power supply 32 (described later) may be disposed within the ceramic component 1111a. In this case, the at least one RF / DC electrode functions as a lower electrode. When the bias RF signal and / or DC signal (described later) are supplied to the at least one RF / DC electrode, the RF / DC electrode is also referred to as a bias electrode. Alternatively, the conductive components of the base 1110 and the at least one RF / DC electrode may function as multiple lower electrodes. Alternatively, the electrostatic electrode 1111b may function as a lower electrode. Therefore, the substrate support portion 11 includes at least one lower electrode.

[0038] The ring assembly 112 includes one or more annular components. In one embodiment, the one or more annular components include one or more edge rings and at least one cover ring. The edge rings are formed of a conductive or insulating material, and the cover rings are formed of an insulating material.

[0039] Additionally, the substrate support 11 may include a temperature control module configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112, and the substrate to a target temperature. The temperature control module may include a heater, a heat transfer medium, a flow path 1110a, or a combination thereof. A heat transfer fluid such as brine or gas flows in the flow path 1110a. In one embodiment, the flow path 1110a is formed within the base 1110, and one or more heaters are disposed within the ceramic component 1111a of the electrostatic chuck 1111. Furthermore, the substrate support 11 may also include a heat transfer gas supply section configured to supply heat transfer gas to the gap between the back surface of the substrate W and the central region 111a.

[0040] The spray head 13 is configured to introduce at least one process gas from the gas supply unit 20 into the plasma processing space 10s. The spray head 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and a plurality of gas inlets 13c. The process gas supplied to the gas supply port 13a passes through the gas diffusion chamber 13b and is introduced into the plasma processing space 10s through the plurality of gas inlets 13c. Additionally, the spray head 13 includes at least one upper electrode. Furthermore, in addition to the spray head 13, the gas inlet unit may also include one or more side gas injectors (SGIs) mounted on one or more openings formed in the sidewall 10a.

[0041] The gas supply unit 20 may also include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one processing gas from a corresponding gas source 21 to the spray head 13 via a corresponding flow controller 22. Each flow controller 22 may include, for example, a mass flow controller or a pressure-controlled flow controller. Furthermore, the gas supply unit 20 may also include at least one flow modulation device for modulating or pulsed the flow rate of the at least one processing gas.

[0042] The power supply 30 includes an RF power supply 31 coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power supply 31 is configured to supply at least one RF signal (RF power) to at least one lower electrode and / or at least one upper electrode. This causes at least one processing gas supplied to the plasma processing space 10s to form plasma. Therefore, the RF power supply 31 can function as at least a part of the plasma generation unit 12. Furthermore, by supplying a bias RF signal to at least one lower electrode, a bias potential can be generated on the substrate W, introducing ionic components from the formed plasma into the substrate W.

[0043] In one embodiment, the RF power supply 31 includes a first RF generation unit 31a and a second RF generation unit 31b. The first RF generation unit 31a is configured to be coupled to at least one lower electrode and / or at least one upper electrode via at least one impedance matching circuit to generate a source RF signal (source RF power) for plasma generation. In one embodiment, the source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the first RF generation unit 31a may also be configured to generate multiple source RF signals with different frequencies. The generated one or more source RF signals are supplied to at least one lower electrode and / or at least one upper electrode.

[0044] The second RF generation unit 31b is configured to be coupled to at least one lower electrode via at least one impedance matching circuit to generate a bias RF signal (bias RF power). The frequency of the bias RF signal may be the same as or different from the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency lower than that of the source RF signal. In one embodiment, the bias RF signal has a frequency in the range of 100 kHz to 60 MHz. In one embodiment, the second RF generation unit 31b may also be configured to generate multiple bias RF signals with different frequencies. The generated one or more bias RF signals are supplied to at least one lower electrode. In addition, in various embodiments, at least one of the source RF signal and the bias RF signal may be pulsed.

[0045] Alternatively, the power supply 30 may also include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a first DC generating unit 32a and a second DC generating unit 32b. In one embodiment, the first DC generating unit 32a is configured to be connected to at least one lower electrode to generate a first DC signal. The generated first DC signal is applied to at least one lower electrode. In one embodiment, the second DC generating unit 32b is configured to be connected to at least one upper electrode to generate a second DC signal. The generated second DC signal is applied to at least one upper electrode.

[0046] In various embodiments, the first and second DC signals can be pulsed. In this case, a sequence of voltage pulses is applied to at least one lower electrode and / or at least one upper electrode. The voltage pulses can have rectangular, trapezoidal, triangular, or combinations thereof pulse waveforms. In one embodiment, a waveform generation unit for generating a sequence of voltage pulses based on the DC signals is connected between the first DC generation unit 32a and at least one lower electrode. Therefore, the first DC generation unit 32a and the waveform generation unit constitute a voltage pulse generation unit. When the second DC generation unit 32b and the waveform generation unit constitute a voltage pulse generation unit, the voltage pulse generation unit is connected to at least one upper electrode. The voltage pulses can have positive or negative polarity. Additionally, the sequence of voltage pulses can also include one or more positive voltage pulses and one or more negative voltage pulses within one cycle. Furthermore, the first and second DC generation units 32a and 32b can be provided based on the RF power supply 31, or the first DC generation unit 32a can be provided instead of the second RF generation unit 31b.

[0047] The exhaust system 40 can be connected, for example, to a gas outlet 10e located at the bottom of the plasma processing chamber 10. The exhaust system 40 may include a pressure regulating valve and a vacuum pump. The pressure within the plasma processing space 10s is adjusted using the pressure regulating valve. The vacuum pump may include a turbomolecular pump, a dry pump, or a combination thereof.

[0048] The following is for reference Figure 3 . Figure 3 This is a diagram illustrating an exemplary embodiment of a plasma processing apparatus. (As shown) Figure 3 As shown, the plasma processing apparatus 1 includes a power supply system 30S. The power supply system 30S includes a high-frequency power supply 41, a bias power supply 42, a sensor 45, a detector 51, and an A / D converter 52.

[0049] The high-frequency power supply 41 is the first RF generation unit 31a. The high-frequency power supply 41 is configured to generate a source RF signal, namely, a source high-frequency power HF. The source high-frequency power HF has a source frequency f. That is, the source high-frequency power HF has a sinusoidal waveform with a frequency equal to the source frequency f. The source frequency f can be a frequency in the range of 10 MHz to 150 MHz. The high-frequency power supply 41 is configured to generate the source frequency f at its minimum frequency f. MIN Its maximum frequency f MAX Adjustments are made between these values. In one example, the minimum frequency f... MIN It is 36MHz, with a maximum frequency f. MAX The frequency is 44MHz. As described later, the source frequency f is adjusted to reduce the degree of reflection of the source high-frequency power HF from the load of the high-frequency power supply 41.

[0050] The high-frequency power supply 41 is electrically connected to the high-frequency electrode via a matching adapter 43, thereby supplying source high-frequency power HF to the high-frequency electrode. The high-frequency electrode may be disposed within the substrate support portion 11. The high-frequency electrode may also be at least one electrode disposed within a conductive component or ceramic component 1111a of the base 1110. Alternatively, the high-frequency electrode may be an upper electrode. When source high-frequency power HF is supplied to the high-frequency electrode, plasma is generated from the gas within the chamber 10.

[0051] Matching unit 43 has a variable impedance. The variable impedance of matching unit 43 is set to reduce the reflection of the source high-frequency power HF from the load. Matching unit 43 can be controlled, for example, by control unit 2.

[0052] In one embodiment, the high-frequency power supply 41 may include a signal generator 41g, a D / A converter 41c, and an amplifier 41a. The signal generator 41g generates a high-frequency signal having a source frequency f. The signal generator 41g may be constructed from a programmable logic device such as a programmable processor, a field-programmable gate array (FPGA), or a special-purpose circuit such as an application-specific integrated circuit (ASIC).

[0053] The output of signal generator 41g is connected to the input of D / A converter 41c. D / A converter 41c converts the high-frequency signal from signal generator 41g into an analog signal. The output of D / A converter 41c is connected to the input of amplifier 41a. Amplifier 41a amplifies the analog signal from D / A converter 41c, generating source high-frequency power (HF). The amplification rate of amplifier 41a is specified to high-frequency power supply 41 by control unit 2. Alternatively, high-frequency power supply 41 may not include D / A converter 41c. In this case, the output of signal generator 41g is connected to the input of amplifier 41a, and amplifier 41a amplifies the high-frequency signal from signal generator 41g, generating source high-frequency power (HF).

[0054] The bias power supply 42 includes a second RF generation section 31b or a first DC generation section 32a. The bias power supply 42 is electrically coupled to the substrate support section 11. The bias power supply 42 is configured to be electrically connected to a bias electrode within the substrate support section 11, supplying an electrical bias EB to the bias electrode. The bias electrode can be at least one electrode disposed within a conductive component or ceramic component 1111a of the substrate 1110. The bias electrode can be interchangeable with a high-frequency electrode. When the electrical bias EB is supplied to the bias electrode, ions from the plasma are attracted to the substrate W.

[0055] The following, with Figure 3 Refer to together Figure 4 . Figure 4 This is a diagram illustrating an example of an electrical bias waveform. The bias power supply 42 is configured to periodically apply an electrical bias EB having a waveform period CY to the bias electrodes. That is, the electrical bias EB is applied to the bias electrodes in each of a plurality of waveform periods CY that are repeating waveform periods CY. The waveform period CY is defined by the bias frequency. The bias frequency is, for example, a frequency of 50 kHz or higher and 27 MHz or lower. The duration of the waveform period CY is the reciprocal of the bias frequency. The bias frequency can be 13.56 MHz or lower or 400 kHz or lower.

[0056] The electrical bias EB can be a bias RF signal, i.e., a bias high-frequency power LF with a bias frequency. That is, the electrical bias EB can have a sinusoidal waveform with its frequency being the bias frequency. In this case, the bias power supply 42 is electrically connected to the bias electrode via a matching adapter 44. The variable impedance of the matching adapter 44 is set to reduce the reflection of the bias high-frequency power LF from the load.

[0057] Alternatively, the electrical bias EB may include a pulsed first DC signal, namely a voltage pulse VP. The voltage pulse VP is applied to the bias electrode during the waveform period CY. The voltage pulse VP is periodically applied to the bias electrode at time intervals of the same length as the waveform period CY. The waveform of the voltage pulse VP can be a rectangular wave, a triangular wave, or any waveform. The polarity of the voltage pulse VP is set to create a potential difference between the substrate W and the plasma, thereby introducing ions from the plasma into the substrate W. The voltage pulse VP is applied to the bias electrode during the period of the waveform period CY when the potential of the substrate W is negative. The voltage pulse VP applied to the bias electrode can have a negative potential, a positive potential, or a potential that varies between positive and negative potentials. The voltage pulse VP can be a negative voltage pulse or a negative DC voltage pulse. Furthermore, when the electrical bias EB is a voltage pulse VP, the plasma processing apparatus 1 may not include a matching device 44.

[0058] The following, with Figure 3 and Figure 4 Refer to together Figure 5 (a) and Figure 5 (b) Figure 5 (a) and Figure 5 (b) are timing diagrams of an example of the source high-frequency power and electrical bias in a plasma processing apparatus according to an exemplary embodiment. In these diagrams, "ON" (on) of the source high-frequency power HF indicates that the source high-frequency power HF is supplied, and "OFF" (off) (off) of the source high-frequency power HF indicates that the supply of the source high-frequency power HF is stopped. Furthermore, in Figure 5In (b), "HIGH" for the source high-frequency power HF indicates that the source high-frequency power HF has a power level higher than that indicated by "LOW". Furthermore, in these figures, "ON" for the electrical bias EB indicates that the electrical bias EB is supplied, and "OFF" for the electrical bias EB indicates that the electrical bias EB is not supplied. Figure 5 In (b), "HIGH" for the electrical bias EB indicates that the electrical bias EB is supplied with a level higher than that indicated by "LOW". Additionally, when the electrical bias EB is a bias high-frequency power LF, the level of the electrical bias EB is the power level of the bias high-frequency power LF. When the electrical bias EB includes a voltage pulse VP, the higher the energy of the ions attracted to the substrate W, the higher the level of the electrical bias EB. When the electrical bias EB includes a voltage pulse VP, the level of the electrical bias EB can be the absolute value of the voltage level of the voltage pulse VP in the negative direction relative to a reference voltage (e.g., 0V).

[0059] The high-frequency power supply 41 is configured to supply source high-frequency power HF in parallel with the periodic supply of electrical bias EB from the bias power supply 42. For example... Figure 5 As shown in (a), the electrical bias EB and the source high-frequency power HF can be supplied simultaneously and continuously from the start to the end of the process. That is, the continuous wave of the electrical bias EB and the continuous wave of the source high-frequency power HF can be supplied in parallel.

[0060] Or, such as Figure 5 As shown in (b), the pulses of the electrical bias EB and the pulses of the source high-frequency power HF can also be supplied synchronously. That is, in each of the pulse periods PP1, PP2, PP3, ... (i.e., multiple pulse periods PP), the pulses of the electrical bias EB and the pulses of the source high-frequency power HF can be supplied simultaneously. The multiple pulse periods PP each contain multiple waveform periods CY. That is, in each of the multiple pulse periods PP, the electrical bias EB is supplied periodically. In addition, the pulses of the electrical bias EB can be alternately supplied in a supply state ( Figure 5 (b) ON state and stop state Figure 5 (b) The ON / OFF pulse of the OFF state. Alternatively, the pulse of the electrical bias EB can also be an alternating high-level state ( Figure 5 (b) HIGH state and low level state Figure 5 (b) LOW state) HIGH / LOW pulses. Additionally, the source high-frequency power HF pulses can alternate between supply state ( Figure 5 (b) ON state and stop state Figure 5 (b) The ON / OFF pulse of the OFF state. Alternatively, the pulse of the source high-frequency power HF can also be alternately high-level ( Figure 5(b) HIGH state and low level state Figure 5 (b) HIGH / LOW pulses in the LOW state. Additionally, the power level of the source high-frequency power HF can be modulated during the period when the source high-frequency power HF is ON. Additionally, the power level of the source high-frequency power HF can be modulated during the period when the source high-frequency power HF's power level is HIGH. Additionally, the power level of the source high-frequency power HF can also be modulated during the period when the source high-frequency power HF's power level is LOW.

[0061] like Figure 3 As shown, sensor 45 is configured to obtain the degree R of reflection of high-frequency power HF from the load. D The sensor signal SS is a voltage signal VS of the reflected wave from a source high-frequency power HF. In one embodiment, sensor 45 may include a directional coupler. In this case, the sensor signal SS is the voltage signal VS of the reflected wave from a source high-frequency power HF. The output of sensor 45 is connected to the input of detector 51.

[0062] Detector 51 is configured to detect the envelope signal ES of the sensor signal SS output from sensor 45. The output of detector 51 is connected to the input of A / D converter 52. A / D converter 52 is configured to perform A / D conversion on the envelope signal ES output from detector 51.

[0063] The plasma processing device 1 also includes a power control unit. Figure 3 In the example shown, the power control unit can be a signal generator 41g. The power control unit can be a control unit 2, or another control unit in the plasma processing apparatus 1 or the power system 30S.

[0064] The power control unit determines the degree of reflection R in the waveform period CY. D Or divide the waveform period CY into multiple phase periods PH (refer to) Figure 4 The degree of reflection R in each D The source frequency f for each of the multiple phases PH is adjusted to reduce the degree of reflection R in the subsequent waveform period CY. D The degree of reflection R D Based on the waveform period CY, multiple digital values ​​V generated by the A / D converter 52 from the envelope signal ES are... D To determine the degree R of reflection that can be obtained in the power control unit. D .

[0065] The degree of reflection R D These are representative values ​​of multiple evaluation values ​​obtained from multiple digital values ​​in the waveform period CY or PH during each phase. The representative value can be an average value. For example, using the multiple digital values ​​V obtained from the envelope signal ES of the voltage signal VS as described above. DIn this case, multiple evaluation values ​​are the power levels of the reflected wave. The average power level of the reflected wave is obtained by the following equation (1) as the degree of reflection R. D .

[0066] [Mathematical Expression 1] In addition, in equation (1), V Dj The multiple numerical values ​​V used in the operation of equation (1) D The j-th numerical value in the equation. Additionally, Z0 is the characteristic impedance, for example, 50Ω. Furthermore, C is the coupling coefficient of the directional coupler, which is predetermined. Additionally, g is the gain reflecting the characteristics of detector 51, which is predetermined. In the case of averaging multiple evaluation values ​​in the waveform period CY, N... V It consists of multiple digital values ​​V in the waveform period CY. D The number of [values]. Additionally, when calculating the average of multiple evaluation values ​​in PH during each phase period within the waveform period CY, N [values ​​are missing]. V It consists of multiple numerical values ​​V in PH during each phase period. D The number of.

[0067] In the plasma processing apparatus 1, the sampling frequency of the A / D converter 52 is more than twice the product of the bias frequency of the electrical bias EB and the number of phase periods PH within the waveform period CY, and the minimum frequency f is... MIN The following describes how, according to the A / D converter 52, more than two digital values ​​V are obtained from the envelope signal ES during each of the multiple phase periods of PH. D (i.e., sampled values). Furthermore, according to the plasma processing apparatus 1, an A / D converter 52 with a relatively low sampling frequency can be used. Therefore, according to the plasma processing apparatus 1, the degree of reflection R in the waveform period CY can be determined at low cost. D Or the degree of reflection R in PH during each phase period D Adjust the source frequency f of PH during each phase.

[0068] In one embodiment, detector 51 may include attenuator 511, first filter 512, detection circuit 513, second filter 514, and amplifier 515. The input of attenuator 511 is connected to sensor 45. Attenuator 511 is configured to generate signal AS by attenuating the signal level of sensor signal SS. The output of attenuator 511 is connected to the input of first filter 512.

[0069] The first filter 512 is a bandpass filter configured to generate the signal BPS (first signal) by filtering the signal AS. The upper cutoff frequency of the first filter 512 can be the maximum frequency f. MAX The above and minimum frequency fMIN Less than twice that. The lower cutoff frequency of the first filter 512 can be the minimum frequency f. MIN The following describes how, according to the first filter 512, high-order harmonics with frequencies more than twice the source frequency are substantially removed from the sensor signal SS. The output of the first filter 512 is connected to the input of the detection circuit 513. Alternatively, the output of the sensor 45 can be connected to the input of the first filter 512, the output of the first filter 512 can be connected to the input of the attenuator 511, and the output of the attenuator 511 can be connected to the input of the detection circuit 513.

[0070] The detector circuit 513 is configured to detect the envelope signal EAS (first envelope signal) of the output signal BPS. The output of the detector circuit 513 is connected to the input of the second filter 514.

[0071] The second filter 514 is a low-pass filter configured to generate the signal LPS by filtering the envelope signal EAS. The upper cutoff frequency of the second filter 514 is a value between the product of the bias frequency of the electrical bias EB and the number of phase periods PH within the waveform period CY, and the upper cutoff frequency of the first filter 512. The upper cutoff frequency of the second filter 514 can be a minimum frequency f. MIN The following describes how, according to the second filter 514, instead of removing the necessary signal components in each of the multiple phase periods PH, high-frequency components are removed. The output of the second filter 514 is connected to the amplifier 515.

[0072] Amplifier 515 is configured to generate the aforementioned envelope signal ES (i.e., the second envelope signal) by amplifying the signal LPS. The output of amplifier 515 is connected to the input of A / D converter 52. A / D converter 52 performs A / D conversion on the envelope signal ES output from amplifier 515. This yields the aforementioned plurality of digital values ​​V. D .

[0073] The following is for reference Figure 6 A control method of an exemplary implementation will be described. Figure 6 This is a flowchart illustrating a control method of an exemplary implementation. Figure 6 The control method shown (hereinafter referred to as "Method MT") is performed in the plasma processing apparatus 1. In each step of Method MT, each part of the plasma processing apparatus 1 can be controlled by the control unit 2 and the power control unit.

[0074] Method MT may include step STp. In step STp, a substrate W is prepared within chamber 10. The substrate W is placed on substrate support 11 and held by electrostatic chuck 1111.

[0075] In step STa, in order to generate plasma from gas within chamber 10, high-frequency power HF is supplied from high-frequency power supply 41 to high-frequency electrodes. In step STb, in order to introduce ions from plasma onto substrate W on substrate support 11, electrical bias EB is supplied from bias power supply 42 to substrate support 11 (or bias electrodes).

[0076] In step STc, sensor signal SS is acquired by sensor 45. In step STd, envelope signal ES is detected by detector 51. In step STe, envelope signal ES is converted to digital value by A / D converter 52. In step STf, multiple digital values ​​V generated by A / D converter 52 from envelope signal ES are processed according to waveform period CY. D Determine the degree of reflection R in the waveform period CY. D Or the degree of reflection R in PH during each phase period D .

[0077] In process STJ, it is determined whether the stop condition is met. This determination in process STJ can be performed by the power control unit. In process STJ, the stop condition is met, for example, if an end instruction is issued from control unit 2. If the stop condition is determined not to be met in process STJ, process STg is performed. In process STg, the degree of reflection R determined in process STf is... D The source frequency f used for each phase period PH is adjusted by the power control unit to reduce the degree of reflection in the subsequent waveform period CY. After step STg, the processing starting from step STa is performed again. In step STa, high-frequency source power HF with the source frequency f for each phase period PH determined in step STg is supplied. On the other hand, if the stop condition is determined to be met in step STJ, method MT ends.

[0078] The following describes several implementation methods related to the adjustment of the source frequency f in method MT. Additionally, the adjustment of the source frequency f by the power supply control unit will also be described.

[0079] In one implementation, the power control unit adjusts the source frequency f through feedback processing. The feedback processing is applicable to multiple specified phase periods DP within the waveform period CY.

[0080] In the feedback processing of the first embodiment, the multiple designated phase periods DP within the waveform period CY can be all phase periods PH within the waveform period CY. That is, in the feedback processing of the first embodiment, the number of multiple designated phase periods DP within the waveform period CY is M, where M is the number of multiple phase periods PH within the waveform period CY, i.e., N.

[0081] In the feedback processing of the second embodiment, the multiple designated phase periods DP within the waveform period CY can be several selected phase periods PH that are part of all phase periods PH within the waveform period CY. That is, in the feedback processing of the second embodiment, the number of multiple designated phase periods DP within the waveform period CY is M, where M is less than the number of multiple phase periods PH within the waveform period CY, i.e., N. In the feedback processing of the second embodiment, the power control unit determines the source frequency f used for each phase period other than the multiple designated phase periods DP within the multiple phase periods PH within the waveform period CY by using interpolation of the source frequency f used for the multiple designated phase periods DP. The interpolation can be linear interpolation using the source frequencies f used by each of two adjacent designated phase periods DP. The interpolation can also be based on other interpolation methods.

[0082] In the feedback processing, the power control unit determines the i-th waveform period CY in the sequence CYS of waveform periods CY. i During the m-th specified phase period DP m The source frequency f[i, m] is used such that DP is determined according to the m-th specified phase period within the preceding waveform periods CY in the sequence CYS. m The degree of reflection is suppressed by varying the source frequency and the degree of reflection of the source high-frequency power. Furthermore, the sequence CYS is relative to the waveform period CY. i The preceding waveform period CY can contain the waveform period CY i-Ifb and CY i-2×Ifb Here, "Ifb" is an integer greater than or equal to 1.

[0083] Feedback processing includes first feedback processing and / or second feedback processing. First feedback processing is applicable to situations such as... Figure 5 As shown in (a), the source high-frequency power HF and electrical bias EB are supplied simultaneously and continuously. In the first feedback process, the sequence CYS consists of multiple waveform periods CY that are repeated continuously.

[0084] The second feedback processing is applicable to, for example, Figure 5 As shown in (b), the pulses of the source high-frequency power HF and the electrical bias EB are supplied synchronously. In the second feedback process, the sequence CYS consists of the waveform periods CY of PP in the same order during multiple pulse periods, that is, the k-th waveform period CY of PP during multiple pulse periods. k constitute.

[0085] In addition, Figure 5In the example shown in (b), the second feedback processing can be applied to all waveform periods CY of each of the multiple pulse periods PP. Alternatively, the second feedback processing can be applied to the first to the K1th waveform periods CY of each of the multiple pulse periods PP, and the first feedback processing can be applied to the (K1+1)th to the last waveform periods CY of each of the multiple pulse periods PP. Here, K1 is an integer greater than or equal to 1. Alternatively, the second feedback processing can be applied to the first to the K1th waveform periods CY of each of the multiple pulse periods PP, and in each of the (K1+1)th to the last waveform periods CY of each of the multiple pulse periods PP, the source frequency of each specified phase period of the K1th waveform period CY can be used for the same specified phase period.

[0086] The following is for reference Figure 7 and Figure 8 This illustrates an example of feedback processing applied to each sequence using CYS. Figure 7 This is a flowchart illustrating an example of feedback processing. Figure 8 It means Figure 7 The flowchart shows an example of the processing in step ST9. The feedback processing example described below is the case where "Ifb" is 1 as described above. However, as mentioned above, "Ifb" can also be an integer greater than 1.

[0087] like Figure 7 As shown, the feedback processing can include steps ST1 to ST9. Steps ST1 to ST9 perform DP on multiple specified phase periods within each waveform period CY in the sequence CYS.

[0088] In process ST1, the power control unit sets i to 1. "i" indicates the order of waveform periods CY within sequence CYS.

[0089] In the next step ST2, the source frequency f and offset value Δf used for each of the multiple specified phase periods DP of the i-th waveform period CY within the sequence CYS are set. Specifically, in step ST2, the power control unit sets the source frequency f[i, m] and offset value Δf[i, m]. In step ST2, the source frequency f[i, m] and offset value Δf[i, m], i.e., the source frequency f[i, m] and offset value Δf[i, m], are set to their respective preset values. Furthermore, in the case of the feedback processing in the second embodiment, in step ST2, the source frequency f used for the phase periods other than the multiple specified phase periods DP is set by interpolation as described above.

[0090] The next step, ST3, corresponds to step STa of method MT. In step ST3, the power control unit supplies high-frequency power HF from the high-frequency power supply 41, which has a source frequency f for each of the multiple phase periods PH within the waveform period CY set in step ST2. That is, in step ST3, the power control unit supplies high-frequency power HF from the high-frequency power supply 41 within the waveform period CYS of the sequence CYS. i DP during the specified phase period m A high-frequency power source HF with a source frequency f[i, m]. Furthermore, an electrical bias is supplied in the aforementioned process STb, and the degree of reflection R is obtained in the aforementioned processes STc to STf. D .

[0091] Steps ST4, ST5, and ST6 correspond to step STg in method MT. The processing consisting of steps ST4, ST5, and ST6 is performed on multiple specified phase periods DP within the i-th waveform period CY in sequence CYS.

[0092] In process ST4, the power control unit determines the waveform period CY in sequence CYS. i DP during the specified phase period m The degree of reflection R of the source high-frequency power HF D That is, the degree of reflection R D Is [i, m] large enough to satisfy the frequency change condition? In process ST4, is the waveform period CY in sequence CYS... i DP during the specified phase period m The degree of reflection R of the source high-frequency power HF D The frequency change condition is met when [i, m] is greater than the threshold. In process ST4, this can be achieved in R. D [i, m] is greater than the first threshold R th1 The frequency change condition is satisfied under [m]. Additionally, the first threshold R used by DP during multiple specified phase periods... th1 They can be the same or different.

[0093] If the frequency change condition is met in step ST4, in step ST5, the power control unit sets the subsequent waveform period CY in the sequence CYS using the following formula. i+1 DP during the specified phase period m The source frequency used is f[i+1, m].

[0094] f[i+1,m]=f[i,m]+Δf[i,m] On the other hand, if the frequency change conditions are not met in process ST4, the power control unit sets the source frequency f[i+1, m] in process ST6 using the following formula.

[0095] f[i+1, m] = f[i, m] Furthermore, in the case of feedback processing in the second embodiment, before the processing is transferred to the next step ST7, the source frequency f used for multiple specified phase periods other than DP is set by interpolation as described above.

[0096] Next, processes ST7 through ST9 are performed. Processes ST7 through ST9 are repeated until the stop condition is met in process STJ of method MT. In process ST7, the power control unit increments i by 1.

[0097] Steps ST8 to ST9 are performed on multiple specified phase periods DP of the i-th waveform period CY within the sequence CYS. Step ST8 corresponds to step STa of method MT. In step ST8, the power control unit supplies source high-frequency power HF from the high-frequency power supply 41, each having a source frequency f of the multiple phase periods PH within the waveform period CY that were just set. That is, in step ST8, the power control unit supplies source high-frequency power HF from the high-frequency power supply 41 for the waveform period CY within the sequence CYS. i DP during the specified phase period m A high-frequency power source HF with a source frequency f[i, m]. Furthermore, an electrical bias is supplied in the aforementioned process STb, and the degree of reflection R is obtained in the aforementioned processes STc to STf. D .

[0098] In the next process ST9, the power control unit determines the degree of reflection R. D [i, m] determines the subsequent waveform period CY in the sequence CYS. i+1 DP during the specified phase period m The source frequency used is f[i+1, m].

[0099] like Figure 8 As shown, process ST9 begins with process ST901. In process ST901, the power control unit determines the degree of reflection R. D Is [i, m] an increasing trend? In process ST901, what is the degree of reflection R? D [i, m] satisfying R D [i, m] > R D In the case of [i-1, m], it can be determined as an increasing trend. Alternatively, it can be determined as the trend up to the i-th waveform period CY in the sequence CYS. i During the m-th specified phase period of DP in two or more waveform periods CY up to this point m When the degree of reflection in the image shows an increasing trend, the degree of reflection is determined to be R. D [i, m] represents an increasing trend.

[0100] The degree of reflection, R, is determined in process ST901. D If [i, m] is not increasing, the power control unit maintains the sign of the offset value Δf[i, m] in process ST902. That is, in process ST902, the power control unit sets the offset value Δf[i, m] by the following formula.

[0101] Δf[i, m] = Δf[i-1, m] On the other hand, the degree of reflection R determined in process ST901 D When [i, m] represents an increasing trend, the power control unit changes the sign of the offset value Δf[i, m] in process ST903. That is, in process ST903, the power control unit sets the offset value Δf[i, m] using the following formula.

[0102] Δf[i, m] = -Δf[i-1, m] In the next process ST904, the power control unit determines the waveform period CY in the sequence CYS. i DP during the specified phase period m The degree of reflection R of the source high-frequency power HF D Is [i, m] large enough to satisfy the frequency change condition? In process ST904, the waveform period CY in sequence CYS. i DP during the specified phase period m The degree of reflection R of the source high-frequency power HF D If [i, m] is greater than the threshold, the frequency change condition is met.

[0103] In one implementation, DP is performed during a specified phase of a waveform period within the sequence CYS. m The degree of reflection in the first threshold R th1 If the comparison result of [m] indicates that the degree of reflection is small, then during the specified phase period DP until process ST904, the reflection will be determined. m The degree of reflection in the second threshold R th2 The comparison result of [m] is up to the maximum degree of reflection, and the frequency change condition may not be met in process ST904. Second threshold R th2 [m] at the first threshold R th1 [m] or above. Second threshold R th2 [m] can be greater than the first threshold R. th1 [m]. Additionally, the second threshold R used by DP for each of the multiple specified phase periods. th2 [m] can be the same or different.

[0104] Specifically, during a specified phase period of a waveform cycle within the sequence CYS, DP m The degree of reflection in the first threshold R th1 In the case of [m] below, as in the subsequent process ST904 during the specified phase period DP m The threshold for comparing the degree of reflection in the image can be a second threshold R. th2 [m]. Furthermore, during a specified phase period of a waveform cycle determined to be within sequence CYS, DP... m The degree of reflection in the water is greater than the second threshold R. th2 In the case of [m], as a subsequent phase during process ST904, DP... m The threshold for comparing the degree of reflection in the image can be a first threshold R. th1 [m].

[0105] If the frequency change condition is determined to be met in process ST904, the power control unit sets the subsequent waveform period CY in sequence CYS in process ST905 using the following formula. i+1 DP during the specified phase period m The source frequency used is f[i+1, m].

[0106] f[i+1,m]=f[i,m]+Δf[i,m] On the other hand, if the frequency change conditions are not met in process ST904, the power control unit sets the source frequency f[i+1, m] in process ST906 using the following formula.

[0107] f[i+1, m] = f[i, m] In addition, in the case of feedback processing in the second embodiment, before the processing is transferred to the next step, the source frequency f used for multiple specified phase periods other than DP is set by interpolation as described above.

[0108] Based on feedback processing, through the degree R corresponding to the reflection. D [i, m] adjusts the source frequency f[i+1, m], thereby suppressing the reflection of the source high-frequency power HF. Furthermore, as described above, a first threshold R is used in the determination of the frequency change condition. th1 and the second threshold R th2This suppresses excessive changes in the source frequency. Furthermore, when the method MT is repeated, high reproducibility of the time variation of the source frequency can be achieved. Moreover, according to the feedback processing of the second embodiment, the source frequency of each phase period other than the specified phase period DP in the multiple phase periods PH is determined by interpolation based on the source frequency used in the multiple specified phase periods DP. Therefore, according to the feedback processing of the second embodiment, large fluctuations in the source frequency within the waveform period CY are suppressed.

[0109] The following is for reference Figure 9 and Figure 10 Here is another example illustrating feedback processing. Figure 9 This is a flowchart illustrating another example of feedback processing. Figure 10 It means Figure 9 The flowchart shows an example of the processing in step ST9a. The following is from the perspective of... Figure 7 and Figure 8 The different perspectives shown in the feedback processing illustrate... Figure 9 and Figure 10 The feedback processing is shown below. Figure 9 and Figure 10 In the processing shown, the power control unit sets the offset value Δf[i, m] to be related to the degree of reflection R. D The value corresponding to the size of [i, m].

[0110] Specifically, such as Figure 9 As shown, the power control unit sets the source frequency f[i,m] and coefficient α[i,m] in process ST2a between process ST1 and process ST3. In process ST2a, the source frequency f[i,m] and coefficient α[i,m], that is, the source frequency f[1,m] and coefficient α[1,m], are set to their respective preset values.

[0111] If the frequency change condition is met in process ST4, the power control unit sets the offset value Δf[i,m] in process ST5a between process ST4 and process ST5 using the following formula.

[0112] Δf[i,m]=α[i,m]*(R) D [i, m]-R th1 [m]) Furthermore, in step ST9a following step ST8, the power control unit determines the degree of reflection R. D [i, m] determines the subsequent waveform period CY in the sequence CYS. i+1 DP during the specified phase period m The source frequency used is f[i+1, m].

[0113] like Figure 10As shown, process ST9a begins with process ST901. In process ST901, the degree of reflection R is determined. D If [i, m] is not increasing, the power control unit maintains the sign of the coefficient α[i, m] in process ST902a. That is, in process ST902a, the power control unit sets the coefficient α[i, m] by the following formula.

[0114] α[i, m] = α[i-1, m] On the other hand, the degree of reflection R determined in process ST901 D When [i, m] represents an increasing trend, the power control unit changes the sign of the coefficient α[i, m] in process ST903a. That is, in process ST903a, the power control unit sets the coefficient α[i, m] using the following formula.

[0115] α[i, m] = -α[i-1, m] like Figure 10 As shown, if the frequency change condition is met in process ST904, in process ST905a between process ST904 and process ST905, the power control unit sets the offset value Δf[i,m] using the following formula.

[0116] Δf[i,m]=α[i,m]*(R) D [i, m]-R th1 [m]) The following is for reference Figure 11 . Figure 11 This is a timing diagram of an example of the source high-frequency power and electrical bias in a plasma processing apparatus of an exemplary embodiment. Figure 11 and Figure 5 Similarly, (b) shows an example of pulses supplying the electrical bias EB and the source high-frequency power HF synchronously. Figure 11 The diagram shows the pulse period PP during all pulse periods. k .like Figure 11 As shown, each pulse period PP may include a first feedback period P. F [1] and during the second feedback period P F [2]. During the first feedback period, P F [1] is the period from the start time of the pulse period PP to the end time of the pulse period PP. Second feedback period P F [2] is following the first feedback period P F [1] and the subsequent period up to the end of the pulse period PP. First feedback period P F [1] During the second feedback period P F [2] Each can contain multiple waveform periods CY.

[0117] The power control unit can determine the P during the first feedback period. F [1] The second feedback process described above is performed during the source frequency f of each of the multiple specified phase periods of the multiple waveform periods CY within each waveform period DP.

[0118] In the case of feedback processing in the second embodiment, the power control unit can control the first feedback period P F [1] The last specified phase period within the j-th waveform period CY and the first feedback period P F The source frequency f of each phase period between the first specified phase period DP1 within the (j+1)th waveform period CY in [1] is set to a value obtained by interpolating (e.g., linear interpolation) using the source frequency f of the last specified phase period and the source frequency f of the first specified phase period DP1. Furthermore, in the case of feedback processing in the second embodiment, the first feedback period P... F [1] The number of specified phase periods for each of the multiple waveform periods CY within a given period can be different. Furthermore, in the case of feedback processing in the second embodiment, during the first feedback period P... F In each of the multiple waveform periods CY within [1], the time positions of the multiple specified phase periods can be different.

[0119] Alternatively, as described above, during the period between the pulse supplying the source high-frequency power HF and the period of the next pulse supplying the source high-frequency power HF, a source high-frequency power HF with a power level lower than that pulse can be supplied. Hereinafter, this period of supplying source high-frequency power HF with a power level lower than that pulse will be referred to as the LOW period. The source frequency f used during the LOW period can be constant or predetermined.

[0120] In the case of feedback processing in the second embodiment, during the first feedback period P F [1] The first phase period PH1 within the initial waveform period CY can be the first specified phase period DP1 among a plurality of specified phase periods DP. Alternatively, in the case of feedback processing in the second embodiment, the first feedback period P F [1] The first phase period PH1 within the initial waveform period CY may not be the first specified phase period DP1 among multiple specified phase periods DP. In the latter case, the power supply control unit can match the final moment within the LOW period with the first feedback period P. F [1] The source frequency f for each phase period between the first specified phase period DP1 is set to use the source frequency f of the LOW period and the first feedback period P. FThe value obtained by interpolating (e.g., linear interpolation) the source frequency f of DP1 during the first specified phase period within [1].

[0121] In addition, the power control unit can determine the P period during the second feedback. F [2] The first feedback process described above is performed by using the source frequency f of DP during each of the multiple specified phase periods CY within the multiple waveform periods [2]. Furthermore, in the case of the feedback process in the second embodiment, the power control unit can determine the second feedback period P by interpolating the source frequency f used by DP during the multiple specified phase periods. F [2] The source frequency f of each phase period other than DP in each of the multiple waveform periods CY within the multiple specified phase periods. Alternatively, the power supply control unit can use the immediately preceding first feedback period P. F The source frequency used during multiple phase periods of PH in the final waveform period CY within [1] is used as the second feedback period P. F [2] The source frequency used by PH during the multiple phase periods of each of the multiple waveform periods CY.

[0122] The following is for reference Figure 12 and Figure 13 The multiple designated phase periods DP within the waveform period CY in the feedback processing of the second embodiment will be explained. Figure 12 and Figure 13 These are timing diagrams related to a power supply system of an exemplary implementation. For example... Figure 12 As shown, the number M of multiple specified phase periods DP within the waveform period CY is less than the number N of multiple phase periods PH within the waveform period CY. Furthermore, the number M of multiple specified phase periods DP within the waveform period CY is less than... Figure 12 In the example, it is 11, but the number M is not limited to 11.

[0123] The interval of DP during multiple specified phase periods within the waveform period CY can be set to be smaller in the intervals where the potential change of substrate W is large within the waveform period CY than in the intervals where the potential change of substrate W is small within the waveform period CY.

[0124] The phase of DP during multiple specified phase periods in the waveform period CY can be predetermined. For example... Figure 13 As shown, when the electrical bias EB includes a voltage pulse VP, the waveform period CY can include a first period P1, a second period P2, and a third period P3. The voltage pulse VP is OFF during the first period P1. The second period P2 follows the first period P1. The voltage pulse VP is ON during the second period P2. The third period P3 follows the second period P2. The voltage pulse VP is OFF during the third period P3.

[0125] In one implementation, the plurality of designated phase periods DP can be predetermined such that the intervals in their second period P2 are smaller than the intervals in their respective first periods P1 and third periods P3 of the plurality of designated phase periods DP. In this case, during the second period P2 when the substrate potential changes significantly, the source frequency f can be adjusted in a way that more effectively suppresses the reflection of the source high-frequency power HF.

[0126] In one implementation, the interval in the third period P3 of the plurality of specified phase periods DP can be the same as or smaller than the interval in the first period P1 of the plurality of specified phase periods DP. When the interval in the third period P3 of the plurality of specified phase periods DP is smaller than the interval in the first period P1 of the plurality of specified phase periods DP, the source frequency f can be adjusted in a way that more effectively suppresses the reflection of the source high-frequency power HF immediately after the voltage pulse VP switches from the ON state to the OFF state.

[0127] In one embodiment, the second period P2 may include a first sub-period SP1, a second sub-period SP2, and a third sub-period SP3. The first sub-period SP1 immediately follows the first period P1. In the first sub-period SP1, the voltage level of the voltage pulse VP changes negatively from its reference voltage level (e.g., 0V) to a set voltage level. The second sub-period SP2 follows the first sub-period SP1. In the second sub-period SP2, the voltage level of the voltage pulse VP changes from its set voltage level to the reference voltage level. The intervals of the multiple designated phase periods DP in each of the first sub-period SP1, second sub-period SP2, and third sub-period SP3 may be the same or different.

[0128] In one implementation, multiple designated phase periods DP can be predetermined based on the source frequency f used by each phase period PH within the waveform period CY, obtained by performing the aforementioned feedback processing on each phase period PH in the sequence CYS of the waveform period CY. Specifically, it can be that the nth phase period PH within the waveform period CY... n The source frequency f[n] and the (nu)th phase period PH within the waveform period CY n-u The absolute value of the difference between the source frequency f[nu] and the period PH of the source frequency f[n] and the (n+u)th phase within the waveform period CY. n+u When the absolute value of the difference between the source frequencies f[n+u] and f[n+u] is greater than a specified value, and both the source frequencies f[nu] and f[n+u] are greater than or less than the source frequency f[n], the phase period PH is adjusted accordingly. nIn addition, multiple specified phase periods DP are pre-selected from multiple phase periods PH.

[0129] Furthermore, the multiple designated phase periods DP can be determined by calculations by the power supply control unit. In one embodiment, during the preparation period, the power supply control unit obtains a sequence of source frequencies f used for multiple phase periods PH within the waveform period CY, obtained by performing the aforementioned feedback processing on each phase period PH in the sequence CYS of the waveform period CY. The power supply control unit determines the multiple designated phase periods DP such that: in the sequence of source frequencies f obtained by smoothing the sequence of source frequencies f, the interval between the multiple designated phase periods DP is smaller in the range where the change in source frequency f is greater.

[0130] In one embodiment, the power control unit can acquire the voltage waveform of the electrical bias EB. In this embodiment, the power control unit may determine the first period P1, the second period P2, and the third period P3 as described above based on the acquired voltage waveform, and set the interval of the plurality of designated phase periods DP in each of the first period P1, the second period P2, and the third period P3 as described above.

[0131] Hereinafter, several embodiments of adjusting the source frequency f implemented by the power control unit in the method MT by shifting and / or scaling (hereinafter referred to as "SS processing") will be described.

[0132] In SS processing, such as Figure 5 In the case where the high-frequency power HF and electrical bias EB are supplied simultaneously and continuously as shown in (a), the sequence CYS consists of multiple waveform periods CY that are repeated continuously. Furthermore, in SS processing, as shown in... Figure 5 In the case where pulses of source high-frequency power HF and electrical bias EB are supplied synchronously as shown in (b), the sequence CYS is composed of waveform periods CY of the same order in each of the multiple pulse periods PP. Alternatively, in the SS processing, for each of the first to K1th waveform periods CY of each of the multiple pulse periods PP, the waveform periods CY of the same order in each of the multiple pulse periods PP form the sequence CYS; furthermore, for each of the (K1+1)th to the last waveform periods CY of each of the multiple pulse periods PP, the source frequency of each phase period of the K1th waveform period CY is used in the same phase period in each of the multiple pulse periods PP. The SS processing applied to each sequence CYS is described below.

[0133] In the method MT that includes SS processing, firstly, in process STa, the power control unit processes a predetermined frequency time series, i.e., the basic time series TS. B The time series of the source frequency f within the waveform period CY is used to supply source high-frequency power HF from high-frequency power source 41. The time series of source frequency f contains multiple frequencies, which are used as the frequencies of the source high-frequency power HF for each phase period PH within the waveform period CY. Basic time series TS B It was prepared in advance. Basic time series (TS) B This can be determined by performing the first or second feedback process described above beforehand.

[0134] In addition, through processes STb to STf, the degree of reflection R in the waveform period CY is obtained. D In SS processing, the degree of reflection R D Multiple digital values ​​V from the waveform period CY D Representative values, such as the average, of the multiple evaluation values ​​obtained.

[0135] Next, in process STg, the power control unit adjusts the time series of the source frequency f and creates the time series TS after the source frequency f is changed. M Then, in process STa, the power control unit supplies source high-frequency power HF from high-frequency power supply 41, which has a time sequence TS. M Multiple frequencies are used as the source frequencies f of the multiple phase periods PH within the subsequent waveform period CY in the sequence CYS. Then, steps STb to STg are performed again. In the method MT including SS processing, steps STa to STg are repeated to reduce the degree of reflection R in the waveform period CY in the sequence CYS. D .

[0136] In process STg, as a time series TS M You can use time series TS1, TS2, or TS3. Time series TS1 is derived from the basic time series TS. B A time series with frequencies obtained by assigning a phase offset relative to the waveform period CY. Time series TS2 is a time series that makes the basic time series TS... B A time series whose frequencies are scaled (i.e., magnified or reduced) in the frequency direction. Time series TS3 is a subset of the basic time series TS. B A time series of frequencies with the same number of frequencies. Time series TS3 is a basic time series TS that is scaled (enlarged or reduced) in the time direction. B The time series of frequencies obtained from two or more of the multiple time zones.

[0137] The following are some examples of the MT method that includes SS processing.

[0138] [First example] Reference Figure 14 and Figure 15 The first example of the method MT that includes SS processing, namely the first example of the control method (hereinafter referred to as "method MTA"), will be described. Figure 14 This is a flowchart illustrating the control method in the first example. Figure 15 It is used for explanation Figure 14 The diagram shows the control method for the first example. Figure 15 In the diagram, the horizontal axis represents time, and the vertical axis represents the electrical bias EB and the source frequency f. Figure 15 An example of the waveform of the electrical bias EB within the waveform period CY is shown. Additionally, in... Figure 15 The diagram shows the basic time series TS used for the source frequency f of PH during the multiple phase periods within the waveform period CY. B and the modified time series TS M In the MTA method, the modified time series TS M The time series TS1 mentioned above is used.

[0139] The MTA method is applicable to all CYS sequences. For example... Figure 14 As shown, method MTA begins with step STAa1. Step STAa1 corresponds to step STa. In step STAa1, the power control unit supplies source high-frequency power HF from high-frequency power source 41, which has a basic time sequence TS. B The multiple frequencies are used as the source frequencies f for each phase period PH within the waveform period CY. Furthermore, regarding method MT, as described above, step STb can also be performed in method MTA.

[0140] Next, process STAf1 is performed. Process STAf1 corresponds to processes STc to STf. In process STAf1, the degree of reflection R in the waveform period CY is obtained. D .

[0141] Next, process STAG1 is performed. Process STAG1 corresponds to process STg. In process STAG1, the power control unit prepares the basic time sequence TS for the waveform period CY. B The time series TS obtained by assigning a phase offset M .

[0142] Next, process STAa2 is performed. Process STAa2 corresponds to process STa. In process STAa2, the power control unit supplies source high-frequency power HF from high-frequency power supply 41, and this source high-frequency power HF has a time sequence TS. M The multiple frequencies are used as the source frequencies f for each phase period PH within the waveform period CY.

[0143] Next, proceed to step STAf2. In step STAf2, similar to step STAf1, the degree of reflection R in the waveform period CY is obtained. D .

[0144] Next, process STAJ1 is performed. Process STAJ1 corresponds to process STJ. The determination in process STAJ1 can be performed by the power control unit. In process STAJ1, if the stop condition is not met, process STAJ2 is performed.

[0145] In process STAJ2, the degree R of reflection obtained in process STAf2 is determined. D Is it below a specified value? The determination in process STAJ2 can be performed by the power control unit. The degree of reflection R. D The values ​​below the specified values ​​indicate a good matching condition. The degree of reflection, R, is determined in process STAJ2. D If the value is below the specified value, the process starting from step STAa2 is repeated. On the other hand, the degree of reflection R determined in step STAJ2 is... D If the value is greater than the specified value, proceed to process STAJ3.

[0146] In process STAJ3, the degree of reflection R in the waveform period CY obtained in process STAf2 will be determined. D The degree of reflection R obtained just before the processing of the sequence CYS. D By comparing them, the degree of reflection R is determined. D Whether there is improvement, i.e., the degree of reflection R D Whether to reduce. The determination in process STAJ3 is made by the power control unit. In process STAJ3, the degree of reflection R is determined. D If the situation is improved, proceed to process STAG2. On the other hand, in process STAJ3, the degree of reflection R is determined. D If no improvement is made, proceed to process STAG3.

[0147] Step STAg2 corresponds to step STg. Step STAg2 can be performed by the power control unit. In step STAg2, the phase offset is changed in the same direction as the phase offset previously used in the processing of sequence CYS. If the phase offset previously used in the processing of sequence CYS has increased compared to the previously used phase offset, then in step STAg2, as follows... Figure 15 As indicated by the rightward arrow, the phase offset is increased. In the processing of the CYS sequence, where the previously used phase offset was reduced compared to its previous use, the phase offset is reduced in step STAG2. Then, preparation is made by processing the basic time series TS. B The time series TS obtained by applying the changed phase offset M Then, the time series TS prepared in process STAG2 is used. M Then proceed to process STAa2 again.

[0148] Step STAG3 corresponds to step STg. Step STAG3 can be performed by the power control unit. In step STAG3, the phase offset is changed in the opposite direction to the phase offset previously used in the processing of sequence CYS. If the previously used phase offset has increased relative to the previously used phase offset, in step STAG3, as follows... Figure 15 As indicated by the leftward arrow, the phase offset is reduced. In the processing of the CYS sequence, where the previously used phase offset was reduced compared to its previous use, the phase offset is increased in step STAG3. Then, preparation is made by processing the basic time series TS. B The time series TS obtained by applying the changed phase offset M Then, process STAa2 is performed again. That is, the time series TS prepared in process STAg3 is used. M Then proceed to process STAa2 again.

[0149] The method MTA ends when the stopping condition is met in process STJ1.

[0150] [Second Example] The following is for reference Figures 16-20 The second example of the method MT that includes SS processing, namely the control method of the second example (hereinafter referred to as "method MTB"), will be described. Figure 16 This is a flowchart illustrating the control method in the second example. Figures 17-20 These are for explanation Figure 16 The diagram shows the control method for the second example. Figures 17-20In the various graphs, the horizontal axis represents time, and the vertical axis represents the electrical bias EB and the source frequency f. Figures 17-20 Examples of the electrical bias EB waveforms within the waveform period CY are shown. Additionally, Figures 17-20 The basic time series TS is shown, which is used for the source frequency f of PH during the multiple phase periods within the waveform period CY. B and the modified time series TS M In the method MTB, the modified time series TS M The time series TS2 mentioned above is used.

[0151] The MTB method is applicable to all CYS sequences. For example... Figure 16 As shown, method MTB begins with operation STBa1. Operation STBa1 is the same operation as operation STAa1. Next, operation STBf1 is performed. Operation STBf1 is the same operation as operation STAf1.

[0152] Next, process STBg1 is performed. Process STBg1 corresponds to process STg. In process STBg1, the power control unit prepares to make the basic time sequence TS B The time series TS obtained by scaling (i.e., enlarging or shrinking) in the frequency direction. M .

[0153] like Figure 17 As shown, the time series TS prepared in process STBg1 M This can be achieved by maintaining the basic time series TS B The lowest frequency f in min And scale the basic time series TS in the frequency direction B The resulting time series. In the following explanation, it will be as follows: Figure 17 The altered time series shown is called time series TS21. Figure 18 As shown, the time series TS prepared in process STBg1 M This can be achieved by maintaining the basic time series TS B The highest frequency f in max And scale the basic time series TS in the frequency direction B The resulting time series. In the following explanation, it will be as follows: Figure 18 The altered time series shown is called time series TS22. (See figure.) Figure 19 As shown, the time series TS prepared in process STBg1 M This can be achieved through the basic time series TS B Maintain a specified frequency f sp The following frequencies and scaling of the basic time series TS in the frequency direction BThe resulting time series. In the following explanation, it will be as follows: Figure 19 The altered time series shown is called time series TS23. (As shown...) Figure 20 As shown, the time series TS prepared in process STBg1 M This can be achieved through the basic time series TS B Maintain a specified frequency f sp The above frequencies and scaling of the basic time series TS in the frequency direction B The resulting time series. In the following explanation, it will be as follows: Figure 20 The modified time series shown is called time series TS24. In process STBg1, one of the time series TS21~TS24 is used as time series TS. M Let's get ready.

[0154] Next, process STBa2 is performed. Process STBa2 corresponds to process STa. In process STBa2, the power control unit supplies source high-frequency power HF from high-frequency power supply 41, and this source high-frequency power HF has a time sequence TS. M The multiple frequencies are used as the source frequencies f for each phase period PH within the waveform period CY.

[0155] Next, proceed to step STBf2. In step STBf2, similar to step STBf1, the degree of reflection R in the waveform period CY is obtained. D .

[0156] Next, process STBJ is performed. The determination in process STBJ can be performed by the power control unit. In process STBJ, for example, the stopping condition is met if the cycle including process STBa2 has been performed a specified number of times.

[0157] In process STBJ, if the stopping condition is not met, process STBg2 is performed. Process STBg2 corresponds to process STg. Process STBg2 can be performed by the power control unit. In process STBg2, for the basic time series TS... B The scaling factor in the frequency direction is as follows Figures 17-20 The changes are made as shown by the middle arrow, thereby preparing the time series TS. M Time series (TS) M Prepared by the power control unit. Then, the time series TS prepared in process STBg2 is used. MThen, proceed with step STBa2 again. That is, in method MTB, repeat the loop containing step STBa2. During the repetition of the loop containing step STBa2, any one of the time series TS21~TS24 can be used, changing the scaling factor. During the repetition of the loop containing step STBa2, the scaling factor can be changed while using time series TS21~TS24 sequentially. In step STBJ, when the stopping condition is determined to be met, proceed with step STBh.

[0158] In process STBh, based on the degree R of the obtained multiple reflections... D To select the degree of improvement in reflection R D That is, the degree to which reflection is minimized (R) D Time series TS M (First time sequence). The power control unit supplies source high-frequency power HF from high-frequency power supply 41, which has a selected time sequence TS. M The multiple frequencies included serve as the source frequencies f of the multiple phase periods PH within the waveform period CY. After step STBh, method MTB can end. Alternatively, step STBi can be performed after step STBh. In step STBi, the time series TS selected in step STBh will be... M Used as the basic time series for the MTA method.

[0159] [Third Case] The following is for reference Figure 21 and Figure 22 This describes the third example of the method MT that includes SS processing, namely the control method of the third example (hereinafter referred to as "method MTC"). Figure 21 This is a flowchart illustrating the control method in the third example. Figure 22 It is used for explanation Figure 21 The diagram shows the control method for the third example. Figure 22 In the diagram, the horizontal axis represents time, and the vertical axis represents the electrical bias EB and the source frequency f. Figure 22 An example of the waveform of the electrical bias EB within the waveform period CY is shown. Additionally, in... Figure 22 The diagram shows the basic time series used as the source frequency f for each of the multiple phase periods PH within the waveform period CY. In the MTC method, the modified time series TS... M The time series TS3 mentioned above is used.

[0160] The MTC method is applicable to all CYS sequences. For example... Figure 21 As shown, the MTC method can begin with step STCp1. In step STCp1, the basic time series TS is used. BThe method MTA is performed. Next, step STCp2 can be performed. In step STCp2, the degree R of multiple reflections obtained in step STCp1 is... D To determine the degree of reflection improvement R among multiple time series used in process STCp1. D That is, the degree to which reflection is minimized (R) D Time series TS M (First time series) and select it as the basic time series.

[0161] Next, step STCp3 can be performed. In step STCp3, the basic time series selected in step STCp2 is used for method MTB. Next, step STCp4 can be performed. In step STCp4, the degree R of multiple reflections obtained in step STCp3 is used... D To determine the degree of reflection improvement R among multiple time series used in process STCp3. D That is, the degree to which reflection is minimized (R) D Time series TS M (Second time series) and select it as the basic time series.

[0162] Next, step STCg1 is executed. Step STCg1 corresponds to step STg. In step STCg1, the power control unit scales (enlarges or reduces) two or more time zones of the basic time series selected in step STCp4 in the time direction, preparing data containing the basic time series TS. B Time series TS with the same number of frequencies changed M Alternatively, processes STCp1 to STCp4 can be omitted, while processes STAa1 and STAf1 of method MTA can be performed, and in process STCg1, the basic time series TS can be used. B Prepare time series TS M .

[0163] like Figure 22 As shown, multiple time zones can encompass zones Z1 to Z6. To determine zones Z1 to Z6, the lowest frequency f of the basic time series used in process STCg1 is determined. min highest frequency f max and average frequency f ave Furthermore, determine the lowest frequency f contained in the basic time series. min With the maximum frequency f max The difference, i.e., the frequency bandwidth. Furthermore, it will be compared with the frequency from the minimum frequency f. min From start to minimum frequency f min The time zone corresponding to the range up to 10% of the frequency width is determined as zone Z2. Furthermore, it will be related to the range from the maximum frequency f...max The value obtained by subtracting 10% of the frequency width starts from the maximum frequency f. max The time zone corresponding to the current range is designated as zone Z5. Additionally, the time zone from the start of waveform period CY to the start of zone Z2 is designated as zone Z1. Furthermore, the time zone from the end of zone Z2 to the time zone corresponding to the average frequency f is designated as zone Z1. ave The time zone up to the corresponding moment is determined to be zone Z3. Furthermore, it will be determined from the average frequency f... ave The time zone from the start of the corresponding moment to the start of zone Z5 is designated as zone Z4. Additionally, the time zone from the end of zone Z5 to the end of waveform period CY is designated as zone Z6.

[0164] In process STCg1, the region Z2 of the basic time series can be expanded in the time direction. Furthermore, it can be used to generate a region containing the basic time series TS. B Time series TS with the same number of frequencies changed M The regions Z1 and Z3 of the basic time series are reduced in the time direction.

[0165] Next, process STCa is performed. Process STCa corresponds to process STa. In process STCa, the power control unit supplies source high-frequency power HF from high-frequency power supply 41. This source high-frequency power HF has a time sequence TS. M The multiple frequencies are used as the source frequencies f for each phase period PH within the waveform period CY.

[0166] Next, process STCf is performed. In process STCf, similar to process STAF1, the degree of reflection R in the waveform period CY is obtained. D .

[0167] Next, process STCJ is performed. Process STCJ corresponds to process STJ. The determination in process STCJ can be performed by the power control unit. In process STCJ, for example, the stopping condition is met if the cycle including process STCa has been performed a specified number of times.

[0168] In process STCJ1, if the stopping condition is not met, process STCg2 is performed. Process STCg2 corresponds to process STg. Process STCg2 can be performed by the power control unit. In process STCg2, the scaling factor in the time direction of two or more time zones of the basic time series is changed. Through process STCg2, the time series TS is prepared. M Then, the time series TS prepared in process STCg2 is used. MThen, process STCa is performed again. That is, the cycle containing process STCa is repeated. On the other hand, in process STCJ, when it is determined that the stopping condition is met, process STCh, which will be described later, is performed.

[0169] In the repetition of the cycle containing process STCa, the scaling factor of region Z2 in the time direction can be changed, and similarly to process STCg1, region Z2 of the basic time series is magnified in the time direction, while regions Z1 and Z3 of the basic time series are reduced in the time direction. This process is performed until the degree R of reflection obtained in process STCf is obtained. D The degree of reflection is judged as R D Until no further improvements are made.

[0170] Next, in the repetition of the cycle containing process STCa, the scaling factor of region Z5 in the time direction can be changed, and region Z5 of the basic time series can be expanded in the time direction, while regions Z4 and Z6 of the basic time series can be reduced in the time direction. This process is performed until the degree R of reflection obtained in process STCf is obtained. D The degree of reflection, R D Until no further improvements are made.

[0171] In process STCh, the degree R of multiple reflections obtained in the repetition of the cycle containing process STCa is used. D Determine the degree of improvement in reflection R. D That is, the degree to which reflection is minimized (R) D Time series TS M The third time series is selected as the third time series. The selection of the third time series in process STCh is performed by the power control unit. Furthermore, the power control unit uses multiple frequencies contained in the selected time series (the third time series) as the source frequencies f for each phase period PH within the waveform period CY. Additionally, the third time series can be used as the basic time series to repeat the processing starting from process STCp1.

[0172] As explained above, in plasma processing apparatus 1, the time sequence of the source frequency f in the waveform period CY is processed according to the degree of reflection R. D Instead, the time series is changed to TS1, TS2, or TS3 to improve the degree of reflection R. D These time series are based on the basic time series TS. B It is easily obtained. Therefore, it is possible to easily suppress the reflection of the source high-frequency electric HF used to generate plasma.

[0173] The following describes several other examples of sensor 45. In other examples, the sensor signal SS acquired by sensor 45 may include not only the voltage signal VS of the reflected wave from the source high-frequency power HF, but also the voltage signal of the traveling wave from the source high-frequency power HF. In this case, an envelope signal is also obtained from the voltage signal of the traveling wave in detector 51, and multiple digital values ​​are obtained in A / D converter 52. In this case, the power control unit can use the multiple digital values ​​obtained from the voltage signal VS of the reflected wave and the multiple digital values ​​obtained from the voltage signal of the traveling wave to calculate the reflectivity, i.e., (power level of the reflected wave) / (power level of the traveling wave), as the degree of reflection R. D .

[0174] In other examples, sensor 45 may include a voltage sensor and a current sensor. In this example, sensor 45 is configured to measure the voltage V in the power supply path that connects the high-frequency power supply 41 to the high-frequency electrodes. HF and current I HF In this case, the sensor signal SS can be represented according to the voltage V. HF and current I HF The impedance Z of the load of the determined high-frequency power supply 41 L The signal, representing voltage V HF With current I HF The signal representing the phase difference θ between them, or the signal representing the voltage V. HF and current I HF The signal determines the reflection coefficient Γ. In this example, the power control unit can also use multiple digital values ​​obtained from the sensor signal SS via detector 51 and A / D converter 52 to determine the degree of reflection R. D Furthermore, the degree of reflection R D It can be the impedance Z in the waveform period CY or in each of the multiple phases PH. L A representative value (e.g., average value) of the difference between the characteristic impedance (e.g., 50Ω) and the characteristic impedance (e.g., 50Ω). Alternatively, the degree of reflection R. D This could be a representative value (e.g., an average value) of the phase difference θ within each of the waveform period CY or multiple phases PH. Alternatively, it could be the degree of reflection R. D It can be a representative value (e.g., average value) of the reflection coefficient Γ in each of the waveform period CY or multiple phase periods PH.

[0175] Hereinafter, examples of processing circuits that can be used as one or more processing circuits in a plasma processing apparatus 1, such as a control unit 2 and / or a power control unit, will be described. Figure 23 This is a block diagram of a processing circuit that performs the actions described in this specification on a computer. Figure 23The diagram illustrates a processing circuit 130 capable of controlling control processes on any computer. The flowchart's descriptions or function blocks represent portions of modules, segments, or code containing one or more executable instructions for implementing specific logical functions or steps of the processing. As will be understood by those skilled in the art, other embodiments having functions capable of being executed in a sequence different from that shown or described, such as substantially simultaneous or in the reverse order, are included within the scope of the exemplary embodiments of this disclosure, depending on the associated functions. The various elements, features, and processes described in this specification can be used independently of each other or combined in various ways. Any combination and partial combination that can be conceived can be included within the scope of this disclosure.

[0176] exist Figure 23 In this embodiment, the processing circuit 130 includes a CPU 1200 that implements one or more control processes described above / below. Processing data and commands can be stored in the memory 1202. These processing data and commands can also be stored on a storage medium 1204 such as a hard disk drive (HDD) or portable storage medium, or they can be stored remotely. Furthermore, the present disclosure as described in the claims is not limited to the form of a computer-readable medium storing the processing commands of this invention. For example, these commands can also be stored on any other information processing device such as a CD, DVD, flash memory, RAM, ROM, PROM, EPROM, EEPROM, hard disk, or a server and / or computer that communicates with the processing circuit 130.

[0177] Furthermore, the present disclosure described in the claims can be provided as a utility program, a background daemon, a component of an operating system, or a combination thereof, and can also be executed in conjunction with CPU 1200 and operating systems known to those skilled in the art such as Microsoft Windows (registered trademark), UNIX (registered trademark), Solaris (registered trademark), LINUX (registered trademark), and Apple MAC-OS.

[0178] The hardware elements for constructing the processing circuit 130 can be implemented using various circuit elements. Furthermore, the functions of each of the above-described embodiments can be implemented using a circuit that includes one or more processing circuits. For example... Figure 23 As shown, the processing circuit includes a processing device that executes a specific program, such as a processing unit (CPU) 1200. The processing circuit also includes application-specific integrated circuits (ASICs), conventional circuit components configured to perform the described functions, and other devices.

[0179] exist Figure 23In this embodiment, the processing circuit 130 includes a CPU 1200 that performs the aforementioned processing. The processing circuit 130 may be a general-purpose computer or a specific dedicated machine. In one embodiment, when the processing device 1200 is programmed to control the plasma generation unit 12 and the gas supply unit 20, and / or to control the various parts of the plasma processing device 1 in the aforementioned adjustment of the source frequency f, the processing circuit 130 functions as a specific dedicated machine.

[0180] Alternatively, as those skilled in the art will understand, the CPU 1200 may also be implemented using an FPGA, ASIC, PLD, and / or discrete logic circuits. Furthermore, the CPU 1200 may also be implemented as multiple processing devices that cooperate in a manner that executes the processes of the present invention described above in parallel.

[0181] Figure 23 The processing circuitry 130 also includes a network controller 1206 for interface connection with network 1228, such as an Intel Ethernet PRO network interface card from Intel Corporation. As will be understood, network 1228 can be a public network such as the Internet, a private network such as a LAN or WAN, or any combination thereof. It may also include subnetworks such as PSTN or ISDN. Network 1228 can also be a wired network such as Ethernet, or a wireless network such as cellular networks including EDGE, 3G, or 4G wireless cellular systems. The wireless network can also be Wi-Fi, Bluetooth (registered trademark), or any other known form of wireless communication.

[0182] The processing circuitry 130 also includes a display device controller 1208 for interface connection with display devices 1210 such as monitors, graphics cards, and graphics adapters. A general-purpose I / O interface 1212 interfaces with a keyboard and / or mouse 1214, and a touch panel 1216 integrated with or separate from the display device 1210. The general-purpose I / O interface also connects to various peripheral devices 1218 such as printers and scanners.

[0183] The storage device controller 1224 is connected to the storage medium disk 1204 via communication buses 1226 such as ISA, EISA, VESA, and PCI. All components of the processing circuit 130 are interconnected. General features and functions of the display device 1210, keyboard and / or mouse 1214, display device controller 1208, storage device controller 1224, network controller 1206, sound controller 1220, and general-purpose I / O interface 1212 are assumed to be known in this specification for simplicity and are omitted from description.

[0184] The exemplary circuit elements described in this disclosure can be substituted with other elements and may have a different configuration than the examples described in this specification. Furthermore, circuits configured to implement the features described in this specification can be implemented using multiple circuit units (e.g., chips), or these features can be incorporated into the circuitry of a single chipset.

[0185] The functions and features described in this specification can also be performed by various components distributed across the system. For example, more than one processing device may perform the functions of the system, in which case the processing device is distributed across multiple components communicating within the network. As components of the distributed configuration, in addition to various human-machine interfaces and communication devices (display monitors, smartphones, tablets, personal digital assistants (PDAs), etc.), more than one client device and server device capable of sharing processing may also be included. The network can be a private network such as a LAN or WAN, or a public network such as the Internet. Input to the system can be received by direct user input, or remotely in real time or as batch processing. Furthermore, a portion of the embodiments may be implemented on modules or hardware different from those described above. Therefore, other embodiments are also included in the claims.

[0186] The above descriptions have illustrated various exemplary embodiments, but the embodiments are not limited to these exemplary embodiments. Various additions, omissions, substitutions, and modifications are possible. Furthermore, elements from different embodiments can be combined to form other embodiments.

[0187] As can be seen from the above description, various embodiments of this disclosure have been described in this specification for illustrative purposes, and various modifications can be made without departing from the scope and spirit of this disclosure. Therefore, the various embodiments disclosed in this specification are not intended to be limiting, and the true scope and spirit are shown in the appended claims.

[0188] Explanation of reference numerals in the attached figures 1…Plasma processing device, 10…Cavity, 30S…Power supply system, 41…High frequency power supply, 42…Bias power supply, 45…Sensor, 51…Detector, 52…A / D converter.

Claims

1. A plasma processing device, have: chamber; The substrate support portion within the cavity; A high-frequency power supply is configured to supply high-frequency power for generating plasma from the gas within the chamber; The bias power supply is configured to supply electrical bias to the substrate support in order to introduce ions from the plasma to the substrate on the substrate support. The sensor is configured to acquire a sensor signal reflecting the degree of reflection of the source high-frequency power; The detector is configured to detect the envelope signal of the sensor signal; An A / D converter configured to perform A / D conversion on the envelope signal output from the detector; and The power control unit is configured to control the high-frequency power supply. The power control unit is configured to adjust the source frequency of the high-frequency power used in each of the multiple phase periods, corresponding to the degree of reflection in the waveform period determined by the A / D converter from the envelope signal based on multiple digital values ​​in the waveform period of the electrical bias, or the degree of reflection in each of the multiple phase periods that divide the waveform period, so as to reduce the degree of reflection in subsequent waveform periods of the electrical bias. The sampling frequency of the A / D converter is more than twice the product of the bias frequency and the number of the plurality of phase periods within the waveform period, which is the reciprocal of the duration of the waveform period, and is below the minimum frequency of the source frequency that the high-frequency power supply can adjust.

2. The plasma processing apparatus as described in claim 1, The detector includes: Detection circuit; An attenuator and a first filter connected between the sensor and the detection circuit; and A second filter and amplifier connected between the detector circuit and the A / D converter The detection circuit is configured to detect a first envelope signal from a first signal generated by the attenuation of the sensor signal in the attenuator and the filtering in the first filter. The detector is configured to output a second envelope signal, generated by filtering the first envelope signal in the second filter and amplifying it in the amplifier, to the A / D converter.

3. The plasma processing apparatus as described in claim 2, The upper cutoff frequency of the first filter is above the maximum frequency of the source frequency that the high-frequency power supply can adjust, and less than twice the minimum frequency. The lower cutoff frequency of the first filter is below the minimum frequency.

4. The plasma processing apparatus as described in claim 3, The second filter is a low-pass filter. The upper cutoff frequency of the second filter has a value between the product of the bias frequency and the number of the plurality of phase periods within the waveform period and the upper cutoff frequency of the first filter.

5. The plasma processing apparatus as described in claim 4, The upper cutoff frequency of the second filter is below the minimum frequency.

6. The plasma processing apparatus as described in any one of claims 1 to 5, The sensor is a directional coupler. The sensor signal is the voltage signal of the reflected wave of the source high-frequency power.

7. A power supply system, have: The high-frequency power supply is configured to supply high-frequency power to generate plasma from the gas inside the plasma processing device. The bias power supply is configured to supply electrical bias to the substrate support for introducing ions from the plasma into the substrate on the substrate support within the chamber. The sensor is configured to acquire a sensor signal reflecting the degree of reflection of the source high-frequency power; The detector is configured to detect the envelope signal of the sensor signal; An A / D converter configured to perform A / D conversion on the envelope signal output from the detector; and The power control unit is configured to control the high-frequency power supply. The power control unit is configured to adjust the source frequency of the high-frequency power used in each of the multiple phase periods, corresponding to the degree of reflection in the waveform period determined by the A / D converter from the envelope signal based on multiple digital values ​​in the waveform period of the electrical bias, or the degree of reflection in each of the multiple phase periods that divide the waveform period, so as to reduce the degree of reflection in subsequent waveform periods of the electrical bias. The sampling frequency of the A / D converter is more than twice the product of the bias frequency and the number of the plurality of phase periods within the waveform period, which is the reciprocal of the duration of the waveform period, and is below the minimum frequency of the source frequency that the high-frequency power supply can adjust.

8. The power supply system as described in claim 7, The sensor is a directional coupler. The sensor signal is the voltage signal of the reflected wave of the source high-frequency power.

9. A control method, It includes the following processes: (a) High-frequency power is supplied from a high-frequency power source to generate plasma from the gas inside the plasma processing apparatus; (b) To introduce ions from the plasma into the substrate on the substrate support within the chamber, an electrical bias is supplied from a bias power source to the substrate support. (c) Obtain a sensor signal in the sensor that reflects the degree of reflection of the high-frequency power from the source; (d) Detect the envelope signal of the sensor signal in the detector; (e) Perform A / D conversion on the envelope signal output from the detector in an A / D converter; (f) Determine the degree of reflection in the waveform period or the degree of reflection in each of the multiple phase periods that divide the waveform period based on a plurality of digital values ​​generated by the A / D converter from the envelope signal in the waveform period of the electrical bias; as well as (g) The power supply control unit adjusts the source frequency of the source high-frequency power used during each of the plurality of phase periods, corresponding to the degree of reflection determined in (f), so as to reduce the degree of reflection in the subsequent waveform period of the electrical bias. The sampling frequency of the A / D converter is more than twice the product of the bias frequency and the number of the plurality of phase periods within the waveform period, which is the reciprocal of the duration of the waveform period, and is below the minimum frequency of the source frequency that the high-frequency power supply can adjust.

10. The control method as described in claim 9, The sensor is a directional coupler. The sensor signal is the voltage signal of the reflected wave of the source high-frequency power.

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