Component for semiconductor manufacturing apparatus and method for regenerating the same

Abstract

A member (10) for a semiconductor manufacturing apparatus includes a first ceramic plate (21) having a wafer placement surface (26) on an upper surface, a second ceramic plate (22) disposed on a lower surface of the first ceramic plate (21), and a first amorphous layer (24) present between the first ceramic plate (21) and the second ceramic plate (22). The first ceramic plate (21) has a higher corrosion resistance than the second ceramic plate (22) and an alumina.

Description

Technical Field

[0001] This invention relates to components for semiconductor manufacturing apparatus and methods for regenerating them. Background Technology

[0002] Conventionally, components used in semiconductor manufacturing apparatuses include those that utilize plasma to perform CVD, etching, and other processes on wafers. As shown in Patent Document 1, a component with a ceramic insulating layer formed on the upper surface of a ceramic dielectric layer in which electrostatic electrodes are embedded is known as a component for such semiconductor manufacturing apparatuses. The ceramic insulating layer is formed, for example, from a CVD film, PVD film, AD film, or thermally sprayed film. The upper surface of the ceramic insulating layer has a wafer mounting surface. Alumina is an example of a material used for the ceramic insulating layer.

[0003] Existing technical documents Patent documents Patent Document 1: Japanese Patent No. 7214867 Summary of the Invention

[0004] The technical problem that the invention aims to solve However, alumina typically does not have high corrosion resistance, so sometimes the thickness of alumina ceramic insulating layers is reduced or grain boundaries are eroded due to corrosive gases, leading to the end of the lifespan of components used in semiconductor manufacturing devices. Additionally, sometimes the bonding strength between the ceramic insulating layer and the ceramic dielectric layer cannot be adequately achieved.

[0005] This invention was made to solve the above-mentioned technical problems, and its main purpose is to extend the life of the product and improve the bonding strength between ceramic plates.

[0006] Technical solutions for solving technical problems [1] The component for a semiconductor manufacturing apparatus of the present invention comprises: The first ceramic plate has a wafer mounting surface on its upper surface; A second ceramic plate is disposed on the lower surface of the first ceramic plate; and A first amorphous layer exists between the first ceramic plate and the second ceramic plate. The first ceramic plate has higher corrosion resistance than alumina and the second ceramic plate.

[0007] In this component for a semiconductor manufacturing apparatus, the first ceramic plate, which has a wafer mounting surface on its upper surface, exhibits higher corrosion resistance than the alumina and second ceramic plates. Therefore, the first ceramic plate can suppress thinning and grain boundary erosion caused by corrosive gases. Consequently, the product lifespan is extended. Furthermore, because a first amorphous layer exists between the first and second ceramic plates, the bonding strength between the two plates becomes relatively high.

[0008] In this specification, "up" and "down" do not indicate an absolute positional relationship, but rather a relative positional relationship. Therefore, depending on the orientation of the components used in the semiconductor manufacturing apparatus, "up" and "down" become "down" and "up," or "left" and "right," or "front" and "back."

[0009] [2] In the semiconductor manufacturing apparatus component of the present invention (the semiconductor manufacturing apparatus component described in [1]), the first ceramic plate may contain at least one selected from magnesium aluminum oxynitride, Y2O3 and TaZrO2, and the second ceramic plate may contain Al2O3.

[0010] [3] In the semiconductor manufacturing apparatus component of the present invention (the semiconductor manufacturing apparatus component described in [2]), the first ceramic plate may be formed of a material with magnesium aluminum oxynitride as the main phase, the distance between the wafer adsorption surface and the adsorption electrode may be 0.33 mm or less, and the distance between the adsorption electrode and the upper surface of the second ceramic plate may be 0.17 mm or more. In this way, the adsorption force of the semiconductor manufacturing apparatus component can be greater than or equal to the adsorption force of the conventional product (a semiconductor manufacturing apparatus component in which the adsorption electrode and the wafer adsorption surface are made of alumina).

[0011] [4] The semiconductor manufacturing apparatus component of the present invention (the semiconductor manufacturing apparatus component described in any one of [1] to [3]) may include a semiconductor manufacturing apparatus component, the semiconductor manufacturing apparatus component comprising: a first modified layer present in the first ceramic plate on the side in contact with the first amorphous layer; and a second modified layer present in the second ceramic plate on the side in contact with the first amorphous layer.

[0012] [5] The semiconductor manufacturing apparatus component of the present invention (the semiconductor manufacturing apparatus component described in any one of [1] to [4]) may include: a third ceramic plate disposed on the lower surface of the second ceramic plate; and a second amorphous layer existing between the second ceramic plate and the third ceramic plate. In this case, the third ceramic plate may be formed of a material with a higher thermal conductivity than the second ceramic plate, or it may be formed of a material with a lower purity than the second ceramic plate.

[0013] [6] In the semiconductor manufacturing apparatus component of the present invention (the semiconductor manufacturing apparatus component described in [5]), a refrigerant flow path for refrigerant to flow or a gas flow path for supplying gas to the wafer mounting surface may be provided at a position in the second ceramic plate facing the second amorphous layer or at a position in the third ceramic plate facing the second amorphous layer.

[0014] [7] The semiconductor manufacturing apparatus component of the present invention (the semiconductor manufacturing apparatus component described in [5] or [6]) may include: a third modified layer, which exists in the second ceramic plate on the side in contact with the second amorphous layer; and a fourth modified layer, which exists in the third ceramic plate on the side in contact with the second amorphous layer.

[0015] [8] The method for regenerating components for a semiconductor manufacturing apparatus according to the present invention may include: (a) A process of processing the upper surface of the first ceramic plate of a component for a semiconductor manufacturing apparatus as described in any one of [1] to [7], thereby forming a processing surface on the first ceramic plate from which the wafer mounting surface has been removed; and (b) A process of further processing the processing surface to form a new wafer mounting surface.

[0016] [9] The method for regenerating components for a semiconductor manufacturing apparatus according to the present invention may include: (a) A process of processing the upper surface of the first ceramic plate of a component for a semiconductor manufacturing apparatus as described in any one of [1] to [7], thereby forming a processing surface on the first ceramic plate from which the wafer mounting surface has been removed; and (b) A process of directly bonding a recycled ceramic plate, which has a higher corrosion resistance than alumina and the second ceramic plate, to the processed surface.

[0017] In this case, the ceramic plate used for recycling in process (b) may not have a wafer mounting surface on its upper surface before direct bonding, but may have a wafer mounting surface formed on its upper surface after direct bonding; or it may directly bond a ceramic plate on which a wafer mounting surface has been formed on its upper surface before direct bonding.

[0018]

[10] The method for regenerating components for a semiconductor manufacturing apparatus according to the present invention may include: (a) A process of processing the first ceramic plate of a component for a semiconductor manufacturing apparatus as described in any one of [1] to [7], removing it to expose the second ceramic plate, and forming a processed surface on the second ceramic plate; and (b) A process of directly bonding a recycled ceramic plate, which has a higher corrosion resistance than alumina and the second ceramic plate, to the processed surface.

[0019] In this case, the ceramic plate used for recycling in process (b) may not have a wafer mounting surface on its upper surface before direct bonding, but may have a wafer mounting surface formed on its upper surface after direct bonding; or it may directly bond a ceramic plate on which a wafer mounting surface has been formed on its upper surface before direct bonding. Attached Figure Description

[0020] Figure 1This is a top view of component 10 for a semiconductor manufacturing apparatus.

[0021] Figure 2 yes Figure 1 AA section diagram.

[0022] Figure 3 yes Figure 2 A magnified view of a portion of the image.

[0023] Figure 4 This is an explanatory diagram of the grinding device 50.

[0024] Figure 5 This is a cross-sectional view of a component 10 for a semiconductor manufacturing apparatus having a refrigerant flow path 70.

[0025] Figure 6 This is a cross-sectional view of a component 10 for a semiconductor manufacturing apparatus having a refrigerant flow path 70.

[0026] Figure 7 This is a cross-sectional view of a component 10 for a semiconductor manufacturing apparatus having a gas flow path 80.

[0027] Figure 8 This is a cross-sectional view of a component 10 for a semiconductor manufacturing apparatus having a gas flow path 80.

[0028] Figure 9 This is a diagram of the regeneration process of component 10 for semiconductor manufacturing equipment.

[0029] Figure 10 This is a diagram of the regeneration process of component 10 for semiconductor manufacturing equipment.

[0030] Figure 11 This is a diagram of the regeneration process of component 10 for semiconductor manufacturing equipment. Detailed Implementation

[0031] Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. Figure 1 This is a top view of component 10 for a semiconductor manufacturing apparatus. Figure 2 yes Figure 1 AA section diagram, Figure 3 yes Figure 2 A magnified view of a portion of the image.

[0032] like Figure 2 As shown, the component 10 for a semiconductor manufacturing apparatus includes a ceramic plate laminate 20, a cooling plate 30, and an adhesive sheet 40.

[0033] The ceramic plate stack 20 is a three-layer ceramic disc. The ceramic plate stack 20 includes: a first ceramic plate 21 having a wafer mounting surface 26 on its upper surface; a second ceramic plate 22 disposed on the lower surface of the first ceramic plate 21; and a third ceramic plate 23 disposed on the lower surface of the second ceramic plate 22. A first amorphous layer 24 exists between the first ceramic plate 21 and the second ceramic plate 22, and a second amorphous layer 25 exists between the second ceramic plate 22 and the third ceramic plate 23. The first amorphous layer 24 exhibits a peak wider than that of the first ceramic plate 21 and the second ceramic plate 22 when XRD is measured, and the second amorphous layer 25 exhibits a peak wider than that of the second ceramic plate 22 and the third ceramic plate 23 when XRD is measured. In a cross-sectional magnified image of the ceramic plate stack 20 observed using a transmission electron microscope (TEM) at 4 millionx magnification, the first amorphous layer 24 and the second amorphous layer 25 are observed to be thin bands. The first amorphous layer 24 is sometimes formed as a single layer, but sometimes it is formed as multiple layers (e.g., three layers). The same applies to the second amorphous layer 25. To improve the bonding strength between the first ceramic plate 21 and the second ceramic plate 22, and between the second ceramic plate 22 and the third ceramic plate 23, the average thicknesses t1 and t2 of the first amorphous layer 24 and the second amorphous layer 25 are preferably 0.1 nm or more, more preferably 1 nm or more. Furthermore, to prevent the introduction of dissimilar materials, the average thicknesses t1 and t2 of the first amorphous layer 24 and the second amorphous layer 25 are preferably 30 nm or less, more preferably 20 nm or less. Therefore, the average thicknesses t1 and t2 of the first amorphous layer 24 and the second amorphous layer 25 are preferably, for example, 0.1 nm or more and 30 nm or less, more preferably 1 nm or more and 20 nm or less. When the first amorphous layer 24 is composed of multiple layers, the thickness of the first amorphous layer 24 refers to the total thickness of those multiple layers. The same applies to the second amorphous layer 25.

[0034] The average thicknesses t1 and t2 of the first amorphous layer 24 and the second amorphous layer 25 observed by TEM were determined according to the following steps. On a TEM image of one field of view (magnification: 4 millionx), the thicknesses of the first amorphous layer 24 and the second amorphous layer 25 were measured at 5 locations every 10 nm along the bonding interface, and the average thicknesses of the first amorphous layer 24 and the second amorphous layer 25 in one field of view were calculated. The same thickness measurements based on TEM observation were performed unbiasedly for five fields of view, including the vicinity of the center, the vicinity of the outer perimeter, and the vicinity of the radius when viewing the semiconductor manufacturing device component 10 from above. The average thickness t1 of the first amorphous layer 24 was then obtained by dividing the sum of the average thicknesses of the first amorphous layer 24 in the five fields of view by the number of fields of view, which is 5. Similarly, the average thickness t2 of the second amorphous layer 25 was obtained by dividing the sum of the average thicknesses of the second amorphous layer 25 in the five fields of view by the number of fields of view, which is 5.

[0035] The fact that the thin band-shaped portion observed by TEM is an amorphous layer can be confirmed as follows: when X-ray diffraction (XRD) patterns are obtained for the inner side and both outer sides (ceramic plates) of the thin band-shaped portion, a halo pattern with a width wider than that for the two outer sides is observed on the inner side of the thin band-shaped portion. Typically, if XRD diffraction patterns are measured separately for the two outer sides (ceramic plates) of the thin band-shaped portion, diffraction patterns corresponding to the crystal structure of the material constituting each ceramic plate are observed.

[0036] The upper surface of the first ceramic plate 21 becomes the wafer mounting surface 26 for mounting the wafer W. An annular sealing strip 26a is formed along the outer edge of the wafer mounting surface 26, and a plurality of small circular protrusions 26b are formed on the entire inner surface of the sealing strip 26a. The sealing strip 26a and the small circular protrusions 26b have the same height, for example, several... μ m ~ tens of 10 μ m (e.g., 50) μ The diameter of the small circular protrusion 26b is, for example, several hundred. μ m (e.g. 800) μ m). It should be noted that the portion of the wafer mounting surface 26 without the sealing strip 26a and the small circular protrusion 26b is referred to as the reference surface 26c. The corrosion resistance of the first ceramic plate 21 is higher than that of the alumina and the second ceramic plate 22. The corrosion resistance can be the resistance to halogen-based corrosive gases (e.g., at least one of NF3, CF4, ClF3, Cl2, BCl3, and HBr). For example, regarding the etching rate of NF3 gas (a corrosive gas) used in plasma etching, it is preferable that the first ceramic plate 21 has a lower corrosion rate than the second ceramic plate 22. In addition, in the atmosphere (e.g., an acidic atmosphere or an alkaline atmosphere) in which the component 10 of the semiconductor manufacturing apparatus is used, it is preferable that the first ceramic plate 21 is more stable than the second ceramic plate 22. It should be noted that the corrosion resistance of the first ceramic plate 21 only needs to be higher than that of the second ceramic plate 22 overall, and ceramics with corrosion resistance equal to or lower than that of the first ceramic plate 21 can be partially incorporated into the second ceramic plate 22.

[0037] The second ceramic plate 22 is a circular ceramic plate with the same diameter as the first ceramic plate 21 at its mating surface. From top to bottom, it houses an adsorption electrode 27 and a heating electrode 28. The adsorption electrode 27 is a planar electrode connected to an external DC power supply via a power supply component (not shown). Examples of adsorption electrodes 27 include mesh electrodes or printed electrodes. The power supply component is electrically insulated from the cooling plate 30. When a DC voltage is applied to the adsorption electrode 27, the wafer W is adsorbed and fixed to the wafer mounting surface 26 (specifically, the upper surface of the sealing strip 26a and the upper surface of the small circular protrusion 26b) by electrostatic adsorption. When the DC voltage is released, the adsorption and fixation of the wafer W to the wafer mounting surface 26 is released. The adsorption electrode 27 can be embedded in either the first ceramic plate 21 or the second ceramic plate 22, but is preferably embedded in a location where the adsorption electrode 27 remains after regeneration of the semiconductor manufacturing apparatus component 10. The heating electrode 28 is a resistive heating element, formed such that, when viewed from above, it is wired from one terminal of a pair of terminals to the entire wafer mounting surface 26 and to the other terminal of the pair of terminals, which are connected to an external heating power source via a power supply component (not shown). The power supply component is electrically insulated from the cooling plate 30. When power is supplied to the heating electrode 28 from the heating power source, the heating electrode 28 heats up and heats the wafer W on the wafer mounting surface 26.

[0038] The first ceramic plate 21 is preferably a plate containing at least one of magnesium aluminum oxynitride, Y2O3 and TaZrO2, and the second ceramic plate 22 is preferably an alumina plate (e.g. an alumina plate with a purity of 99.5% by mass or more).

[0039] As a magnesium aluminum oxynitride, examples include the ceramic material described in Japanese Patent No. 5680664, which is a ceramic material with magnesium, aluminum, oxygen, and nitrogen as its main components, using CuK α The XRD peaks at 2 ray irradiation point should appear at least at 2 ray irradiation points. θ =47°~50° (preferred 2) θ A material with a magnesium aluminum oxynitride phase as the main phase (within 47° to 49°) (which may contain a crystalline phase of MgO-AlN solid solution of aluminum nitride dissolved in magnesium oxide in the secondary phase). This material exhibits a lower NF3 etching rate compared to alumina (see, for example, Table 1 of Japanese Patent No. 5680664). Here, the main phase refers to the component comprising 50% or more of the volume ratio, and the secondary phase refers to the phase whose XRD peaks are identified other than the main phase. It is assumed that the area ratio in cross-sectional observation reflects the volume ratio; therefore, the main phase is the region with an area of ​​50% or more in the EPMA elemental mapping image, and the secondary phase is the region other than the main phase.

[0040] Examples of alumina plates with a purity of 99.5% or higher include those shown in Example 5, Comparative Examples 1 and 3 of Japanese Patent No. 5972630, and Experimental Examples 1 to 10 of Japanese Patent No. 6373212. These alumina plates have high insulation withstand voltage (70 kV / mm or higher).

[0041] The third ceramic plate 23 is a ceramic circular plate with steps on its outer periphery. The upper diameter is the same as that of the second ceramic plate 22, and the lower diameter is larger than that of the second ceramic plate 22. The third ceramic plate 23 is made of, for example, a material with a higher thermal conductivity than the second ceramic plate 22 (e.g., AlN sintered body).

[0042] The first ceramic plate 21 has a first modified layer 21a on the side in contact with the first amorphous layer 24, and the second ceramic plate 22 has a second modified layer 22a on the side in contact with the first amorphous layer 24. The first modified layer 21a, for example, exhibits a peak wider than the portion of the first ceramic plate 21 other than the first modified layer 21a, but sharper than the first amorphous layer 24, when measured by XRD. The second modified layer 22a, for example, exhibits a peak wider than the portion of the second ceramic plate 22 other than the second modified layer 22a, but sharper than the first amorphous layer 24, when measured by XRD. In a magnified cross-sectional image of the ceramic plate stack 20 based on TEM, it is observed that the first modified layer 21a has a different morphology than the portion of the first ceramic plate 21 other than the first modified layer 21a, and the second modified layer 22a has a different morphology than the portion of the second ceramic plate 22 other than the second modified layer 22a. The thickness of the first modified layer 21a and the second modified layer 22a is preferably 10 nm or more, more preferably 100 nm or more. μ Below m.

[0043] The second ceramic plate 22 has a third modified layer 22b on the side in contact with the second amorphous layer 25, and the third ceramic plate 23 has a fourth modified layer 23b on the side in contact with the second amorphous layer 25. The third modified layer 22b, for example, exhibits a peak wider than the portion of the second ceramic plate 22 (excluding the third modified layer 22b) but sharper than the second amorphous layer 25 when measured by XRD. The fourth modified layer 23b, for example, exhibits a peak wider than the portion of the third ceramic plate 23 (excluding the fourth modified layer 23b) but sharper than the second amorphous layer 25 when measured by XRD. In a magnified cross-sectional image of the ceramic plate stack 20 based on TEM, it is observed that the third modified layer 22b has a different morphology than the portion of the second ceramic plate 22 (excluding the third modified layer 22b), and the fourth modified layer 23b has a different morphology than the portion of the third ceramic plate 23 (excluding the fourth modified layer 23b). The thickness of the third modified layer 22b and the fourth modified layer 23b is preferably 10 nm or more, more preferably 100 nm or more. μ Below m.

[0044] The cooling plate 30 is a circular plate with good thermal conductivity (a circular plate with a diameter equal to or greater than the lower diameter of the third ceramic plate 23 of the ceramic plate laminate 20). A refrigerant flow path 32 for refrigerant circulation is formed inside the cooling plate 30. The refrigerant flowing in the refrigerant flow path 32 is preferably a liquid, preferably electrically insulating. Examples of electrically insulating liquids include fluorine-based inert liquids. The refrigerant flow path 32, when viewed from above, is formed integrally throughout the cooling plate 30 from one end (inlet) to the other end (outlet) in a continuous line. A supply port and a return port (not shown) of an external refrigerant device are connected to one end of the refrigerant flow path 32, respectively. Refrigerant supplied from the supply port of the external refrigerant device to one end of the refrigerant flow path 32 returns to the return port of the external refrigerant device from the other end of the refrigerant flow path 32 after passing through the refrigerant flow path 32, and is then supplied back to one end of the refrigerant flow path 32 from the supply port after temperature adjustment. The cooling plate 30 can also be used as an RF electrode.

[0045] The material of the cooling plate 30 can be, for example, a metallic material or a metal-ceramic composite material. Examples of metallic materials include Al, Ti, Mo, or alloys thereof. Examples of metal-ceramic composite materials include metal matrix composites (MMC) and ceramic matrix composites (CMC). Specific examples of such composite materials include materials containing Si, SiC, and Ti (also known as SiSiCTi), materials impregnated with Al and / or Si in SiC porous bodies, and composite materials of Al2O3 and TiC. Preferably, the material of the cooling plate 30 has a coefficient of thermal expansion close to that of the material of the third ceramic plate 23.

[0046] The adhesive sheet 40 is a circular, double-sided adhesive tape that bonds the lower surface of the ceramic plate laminate 20 to the upper surface of the cooling plate 30. Examples of materials for the adhesive sheet 40 include epoxy resin, acrylic resin, and silicone resin. It should be noted that a metal bonding layer may also be used instead of the adhesive sheet 40.

[0047] The thickness d of the ceramic portion 29 between the adsorption electrode 27 and the wafer mounting surface 26 in the component 10 of the semiconductor manufacturing apparatus (refer to) Figure 3 The electrostatic capacitance C0 of alumina with a specified electrode area S0 and a specified thickness d0 can be used as a reference. Specifically, the thickness d of the ceramic part 29 can be set such that the electrostatic capacitance C of the ceramic part 29 with a specified electrode area S0 is greater than or equal to the electrostatic capacitance C0. For example, the thickness d0 of the alumina (dielectric constant 10.4) that will serve as the reference is set to 0.35 mm, and the material of the first ceramic plate 21 is set to be CuK. α The XRD peaks at 2 ray irradiation point should appear at least at 2 ray irradiation points. θWhen the ceramic material with a magnesium aluminum oxynitride phase as the main phase (dielectric constant 9.5) at a gradient of 47° to 50° is used, and the second ceramic plate 22 is made of alumina (dielectric constant 10.4), the distance d of the ceramic part 29 is preferably 0.33 mm or less, and the distance d' between the adsorption electrode 27 and the upper surface of the second ceramic plate 22 (refer to...) Figure 3 The preferred thickness is 0.17 mm or more. As a result, the adsorption force of the semiconductor manufacturing apparatus component 10 can be greater than or equal to the adsorption force of existing products (semiconductor manufacturing apparatus components where the space between the adsorption electrode 27 and the wafer adsorption surface 26 is aluminum oxide).

[0048] Next, an example of using the semiconductor manufacturing apparatus component 10 configured in this way will be described. First, with the semiconductor manufacturing apparatus component 10 disposed in a chamber (not shown), a wafer W is placed on the wafer mounting surface 26. Then, the vacuum level in the chamber is reduced using a vacuum pump and adjusted to a predetermined vacuum level. A DC voltage is applied to the adsorption electrode 27 of the ceramic plate laminate 20 to generate an electrostatic adsorption force, thereby adsorbing and fixing the wafer W to the wafer mounting surface 26 (specifically, the upper surface of the sealing strip 26a and the upper surface of the small circular protrusion 26b). Next, the chamber is filled with a reactive gas atmosphere at a predetermined pressure (e.g., tens to hundreds of Pa). Under this state, a high-frequency voltage is applied between the upper electrode (not shown) disposed at the top of the chamber and the cooling plate 30 of the semiconductor manufacturing apparatus component 10 to generate plasma. The surface of the wafer W is treated by the generated plasma. The refrigerant circulates in the refrigerant flow path 32 of the cooling plate 30. In addition, as needed, electricity is supplied to the heating electrode 28 to heat the wafer W.

[0049] Next, an example of manufacturing the ceramic plate laminate 20 will be described. First, a first ceramic plate 21 and a second ceramic plate 22 are manufactured. For example, the first ceramic plate 21 is manufactured by hot-pressing a molded body containing ceramic powder (e.g., a mixture of MgO powder, Al2O3 powder, and AlN powder, which are raw materials for ceramic materials with magnesium aluminum oxynitride phase as the main phase). This makes the first ceramic plate 21 a dense body. The second ceramic plate 22 is manufactured by hot-pressing a molded body containing ceramic powder (e.g., alumina powder) with embedded adsorption electrode 27 and heating electrode 28. This makes the second ceramic plate 22 a dense body. The third ceramic plate 23 is manufactured by hot-pressing a molded body containing ceramic powder (e.g., aluminum nitride powder). This makes the third ceramic plate 23 a dense body. At this stage, the first ceramic plate 21, the second ceramic plate 22, and the third ceramic plate 23 do not have a modified layer.

[0050] Next, use Figure 4The polishing apparatus 50 shown performs polishing on a first ceramic plate 21. The polishing apparatus 50 includes: a disc-shaped polishing platform 52 with a large diameter and a polishing pad 54; a disc-shaped carrier plate 56 with a small diameter; and a pipe 58 for supplying a slurry containing abrasive particles to the polishing pad 54. The polishing platform 52 has a shaft at the center of its lower surface, which is rotated by a drive motor (not shown). The carrier plate 56 has a shaft at the center of its upper surface, which is rotated by a drive motor (not shown). The carrier plate 56 is positioned off-center from the center of the polishing platform 52. When polishing the first ceramic plate 21 using this polishing apparatus 50, the first ceramic plate 21 is mounted on the lower surface of the carrier plate 56, and the first ceramic plate 21 is sandwiched between the polishing pad 54 of the polishing platform 52 and the carrier plate 56. Then, a slurry containing abrasive particles is supplied to the polishing pad 54 from the pipe 58. Therefore, slurry is supplied between the first ceramic plate 21 and the polishing pad 54 of the polishing platform 52. In this state, the first ceramic plate 21 is pressed against the polishing pad 54 by the carrier disk 56, and polishing is performed by rotating the polishing platform 52 and the carrier disk 56. Regarding polishing, the polishing conditions are set, for example, so that the surface roughness (arithmetic mean roughness) Ra of the lower surface of the first ceramic plate 21 is less than 1 nm. The surface roughness (arithmetic mean roughness) Ra of the polished surface is measured using a non-contact surface roughness meter according to the ISO25178 standard. In addition, a first modified layer 21a is formed on the polished surface side of the first ceramic plate 21.

[0051] The second ceramic plate 22 is polished and ground on both its upper and lower surfaces using a grinding device 50, in the same manner as the first ceramic plate 21. As a result, the surface roughness Ra of the two surfaces of the second ceramic plate 22 becomes less than 1 nm. In addition, a second metamorphic layer 22a and a third metamorphic layer 22b are formed on the two surfaces of the second ceramic plate 22.

[0052] The surface of the third ceramic plate 23 on the side with the smaller diameter is polished using a grinding device 50, in the same manner as the first ceramic plate 21. As a result, the surface roughness Ra of the polished surface of the third ceramic plate 23 becomes less than 1 nm. In addition, a fourth modified layer 23b is formed on the polished surface of the third ceramic plate 23.

[0053] Next, surface activation treatment (high-speed electron beam (FAB) or plasma activation treatment) is performed on the surface of the first ceramic plate 21 with the first modified layer 21a (polished surface) and the surface of the second ceramic plate 22 with the second modified layer 22a (polished surface) under high vacuum. The FAB conditions are appropriately adjusted, for example, to a voltage of 0.5kV to 2kV, a current of 50mA to 200mA, and an irradiation time of 30 seconds to 300 seconds. As a result, oxides and adsorbed molecules are removed from the surface of the first ceramic plate 21 with the first modified layer 21a and the surface of the second ceramic plate 22 with the second modified layer 22a, forming an amorphous layer and thus activating the surface. Then, while maintaining high vacuum conditions, the two surfaces are overlapped with the surface of the first ceramic plate 21 with the first modified layer 21a facing the surface of the second ceramic plate 22 with the second modified layer 22a facing each other, and bonding is performed while applying pressure (direct bonding). The load during pressurization is set to, for example, 0.1 kN to 50 kN. This results in a joint formed by joining the first ceramic plate 21 and the second ceramic plate 22. It should be noted that, to improve the joint strength, the joint can also be subjected to heat treatment. For example, it can be heat-treated at approximately 100°C after joining at room temperature.

[0054] Under high vacuum, the surfaces of the second ceramic plate 22 with the third modified layer 22b (polished surface) and the third ceramic plate 23 with the fourth modified layer 23b (polished surface) in the obtained composite are subjected to surface activation treatment (high-speed electron beam (FAB) or plasma activation treatment). This removes oxides and adsorbed molecules from the surfaces of the second ceramic plate 22 with the third modified layer 22b and the third ceramic plate 23 with the fourth modified layer 23b, activating them by forming an amorphous layer. Then, while maintaining high vacuum conditions, the two surfaces are overlapped with the surfaces of the second ceramic plate 22 with the third modified layer 22b and the third ceramic plate 23 with the fourth modified layer 23b facing each other, and bonding is performed under pressure (direct bonding). It should be noted that the FAB conditions and the load during pressure application are as described above. This yields a ceramic plate laminate 20. It should be noted that, to improve the bonding strength of the ceramic plate laminate 20, heat treatment can also be applied to the ceramic plate laminate 20. For example, a heat treatment of around 100°C can be performed after bonding at room temperature.

[0055] The strength of the amorphous layer was compared with that of the AD film and the thermal spray film. An AD film was formed on the surface of a separately prepared MMC substrate (test piece). A cylindrical stud pin was fixed to the surface of the AD film with adhesive. An upward load (from the AD film away) was applied to the stud pin. The result was that, at approximately 60 MPa, the AD film itself fractured, not at the interface between the AD film and the test piece. Similarly, a thermal spray film was formed instead of the AD film, and the same experiment was performed. The result was that the thermal spray film also fractured at approximately 60 MPa. On the other hand, a stud pin was fixed to the surface of the first ceramic plate 21 of the ceramic plate laminate 20 with adhesive. An upward load was applied to the stud pin, and the interface between the stud pin and the ceramic plate fractured at 70 MPa. Therefore, it can be concluded that the amorphous layer is stronger than the AD film and the thermal spray film.

[0056] In the semiconductor manufacturing apparatus component 10 described above, the first ceramic plate 21, which has a wafer mounting surface 26 on its upper surface, has higher corrosion resistance than alumina and the second ceramic plate 22. Therefore, the first ceramic plate 21 can suppress thinning and grain boundary erosion caused by corrosive gases. Consequently, the product lifespan is extended. Furthermore, since a first amorphous layer 24 exists between the first ceramic plate 21 and the second ceramic plate 22, the bonding strength between the two plates 21 and 22 becomes relatively high. A second amorphous layer 25 also exists between the second ceramic plate 22 and the third ceramic plate 23, thus the bonding strength between the two plates 22 and 23 also becomes relatively high.

[0057] Alternatively, the first ceramic plate 21 may contain at least one selected from magnesium aluminum oxynitride, Y2O3, and TaZrO2, and the second ceramic plate 22 may contain Al2O3. This would allow the first ceramic plate 21 to have higher corrosion resistance than alumina and the second ceramic plate 22.

[0058] Furthermore, the third ceramic plate 23 is made of a material with a higher thermal conductivity than the second ceramic plate 22 (e.g., AlN sintered body), thus improving the heat uniformity and heat dissipation of the wafer W.

[0059] Furthermore, the semiconductor manufacturing apparatus component 10 is a semiconductor manufacturing apparatus component utilizing a laminate of a first ceramic plate 21 and a second ceramic plate 22. Therefore, ceramic plates with different properties can be used as the first ceramic plate 21 and the second ceramic plate 22. As a result, it becomes easier to adapt to the characteristics required by the semiconductor manufacturing apparatus component 10.

[0060] It should be noted that the present invention is not limited to any of the above-described embodiments. As long as it falls within the technical scope of the present invention, it can be implemented in various ways.

[0061] For example, in the aforementioned component 10 for a semiconductor manufacturing apparatus, such as Figure 5As shown, the ceramic plate laminate 20 can also have a refrigerant flow path 70 positioned in the second ceramic plate 22 facing the amorphous layer 25. Alternatively, as... Figure 6 As shown, the ceramic plate laminate 20 can also have a refrigerant flow path 70 positioned in the third ceramic plate 23 facing the amorphous layer 25. Figure 5 and Figure 6 In this drawing, the same reference numerals are used to denote the same components as in the embodiments described above. The refrigerant flow path 70, when viewed from above, is formed integrally across the wafer mounting surface 26 from one end (inlet) to the other end (outlet) in a continuous line. A supply port and a return port (not shown) of an external refrigerant device are connected to one end of the refrigerant flow path 70, respectively. Refrigerant supplied from the supply port of the external refrigerant device to one end of the refrigerant flow path 70 returns to the return port of the external refrigerant device from the other end of the refrigerant flow path 70 after passing through the refrigerant flow path 70, and is then supplied back to one end of the refrigerant flow path 70 from the supply port after temperature adjustment.

[0062] In the aforementioned component 10 for a semiconductor manufacturing apparatus, such as Figure 7 As shown, the ceramic plate laminate 20 can also have a gas flow path 80 positioned in the second ceramic plate 22 facing the amorphous layer 25. Alternatively, as... Figure 8 As shown, the ceramic plate laminate 20 can also have a gas flow path 80 positioned in the third ceramic plate 23 facing the amorphous layer 25. Figure 7 and Figure 8 In this drawing, the same reference numerals are used for the same components as in the embodiments described above. The gas flow path 80 is an annular flow path concentric with the ceramic plate laminate 20. The ceramic plate laminate 20 includes: a gas supply path 81 provided in communication with the gas flow path 80 from the lower surface of the cooling plate 30; and a gas ejection path 82 opening from multiple locations of the gas flow path 80 to the reference surface 26c of the wafer mounting surface 26. Gas (e.g., a heat-conducting gas such as He gas) supplied from the gas supply path 81 to the gas flow path 80 fills the space on the lower surface side of the wafer W (the space surrounded by the lower surface of the wafer W, the sealing strip 26a, the small circular protrusion 26b, and the reference surface 26c) from the gas ejection path 82. The filling gas ensures good thermal conductivity between the wafer W and the wafer mounting surface 26.

[0063] In the above embodiments, when the first ceramic plate 21 can no longer exhibit its initial characteristics due to years of deterioration, etc., by... Figures 9-11 The method for regenerating the component 10 of the semiconductor manufacturing apparatus shown enables the regeneration and reuse of the component 10. Figures 9-11 In this drawing, the same reference numerals are used to denote the same components as in the embodiments described above. It should be noted that in... Figures 9-11For convenience, the joining plate 40 and the cooling plate 30 are omitted.

[0064] For example, in Figure 9 In the middle, for components 10 of semiconductor manufacturing equipment ( Figure 9 The upper surface (including the wafer mounting surface 26) of the first ceramic plate 21 in (A) is processed and removed, leaving the lower part of the first ceramic plate 21. Figure 9 B). Thus, the processing surface of the wafer mounting surface 26 formed on the first ceramic plate 21 is removed. Next, the processing surface of the first ceramic plate 21 is further processed to form a new wafer mounting surface 126 (sealing strip 126a, small circular protrusion 126b, and reference surface 126c). Figure 9 C). This yields a reusable semiconductor manufacturing apparatus component 110. The processing method is not particularly limited; for example, grinding or polishing can be used. Other processing methods include sandblasting and laser processing. By performing sandblasting after shielding the wafer mounting surface 26, the sealing strip 26a and the small circular protrusions 26b constituting the wafer mounting surface 26 can be selectively removed. Furthermore, a new wafer mounting surface 126 (sealing strip 126a, small circular protrusions 126b, and reference surface 126c) can be formed by sandblasting, laser processing, or the like.

[0065] exist Figure 10 In the middle, for components 10 of semiconductor manufacturing equipment ( Figure 10 The upper surface (including the wafer mounting surface 26) of the first ceramic plate 21 in (A) is processed and removed, leaving the lower part of the first ceramic plate 21. Figure 10 B). Thus, the processing surface formed on the first ceramic plate 21, the wafer mounting surface 26, is removed. Next, a regeneration ceramic plate 221 with higher corrosion resistance than alumina and the second ceramic plate 22 is prepared. Figure 10 C). The regenerated ceramic plate 221 has a wafer mounting surface 226 (sealing strip 226a, small circular protrusions 226b, and reference surface 226c) pre-formed on its upper surface. Next, the processed surfaces of the first ceramic plate 21 and the lower surface of the regenerated ceramic plate 221 are polished and ground. After surface activation treatment of each ground surface, the two are joined (direct joining). Figure 10D). After bonding, an amorphous layer 224 is formed between the first ceramic plate 21 and the recycled ceramic plate 221. This yields a reusable component 210 for a semiconductor manufacturing apparatus. It should be noted that the recycled ceramic plate 221 can also be a ceramic plate without the wafer mounting surface 226 formed thereon. In this case, after bonding the recycled ceramic plate 221 to the processed surface of the first ceramic plate 21, the wafer mounting surface 226 can be formed on the upper surface of the ceramic plate 221. There are no particular limitations on the processing method; for example, grinding or polishing can be used. Other processing methods include sandblasting and laser processing. The recycled ceramic plate 221 is fine as long as it has high corrosion resistance compared to the second ceramic plate 22 and alumina, but to reproduce the performance of the component 10 for a semiconductor manufacturing apparatus, the recycled ceramic plate 221 is preferably composed of the same material as the first ceramic plate 21. Furthermore, the wafer mounting surface 226 can be formed by sandblasting, laser processing, or the like.

[0066] exist Figure 11 In the middle, for components 10 of semiconductor manufacturing equipment ( Figure 11 The first ceramic plate 21 in (A) is processed and removed, exposing the second ceramic plate 22. Figure 11 B). Here, the first amorphous layer 24 is also removed by grinding along with the first ceramic plate 21 (and can then be removed to the second modified layer 22a (see reference)). Figure 3 Thus, the processed surface (exposed surface) is formed on the second ceramic plate 22. Next, a recycling ceramic plate 321 with higher corrosion resistance than alumina and the second ceramic plate 22 is prepared. Figure 11 C). The regenerated ceramic plate 321 has a wafer mounting surface 326 (sealing strip 326a, small circular protrusions 326b, and reference surface 326c) pre-formed on its upper surface. Next, the exposed processed surface of the second ceramic plate 22 and the lower surface of the regenerated ceramic plate 321 are polished and ground. After surface activation treatment of the ground surfaces, the two are joined (direct joining). Figure 11D). After bonding, an amorphous layer 324 is formed between the recycled ceramic plate 321 and the second ceramic plate 22. This yields a reusable component 310 for a semiconductor manufacturing apparatus. It should be noted that a ceramic plate without a wafer mounting surface 326 can also be used as the recycled ceramic plate 321. In this case, after bonding the recycled ceramic plate 321 to the exposed processed surface of the second ceramic plate 22, the wafer mounting surface 326 is formed on the upper surface of the recycled ceramic plate 321. There are no particular limitations on the processing method; for example, grinding or polishing can be used. Other processing methods include sandblasting and laser processing. The recycled ceramic plate 321 is fine as long as it has high corrosion resistance compared to the second ceramic plate 22 and alumina, but to reproduce the performance of the component 10 for a semiconductor manufacturing apparatus, the recycled ceramic plate 321 is preferably composed of the same material as the first ceramic plate 21. Furthermore, the wafer mounting surface 326 can be formed by sandblasting, laser processing, or the like.

[0067] The ceramic plate laminate 20 of the semiconductor manufacturing apparatus component 10 described above is formed by using a third ceramic plate 23 made of a material with a higher thermal conductivity than the second ceramic plate 22, but it is not particularly limited to this. For example, the third ceramic plate 23 may also be formed of a material with a lower purity than the second ceramic plate 22 (e.g., an alumina sintered body with a purity of 90% to 95% by mass). In this way, the cost of the third ceramic plate 23 can be kept relatively low.

[0068] The ceramic plate laminate 20 of the semiconductor manufacturing apparatus component 10 described above includes a third ceramic plate 23, but may not include a third ceramic plate 23.

[0069] In the aforementioned semiconductor manufacturing apparatus component 10, an adsorption electrode 27 and a heating electrode 28 are embedded in the second ceramic plate 22. However, it is also possible to embed only either the adsorption electrode 27 or the heating electrode 28 in the second ceramic plate 22. Alternatively, an RF electrode may be further embedded in the second ceramic plate 22. Furthermore, instead of embedding the adsorption electrode 27 in the second ceramic plate 22, the adsorption electrode 27 may be embedded in the first ceramic plate 21.

[0070] In the aforementioned semiconductor manufacturing apparatus component 10, the heating electrode 28 employs a structure in which the resistive heating element is wired throughout the entire wafer mounting surface 26. However, for example, the wafer mounting surface 26 may be divided into multiple regions, and heating electrodes may be embedded in each region in a manner that allows for independent power control.

[0071] In the aforementioned semiconductor manufacturing apparatus component 10, at least one portion of the ceramic plate laminate 20, the outer periphery of the bonding layer 40, and the side surface of the substrate 30 can be covered by an insulating film. Examples of insulating films include thermally sprayed films such as alumina and yttrium oxide.

[0072] This application is based on Japanese Patent Application No. 2024-055227, filed on March 29, 2024, the entire contents of which are incorporated herein by reference.

[0073] Industrial availability This invention can be used in semiconductor manufacturing apparatus.

[0074] Explanation of reference numerals in the attached figures 10 Components for semiconductor manufacturing apparatus; 20 Ceramic plate laminate; 21 First ceramic plate; 21a First modified layer; 22 Second ceramic plate; 22a Second modified layer; 22b Third modified layer; 23 Third ceramic plate; 23b Fourth modified layer; 24 First amorphous layer; 25 Second amorphous layer; 26 Wafer mounting surface; 26a Sealing strip; 26b Circular protrusion; 26c Reference surface; 27 Adsorption electrode; 28 Heating electrode; 29 Ceramic part; 30 Cooling plate; 32 Refrigerant flow path; 40 Adhesive sheet; 50 Polishing apparatus; 52 Polishing platform; 54 Polishing pad; 56 Carrier disk; 58 Tube; 70 Refrigerant flow path; 80 Gas flow path; 81 Gas supply path; 82 Gas ejection path.

Claims

1. A component for a semiconductor manufacturing apparatus, characterized in that, have: The first ceramic plate has a wafer mounting surface on its upper surface; A second ceramic plate is disposed on the lower surface of the first ceramic plate; and A first amorphous layer exists between the first ceramic plate and the second ceramic plate. The first ceramic plate has higher corrosion resistance than alumina and the second ceramic plate.

2. The component for a semiconductor manufacturing apparatus according to claim 1, wherein, The first ceramic plate contains at least one selected from magnesium aluminum oxynitride, Y2O3, and TaZrO2. The second ceramic plate contains Al2O3.

3. The component for a semiconductor manufacturing apparatus according to claim 2, wherein, The first ceramic plate is formed of a material with magnesium aluminum oxynitride as the main phase. The distance between the wafer's adsorption surface and the adsorption electrode is less than 0.33 mm. The distance between the adsorption electrode and the upper surface of the second ceramic plate is 0.17 mm or more.

4. The component for a semiconductor manufacturing apparatus according to claim 1 or 2, wherein, The component for the semiconductor manufacturing apparatus includes: A first modified layer exists in the first ceramic plate on the side that contacts the first amorphous layer; and The second modified layer exists on the side of the second ceramic plate that is in contact with the first amorphous layer.

5. The component for a semiconductor manufacturing apparatus according to claim 1 or 2, wherein, The component for the semiconductor manufacturing apparatus includes: A third ceramic plate, disposed on the lower surface of the second ceramic plate; and A second amorphous layer exists between the second ceramic plate and the third ceramic plate.

6. The component for a semiconductor manufacturing apparatus according to claim 5, wherein, A refrigerant flow path for refrigerant to flow or a gas flow path for supplying gas to the wafer mounting surface is provided at a position in the second ceramic plate facing the second amorphous layer or at a position in the third ceramic plate facing the second amorphous layer.

7. The component for a semiconductor manufacturing apparatus according to claim 5, wherein, The component for the semiconductor manufacturing apparatus includes: A third modified layer exists in the second ceramic plate on the side that contacts the second amorphous layer; and A fourth altered layer exists in the third ceramic plate on the side that contacts the second amorphous layer.

8. A method for regenerating components for a semiconductor manufacturing apparatus, characterized in that, include: (a) A process of processing the upper surface of the first ceramic plate of a component for a semiconductor manufacturing apparatus according to claim 1 or 2, forming a processed surface on the first ceramic plate from which the wafer mounting surface has been removed; and (b) A process of further processing the processing surface to form a new wafer mounting surface.

9. A method for regenerating components for a semiconductor manufacturing apparatus, characterized in that, include: (a) A process of processing the upper surface of the first ceramic plate of a component for a semiconductor manufacturing apparatus according to claim 1 or 2, forming a processed surface on the first ceramic plate from which the wafer mounting surface has been removed; and (b) A process of directly bonding a recycled ceramic plate, which has a higher corrosion resistance than alumina and the second ceramic plate, to the processed surface.

10. A method for regenerating components for a semiconductor manufacturing apparatus, characterized in that, include: (a) A step of processing the first ceramic plate of a component for a semiconductor manufacturing apparatus according to claim 1 or 2 to remove it and expose the second ceramic plate, and forming a processed surface on the second ceramic plate; and (b) A process of directly bonding a recycled ceramic plate, which has a higher corrosion resistance than alumina and the second ceramic plate, to the processed surface.

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