Weldable electronic balance balance adjusting circuit

Abstract

The utility model relates to a balance adjusting circuit of a weldable electronic balance and belongs to the technical field of electronic measurement. The acquisition circuit is composed of an LVDT conditioning unit, a PID signal modulation unit, a coil excitation unit, a signal acquisition unit, a power supply unit, a communication unit and an STM32H743 system unit. A displacement signal acquisition unit is integrated at the measuring front end of the weldability electronic balance; automatic adjustment of an output signal is realized through analog and digital dual PID adjustment; a 24-bit external 4-path analog-to-digital conversion chip is used for carrying out transient synchronous sampling on multi-point signals; an event triggering condition is specified in the lower computer, a single chip microcomputer judges whether the event triggering condition is met or not, and a circuit starts signal adjustment and acquisition transmission only when the event triggering condition is met; while low cost is ensured, quick response of the system is realized, the measurement accuracy of the system is improved, cooperative work of software and hardware is realized, and the efficiency is improved.

Description

Technical Field

[0001] The utility model discloses a weldable electronic balance balancing regulating circuit, which belongs to the technical field of electronic measurement. Background Art

[0002] The solderability electronic balance measurement system is a system widely used in the field of solderability detection. In the solderability electronic balance test instrument, stress detection can be realized, the collected data can be amplified and processed through the measurement and control circuit, and the processed signal can be transmitted to the host computer to facilitate subsequent operation control and data analysis. At the same time, the automatic balance of the electronic balance can also be automated through the solderability measurement system to reduce the error caused by human operation in the operation of the entire system. Among them, the LVDT conditioning circuit is a commonly used signal amplification circuit in the solderability detection system, which can amplify and enhance tiny displacement signals and improve the signal-to-noise ratio and stability of the signal. Because the voltage signal is generally processed in the signal processing link, the output voltage of the conditioning circuit is proportional to the stress intensity, so the LVDT conditioning circuit is often used in applications such as solderability detection.

[0003] In engineering applications, it is often necessary to evaluate and measure the wetting properties of alloy materials when they come into contact with welding materials. Therefore, the weldability measurement system must be designed with high precision and high response speed. Among the common weldability detection devices on the market, the 5200TN device developed by Japan's RHESCA company has high precision but high cost; the domestically developed CA-8H device has low cost but poor accuracy and response speed. During the measurement process, real-time signal acquisition cannot be achieved. For weldability measurement, it is necessary to keep the measurement process data transmitted in real time and quickly perform feedback control. Therefore, it is necessary to design a weldability electronic balance balance adjustment circuit with the characteristics of high precision, low cost, and fast response speed. Utility Model Content

[0004] In view of the above problems, the utility model designs a weldable electronic balance adjustment circuit, which uses only one USB interface to transmit data with a computer or mobile terminal; uses resistors, capacitors and operational amplifiers to design an electromagnetic conversion analog front end, which can access the displacement signal of the electromagnetic sensor LVDT; the new analog-to-digital integrated chip STM32H743 realizes transient synchronous sampling of multi-point signals through a 24-bit external analog-to-digital conversion chip ADS131A04, reduces the timing error of the monitoring point, provides accurate compensation for the system, and ensures the accuracy of the measurement. The system responds quickly through analog and digital dual PID adjustment, thereby improving the measurement accuracy of the system, and realizing the collaborative work of software and hardware to improve efficiency.

[0005] The purpose of the utility model is achieved in this way:

[0006] A weldable electronic balance balance adjustment circuit, which consists of an LVDT conditioning unit, a PID signal modulation unit, a coil excitation unit, a signal acquisition unit, a power supply unit, a communication unit and an STM32H743 system unit;

[0007] The LVDT conditioning unit is mainly composed of a universal LVDT signal conditioning chip AD698. First, the 17th and 18th pins of AD698 output excitation signals to the 4th and 5th pins of the LVDT input terminal CN4. The displacement signal is connected to the 6th and 7th pins of the output terminal CN4 through the LVDT displacement sensor. The 6th pin of CN4 is connected to the 15th pin of AD698. The 7th pin of CN4 is first connected to R87 and then to the 16th pin of CN4. The 16th pin of CN4 is connected to GND after passing through C51 and R93 respectively. The 28th pin of CN4 is connected to the positive pole of C61 and one end of C62 is connected to +12V, and the negative pole of C61 is connected to the other end of C62. Connect to GND; Pin 1 of CN4 is connected to the negative pole of C63 and one end of C64 is connected to -12V, and the positive pole of C63 and the other end of C64 are connected to GND; R96 is used to set the excitation voltage between pins 5 and 6 of CN4, and at the same time, pins 26 and 27 of CN4 are connected to -12V through R100 and R99 respectively to set the output DC bias voltage determination component of AD698, and C60 is used to set the output signal frequency between pins 7 and 8, and pin 23 of CN4 is connected to control R89 to set the gain or full-scale output range determination component; Pin 23 of CN4 outputs SIG signal, which is input to pin 3 of U15A by connecting pins 2 and 3 of JP1;

[0008] The PID signal modulation unit is composed of a low-noise operational amplifier and a number of resistors and capacitors; the SIG signal is input through the 3rd pin of U15A; the 4th and 8th pins of U15A are connected to -12V and +12V respectively; the 2nd pin of U15A is connected to GND through R60, and is connected to the 1st pin of U15A through R62; the 1st pin of U15A is connected to the 5th pin of U15B through R58, R97 and C58, and the 5th pin of U15B is connected to GND through potentiometers R32 and R66; the 4th and 8th pins of U15B are connected to -12V and +12V respectively; the signal VCAL0 is input to the 6th pin of U15B through R102, and the 6th pin of U15B is connected to the 7th pin of U15B through C59, R65 and R98; the 7th pin output signal PIDO of U15B is input to Pin 5 of U11B, Pin 5 of U11B is connected to GND through R72; Pin 6 of U11B is connected to Pin 7 of U11B through R79; C40 is connected in parallel with R7, Pin 6 of U11B is connected to GND through R78, R43 and C36 respectively; Pin 4 and Pin 8 of U11B are connected to -12V and +12V respectively; Pin 7 of U11B is connected to Pin 3 of U11A through R37, R35 and C48, Pin 3 of U11A is connected to GND through R34; Pin 2 of U11A is connected to Pin 1 of U11A through R36; Pin 1 of U11A is connected to GND through R36, C34 and R75 respectively, and is connected to Pin 3 of U12A at the same time; Signal VGDS is input to Pin 3 of U12A; Pin 2 of U12A is connected to GND through R45, and is connected to Pin 1 of U12A through R46 and JP;

[0009] The coil excitation circuit unit is composed of a low-noise operational amplifier, an external multi-channel high-precision DAC, an operational amplifier, a relay, a triode, a resistor and a capacitor; Pin 1 of U12A is connected to GND through R73 and R74; the upper end of R74 is connected to Pin 6 of U16A; Pin 1 and Pin 13 of U16A are connected to +12V and -12V power supplies respectively; Pin 10 of U16A is connected to Pin 16 of U16A through R106, and is connected to GND through R10 and C71 respectively; Pin 16 of U16A is connected to Pin 8 and Pin 3 of RL1; Signal VCAL1 is connected to pin 6 of U17A; pin 10 of U17A is connected to R101 to GND, and connected to R94, and connected to GND through R108, C76, and C75; pin 16 of U17A is connected to the lower end of R109 and the upper end of R108; pin 1 of RL1 is connected to VCC; pin 10 of RL1 is connected to VCC through D18, and is also connected to pin 3 of transistor Q8; the cathode of diode D18 is connected to GND through C67, pin 4 of RL1 is connected to pin 7 to output GWIRE+ signal, and pin 3 of RL1 is connected to VCC through R10 7 and C72, C68 are connected to GND; U3A's PB13 pin is connected to Q8's 1 pin through R104; connector CN5's 6 and 7 pins are connected through D15, CN5's 1 and 2 pins are connected through D14, and 4 pin is connected to VCC through R110; U4 pins 1, 2, 9, 16, 15 are connected to microcontroller U3A's PA4, PA2, PA3, PA5, PA7 respectively; U4's 3 and 14 pins are connected to VCC and GND respectively; U4 pins 4 and 13 are connected to U5B's Pin 6, U5B's pin 6 is connected to NR25 and VR25 through R16 and R33 respectively, and pin 6 is connected to U5B's pin 7 through R31 and C27; U5B pins 4, 5, and 8 are connected to -12V, GND, and +12V respectively; U4 pins 5 and 12 are connected to U5A's pin 2 through R26 and R28 respectively, U5A's pin 2 is connected to NR25 and VR25 through R15 and R25 respectively, and pin 2 is connected to U5A's pin 1 through R29 and C26; U5A pins 4, 3, and 8 are connected to -12V, GND, and +12V respectively;

[0010] The signal acquisition unit is composed of a reference voltage reference and an A / D converter; the reference voltage reference is composed of a low-noise operational amplifier, a triode, and a resistor and capacitor; the definition signal VREF is input to pin 3 of U1A, and pin 3 of U1A is connected to VCC through R1, and connected to GND through C9 and R3; pins 4 and 8 of U1A are respectively connected to -12V and +12V power supplies; pin 2 of U1A is connected to GND through C12, connected to pin 1 through R4, and connected to pin 6 of U1B through R7 and R11; pin 6 of U1B is connected to pin 7 through R8 and R9; pin 5 of U1B is connected to GND, and pins 4 and 8 of U1B are respectively connected to -12V and +12V power supplies; pin 1 of U1A is input to pin 3 of U2A through R4; pin 2 of U2A Connect GND through the coupling of R12, C19, and C20, and directly connect to pin 2 of Q2; pin 1 of U2A is connected to pin 1 of Q2 through R10; pins 4 and 8 of U2A are connected to -12V and +12V power supplies respectively, and pin 3 of Q2 is connected to +12V; pin 1 of U1B is connected to pin 5 of U2B; pin 6 of U2B is connected to GND through the coupling of R5, C10, and C11, and directly connect to pin 2 of Q1; pin 1 of U2A is connected to pin 1 of Q1 through R2; pins 4 and 8 of U2A are connected to -12V and +12V power supplies respectively, and pin 3 of Q1 is connected to +12V; the A / D conversion circuit consists of a low-noise operational amplifier, a high-precision differential ADC, an external crystal oscillator, and several resistors and capacitors; pin 5 of U12B is connected to pin 5 of U2B through R103 Connect to GND; Pin 6 of U12B is connected to GND through R88 and R91, and connected to Pin 7 through C53, R92 and R90 respectively; Pin 4 and Pin 8 of U12B are connected to -12V and +12V power supplies respectively; Sampling signal GW- is connected to GND through R57, R59, R63 and R64; The right end of R59 is connected to Pin 3 of U9A; Pin 2 of U9A is connected to Pin 1 of U9A; Pin 1 of U9A is connected to GND through R61 and C39; Pin 4 and Pin 8 of U9A are connected to -2.5V and +2.5V power supplies respectively; Balance signal PIDO is connected to GND through R47, R49, R53 and R54; The right end of R49 is connected to Pin 3 of U8A; Pin 2 of U8A is connected to Pin 1 of U8A; Pin 1 of U8A is connected to GND through R47, R49, R53 and R54; R51 and C37 are connected to GND; U8A's 4th and 8th pins are connected to -2.5V and +2.5V power supplies respectively; the gain signal SIG is connected to GND through R77, R81, R85, and R86; the right end of R81 is connected to U9B's 5th pin; U9B's 2nd pin is connected to U9B's 7th pin; U9B's 7th pin is connected to GND through R83 and C49; U9B's 4th and 8th pins are connected to -2.5V and +2.5V power supplies respectively; the drive signal VGDS is connected to GND through R48, R50, R55, and R56; the right end of R50 is connected to U8B's 5th pin; U8B's 2nd pin is connected to U8B's 7th pin; U8B's 7th pin is connected to GND through R52 and C38; U8B's 4th and 8th pins are connected to -2.5V and +2.5V respectively.5V power supply; U10 pins 1, 3, 5, 7, 14, 27, 32 are directly connected to GND; U9A's pin 1 is connected to U10's pin 6 through R61, U8A's pin 1 is connected to U10's pin 2 through R51, U9B's pin 7 is connected to U10's pin 8 through R83, and U8B's pin 7 is connected to U10's pin 4 through R52 as four-way signal input; U10 pins 15, 16, 29 are directly connected to 3V3; +2V5 is connected to GND through C121, C122, C123, C124, respectively, and -2V5 is connected to GND through C125, C126, C127, C128, respectively; U10's pins 10 and 11 are directly connected to -2V5, and pin 9 is directly connected to +2V5; U10's pin 28 is connected to GND through C47; U10's pin 13 is connected to pin 12 through C44, Connect to GND through C42 and C43 respectively, and connect to NR25 through R67; U10's 30th and 31st pins are connected to 3V3 through R68 and R69 respectively, and 30th pin is connected to GND through R42; U10's 17th pin is connected to the PB10 pin of the microcontroller U3A; U10's 23rd pin is connected to the microcontroller PE15 through R80 and then to PE11 through R82; U10's pins 22, 20, and 19 are directly connected to PE13, PE14, and PE11 respectively; U10's 21st pin is connected to 3V3 through R71; the 1st pin of the external crystal oscillator CK2 is directly connected to U10's pin 26; the 3rd pin of CK2 is directly connected to U10's pin 25; CK2 pins 1 and 3 are connected through R70; CK2 pins 1 and 3 are connected to GND through C46 and C45 respectively; CK2's 2nd and 4th pins are directly connected to GND;.

[0011] The power supply unit is composed of a transformer, a diode, a low-noise LDO and a number of capacitors; 220V AC power is output through the transformer to output two AC power supplies, and pin 1 of the transformer connector CN1 is connected to the positive pole of D1 and the negative pole of D2; pin 3 of CN1 is connected to the positive pole of D3 and the negative pole of D4; pin 4 of CN1 is connected to the positive pole of D5 and the negative pole of D6; pin 5 of CN1 is connected to the positive pole of D7 and the negative pole of D8; pin 2 of CN1 is connected to GND; at the same time, the negative pole of D1 is connected to the negative pole of D3; the positive pole of D2 is connected to the positive pole of D4; the negative pole of D5 is connected to the negative pole of D7; the positive pole of D6 is connected to the positive pole of D8; thereby outputting DC power; pin 1 of V1 is connected to the positive pole of C1 and C3; pin 3 of V1 is connected to the positive poles of C4 and C2 to output +12V power; at the same time, the negative pole of C1, the lower end of C3, the lower end of C4, and the negative pole of C2 , V1's 4th pin is connected to GND; V2's 4th pin is connected to C5's negative pole and C6; V2's 3rd pin is connected to C7 and C8's negative pole to output -12V power supply; at the same time, C5's positive pole, C6's upper end, C7's upper end, C8's positive pole, and V2's 1st pin are connected to GND; V3's 1st pin is connected to C13's positive pole and C15's upper end; V3's 3rd pin is connected to C16 and C14's positive pole; C16's upper end is connected to D17's positive pole, and D17's negative pole is connected to C14's positive pole; at the same time, C13's negative pole, C15's lower end, C16's lower end, C14's negative pole, and V3's 4th pin are connected to GND; V3's 3rd pin is connected to V4's 3rd pin through D17 to output VCC power supply, and V4's 3rd pin is connected to GND through C17 and C21; V4's 1st pin is connected to GND; V4's 2nd and 4th pins output 3V3 power supply and are connected to GND through C22 and C18 respectively;

[0012] The communication unit is composed of a USB interface, an SP3232 chip, an SP3485 chip, a diode, and a resistor and capacitor; the USB pin 1 is connected to VCC and connected to the negative pole of D16; the USB pin 2 is connected to the negative pole of D12; the USB pin 3 is connected to the negative pole of D13; the USB pin 4, the positive pole of D16, the positive pole of D12, and the positive pole of D13 are connected to GND; the 485 communication interface U7 pins 1, 2, and 4 are respectively connected to the microcontroller U3 pins PB8, PB9, and PE0; the U7 pins 2 and 3 are directly connected, and the 3 pin is connected to GND through R23; the U7 pins 5 and 8 are respectively directly connected to GN D and 3V3; Pins 6 and 7 of U7 are connected through R6, and are connected to Pins 2 and 1 of CN6 and the negative pole of D10 and the negative pole of D11 respectively; Pin 3 of CN6, the positive pole of D10 and the positive pole of D11 are connected to GND; Pins 1 and 3 of 232 communication interface U18 are connected through C130; Pins 4 and 5 are connected through C133; Pins 2 and 6 are connected to GND through C129 and C131; Pins 15 and 16 are directly connected to GND and 3V3; Pins 9 and 10 of U18 are connected to U3 pins PC11 and PC10 respectively; Pins 7 and 8 are connected to Pins 2 and 3 of CN2 respectively; Pin 1 of CN2 is directly connected to GND;

[0013] The STM32H743 system unit consists of a 128-pin STM32H743ZET6 single-chip computer U3, a crystal oscillator, a resistor, a capacitor and a buzzer; in addition to connecting the A / D conversion unit, the D / A conversion unit and the communication unit, U3 pins PA13 and PA14 are connected to the 3rd and 2nd pins of PRG, respectively connected to 3V3 and GND through R13 and R14, and the 1st and 4th pins of PRG are respectively connected to 3V3 and GND; U3 pin PC16 is connected to 3V3 through R20 and MCUON; U3 PD0, PD1, and PD2 pins are respectively connected to U19 pins 2 and 3V3. U20 pin 2, U25 pin 4; U3's PE2 is connected to Q4's pin 1 through R21, Q's pin 2 is connected to GND, pin 3 is connected to BEEP, and the other end of BEEP is connected to 3V3; U3 pin 12 is connected to the external crystal oscillator CK1's pin 3, and at the same time, CK1's pins 4 and 2 are connected to 3V3 and GND respectively; U3 pin 14 is connected to 3V3 through R19; U3 pin 94 is connected to GND; U3 pins 10, 26, 49, 74, 99, 19, 48, and 73 are connected to GND; U3 pins 11, 27, 50, 75, 100, 21, 20, and 6 are connected to 3V3.

[0014] The beneficial effects of the weldable electronic balance adjustment circuit of the utility model are:

[0015] First, only one digital processing chip STM32H743 is used to realize synchronous sampling, suppress zero drift, judge trigger signal and set up initial data storage and transmission, making the scheme implementation simpler; through the design of the electromagnetic measurement part, the detection of the balance position and the net weight excitation drive are realized; the operational amplifier and the resistor-capacitor network are combined to realize automatic balance adjustment; the hysteresis phase is compensated to realize real-time monitoring of the balance position. At the same time, the analog front-end circuit is composed of resistors, capacitors and operational amplifiers, which reduces the circuit implementation cost.

[0016] Second, in order to realize the static measurement function, the dynamic measurement function must be met at the same time. The dual PID mode is adopted, and the analog PID feedback control technology is used to realize the automatic balance adjustment and compensate the hysteresis phase. The digital processing chip STM32H743 chip controls the zero point compensation and the tare excitation drive to realize the tare design of digital PID control, so that the measurement system can respond quickly. The AD acquisition unit performs multi-point transient synchronous monitoring in the entire measurement process to ensure the real-time transmission of the system measurement data and improve the measurement efficiency.

[0017] Third, the balance needs to be calibrated for tare weight before the measurement begins, and the tare weight calibration should have been completed in the net weight measurement. This requires that the control and excitation coil drive of the two parts should be independent of each other and not affect each other. The debugged system has strong anti-interference performance and is suitable for any circuit topology to control the input or output current. It is easy to achieve current sharing, which facilitates the subsequent signal filtering and collection work, and improves the accuracy and resolution of the measurement results. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 The utility model is a schematic diagram of an overall module of a weldable electronic balance balance adjustment circuit.

[0019] Figure 2 This is the circuit diagram of the LVDT conditioning unit.

[0020] Figure 3 This is the circuit diagram of the PID signal modulation unit.

[0021] Figure 4 This is the circuit diagram of the coil excitation unit.

[0022] Figure 5 This is the circuit diagram of the reference voltage unit of the signal acquisition unit.

[0023] Figure 6 This is the circuit diagram of the signal acquisition unit A / D conversion unit.

[0024] Figure 7 This is the circuit diagram of the power supply unit.

[0025] Figure 8 The circuit diagram of the communication unit.

[0026] Fig. 9 This is the circuit diagram of the STM32H743 system unit.

[0027] Fig.10 This is a diagram of the solderability electronic balance device.

[0028] Fig.11 This is the connection diagram between the mechanical device and the PC.

[0029] Fig.12 It is the measurement interface of the host computer. DETAILED DESCRIPTION

[0030] The specific implementation of the utility model is further described in detail below with reference to the accompanying drawings.

[0031] Method 1

[0032] The following is a specific implementation of the solderable electronic balance balancing and adjusting circuit of the present invention.

[0033] The solderable electronic balance balance adjustment circuit in this specific implementation manner has an overall module schematic diagram as shown in FIG. Figure 1 As shown, the balance adjustment circuit of the weldable electronic balance is composed of an LVDT conditioning unit, a PID signal modulation unit, a coil excitation unit, a signal acquisition unit, a power supply unit, a communication unit and an STM32H743 system unit;

[0034] The LVDT conditioning unit is as follows Figure 2 As shown; it is mainly composed of the universal LVDT signal conditioning chip AD698. First, the 17th and 18th pins of AD698 output excitation signals to the 4th and 5th pins of the LVDT input terminal CN4. The displacement signal is connected to the 6th and 7th pins of the output terminal CN4 through the LVDT displacement sensor. The 6th pin of CN4 is connected to the 15th pin of AD698. The 7th pin of CN4 is first connected to R87, and then to the 16th pin of CN4; the 16th pin of CN4 is connected to GND after passing through C51 and R93 respectively; the 28th pin of CN4 is connected to the positive pole of C61 and one end of C62 is connected to +12V, and the negative pole of C61 and the other end of C62 are connected to GN D; Pin 1 of CN4 is connected to the negative pole of C63 and one end of C64 is connected to -12V, and the positive pole of C63 and the other end of C64 are connected to GND; R96 is used to set the excitation voltage between pins 5 and 6 of CN4, and at the same time, pins 26 and 27 of CN4 are connected to -12V through R100 and R99 respectively to set the output DC bias voltage determination component of AD698, and C60 is used to set the output signal frequency between pins 7 and 8, and pin 23 of CN4 is connected to control R89 to set the gain or full-scale output range determination component; pin 23 of CN4 outputs SIG signal, which is input to pin 3 of U15A by connecting pins 2 and 3 of JP1;

[0035] The PID signal modulation unit is as follows: Figure 3As shown; it consists of a low-noise operational amplifier OPA2227, an operational amplifier TCA0372 and several resistors and capacitors; the SIG signal is input through pin 3 of U15A; pins 4 and 8 of U15A are connected to -12V and +12V respectively; pin 2 of U15A is connected to GND through R60, and is connected to pin 1 of U15A through R62. Pin 1 of U15A is connected to pin 5 of U15B through R58, R97, and C58, and pin 5 of U15B is connected to GND through potentiometers R32 and R66; pin 4 and pin 8 of U15B are connected to -12V and +12V respectively; signal VCAL0 is input to pin 6 of U15B through R102, and pin 6 of U15B is connected to pin 7 of U15B through C59, R65, and R98; pin 7 of U15B outputs signal PIDO through R38, R76, and C35 and input to pin 5 of U11B, and pin 5 of U11B is connected to GND through R72; pin 6 of U11B is connected to pin 7 of U11B through R79. C40 is connected in parallel with R7, and pin 6 of U11B is connected to GND through R78, R43 and C36 respectively; pin 4 and pin 8 of U11B are connected to -12V and +12V respectively; pin 7 of U11B is connected to pin 3 of U11A through R37, R35 and C48, and pin 3 of U11A is connected to GND through R34; pin 2 of U11A is connected to pin 1 of U11A through R36; pin 1 of U11A is connected to GND through R36, C34 and R75 respectively, and is connected to pin 3 of U12A at the same time; signal VGDS is input to pin 3 of U12A; pin 2 of U12A is connected to GND through R45, and is connected to pin 1 of U12A through R46 and JP. Pin 1 of U12A is connected to GND through R73 and R74; the upper end of R74 is connected to pin 6 of U16A; pin 1 and pin 13 of U16A are connected to +12V and -12V power supplies respectively; pin 10 of U16A is connected to pin 16 of U16A through R106, and connected to GND through R10 and C71 respectively; pin 16 of U16A is connected to pin 8 and pin 3 of RL1; signal VCAL1 is connected to pin 6 of U17A; pin 10 of U17A is connected to R101 to GND, and connected to R94, and connected to GND through R108, C76, and C75; pin 16 of U17A is connected to the lower end of R109 and the upper end of R108;

[0036] The coil excitation circuit unit is as follows: Figure 4As shown; it consists of a low-noise operational amplifier, an external multi-channel high-precision DAC, an operational amplifier, a relay, a transistor, a resistor and a capacitor; Pin 1 of U12A is connected to GND through R73 and R74; the upper end of R74 is connected to Pin 6 of U16A; Pin 1 and Pin 13 of U16A are connected to +12V and -12V power supplies respectively; Pin 10 of U16A is connected to Pin 16 of U16A through R106, and connected to GND through R10 and C71 respectively; Pin 16 of U16A is connected to Pin 8 and Pin 3 of RL1; Signal VCA L1 is connected to pin 6 of U17A; pin 10 of U17A is connected to R101 to GND, and connected to R94, and connected to GND through R108, C76, and C75; pin 16 of U17A is connected to the lower end of R109 and the upper end of R108; pin 1 of RL1 is connected to VCC; pin 10 of RL1 is connected to VCC through D18, and is also connected to pin 3 of transistor Q8; the cathode of diode D18 is connected to GND through C67, pin 4 of RL1 is connected to pin 7 to output GWIRE+ signal, and pin 3 of RL1 is connected to VCC through R107 and C7 2. C68 is connected to GND; U3A's PB13 pin is connected to Q8's 1 pin through R104; connector CN5's 6th and 7th pins are connected through D15, CN5's 1st and 2nd pins are connected through D14, and 4th pin is connected to VCC through R110; U4's pins 1, 2, 9, 16, and 15 are connected to MCU U3A's PA4, PA2, PA3, PA5, and PA7 respectively; U4's pins 3 and 14 are connected to VCC and GND respectively; U4's pins 4 and 13 are connected to U5B's 6th pin through R30 and R27 respectively. , U5B's 6th pin is connected to NR25 and VR25 through R16 and R33 respectively, and the 6th pin is connected to U5B's 7th pin through R31 and C27; U5B pins 4, 5, and 8 are connected to -12V, GND, and +12V respectively; U4 pins 5 and 12 are connected to U5A's 2nd pin through R26 and R28 respectively, U5A's 2nd pin is connected to NR25 and VR25 through R15 and R25 respectively, and the 2nd pin is connected to U5A's 1st pin through R29 and C26; U5A pins 4, 3, and 8 are connected to -12V, GND, and +12V respectively;

[0037] The signal acquisition unit is as follows: Figure 5 and Figure 6As shown; it consists of a reference voltage reference and A / D conversion; the reference voltage reference consists of a low-noise operational amplifier, a transistor, and a resistor and capacitor; the definition signal VREF is input to pin 3 of U1A, and pin 3 of U1A is connected to VCC through R1, and connected to GND through C9 and R3; pins 4 and 8 of U1A are connected to -12V and +12V power supplies respectively; pin 2 of U1A is connected to GND through C12, connected to pin 1 through R4, and connected to pin 6 of U1B through R7 and R11; pin 6 of U1B is connected to pin 7 through R8 and R9; pin 5 of U1B is connected to GND, and pins 4 and 8 of U1B are connected to -12V and +12V power supplies respectively; pin 1 of U1A is input to pin 3 of U2A through R4; pin 2 of U2A is connected to pin 1 through R1 2. C19 and C20 are coupled to GND and directly connected to pin 2 of Q2; pin 1 of U2A is connected to pin 1 of Q2 through R10; pins 4 and 8 of U2A are connected to -12V and +12V power supplies respectively, and pin 3 of Q2 is connected to +12V; pin 1 of U1B is connected to pin 5 of U2B; pin 6 of U2B is coupled to GND through R5, C10, and C11, and directly connected to pin 2 of Q1; pin 1 of U2A is connected to pin 1 of Q1 through R2; pins 4 and 8 of U2A are connected to -12V and +12V power supplies respectively, and pin 3 of Q1 is connected to +12V; the A / D conversion circuit consists of a low-noise operational amplifier, a high-precision differential ADC, an external crystal oscillator, and several resistors and capacitors; pin 5 of U12B is connected to GND; Pin 6 of U12B is connected to GND through R88 and R91, and connected to Pin 7 through C53, R92 and R90 respectively; Pin 4 and Pin 8 of U12B are connected to -12V and +12V power supplies respectively; Sampling signal GW- is connected to GND through R57, R59, R63 and R64; The right end of R59 is connected to Pin 3 of U9A; Pin 2 of U9A is connected to Pin 1 of U9A; Pin 1 of U9A is connected to GND through R61 and C39; Pin 4 and Pin 8 of U9A are connected to -2.5V and +2.5V power supplies respectively; Balance signal PIDO is connected to GND through R47, R49, R53 and R54; The right end of R49 is connected to Pin 3 of U8A; Pin 2 of U8A is connected to Pin 1 of U8A; Pin 1 of U8A is connected to GND through R 51 and C37 are connected to GND; U8A's 4th and 8th pins are connected to -2.5V and +2.5V power supplies respectively; the gain signal SIG is connected to GND through R77, R81, R85, and R86; the right end of R81 is connected to U9B's 5th pin; U9B's 2nd pin is connected to U9B's 7th pin; U9B's 7th pin is connected to GND through R83 and C49; U9B's 4th and 8th pins are connected to -2.5V and +2.5V power supplies respectively; the drive signal VGDS is connected to GND through R48, R50, R55, and R56; the right end of R50 is connected to U8B's 5th pin; U8B's 2nd pin is connected to U8B's 7th pin; U8B's 7th pin is connected to GND through R52 and C38; U8B's 4th and 8th pins are connected to -2.5V and +2.5V respectively.5V power supply; U10 pins 1, 3, 5, 7, 14, 27, 32 are directly connected to GND; U9A's pin 1 is connected to U10's pin 6 through R61, U8A's pin 1 is connected to U10's pin 2 through R51, U9B's pin 7 is connected to U10's pin 8 through R83, and U8B's pin 7 is connected to U10's pin 4 through R52 as four-way signal input; U10 pins 15, 16, 29 are directly connected to 3V3; +2V5 is connected to GND through C121, C122, C123, C124, respectively, and -2V5 is connected to GND through C125, C126, C127, C128, respectively; U10's pins 10 and 11 are directly connected to -2V5, and pin 9 is directly connected to +2V5; U10's pin 28 is connected to GND through C47; U10's pin 13 is connected to pin 12 through C44, Connect to GND through C42 and C43 respectively, and connect to NR25 through R67; U10's 30th and 31st pins are connected to 3V3 through R68 and R69 respectively, and 30th pin is connected to GND through R42; U10's 17th pin is connected to the PB10 pin of the microcontroller U3A; U10's 23rd pin is connected to the microcontroller PE15 through R80 and then to PE11 through R82; U10's pins 22, 20, and 19 are directly connected to PE13, PE14, and PE11 respectively; U10's 21st pin is connected to 3V3 through R71; the 1st pin of the external crystal oscillator CK2 is directly connected to U10's pin 26; the 3rd pin of CK2 is directly connected to U10's pin 25; CK2 pins 1 and 3 are connected through R70; CK2 pins 1 and 3 are connected to GND through C46 and C45 respectively; CK2's 2nd and 4th pins are directly connected to GND;.

[0038] The power supply unit is as follows: Figure 7As shown; it consists of a transformer, a diode, a low-noise LDO and several capacitors; 220V AC power outputs two AC power supplies through the transformer, and the 1st pin of the transformer connector CN1 is connected to the positive pole of D1 and the negative pole of D2; the 3rd pin of CN1 is connected to the positive pole of D3 and the negative pole of D4; the 4th pin of CN1 is connected to the positive pole of D5 and the negative pole of D6; the 5th pin of CN1 is connected to the positive pole of D7 and the negative pole of D8; the 2nd pin of CN1 is connected to GND; at the same time, the negative pole of D1 is connected to the negative pole of D3; the positive pole of D2 is connected to the positive pole of D4; the negative pole of D5 is connected to the negative pole of D7; the positive pole of D6 is connected to the positive pole of D8; thus, a DC power supply is output; the 1st pin of V1 is connected to the positive pole of C1 and C3; the 3rd pin of V1 is connected to the positive pole of C4 and C2 to output a +12V power supply; at the same time, the negative pole of C1, the lower end of C3, the lower end of C4, the negative pole of C2, V Pin 4 of 1 is connected to GND; Pin 4 of V2 is connected to the negative pole of C5 and C6; Pin 3 of V2 is connected to the negative pole of C7 and C8 to output -12V power supply; at the same time, the positive pole of C5, the upper end of C6, the upper end of C7, the positive pole of C8, and Pin 1 of V2 are connected to GND; Pin 1 of V3 is connected to the positive pole of C13 and the upper end of C15; Pin 3 of V3 is connected to the positive pole of C16 and C14; the upper end of C16 is connected to the positive pole of D17, and the negative pole of D17 is connected to the positive pole of C14; at the same time, the negative pole of C13, the lower end of C15, the lower end of C16, the negative pole of C14, and Pin 4 of V3 are connected to GND; Pin 3 of V3 is connected to Pin 3 of V4 through D17 to output VCC power supply, and Pin 3 of V4 is connected to GND through C17 and C21; Pin 1 of V4 is connected to GND; Pin 2 and Pin 4 of V4 output 3V3 power supply and are connected to GND through C22 and C18 respectively;

[0039] The communication unit is as follows Figure 8 As shown; it consists of a USB interface, SP3232 chip, SP3485 chip, diodes and resistors and capacitors; USB pin 1 is connected to VCC and connected to the negative pole of D16; USB pin 2 is connected to the negative pole of D12; USB pin 3 is connected to the negative pole of D13; USB pin 4, D16 positive pole, D12 positive pole, D13 positive pole are connected to GND; 485 communication interface U7 pins 1, 2, 4 are connected to microcontroller U3 pins PB8, PB9, PE0 respectively; U7 pins 2 and 3 are directly connected, and pin 3 is connected to GND through R23; U7 pins 5 and 8 are directly connected to GND and 3V3; Pins 6 and 7 of U7 are connected through R6, and are connected to pins 2 and 1 of CN6 and negative poles of D10 and D11 respectively; Pin 3 of CN6, positive pole of D10 and positive pole of D11 are connected to GND; Pins 1 and 3 of 232 communication interface U18 are connected through C130; Pins 4 and 5 are connected through C133; Pins 2 and 6 are connected to GND through C129 and C131; Pins 15 and 16 are directly connected to GND and 3V3; Pins 9 and 10 of U18 are connected to U3 pins PC11 and PC10 respectively; Pins 7 and 8 are connected to pins 2 and 3 of CN2 respectively; Pin 1 of CN2 is directly connected to GND;

[0040] The STM32H743 system unit is as Fig. 9 As shown; it consists of a 128-pin STM32H743ZET6 microcontroller U3, a crystal oscillator, a resistor, a capacitor and a buzzer; U3 is connected to the A / D conversion unit, the D / A conversion unit and the communication unit, and the U3 pins PA13 and PA14 are connected to the 3rd and 2nd pins of PRG, respectively connected to 3V3 and GND through R13 and R14, and the 1st and 4th pins of PRG are respectively connected to 3V3 and GND; U3 pin PC16 is connected to 3V3 through R20 and MCUON; U3's PD0, PD1, and PD2 pins are connected to U19 pin 2 and U20 pin 2 respectively. , U25 pin 4; U3's PE2 is connected to pin 1 of Q4 through R21, pin 2 of Q is connected to GND, pin 3 is connected to BEEP, and the other end of BEEP is connected to 3V3; U3 pin 12 is connected to pin 3 of the external crystal oscillator CK1, and pins 4 and 2 of CK1 are connected to 3V3 and GND respectively; U3 pin 14 is connected to 3V3 through R19; U3 pin 94 is connected to GND; U3 pins 10, 26, 49, 74, 99, 19, 48, 73 are connected to GND; U3 pins 11, 27, 50, 75, 100, 21, 20, 6 are connected to 3V3.

[0041] It should be noted that the entire system device has been developed in kind, such as Fig.10 , Fig.11 and Fig.12 As shown; the 220V power supply supplies power to the circuit board through the transformer, connects the LVDT sensor and the winding coil respectively, and communicates with the host computer through USB to achieve stable operation of the system.

[0042] According to the technical parameters given in the above specific implementation methods, the utility model has the following indicators: the LVDT conditioning circuit integrates the output controllable displacement signal processing circuit, simplifies the circuit structure, reduces the circuit cost and power consumption; uses an external high-precision 24-bit resolution differential ADC to synchronously monitor multi-point transients and collect signals in real time; at the same time, in the measurement process, a dual PID mode is adopted, the two parts are independent of each other, do not affect each other, and have strong anti-interference ability; the comparator of the single-chip microcomputer STM32H743 is used to pick up the trigger signal of the channel to form a trigger event for signal collection of the excitation circuit. And when multiple circuits work at the same time, it can also be used as an excitation for system signal collection, providing real-time data calibration for the entire collection system to complete synchronous collection; only one digital processing chip STM32H743 is used to realize multi-point synchronous sampling, digital PID adjustment, data transmission and data storage and other functions, which greatly improves the integration of the circuit and makes the circuit more streamlined.

[0043] Method 2

[0044] The following is a specific implementation of the solderability electronic balance balance adjustment method of the present invention.

[0045] The weldable electronic balance balance adjustment method under this specific implementation mode works under the joint coordination of the LVDT conditioning unit, the PID signal modulation unit, the coil excitation unit, the signal acquisition unit, the power supply unit, the communication unit and the STM32H743 system unit; the weldable electronic balance measurement front end integrates the displacement signal acquisition unit, realizes automatic adjustment of the output signal through analog and digital dual PID adjustment, uses a 24-bit external 4-channel analog-to-digital conversion chip to perform transient synchronous sampling of multi-point signals, specifies the event triggering conditions in the lower computer, and the single-chip microcomputer determines whether the event triggering conditions are met. Only when the conditions are met will the circuit start signal adjustment and acquisition transmission.

[0046] It should also be noted that the above shows and describes the basic principles and main features of the utility model and the advantages of the utility model. Those skilled in the art should understand that the utility model is not limited by the above specific embodiments. The above specific embodiments and the description are only to illustrate the principles of the utility model. Without departing from the spirit and scope of the utility model, the utility model will have various changes and improvements, which fall within the scope of the utility model to be protected. The scope of protection claimed by the utility model is defined by the attached claims and their equivalents.

Claims

1. A weldable electronic balance balancing circuit, characterized in that: It consists of LVDT conditioning unit, PID signal modulation unit, coil excitation unit, signal acquisition unit, power supply unit, communication unit and STM32H743 system unit; The LVDT conditioning unit is mainly composed of a universal LVDT signal conditioning chip AD698. First, the 17th and 18th pins of AD698 output excitation signals to the 4th and 5th pins of the LVDT input terminal CN4. The displacement signal is connected to the 6th and 7th pins of the output terminal CN4 through the LVDT displacement sensor. The 6th pin of CN4 is connected to the 15th pin of AD698. The 7th pin of CN4 is first connected to R87 and then to the 16th pin of CN4. The 16th pin of CN4 is connected to GND after passing through C51 and R93 respectively. The 28th pin of CN4 is connected to the positive pole of C61 and one end of C62 is connected to +12V, and the negative pole of C61 is connected to the other end of C62. Connect to GND; Pin 1 of CN4 is connected to the negative pole of C63 and one end of C64 is connected to -12V, and the positive pole of C63 and the other end of C64 are connected to GND; R96 is used to set the excitation voltage between pins 5 and 6 of CN4, and at the same time, pins 26 and 27 of CN4 are connected to -12V through R100 and R99 respectively to set the output DC bias voltage determination component of AD698, and C60 is used to set the output signal frequency between pins 7 and 8, and pin 23 of CN4 is connected to control R89 to set the gain or full-scale output range determination component; Pin 23 of CN4 outputs SIG signal, which is input to pin 3 of U15A by connecting pins 2 and 3 of JP1; The PID signal modulation unit is composed of a low-noise operational amplifier and a number of resistors and capacitors; the SIG signal is input through the 3rd pin of U15A; the 4th and 8th pins of U15A are connected to -12V and +12V respectively; the 2nd pin of U15A is connected to GND through R60, and is connected to the 1st pin of U15A through R62; the 1st pin of U15A is connected to the 5th pin of U15B through R58, R97 and C58, and the 5th pin of U15B is connected to GND through potentiometers R32 and R66; the 4th and 8th pins of U15B are connected to -12V and +12V respectively; the signal VCAL0 is input to the 6th pin of U15B through R102, and the 6th pin of U15B is connected to the 7th pin of U15B through C59, R65 and R98; the 7th pin output signal PIDO of U15B is input to Pin 5 of U11B, Pin 5 of U11B is connected to GND through R72; Pin 6 of U11B is connected to Pin 7 of U11B through R79; C40 is connected in parallel with R7, Pin 6 of U11B is connected to GND through R78, R43 and C36 respectively; Pin 4 and Pin 8 of U11B are connected to -12V and +12V respectively; Pin 7 of U11B is connected to Pin 3 of U11A through R37, R35 and C48, Pin 3 of U11A is connected to GND through R34; Pin 2 of U11A is connected to Pin 1 of U11A through R36; Pin 1 of U11A is connected to GND through R36, C34 and R75 respectively, and is connected to Pin 3 of U12A at the same time; Signal VGDS is input to Pin 3 of U12A; Pin 2 of U12A is connected to GND through R45, and is connected to Pin 1 of U12A through R46 and JP; The coil excitation unit is composed of a low-noise operational amplifier, an external multi-channel high-precision DAC, an operational amplifier, a relay, a triode, a resistor and a capacitor; Pin 1 of U12A is connected to GND through R73 and R74; the upper end of R74 is connected to Pin 6 of U16A; Pin 1 and Pin 13 of U16A are respectively connected to +12V and -12V power supplies; Pin 10 of U16A is connected to Pin 16 of U16A through R106, and is respectively connected to GND through R10 and C71; Pin 16 of U16A is connected to Pin 8 and Pin 3 of RL1; Signal VCAL1 is connected to Pin 6 of U17A; Pin 10 of U17A is connected to R101 to GND, and is connected to R94, and is connected to R1 08, C76, C75 are connected to GND; Pin 16 of U17A is connected to the lower end of R109 and the upper end of R108; Pin 1 of RL1 is connected to VCC; Pin 10 of RL1 is connected to VCC through D18, and is also connected to Pin 3 of transistor Q8; The cathode of diode D18 is connected to GND through C67, Pin 4 of RL1 is connected to Pin 7 to output GWIRE+ signal, Pin 3 of RL1 is connected to GND through R107 and C72, C68; Pin PB13 of U3A is connected to Pin 1 of Q8 through R104; Pin 6 and Pin 7 of connector CN5 are connected through D15, Pin 1 and Pin 2 of CN5 are connected through D14, and Pin 4 is connected to VCC through R110; U4 pins 1, 2, 9, 16, 15 are connected to PA4, PA2, PA3, PA5, PA7 of microcontroller U3A respectively; U4 pins 3 and 14 are connected to VCC and GND respectively; U4 pins 4 and 13 are connected to U5B pin 6 through R30 and R27 respectively, U5B pin 6 is connected to NR25 and VR25 through R16 and R33 respectively, and pin 6 is connected to U5B pin 7 through R31 and C27; U5B pins 4, 5, 8 are connected to -12V, GND, +12V respectively; U4 pins 5 and 12 are connected to U5A pin 2 through R26 and R28 respectively, U5A pin 2 is connected to NR25 and VR25 through R15 and R25 respectively, and pin 2 is connected to U5A pin 1 through R29 and C26; U5A pins 4, 3, 8 are connected to -12V, GND, +12V respectively; The signal acquisition unit is composed of a reference voltage reference and an A / D converter; the reference voltage reference is composed of a low-noise operational amplifier, a triode, and a resistor and capacitor; the definition signal VREF is input to pin 3 of U1A, and pin 3 of U1A is connected to VCC through R1, and connected to GND through C9 and R3; pins 4 and 8 of U1A are respectively connected to -12V and +12V power supplies; pin 2 of U1A is connected to GND through C12, connected to pin 1 through R4, and connected to pin 6 of U1B through R7 and R11; pin 6 of U1B is connected to pin 7 through R8 and R9; pin 5 of U1B is connected to GND, and pins 4 and 8 of U1B are respectively connected to -12V and +12V power supplies; pin 1 of U1A is input to pin 3 of U2A through R4; pin 2 of U2A Connect GND through the coupling of R12, C19, and C20, and directly connect to pin 2 of Q2; pin 1 of U2A is connected to pin 1 of Q2 through R10; pins 4 and 8 of U2A are connected to -12V and +12V power supplies respectively, and pin 3 of Q2 is connected to +12V; pin 1 of U1B is connected to pin 5 of U2B; pin 6 of U2B is connected to GND through the coupling of R5, C10, and C11, and directly connect to pin 2 of Q1; pin 1 of U2A is connected to pin 1 of Q1 through R2; pins 4 and 8 of U2A are connected to -12V and +12V power supplies respectively, and pin 3 of Q1 is connected to +12V; the A / D conversion circuit consists of a low-noise operational amplifier, a high-precision differential ADC, an external crystal oscillator, and several resistors and capacitors; pin 5 of U12B is connected to pin 5 of U2B through R103 Connect to GND; Pin 6 of U12B is connected to GND through R88 and R91, and connected to Pin 7 through C53, R92 and R90 respectively; Pin 4 and Pin 8 of U12B are connected to -12V and +12V power supplies respectively; Sampling signal GW- is connected to GND through R57, R59, R63 and R64; The right end of R59 is connected to Pin 3 of U9A; Pin 2 of U9A is connected to Pin 1 of U9A; Pin 1 of U9A is connected to GND through R61 and C39; Pin 4 and Pin 8 of U9A are connected to -2.5V and +2.5V power supplies respectively; Balance signal PIDO is connected to GND through R47, R49, R53 and R54; The right end of R49 is connected to Pin 3 of U8A; Pin 2 of U8A is connected to Pin 1 of U8A; Pin 1 of U8A is connected to GND through R47, R49, R53 and R54; R51 and C37 are connected to GND; U8A's 4th and 8th pins are connected to -2.5V and +2.5V power supplies respectively; the gain signal SIG is connected to GND through R77, R81, R85, and R86; the right end of R81 is connected to U9B's 5th pin; U9B's 2nd pin is connected to U9B's 7th pin; U9B's 7th pin is connected to GND through R83 and C49; U9B's 4th and 8th pins are connected to -2.5V and +2.5V power supplies respectively; the drive signal VGDS is connected to GND through R48, R50, R55, and R56; the right end of R50 is connected to U8B's 5th pin; U8B's 2nd pin is connected to U8B's 7th pin; U8B's 7th pin is connected to GND through R52 and C38; U8B's 4th and 8th pins are connected to -2.5V and +2.5V respectively.5V power supply; U10 pins 1, 3, 5, 7, 14, 27, 32 are directly connected to GND; U9A's pin 1 is connected to U10's pin 6 through R61, U8A's pin 1 is connected to U10's pin 2 through R51, U9B's pin 7 is connected to U10's pin 8 through R83, and U8B's pin 7 is connected to U10's pin 4 through R52 as four-way signal input; U10 pins 15, 16, 29 are directly connected to 3V3; +2V5 is connected to GND through C121, C122, C123, C124, respectively, and -2V5 is connected to GND through C125, C126, C127, C128, respectively; U10's pins 10 and 11 are directly connected to -2V5, and pin 9 is directly connected to +2V5; U10's pin 28 is connected to GND through C47; U10's pin 13 is connected to pin 12 through C44, Connect to GND through C42 and C43 respectively, and connect to NR25 through R67; U10's 30th and 31st pins are connected to 3V3 through R68 and R69 respectively, and 30th pin is connected to GND through R42; U10's 17th pin is connected to the PB10 pin of the microcontroller U3A; U10's 23rd pin is connected to the microcontroller PE15 through R80 and then to PE11 through R82; U10's pins 22, 20, and 19 are directly connected to PE13, PE14, and PE11 respectively; U10's 21st pin is connected to 3V3 through R71; the 1st pin of the external crystal oscillator CK2 is directly connected to U10's pin 26; the 3rd pin of CK2 is directly connected to U10's pin 25; CK2 pins 1 and 3 are connected through R70; CK2 pins 1 and 3 are connected to GND through C46 and C45 respectively; CK2's 2nd and 4th pins are directly connected to GND;. The power supply unit is composed of a transformer, a diode, a low-noise LDO and a number of capacitors; 220V AC power is output through the transformer to output two AC power supplies, and pin 1 of the transformer connector CN1 is connected to the positive pole of D1 and the negative pole of D2; pin 3 of CN1 is connected to the positive pole of D3 and the negative pole of D4; pin 4 of CN1 is connected to the positive pole of D5 and the negative pole of D6; pin 5 of CN1 is connected to the positive pole of D7 and the negative pole of D8; pin 2 of CN1 is connected to GND; at the same time, the negative pole of D1 is connected to the negative pole of D3; the positive pole of D2 is connected to the positive pole of D4; the negative pole of D5 is connected to the negative pole of D7; the positive pole of D6 is connected to the positive pole of D8; thereby outputting DC power; pin 1 of V1 is connected to the positive pole of C1 and C3; pin 3 of V1 is connected to the positive poles of C4 and C2 to output +12V power; at the same time, the negative pole of C1, the lower end of C3, the lower end of C4, and the negative pole of C2 , V1's 4th pin is connected to GND; V2's 4th pin is connected to C5's negative pole and C6; V2's 3rd pin is connected to C7 and C8's negative pole to output -12V power supply; at the same time, C5's positive pole, C6's upper end, C7's upper end, C8's positive pole, and V2's 1st pin are connected to GND; V3's 1st pin is connected to C13's positive pole and C15's upper end; V3's 3rd pin is connected to C16 and C14's positive pole; C16's upper end is connected to D17's positive pole, and D17's negative pole is connected to C14's positive pole; at the same time, C13's negative pole, C15's lower end, C16's lower end, C14's negative pole, and V3's 4th pin are connected to GND; V3's 3rd pin is connected to V4's 3rd pin through D17 to output VCC power supply, and V4's 3rd pin is connected to GND through C17 and C21; V4's 1st pin is connected to GND; V4's 2nd and 4th pins output 3V3 power supply and are connected to GND through C22 and C18 respectively; The communication unit is composed of a USB interface, an SP3232 chip, an SP3485 chip, a diode, and a resistor and capacitor; the USB pin 1 is connected to VCC and connected to the negative pole of D16; the USB pin 2 is connected to the negative pole of D12; the USB pin 3 is connected to the negative pole of D13; the USB pin 4, the positive pole of D16, the positive pole of D12, and the positive pole of D13 are connected to GND; the 485 communication interface U7 pins 1, 2, and 4 are respectively connected to the microcontroller U3 pins PB8, PB9, and PE0; the U7 pins 2 and 3 are directly connected, and the 3 pin is connected to GND through R23; the U7 pins 5 and 8 are respectively directly connected to GN D and 3V3; Pins 6 and 7 of U7 are connected through R6, and are connected to Pins 2 and 1 of CN6 and the negative pole of D10 and the negative pole of D11 respectively; Pin 3 of CN6, the positive pole of D10 and the positive pole of D11 are connected to GND; Pins 1 and 3 of 232 communication interface U18 are connected through C130; Pins 4 and 5 are connected through C133; Pins 2 and 6 are connected to GND through C129 and C131; Pins 15 and 16 are directly connected to GND and 3V3; Pins 9 and 10 of U18 are connected to U3 pins PC11 and PC10 respectively; Pins 7 and 8 are connected to Pins 2 and 3 of CN2 respectively; Pin 1 of CN2 is directly connected to GND; The STM32H743 system unit consists of a 128-pin STM32H743ZET6 single-chip computer U3, a crystal oscillator, a resistor, a capacitor and a buzzer; in addition to connecting the A / D conversion unit, the D / A conversion unit and the communication unit, U3 pins PA13 and PA14 are connected to the 3rd and 2nd pins of PRG, respectively connected to 3V3 and GND through R13 and R14, and the 1st and 4th pins of PRG are respectively connected to 3V3 and GND; U3 pin PC16 is connected to 3V3 through R20 and MCUON; U3 PD0, PD1, and PD2 pins are respectively connected to U19 pins 2 and 3V3. U20 pin 2, U25 pin 4; U3's PE2 is connected to Q4's pin 1 through R21, Q's pin 2 is connected to GND, pin 3 is connected to BEEP, and the other end of BEEP is connected to 3V3; U3 pin 12 is connected to the external crystal oscillator CK1's pin 3, and at the same time, CK1's pins 4 and 2 are connected to 3V3 and GND respectively; U3 pin 14 is connected to 3V3 through R19; U3 pin 94 is connected to GND; U3 pins 10, 26, 49, 74, 99, 19, 48, and 73 are connected to GND; U3 pins 11, 27, 50, 75, 100, 21, 20, and 6 are connected to 3V3.

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