The application relates to a
memristor reserve
pool computing circuit and a prediction method for real-time
epilepsy prediction, and belongs to the technical field of electroencephalogram
signal processing. The circuit comprises a plurality of levels of series-connected reserve
pool computing architectures. Each level of architecture is used for receiving a multichannel EEG
signal or a multichannel binary coded
signal, and after high-dimensional
feature mapping, nonlinear time
feature extraction and
feature fusion are sequentially performed on the multichannel EEG signal or the multichannel binary coded signal by a
mask circuit, a reserve
pool module based on a volatile
memristor and a multiply-accumulate circuit comprising a cross array based on a non-volatile
memristor in the architecture, the parallel output road fusion signal is output to a feature binaryzation circuit in the architecture, signal binaryzation
processing is performed on the parallel output road fusion signal, a multichannel binary coded signal is output in parallel as an input of a next level of architecture, and finally, a binary coded signal output by a last level of architecture is output as an
epilepsy prediction result. The application provides a hardware efficient solution for real-time low-power
epilepsy seizure prediction.