Over-temperature voltage reduction circuit

Abstract

The utility model relates to the field of over-temperature protection, in particular to an over-temperature voltage reduction circuit which comprises a band-gap reference source module, a temperature compensation module and an output module. The temperature compensation module comprises a positive temperature coefficient first current branch, a positive temperature coefficient second current branch and a compensation branch; the band-gap reference source module outputs reference voltage VBG to the first current branch with the positive temperature coefficient and the output module, and outputs current IPTAT in direct proportion to absolute temperature to the second current branch with the positive temperature coefficient; the output end of the positive temperature coefficient second current branch and the output end of the positive temperature coefficient first current branch are electrically connected to the input end of the compensation branch, the output end of the compensation branch is electrically connected with the output module, VREF voltage is output, and the current relation of the positive temperature coefficient first current branch and the current relation of the positive temperature coefficient second current branch are compared. And pulling down the VREF voltage through the compensation branch until the VREF voltage is reduced to zero, and turning off the external circuit.

Description

Technical Field

[0001] The utility model relates to the field of over-temperature protection, in particular to an over-temperature voltage reduction circuit. Background Art

[0002] Overtemperature compensation circuit is a technology used to control temperature in electronic devices. In electronic devices, the temperature rises due to the heat generated during operation. Excessive temperature may affect the performance and life of the device. Therefore, overtemperature compensation circuit is designed to monitor the temperature of the device and take corresponding measures to adjust the temperature to ensure that the device operates within a safe operating temperature range.

[0003] The design and implementation of over-temperature compensation circuits need to consider multiple factors, including the accuracy of the sensor, the stability of the comparator, and the response speed of the controller. Through reasonable design and debugging, the over-temperature compensation circuit can effectively protect the device from overheating, extend the service life of the device, and improve the performance stability of the device. Therefore, in many electronic devices, over-temperature compensation circuits are widely used to ensure the reliability and stability of the equipment.

[0004] At present, the existing over-temperature compensation voltage is usually determined based on the junction voltage of the transistor, which cannot accurately adjust the over-temperature point and is not accurate enough in responding to temperature changes. At the same time, the over-temperature point may be offset due to process imbalance, which is not suitable for accurate over-temperature voltage reduction circuits. Utility Model Content

[0005] The utility model aims to provide an over-temperature voltage reduction circuit, aiming to improve the problem of inaccurate response to temperature changes and over-temperature point deviation caused by process imbalance.

[0006] In order to achieve the above purpose, the utility model adopts the following technical solutions:

[0007] An over-temperature voltage reduction circuit comprises a bandgap reference source module, a temperature compensation module and an output module;

[0008] The temperature compensation module comprises a positive temperature coefficient first current branch, a positive temperature coefficient second current branch and a compensation branch;

[0009] The bandgap reference source module outputs a reference voltage V BG To the positive temperature coefficient first current branch and output module, the bandgap reference source module outputs a current I proportional to the absolute temperature PTAT To the second positive temperature coefficient current branch, the output end of the second positive temperature coefficient current branch and the output end of the first positive temperature coefficient current branch are electrically connected to the input end of the compensation branch, and the output end of the compensation branch is electrically connected to the output module and outputs V REF Voltage.

[0010] Furthermore, the positive temperature coefficient first current branch includes an operational amplifier X1, a MOSFET N0, a MOSFET P0, a MOSFET P1 and a resistor R0;

[0011] The bandgap reference source module outputs a reference voltage V BG To the same-direction input terminal of the operational amplifier X1, the output terminal of the operational amplifier X1 is electrically connected to the gate of the MOSFET N0, the drain of the MOSFET N0 is electrically connected to the gate and drain of the MOSFET P0 and the gate of the MOSFET P1, the reverse input terminal of the operational amplifier X1 and the source of the MOSFET N0 are electrically connected to one end of the resistor R0, and the other end of the resistor R0 is grounded;

[0012] The sources of the MOS tube P0 and the MOS tube P1 are electrically connected to an external power supply.

[0013] The drain of the MOS tube P1 is electrically connected to the output end of the second current branch with a positive temperature coefficient and the input end of the compensation branch.

[0014] Furthermore, the positive temperature coefficient second current branch includes MOS tube N1 and MOS tube N2, and the bandgap reference source module outputs a current I proportional to the absolute temperature. PTAT To the gate and drain of the MOS tube N1 and the gate of the MOS tube N2, the drain of the MOS tube N2 is electrically connected to the output end of the positive temperature coefficient first current branch and the input end of the compensation branch, and the sources of the MOS tube N1 and the MOS tube N2 are both grounded.

[0015] Furthermore, the compensation branch includes a MOSFET N4 and a MOSFET N5, the drain and gate of the MOSFET N4 are electrically connected to the gate of the MOSFET N5, the output end of the positive temperature coefficient first current branch, and the output end of the positive temperature coefficient second current branch, the drain of the MOSFET N5 is electrically connected to the output module, and the source of the MOSFET N4 and the source of the MOSFET N5 are both grounded.

[0016] Furthermore, the output module includes an operational amplifier X2, a MOS tube N3, a MOS tube P2, a MOS tube P3 and a resistor R1, a resistor R2;

[0017] The bandgap reference source module outputs a reference voltage V BG To the same-direction input terminal of the operational amplifier X2, the output terminal of the operational amplifier X2 is electrically connected to the gate of the MOSFET N3, the drain of the MOSFET N3 is electrically connected to the gate and drain of the MOSFET P2 and the gate of the MOSFET P3, the reverse input terminal of the operational amplifier X2 and the source of the MOSFET N3 are electrically connected to one end of the resistor R1,

[0018] The sources of the MOS tube P2 and the MOS tube P3 are electrically connected to an external power source.

[0019] The drain of the MOS tube P3 is electrically connected to the output end of the compensation branch and one end of the resistor R2, and outputs V REF voltage, and the other ends of the resistor R1 and the resistor R2 are grounded.

[0020] Furthermore, the resistor R0, the resistor R1 and the resistor R2 are all negative temperature coefficient resistors.

[0021] Furthermore, the MOS tube P0, MOS tube P1, MOS tube P2 and MOS tube P3 satisfy the following formula:

[0022] (W / L) P0 =(W / L) P2 =(W / L) P3

[0023] (W / L) P1 =A*(W / L) P0

[0024] Where A is the proportionality coefficient, (W / L) P0 is the width-to-length ratio of the MOS tube P0; (W / L) P1 is the width-to-length ratio of MOS tube P1; (W / L) P2 is the width-to-length ratio of MOS tube P2; (W / L) P3 is the width-to-length ratio of MOS tube P3.

[0025] Furthermore, the MOS tube N1, MOS tube N2, MOS tube N4 and MOS tube N5 satisfy the following formula:

[0026] (W / L) N2 =B*(W / L) N1

[0027] (W / L) N5 =C*(W / L) N4

[0028] Where B and C are proportional coefficients, (W / L) N1 is the width-to-length ratio of MOS tube N1; (W / L) N2 is the width-to-length ratio of MOS tube N2; (W / L) N4 is the width-to-length ratio of MOS tube N4; (W / L) N5 is the width-to-length ratio of MOS tube N5.

[0029] After adopting the above technical solution, the utility model has the following advantages compared with the background technology:

[0030] In the initial state, the current of the second positive temperature coefficient current branch is greater than the current of the first positive temperature coefficient current branch, and there is no compensation current at this time; as the temperature rises, when the current of the first positive temperature coefficient current branch is greater than the current of the second positive temperature coefficient current branch, it indicates that the overtemperature point has been reached, and the compensation current appears, pulling down V REF voltage, realizing the function of over-temperature voltage reduction. If the temperature continues to rise, V REF The voltage continues to drop until V REF The voltage drops to zero. According to different over-temperature points, MOS tubes with different width-to-length ratios are set to accurately control the over-temperature point and the shutdown temperature point, and the voltage drop slope can be flexibly controlled. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 It is a circuit diagram of the over-temperature voltage reduction circuit of the utility model;

[0032] Figure 2 It is a schematic diagram of the current waveform of the over-temperature voltage reduction circuit of the utility model;

[0033] Figure 3 It is a schematic diagram of the reference voltage output waveform of the over-temperature voltage reduction circuit of the utility model.

[0034] Description of reference numerals:

[0035] 1. Bandgap reference source module; 2. Positive temperature coefficient first current branch; 3. Positive temperature coefficient second current branch; 4. Compensation branch; 5. Output module. DETAILED DESCRIPTION

[0036] In order to make the purpose, technical solution and advantages of the utility model more clear, the utility model is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the utility model and are not used to limit the utility model.

[0037] In addition, it should be noted that the terms "up", "down", "left", "right", "vertical", "horizontal", "inside", "outside", etc. are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element of the present invention must have a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0038] When an element is referred to as being “fixed to” or “disposed on” or “provided on” another element, it may be directly on the other element or indirectly on the other element. When an element is referred to as being “connected to” another element, it may be directly connected to the other element or indirectly connected to the other element.

[0039] Unless otherwise clearly specified and limited, the terms "installed", "connected" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the utility model can be understood according to specific circumstances.

[0040] Example

[0041] Please refer to Figure 1-3 As shown, this embodiment provides an over-temperature voltage reduction circuit, including a bandgap reference source module 1, a temperature compensation module and an output module 5; the temperature compensation module includes a positive temperature coefficient first current branch 2, a positive temperature coefficient second current branch 3 and a compensation branch 4. The bandgap reference source module 1 outputs a reference voltage V BG To the positive temperature coefficient first current branch 2 and the output module 5, the bandgap reference source module 1 outputs a current I proportional to the absolute temperature PTAT To the positive temperature coefficient second current branch 3, the output end of the positive temperature coefficient second current branch 3 and the output end of the positive temperature coefficient first current branch 2 are electrically connected to the input end of the compensation branch 4, and the output end of the compensation branch 4 is electrically connected to the output module 5, and outputs V REF The current of the positive temperature coefficient first current branch 2 increases with the increase of temperature. When the current of the positive temperature coefficient first current branch 2 is greater than the current of the positive temperature coefficient second current branch 3, it indicates that the over-temperature point T0 has been reached, and the compensation branch 4 pulls down V REF Voltage, up to V REF The voltage drops to zero and the external circuit is turned off. By adjusting the parameters of each branch, the over-temperature point and the shutdown temperature point can be accurately controlled, and V REF Voltage drop Voltage slope.

[0042] Specifically, the positive temperature coefficient first current branch 2 includes an operational amplifier X1, a MOSFET N0, a MOSFET P0, a MOSFET P1 and a resistor R0;

[0043] The second positive temperature coefficient current branch 3 includes a MOS tube N1 and a MOS tube N2;

[0044] The compensation branch 4 includes a MOS tube N4 and a MOS tube N5;

[0045] The output module 5 includes an operational amplifier X2, a MOSFET N3, a MOSFET P2, a MOSFET P3, and resistors R1 and R2.

[0046] Bandgap reference source module 1 outputs reference voltage VBG To the same-direction input terminal of the operational amplifier X1. The output terminal of the operational amplifier X1 is electrically connected to the gate of the MOSFET N0. The drain of the MOSFET N0 is electrically connected to the gate and drain of the MOSFET P0 and the gate of the MOSFET P1. The reverse input terminal of the operational amplifier X1 and the source of the MOSFET N0 are electrically connected to one end of the resistor R0, and the other end of the resistor R0 is grounded.

[0047] The sources of the MOSFET P0 and the MOSFET P1 are electrically connected to an external power source, and the drain of the MOSFET P1 is electrically connected to an output end of the positive temperature coefficient second current branch 3 and an output end of the compensation branch 4 .

[0048] The output of the bandgap reference module 1 is proportional to the absolute temperature. PTAT To the gate and drain of MOSFET N1, and the gate of MOSFET N2. The drain of MOSFET N2 is electrically connected to the output end of the positive temperature coefficient first current module 2 and the input end of the compensation branch 4, that is, the drain of MOSFET N2 is electrically connected to the drain of MOSFET P1, the drain and gate of MOSFET N4, and the gate of MOSFET N5. The sources of MOSFET N1 and MOSFET N2 are both grounded.

[0049] The drain and gate of MOS tube N4 are electrically connected to the gate of MOS tube N5, the output end of the first positive temperature coefficient current branch 2 and the output end of the second positive temperature coefficient current branch 3, that is, the drain and gate of MOS tube N4 are electrically connected to the gate of MOS tube N5, the drain of MOS tube N2 and the drain of MOS tube P1. The drain of MOS tube N5 is electrically connected to the output module 5, and the source of MOS tube N4 and the source of MOS tube N5 are both grounded.

[0050] Bandgap reference source module 1 outputs reference voltage V BG To the same-direction input terminal of the operational amplifier X2, the output terminal of the operational amplifier X2 is electrically connected to the gate of the MOSFET N3. The reverse input terminal of the operational amplifier X2 and the source of the MOSFET N3 are electrically connected to one end of the resistor R1. The drain of the MOSFET N3 is electrically connected to the gate and drain of the MOSFET P2 and the gate of the MOSFET P3.

[0051] The sources of MOS tubes P2 and P3 are electrically connected to the external power supply. The drain of MOS tube P3 is electrically connected to the output end of compensation branch 4 and one end of resistor R2, and outputs V REF The voltage, that is, the drain of the MOS tube P3 is electrically connected to the drain of the MOS tube N5 and one end of the resistor R2. The other ends of the resistor R1 and the resistor R2 are both grounded.

[0052] In this embodiment, MOS tube P0, MOS tube P1, MOS tube P2 and MOS tube P3 are PMOS tubes, and MOS tube N0, MOS tube N1, MOS tube N2, MOS tube N3, MOS tube N4 and MOS tube N5 are NMOS tubes. Specifically, the following relationship is satisfied:

[0053] (W / L) P0 =(W / L) P2 =(W / L) P3

[0054] (W / L) P1 =A*(W / L) P0

[0055] (W / L) N0 =(W / L) N1 =(W / L) N3 =(W / L) N4

[0056] (W / L) N2 =B*(W / L) N1

[0057] (W / L) N5 =C*(W / L) N4

[0058] Where A, B and C are proportional coefficients, (W / L) NX is the width-to-length ratio of the MOS tube Nx; (W / L) PX is the width-to-length ratio of the MOS tube Px; that is (W / L) P0 is the width-to-length ratio of the MOS tube P0; (W / L) P1 is the width-to-length ratio of MOS tube P1; (W / L) P2 is the width-to-length ratio of MOS tube P2; (W / L) P3 is the width-to-length ratio of MOS tube P3;

[0059] (W / L) N0 is the width-to-length ratio of MOS tube N0; (W / L) N1 is the width-to-length ratio of MOS tube N1; (W / L) N2 is the width-to-length ratio of MOS tube N2; (W / L) N3 is the width-to-length ratio of MOS tube N3; (W / L) N4 is the width-to-length ratio of MOS tube N4; (W / L) N5 is the width-to-length ratio of MOS tube N5.

[0060] Please refer to the attached Figure 1 , regardless of the direction of the current, taking the absolute value of the current, we can get from the circuit diagram

[0061] IP0 =V BG / R0

[0062] I P1 =A*I P0

[0063] I N1 =I PTAT

[0064] I N2 =B*I N1

[0065] I N4 =I P1 -I N2 =A*I P0 -B*I N1

[0066] I N5 =C*I N4

[0067] I P2 =V BG / R1

[0068] I P3 =I P2

[0069] y REF =R2*(I P3 -I N5 )

[0070] In this embodiment, the resistors R0, R1 and R2 are of the same resistor type and are negative temperature coefficient resistors. P0 The current temperature coefficient is k1, then I P2 and I P3 The current temperature coefficient is also k1; resistors R0, R1 and R2 have the same temperature coefficient. If the temperature changes, the effect of the resistance change caused by the temperature will be offset. PTAT The current temperature coefficient is k2. At different temperatures T, there are the following formulas:

[0071] I P0T =k1*I P0 *T

[0072] I P1T =k1*A*I P0 *T

[0073] I N1T =k2*I PTAT *T

[0074] I N2T =B*IN1T =k2*B*I PTAT *T

[0075] I N4T =I P1T -I N2T =k1*A*I P0 *T-k2*B*I PTAT *T

[0076] I N5T =C*I N4 =C*(k1*A*I P0 *T-k2*B*I PTAT *T)

[0077] I P2T =k1*I P2 *T

[0078] I P3T =I P2T

[0079] When I N5 = 0, since the resistors R1 and R2 are of the same type, and the sizes of MOS tubes P2 and P3 are the same, there is no need to consider the effect of the resistance temperature coefficient on the current, that is, V BG =I P2T *R1 T Unchanged, V REF The voltage is as follows.

[0080]

[0081] When I N5 When it is not equal to zero, due to I N5 is a current with a temperature coefficient, V REF The voltage starts to drop, realizing the over-temperature voltage reduction function.

[0082] Assume the over-temperature point is T0 and the shutdown temperature point is T1;

[0083] When T<T0; I N2T >I P1T ,Right now

[0084] k1*A*I P0 *T>k2*B*I PTAT *T

[0085] When T0≤T<T1; I P1T ≥I N2T ; At this time I N4T Current appears, VREF T Start to reduce the voltage, that is

[0086] k1*A*IP0 *T≥k2*B*I PTAT *T

[0087] Since k1, k2 are coefficients, I P0 and I PTAT is the determined current value, T0 is the set over-temperature point, so the determined values ​​of A and B can be calculated.

[0088] at this time The formula is as follows:

[0089]

[0090] The over temperature compensation amount is:

[0091] R2 T *I N5T =R2 T *C*(k1*A*I P0 *T-k2*B*I PTAT *T)

[0092] When T≥T1; I N5T1 ≥I P3T1 ,at this time The output is 0, that is

[0093] C*(k1*A*I P0 *T1-k2*B*I PTAT *T1)≥k1*I P2 *T1

[0094] Since k1, k2 are coefficients, I P0 ,I PTAT and I P2 The current value is determined, and the shutdown temperature point T1 is the set shutdown temperature point, so the determined value of C can be obtained. By setting how many over-temperature points T0 and shutdown temperature points T1 need to be set, it is possible to calculate how many MOS tubes with a certain aspect ratio are used to accurately control the over-temperature point and the shutdown temperature point.

[0095] Please refer to the attached Figure 2 and Figure 3 , initial state, I N2T >I P1T As the temperature rises, after reaching the set over-temperature point T0, I P1T ≥I N2T , I N5T When current flows and the temperature continues to rise to the set shutdown temperature point T1, I N5T ≥I P3T . Correspondingly, in the initial state, V REF =V BG *R2 / R1, as the temperature rises, after reaching the set over-temperature point T0, VREF The voltage drops and the temperature continues to rise to the set shutdown temperature point T1, V REF The voltage is 0.

[0096] The above is only a preferred specific implementation of the utility model, but the protection scope of the utility model is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed by the utility model should be included in the protection scope of the utility model. Therefore, the protection scope of the utility model should be based on the protection scope of the claims.

Claims

1. An over-temperature voltage reduction circuit, characterized in that: It includes a bandgap reference source module, a temperature compensation module and an output module; The temperature compensation module comprises a positive temperature coefficient first current branch, a positive temperature coefficient second current branch and a compensation branch; The bandgap reference source module outputs a reference voltage V BG To the positive temperature coefficient first current branch and output module, the bandgap reference source module outputs a current I proportional to the absolute temperature PTAT To the second positive temperature coefficient current branch, the output end of the second positive temperature coefficient current branch and the output end of the first positive temperature coefficient current branch are electrically connected to the input end of the compensation branch, and the output end of the compensation branch is electrically connected to the output module and outputs V REF Voltage.

2. The over-temperature voltage reduction circuit according to claim 1, characterized in that: The positive temperature coefficient first current branch includes an operational amplifier X1, a MOSFET N0, a MOSFET P0, a MOSFET P1 and a resistor R0; The bandgap reference source module outputs a reference voltage V BG To the same-direction input terminal of the operational amplifier X1, the output terminal of the operational amplifier X1 is electrically connected to the gate of the MOSFET N0, the drain of the MOSFET N0 is electrically connected to the gate and drain of the MOSFET P0 and the gate of the MOSFET P1, the reverse input terminal of the operational amplifier X1 and the source of the MOSFET N0 are electrically connected to one end of the resistor R0, and the other end of the resistor R0 is grounded; The sources of the MOS tube P0 and the MOS tube P1 are electrically connected to an external power supply. The drain of the MOS tube P1 is electrically connected to the output end of the second current branch with a positive temperature coefficient and the input end of the compensation branch.

3. The over-temperature voltage reduction circuit according to claim 2, characterized in that: The positive temperature coefficient second current branch includes MOS tube N1 and MOS tube N2, and the bandgap reference source module outputs a current I proportional to the absolute temperature. PTAT To the gate and drain of the MOS tube N1 and the gate of the MOS tube N2, the drain of the MOS tube N2 is electrically connected to the output end of the positive temperature coefficient first current branch and the input end of the compensation branch, and the sources of the MOS tube N1 and the MOS tube N2 are both grounded.

4. The over-temperature voltage reduction circuit according to claim 3, characterized in that: The compensation branch includes a MOSFET N4 and a MOSFET N5, the drain and gate of the MOSFET N4 are electrically connected to the gate of the MOSFET N5, the output end of the first positive temperature coefficient current branch, and the output end of the second positive temperature coefficient current branch, the drain of the MOSFET N5 is electrically connected to the output module, and the source of the MOSFET N4 and the source of the MOSFET N5 are both grounded.

5. The over-temperature voltage reduction circuit according to claim 4, characterized in that: The output module includes an operational amplifier X2, a MOS tube N3, a MOS tube P2, a MOS tube P3 and a resistor R1, a resistor R2; The bandgap reference source module outputs a reference voltage V BG To the same-direction input terminal of the operational amplifier X2, the output terminal of the operational amplifier X2 is electrically connected to the gate of the MOSFET N3, the drain of the MOSFET N3 is electrically connected to the gate and drain of the MOSFET P2 and the gate of the MOSFET P3, the reverse input terminal of the operational amplifier X2 and the source of the MOSFET N3 are electrically connected to one end of the resistor R1, The sources of the MOS tube P2 and the MOS tube P3 are electrically connected to an external power supply. The drain of the MOS tube P3 is electrically connected to the output end of the compensation branch and one end of the resistor R2, and outputs V REF voltage, and the other ends of the resistor R1 and the resistor R2 are grounded.

6. The over-temperature voltage reduction circuit according to claim 5, characterized in that: The resistor R0, the resistor R1 and the resistor R2 are all negative temperature coefficient resistors.

7. The over-temperature voltage reduction circuit according to claim 5, characterized in that: The MOS tube P0, MOS tube P1, MOS tube P2 and MOS tube P3 satisfy the following formula: (W / L) P0 =(W / L) P2 =(W / L) P3 (W / L) P1 =A*(W / L) P0 Where A is the proportionality coefficient, (W / L) P0 is the width-to-length ratio of the MOS tube P0; (W / L) P1 is the width-to-length ratio of MOS tube P1; (W / L) P2 is the width-to-length ratio of MOS tube P2; (W / L) P3 is the width-to-length ratio of MOS tube P3.

8. The over-temperature voltage reduction circuit according to claim 5, characterized in that: The MOS tube N1, MOS tube N2, MOS tube N4 and MOS tube N5 satisfy the following formula: (W / L) N2 =B*(W / L) N1 (W / L) N5 =C*(W / L) N4 Where B and C are proportional coefficients, (W / L) N1 is the width-to-length ratio of MOS tube N1; (W / L) N2 is the width-to-length ratio of MOS tube N2; (W / L) N4 is the width-to-length ratio of MOS tube N4; (W / L) N5 is the width-to-length ratio of MOS tube N5.

Images