Pull-down circuit and chip

Abstract

The utility model is suitable for the technical field of electronic circuits, and provides a pull-down circuit and a chip. The pull-down circuit comprises a voltage detection module and a switch module, the voltage detection module is electrically connected with the switch module, the switch module is used for being electrically connected with an input / output port of the single-chip microcomputer, the switch module is also used for being grounded, and the voltage detection module is used for being electrically connected with a power port of the single-chip microcomputer; in the power-on reset period of the single-chip microcomputer, the voltage detection module is used for detecting the power supply voltage at the power supply port of the single-chip microcomputer and outputting a first signal to the switch module when the power supply voltage is smaller than a first threshold voltage, and the switch module is used for conducting according to the first signal to enable the input / output port of the single-chip microcomputer to be connected with the ground. And the input / output port of the single-chip microcomputer is kept in a determined low-level state, so that the input / output port of the single-chip microcomputer can be ensured to be in a stable state.

Description

Technical Field

[0001] The present application belongs to the technical field of electronic circuits, and in particular, relates to a pull-down circuit and a chip. Background Art

[0002] A single-chip microcomputer is an integrated circuit chip. It is a small and complete microcomputer system that uses ultra-large-scale integrated circuit technology to integrate a central processing unit CPU with data processing capabilities, random access memory RAM, read-only memory ROM, multiple input / output ports (i.e., I / O ports) and interrupt systems, timers / counters and other functions on a silicon chip. The use of single-chip microcomputers has been very extensive, such as intelligent instruments, real-time industrial control, communication equipment, navigation systems, household appliances, etc. In practical applications, single-chip microcomputers need to interact with other chip circuits or devices to form the entire device system. However, during the power-on reset of the single-chip microcomputer, the I / O port of the single-chip microcomputer will appear in an unstable state. Since the I / O port of the single-chip microcomputer needs to interact with other chip circuits or devices, when the I / O port of the single-chip microcomputer appears in an unstable state, it may cause abnormal or unexpected operation of other chip circuits or devices, which will have an adverse effect on the stability and reliability of the entire system. Utility Model Content

[0003] The embodiments of the present application provide a pull-down circuit and a chip, which can solve the problem of an unstable state of an I / O port of a single-chip microcomputer during power-on reset.

[0004] In a first aspect, an embodiment of the present application provides a pull-down circuit, comprising a voltage detection module and a switch module, wherein the voltage detection module is electrically connected to the switch module, the switch module is used to be electrically connected to an input / output port of a single-chip microcomputer, the switch module is also used to be grounded, and the voltage detection module is used to be electrically connected to a power port of the single-chip microcomputer;

[0005] The voltage detection module is used to detect the power supply voltage at the power supply port of the single-chip microcomputer, and when the power supply voltage is less than a first threshold voltage, output a first signal to the switch module; the switch module is used to be turned on according to the first signal, so that the input / output port of the single-chip microcomputer is turned on to the ground.

[0006] In a possible implementation manner of the first aspect, the voltage detection module includes a first switch unit, a second switch unit, an energy storage unit, and a logic unit, the first switch unit is electrically connected to the energy storage unit and the second switch unit, respectively, the logic unit is electrically connected to the second switch unit and the switch module, respectively, the first switch unit, the second switch unit, and the energy storage unit are all used to be electrically connected to a power port of the single-chip computer, and the first switch unit and the second switch unit are both used to be grounded;

[0007] The energy storage unit is used to store energy and output a first voltage to the first switch unit and the second switch unit respectively, and the first voltage changes with the power supply voltage; when the power supply voltage is less than the first threshold voltage, the second switch unit is used to shut down according to the power supply voltage and the first voltage, and output a second signal to the logic unit, and the logic unit is used to convert the second signal into the first signal and transmit the first signal to the switch module; when the first voltage reaches the second threshold voltage, the first switch unit is used to turn on according to the first voltage.

[0008] In a possible implementation of the first aspect, the first switch unit includes a first field effect transistor and a second field effect transistor, the source of the first field effect transistor is used to be electrically connected to the power port of the single-chip computer, the gate of the first field effect transistor is used to be grounded, the drain of the first field effect transistor is respectively electrically connected to the energy storage unit, the second switch unit, the gate of the second field effect transistor and the drain of the second field effect transistor, and the source of the second field effect transistor is used to be grounded.

[0009] In a possible implementation of the first aspect, the second switch unit includes a third field effect transistor and a fourth field effect transistor, the source of the third field effect transistor is used to be electrically connected to the power port of the single-chip computer, the gate of the third field effect transistor is electrically connected to the energy storage unit and the first switch unit, respectively, the drain of the third field effect transistor is electrically connected to the logic unit and the drain of the fourth field effect transistor, respectively, the gate of the fourth field effect transistor is used to be electrically connected to the power port of the single-chip computer, and the source of the fourth field effect transistor is used to be grounded.

[0010] In a possible implementation of the first aspect, the energy storage unit includes a fifth field effect transistor, a gate of the fifth field effect transistor is electrically connected to the first switch unit and the second switch unit, respectively, and a source of the fifth field effect transistor and a drain of the fifth field effect transistor are both used to be electrically connected to a power port of the microcontroller.

[0011] In a possible implementation manner of the first aspect, the logic unit includes a first inverter, an input end of the first inverter is electrically connected to the second switch unit, and an output end of the first inverter is electrically connected to the switch module.

[0012] In a possible implementation manner of the first aspect, the switch module includes a third switch unit and a fourth switch unit, the third switch unit and the fourth switch unit are electrically connected to the voltage detection module respectively, the third switch unit is used to be electrically connected to an input / output port of the single-chip microcomputer, the fourth switch unit is used to be electrically connected to a power port of the single-chip microcomputer, and the third switch unit is also used to be grounded;

[0013] The fourth switch unit is used to receive the first signal and be turned off according to the first signal; the third switch unit is used to receive the first signal and be turned on according to the first signal, so that the input / output port of the single-chip microcomputer is connected to the ground.

[0014] In a possible implementation of the first aspect, the third switch unit includes a sixth field effect transistor, a seventh field effect transistor and an eighth field effect transistor, the drain of the sixth field effect transistor is used to be electrically connected to the input / output port of the single-chip computer, the gate of the sixth field effect transistor is respectively electrically connected to the voltage detection module, the gate of the seventh field effect transistor, the gate of the eighth field effect transistor and the fourth switch unit, the source of the sixth field effect transistor is respectively electrically connected to the drain of the seventh field effect transistor and the fourth switch unit, the source of the seventh field effect transistor is electrically connected to the drain of the eighth field effect transistor, and the source of the eighth field effect transistor is used to be grounded.

[0015] In a possible implementation of the first aspect, the fourth switch unit includes a ninth field effect transistor, a gate of the ninth field effect transistor being electrically connected to the voltage detection module and the third switch unit, respectively, a source of the ninth field effect transistor being used to be electrically connected to a power port of the single-chip computer, and a drain of the ninth field effect transistor being electrically connected to the third switch unit.

[0016] In a second aspect, an embodiment of the present application provides a chip, comprising the pull-down circuit described in any one of the first aspects.

[0017] Compared with the prior art, the embodiments of the present invention have the following beneficial effects:

[0018] An embodiment of the present application provides a pull-down circuit, including a voltage detection module and a switch module, the voltage detection module is electrically connected to the switch module, the switch module is used to be electrically connected to the input / output port of the microcontroller, the switch module is used to be grounded, and the voltage detection module 2 is used to be electrically connected to the power port of the microcontroller.

[0019] During the power-on reset of the single-chip microcomputer, the voltage detection module is used to detect the power supply voltage at the power supply port of the single-chip microcomputer, and before the power supply voltage rises to the conduction threshold voltage (i.e., the first threshold voltage) of any type of active MOS device inside the single-chip microcomputer, the voltage detection module outputs a first signal to the switch module. The switch module is used to conduct according to the first signal, so that the input / output port of the single-chip microcomputer is connected to the ground, and the input / output port of the single-chip microcomputer is maintained in a certain low-level state, so that the input / output port of the single-chip microcomputer can be ensured to be in a stable state, thereby ensuring the stability and reliability of the entire system.

[0020] It can be understood that the beneficial effects of the second aspect mentioned above can be found in the relevant description of the first aspect mentioned above, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0022] Figure 1 is a principle block diagram of a pull-down circuit provided in an embodiment of the present application;

[0023] Figure 2 is a principle block diagram of a pull-down circuit provided in another embodiment of the present application;

[0024] Figure 3 is a circuit connection diagram of a pull-down circuit provided in an embodiment of the present application;

[0025] Figure 4 is a circuit connection diagram of a pull-down circuit provided in another embodiment of the present application;

[0026] Figure 5 It is a schematic diagram of the change of the output signal of the voltage detection module in this application.

[0027] In the figure: 1. pull-down circuit; 10. voltage detection module; 101. first switch unit; 102. second switch unit; 103. energy storage unit; 104. logic unit; 11. switch module; 111. third switch unit; 112. fourth switch unit; 2. single chip microcomputer. DETAILED DESCRIPTION

[0028] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present application. However, it should be clear to those skilled in the art that the present application may also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present application.

[0029] It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, wholes, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or combinations thereof.

[0030] As used in the specification and appended claims of this application, the term "if" can be interpreted as "when" or "uponce" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrase "if it is determined" or "if [described condition or event] is detected" can be interpreted as meaning "uponce it is determined" or "in response to determining" or "uponce [described condition or event] is detected" or "in response to detecting [described condition or event]", depending on the context.

[0031] In addition, in the description of the present application specification and the appended claims, the terms "first", "second", "third", etc. are only used to distinguish the descriptions and cannot be understood as indicating or implying relative importance.

[0032] References to "one embodiment" or "some embodiments" etc. described in the specification of this application mean that one or more embodiments of the present application include specific features, structures or characteristics described in conjunction with the embodiment. Therefore, the statements "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. that appear in different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways.

[0033] During the power-on reset of the MCU, the I / O port of the MCU will be in an unstable state. Since the I / O port of the MCU needs to interact with other chip circuits or devices through signal transmission, when the I / O port of the MCU is in an unstable state, it may cause abnormal or unexpected operation of other chip circuits or devices, which will have an adverse effect on the stability and reliability of the entire system.

[0034] In view of the above problems, the embodiment of the present application provides a pull-down circuit. During the power-on reset of the single-chip microcomputer, the pull-down circuit provided by the present application can ensure that it is turned on before the power supply voltage rises to the conduction threshold voltage of any type of active MOS device inside the single-chip microcomputer, and the I / O port of the single-chip microcomputer is pulled down to the ground, so that the I / O port of the single-chip microcomputer is in a stable state to ensure the stability and reliability of the entire system. The pull-down circuit provided by the present application can also ensure that it is turned off when the power supply voltage rises to the conduction threshold voltage of any type of active MOS device inside the single-chip microcomputer, and disconnected from the I / O port of the single-chip microcomputer (i.e., releasing the I / O port of the single-chip microcomputer), avoiding negative impact on the I / O port of the single-chip microcomputer and unnecessary power consumption.

[0035] Figure 1 1 shows a schematic block diagram of a pull-down circuit 1 provided in an embodiment of the present application, as shown in FIG. Figure 1 As shown, the pull-down circuit 1 includes a voltage detection module 10 and a switch module 11, the voltage detection module 10 is electrically connected to the switch module 11, the switch module 11 is used to be electrically connected to the I / O port of the single-chip computer 2, the switch module 11 is also used for grounding, and the voltage detection module 10 is used to be electrically connected to the power port of the single-chip computer 2. It should be noted that the switch module 11 is used to be electrically connected to the output end of the inverter in the I / O port of the single-chip computer 2.

[0036] Specifically, during the power-on reset of the single-chip computer 2, the voltage detection module 10 is used to detect the power supply voltage VDD at the power supply port of the single-chip computer 2, and before the power supply voltage VDD rises to the conduction threshold voltage (i.e., the first threshold voltage) of any type of active MOS device inside the single-chip computer 2, the voltage detection module 10 outputs a first signal to the switch module 11. The switch module 11 is used to conduct according to the first signal, so that the I / O port of the single-chip computer 2 is connected to the ground, and the I / O port of the single-chip computer 2 is maintained in a certain low-level state, so that the I / O port of the single-chip computer 2 can be kept in a stable state, thereby ensuring the stability and reliability of the entire system. It should be noted that the first signal increases with the increase of the power supply voltage VDD, corresponding to Figure 5 The pull-down circuit 1 is in the start-up phase (ie, the conduction phase).

[0037] The voltage detection module 10 is also used to output a third signal to the switch module 11 when the power supply voltage VDD rises to the conduction threshold voltage of any type of active MOS device inside the single-chip computer 2. The switch module 11 is used to shut down according to the third signal and disconnect from the I / O port of the single-chip computer 2, that is, release the I / O port of the single-chip computer 2 to avoid negative impact on the I / O port of the single-chip computer 2 and unnecessary power consumption. It should be noted that the third signal is a low-level signal corresponding to Figure 5 The turn-off phase of the middle pull-down circuit 1.

[0038] In summary, during the power-on reset of the single-chip computer 2, the pull-down circuit 1 provided in the present application can ensure that it is turned on before the power supply voltage VDD rises to the conduction threshold voltage of any type of active MOS device inside the single-chip computer 2, and the I / O port of the single-chip computer 2 is pulled down to the ground, so that the I / O port of the single-chip computer 2 is in a stable state to ensure the stability and reliability of the entire system. The pull-down circuit 1 provided in the present application can also ensure that it is turned off when the power supply voltage VDD rises to the conduction threshold voltage of any type of active MOS device inside the single-chip computer, and disconnected from the I / O port of the single-chip computer 2, that is, the I / O port of the single-chip computer 2 is released, avoiding negative impact on the I / O port of the single-chip computer 2 and unnecessary power consumption.

[0039] It should be noted that the pull-down circuit 1 provided in the embodiment of the present application is electrically connected to all I / O ports in the microcontroller 2 to ensure that during the power-on reset of the microcontroller 2, all I / O ports in the microcontroller 2 are in a stable state.

[0040] Figure 2 Another principle block diagram of the pull-down circuit 1 provided in an embodiment of the present application is shown. Figure 2 As shown, the voltage detection module 10 includes a first switch unit 101, a second switch unit 102, an energy storage unit 103 and a logic unit 104. The first switch unit 101 is electrically connected to the energy storage unit 103 and the second switch unit 102 respectively, and the logic unit 104 is electrically connected to the second switch unit 102 and the switch module 11 respectively. The first switch unit 101, the second switch unit 102 and the energy storage unit 103 are all used to be electrically connected to the power port of the microcontroller 2, and the first switch unit 101 and the second switch unit 102 are both used for grounding.

[0041] Specifically, during the power-on reset of the single-chip computer 2, the energy storage unit 103 is used to store energy, and outputs a first voltage to the first switch unit 101 and the second switch unit 102, respectively, and the first voltage changes with the power supply voltage VDD (that is, the first voltage rises as the power supply voltage VDD rises). When the power supply voltage is less than the first threshold voltage, the second switch unit 102 is used to shut down according to the voltage supply and the first voltage, and output a second signal to the logic unit 104, the logic unit 104 is used to convert the second signal into a first signal, and transmit the first signal to the switch module 11, the switch module 11 is used to conduct according to the first signal, so that the I / O port of the single-chip computer 2 is connected to the ground, and the I / O port of the single-chip computer 2 is maintained in a certain low level state, so that the I / O port of the single-chip computer 2 can be ensured to be in a stable state.

[0042] When the first voltage reaches the second threshold voltage, the first switch unit 101 is used to be turned on according to the first voltage. After the first switch unit 101 is turned on, a current will be generated inside it, thereby causing the first voltage to drop. At this time, the rising speed of the first voltage is less than the rising speed of the power supply voltage VDD. When the power supply voltage VDD reaches the first threshold voltage (that is, when the power supply voltage VDD reaches the conduction threshold voltage of any type of active MOS device inside the single-chip computer 2), the second switch unit 102 is turned on according to the power supply voltage VDD and the first voltage, and outputs a fourth signal to the logic unit 104. The logic unit 104 converts the fourth signal into a third signal and transmits the third signal to the switch module 11. The switch module 11 is turned off according to the third signal and disconnected from the I / O port of the single-chip computer 2, that is, the I / O port of the single-chip computer 2 is released to avoid negative impact on the I / O port of the single-chip computer 2 and unnecessary power consumption.

[0043] Figure 3 FIG. 1 shows a circuit connection diagram of the pull-down circuit 1 provided in an embodiment of the present application. Figure 3 As shown, the first switch unit 101 includes a first field effect transistor M1 and a second field effect transistor M2, the source of the first field effect transistor M1 is used to be electrically connected to the power port of the single chip computer 2, the gate of the first field effect transistor M1 is used to be grounded, the drain of the first field effect transistor M1 is electrically connected to the energy storage unit 103, the second switch unit 102, the gate of the second field effect transistor M2 and the drain of the second field effect transistor M2 respectively, and the source of the second field effect transistor M2 is used to be grounded. Among them, the first field effect transistor M1 is a PMOS (positive channel Metal Oxide Semiconductor) tube whose gate width is inversely proportional to the channel length, and the second field effect transistor M2 is an NMOS (N-Metal-Oxide-Semiconductor) tube whose gate width is inversely proportional to the channel length.

[0044] Specifically, the gate of the first field effect transistor M1 is grounded, so the first field effect transistor M1 is always in the on state. The connection method of the second field effect transistor M2 can be regarded as a diode. During the power-on reset period of the single-chip computer 2, the energy storage unit 103 stores energy and outputs a first voltage to the second switch unit 102 and the gate and drain of the second field effect transistor M2 respectively. The first voltage rises as the power supply voltage VDD rises. When the power supply voltage VDD is less than the first preset voltage, the second switch unit 102 is used to shut down according to the power supply voltage VDD and the first voltage, and output a second signal to the logic unit 104. The logic unit 104 is used to convert the second signal into a first signal and transmit the first signal to the switch module 11. The switch module 11 is used to conduct according to the first signal, so that the I / O port of the single-chip computer 2 is connected to the ground, and the I / O port of the single-chip computer 2 is maintained in a certain low level state, so that the I / O port of the single-chip computer 2 can be ensured to be in a stable state.

[0045] When the first voltage reaches the second threshold voltage (i.e., the conduction threshold voltage of the second field effect transistor M2), the second field effect transistor M2 is turned on. After the second field effect transistor M2 is turned on, a current is generated in the second field effect transistor M2, and the first voltage will drop. At this time, the rising speed of the first voltage is less than the rising speed of the power supply voltage VDD. When the power supply voltage VDD reaches the first threshold voltage, the second switch unit 102 is turned on according to the power supply voltage VDD and the first voltage, and outputs a fourth signal to the logic unit 104. The logic unit 104 converts the fourth signal into a third signal and transmits the third signal to the switch module 11. The switch module 11 is turned off according to the third signal, and is disconnected from the I / O port of the single-chip computer 2, that is, the I / O port of the single-chip computer 2 is released, so as to avoid negative impact on the I / O port of the single-chip computer 2 and unnecessary power consumption.

[0046] Figure 3 FIG. 1 shows a circuit connection diagram of the pull-down circuit 1 provided in an embodiment of the present application. Figure 3 As shown, the second switch unit 102 includes a third field effect transistor M3 and a fourth field effect transistor M4, the source of the third field effect transistor M3 is used to be electrically connected to the power port of the single chip computer 2, the gate of the third field effect transistor M3 is electrically connected to the energy storage unit 103 and the first switch unit 101 respectively, the drain of the third field effect transistor M3 is electrically connected to the logic unit 104 and the drain of the fourth field effect transistor M4 respectively, the gate of the fourth field effect transistor M4 is used to be electrically connected to the power port of the single chip computer 2, and the source of the fourth field effect transistor M4 is used to be grounded. Figure 3It can be seen that the gate of the third field effect transistor M3 is electrically connected to the energy storage unit 103 and the drain of the first field effect transistor M1 respectively. The third field effect transistor M3 is a PMOS transistor, and the fourth field effect transistor M4 is an NMOS transistor with a gate width proportional to the channel length.

[0047] Specifically, the gate of the fourth field effect transistor M4 is electrically connected to the power port of the single chip computer 2. During the power-on reset of the single chip computer 2, the fourth field effect transistor M4 is always in the on state. At the same time, the energy storage unit 103 stores energy and outputs a first voltage to the gate of the third field effect transistor M3 and the gate and drain of the second field effect transistor M2 respectively. The first voltage rises as the power supply voltage VDD rises. When the power supply voltage VDD is less than the first preset voltage, the third field effect transistor M3 is turned off according to the power supply voltage VDD and the first voltage, and outputs a second signal to the logic unit 104, wherein the second signal is a low level signal, i.e., logic "0". The logic unit 104 is used to convert the second signal into a first signal and transmit the first signal to the switch module 11. The switch module 11 is used to conduct according to the first signal, so that the I / O port of the single chip computer 2 is connected to the ground, and the I / O port of the single chip computer 2 is maintained in a certain low level state, so that the I / O port of the single chip computer 2 can be ensured to be in a stable state.

[0048] When the first voltage reaches the second threshold voltage (i.e., the conduction threshold voltage of the second field effect transistor M2), the second field effect transistor M2 is turned on. After the second field effect transistor M2 is turned on, a current is generated in the second field effect transistor M2, and the first voltage will drop. At this time, the rising speed of the first voltage is less than the rising speed of the power supply voltage VDD. When the power supply voltage VDD reaches the first threshold voltage, the third field effect transistor M3 is turned on according to the power supply voltage VDD and the first voltage, and outputs a fourth signal to the logic unit 104, wherein the fourth signal is a high level signal. The logic unit 104 converts the fourth signal into a third signal, and transmits the third signal to the switch module 11. The switch module 11 is turned off according to the third signal, and is disconnected from the I / O port of the single-chip computer 2, that is, the I / O port of the single-chip computer 2 is released, so as to avoid negative impact on the I / O port of the single-chip computer 2 and unnecessary power consumption.

[0049] Figure 3 Schematic diagram of the circuit connection of the pull-down circuit 1 provided in the embodiment of the present application is shown. Figure 3 As shown, the energy storage unit 103 includes a fifth field effect transistor M5, the gate of the fifth field effect transistor M5 is electrically connected to the first switch unit 101 and the second switch unit 102 respectively, and the source of the fifth field effect transistor M5 and the drain of the fifth field effect transistor M5 are both used to be electrically connected to the power port of the single chip computer 2. Figure 3It can be seen that the gate of the fifth field effect transistor M5 is electrically connected to the drain of the first field effect transistor M1 and the gate of the third field effect transistor M3, respectively. The fifth field effect transistor M5 is a PMOS tube, which acts as a capacitor in the circuit and plays an energy storage role. In the process of energy storage, the voltage at its gate increases with the increase of the power supply voltage VDD. It should be noted that, without considering the circuit area, the fifth field effect transistor M5 can also be replaced by a capacitor.

[0050] Figure 3 Schematic diagram of the circuit connection of the pull-down circuit 1 provided in the embodiment of the present application is shown. Figure 3 As shown, the logic unit 104 includes a first inverter IN1, an input end of the first inverter IN1 is electrically connected to the second switch unit 102, and an output end of the first inverter IN1 is electrically connected to the switch module 11. Figure 3 It can be seen that the input end of the first inverter IN1 is electrically connected to the drain of the third field effect transistor M3 . The first inverter IN1 is used to invert the signal output by the second switch unit 102 .

[0051] Figure 4 Another circuit connection diagram of the pull-down circuit 1 provided in the embodiment of the present application is shown. Figure 4 As shown, the voltage detection module 10 also includes a tenth field effect transistor M10, the source of the tenth field effect transistor M10 is used to be electrically connected to the power port of the single chip computer 2, the drain of the tenth field effect transistor M10 is electrically connected to the input end of the first inverter IN1, and the gate of the tenth field effect transistor M10 is used to receive an enable signal EN. Among them, the tenth field effect transistor M10 is a PMOS tube. By controlling the on or off of the tenth field effect transistor M10, the reset operation or non-reset operation of the pull-down circuit 1 can be achieved.

[0052] like Figure 4 As shown, the voltage detection module 10 also includes an eleventh field effect transistor M11, the drain of the eleventh field effect transistor M11 is electrically connected to the source of the second field effect transistor M2 and the source of the fourth field effect transistor M4, the source of the eleventh field effect transistor M11 is used for grounding, and the gate of the eleventh field effect transistor M11 is used for receiving an enable signal. Among them, the eleventh field effect transistor M11 is an NMOS tube. By controlling the on or off of the eleventh field effect transistor M11, it is possible to choose to use the pull-down circuit 1 or not to use the pull-down circuit 1.

[0053] Combine the following Figure 4 The first threshold voltage VDD TH The derivation process:

[0054] Before the single chip computer 2 is powered on, the first field effect transistor M1 is always in the on state. During the power-on reset period of the single chip computer 2, the fourth field effect transistor M4 is turned on, the VC voltage is maintained at several tens of millivolts, and the first voltage VX rises with the rise of the power supply voltage VDD. When the second threshold voltage is reached, the second field effect transistor M2 is turned on and is in the deep linear region. After the first field effect transistor M1 and the second field effect transistor M2 enter the saturation region, the first voltage VX satisfies the following formula:

[0055]

[0056] Wherein, VGSP1 is the gate-source voltage of the first field effect transistor M1, VTHP1 is the turn-on threshold voltage of the first field effect transistor M1, VX is the first voltage, VTHN1 is the turn-on threshold voltage of the second field effect transistor M2, u p is the carrier mobility of the first field effect transistor M1, C ox is the oxide layer capacitance of the first field effect transistor M1, W P1 is the gate width of the first field effect transistor M1, L P1 is the channel length of the first field effect transistor M1, u n is the carrier mobility of the second field effect transistor M2, C oxn is the oxide layer capacitance of the second field effect transistor M2, W N1 is the gate width of the second field effect transistor M2, L N1 The channel length of the second field effect transistor M2.

[0057] At this time, the third field effect transistor M3 is in the off state, so the second signal at the Y node is a low level signal, that is, logic "0", and outputs the first signal after passing through the first inverter IN1. The first signal rises with the power supply voltage VDD.

[0058] For the third field effect transistor M3, when the gate-source voltage V GSP3 is greater than or equal to the turn-on threshold voltage V of the third field effect transistor M3 THP3 When the third field effect transistor M3 is turned on, the following formula can be obtained:

[0059] |VDD-VX|≥|VTHP3|;

[0060] From the above two formulas, we can get:

[0061]

[0062] in,

[0063] Therefore, the first threshold voltage VDD can be adjusted by adjusting the sizes of the first field effect transistor M1 and the second field effect transistor M2. TH , achieving the first threshold voltage VDD TH Adaptive adjustment to suit different types of microcontrollers.

[0064] Figure 2 Another principle block diagram of the pull-down circuit 1 provided in an embodiment of the present application is shown. Figure 2 As shown, the switch module 11 includes a third switch unit 111 and a fourth switch unit 112, the third switch unit 111 and the fourth switch unit 112 are electrically connected to the voltage detection module 10 respectively, the third switch unit 111 is used to be electrically connected to the I / O port of the single-chip computer 2, the fourth switch unit 112 is used to be electrically connected to the power port of the single-chip computer 2, and the third switch unit 111 is also used for grounding. Figure 2 It can be known that the third switch unit 111 and the fourth switch unit 112 are electrically connected to the logic unit 104 in the voltage detection module 10 respectively.

[0065] Specifically, during the power-on reset period of the single-chip computer 2, when the power supply voltage VDD is less than the first threshold voltage VDD TH When the voltage detection module 10 is turned on, the logic unit 104 in the voltage detection module 10 outputs the first signal to the third switch unit 111 and the fourth switch unit 112 respectively. The fourth switch unit 112 is used to receive the first signal and turn off according to the first signal, and the third switch unit 111 is used to receive the first signal and turn on according to the first signal, so that the I / O port of the single-chip computer 2 is connected to the ground, and the I / O port of the single-chip computer 2 is maintained in a certain low level state, so that the stability and reliability of the entire system can be further guaranteed.

[0066] When the power supply voltage VDD reaches the first threshold voltage VDD TH When the voltage detection module 10 is turned on, the logic unit 104 in the voltage detection module 10 outputs a third signal to the third switch unit 111 and the fourth switch unit 112 respectively. The fourth switch unit 112 is used to receive the third signal, turn on according to the third signal, and output the power supply voltage VDD to the third switch unit 111. The third switch unit 111 is used to receive the third signal, turn off according to the third signal and the power supply voltage VDD, and disconnect from the I / O port of the single-chip computer 2, that is, release the I / O port of the single-chip computer 2, so as to avoid negative impact on the I / O port of the single-chip computer 2 and unnecessary power consumption.

[0067] Figure 4 Another circuit connection diagram of the pull-down circuit 1 provided in the embodiment of the present application is shown. Figure 4As shown, the third switch unit 111 includes a sixth field effect transistor M6, a seventh field effect transistor M7 and an eighth field effect transistor M8, the drain of the sixth field effect transistor M6 is used to be electrically connected to the I / O port of the single chip computer 2, the gate of the sixth field effect transistor M6 is electrically connected to the voltage detection module 10, the gate of the seventh field effect transistor M7, the gate of the eighth field effect transistor M8 and the fourth switch unit 112, the source of the sixth field effect transistor M6 is electrically connected to the drain of the seventh field effect transistor M7 and the fourth switch unit 112, the source of the seventh field effect transistor M7 is electrically connected to the drain of the eighth field effect transistor M8, and the source of the eighth field effect transistor M8 is used to be grounded. Figure 3 It can be seen that the gate of the sixth field effect transistor M6 is electrically connected to the output end of the first inverter IN1, the gate of the seventh field effect transistor M7, the gate of the eighth field effect transistor M8 and the fourth switch unit 112. The sixth field effect transistor M6, the seventh field effect transistor M7 and the eighth field effect transistor M8 are selected to be intrinsic NMOS transistors or depletion-type NMOS transistors with zero threshold voltage.

[0068] Specifically, during the power-on reset period of the single-chip computer 2, when the power supply voltage VDD is less than the first threshold voltage VDD TH When the power supply voltage VDD increases, the first inverter IN1 in the voltage detection module 10 outputs the first signal to the gate of the sixth field effect transistor M6, the gate of the seventh field effect transistor M7, the gate of the eighth field effect transistor M8 and the fourth switch unit 112 respectively. The first signal increases as the power supply voltage VDD increases, and the fourth switch unit 112 is turned off according to the first signal. Since the sixth field effect transistor M6, the seventh field effect transistor M7 and the eighth field effect transistor M8 select intrinsic NMOS tubes with zero threshold voltage or depletion-type NMOS tubes, they can still be turned on when the power supply voltage VDD is close to 0, so that the I / O port of the single-chip computer 2 is turned on with the ground, and the I / O port of the single-chip computer 2 is maintained in a certain low level state, so that the I / O port of the single-chip computer 2 can be ensured to be in a stable state, thereby ensuring the stability and reliability of the entire system.

[0069] When the power supply voltage VDD reaches the first threshold voltage VDD TH, the first inverter IN1 in the voltage detection module 10 outputs a third signal to the gate of the sixth field effect transistor M6, the gate of the seventh field effect transistor M7, the gate of the eighth field effect transistor M8 and the fourth switch unit 112 respectively, wherein the third signal is a low level signal, the fourth switch unit 112 is turned on according to the third signal, and outputs the power supply voltage VDD to the drain of the sixth field effect transistor M6. Then it can be obtained that the voltage VGSN6 between the gate and the source of the sixth field effect transistor M6 is equal to -VDD, and the sixth field effect transistor M6 is completely turned off, cutting off the connection between the I / O port of the single-chip computer 2 and the pull-down circuit 1. Since the voltage VGSN8 between the gate and source of the eighth field effect transistor M8 is equal to 0, the eighth field effect transistor M8 is still in the on state. If the drain terminal of the eighth field effect transistor M8 is directly connected to the point X, the current flowing through the eighth field effect transistor M8 will be very large, and the power consumption generated will also be very large. Therefore, the seventh field effect transistor M7 is added, so that the current flowing through the seventh field effect transistor M7 and the eighth field effect transistor M8 is further reduced, and the power consumption generated is also reduced.

[0070] It should be noted that the size design of the sixth field effect transistor M6, the seventh field effect transistor M7 and the eighth field effect transistor M8 should ensure that their pull-down capabilities when turned on are greater than the pull-up capabilities of the P-tube in the inverter of the I / O port of the microcontroller 2 before the power supply voltage VDD reaches the first threshold voltage.

[0071] Figure 4 Another circuit connection diagram of the pull-down circuit 1 provided in the embodiment of the present application is shown. Figure 4 As shown, the fourth switch unit 112 includes a ninth field effect transistor M9, the gate of the ninth field effect transistor M9 is electrically connected to the voltage detection module 10 and the third switch unit 111 respectively, the source of the ninth field effect transistor M9 is used to be electrically connected to the power port of the single chip computer 2, and the drain of the ninth field effect transistor M9 is electrically connected to the third switch unit 111. Figure 3 It can be seen that the gate of the ninth field effect transistor M9 is electrically connected to the output end of the first inverter IN1 and the gate of the sixth field effect transistor M6, and the drain of the ninth field effect transistor M9 is electrically connected to the source of the sixth field effect transistor M6. The ninth field effect transistor M9 is a high threshold PMOS tube.

[0072] Specifically, during the power-on reset period of the single-chip computer 2, when the power supply voltage VDD is less than the first threshold voltage VDD THWhen the power supply voltage VDD increases, the first inverter IN1 in the voltage detection module 10 outputs a first signal to the gate of the sixth field effect transistor M6, the gate of the seventh field effect transistor M7, the gate of the eighth field effect transistor M8 and the gate of the ninth field effect transistor M9 respectively. The first signal increases as the power supply voltage VDD increases, and the ninth field effect transistor M9 is turned off. Since the sixth field effect transistor M6, the seventh field effect transistor M7 and the eighth field effect transistor M8 select intrinsic NMOS tubes or depletion-type NMOS tubes with zero threshold voltage, they can still be turned on when the power supply voltage VDD is close to 0, so that the I / O port of the single-chip computer 2 is turned on with the ground, and the I / O port of the single-chip computer 2 is maintained in a certain low level state, so that the I / O port of the single-chip computer 2 can be ensured to be in a stable state, thereby ensuring the stability and reliability of the entire system.

[0073] When the power supply voltage VDD reaches the first threshold voltage VDD TH When the voltage detection module 10 is turned on, the first inverter IN1 in the voltage detection module 10 outputs a third signal to the gate of the sixth field effect transistor M6, the gate of the seventh field effect transistor M7, the gate of the eighth field effect transistor M8 and the gate of the ninth field effect transistor M9, respectively, wherein the third signal is a low level signal, then the ninth field effect transistor M9 is turned on, and the power supply voltage VDD is output to the drain of the sixth field effect transistor M6. Then it can be obtained that the voltage VGSN6 between the gate and the source of the sixth field effect transistor M6 is equal to -VDD, then the sixth field effect transistor M6 is completely turned off, and the connection between the I / O port of the single-chip computer 2 and the pull-down circuit 1 is cut off. Since the voltage VGSN8 between the gate and source of the eighth field effect transistor M8 is equal to 0, the eighth field effect transistor M8 is still in the on state. If the drain terminal of the eighth field effect transistor M8 is directly connected to the point X, the current flowing through the eighth field effect transistor M8 will be very large, and the power consumption generated will also be very large. Therefore, the seventh field effect transistor M7 is added, so that the current flowing through the seventh field effect transistor M7 and the eighth field effect transistor M8 is further reduced, and the power consumption generated is also reduced.

[0074] In summary, during the power-on reset of the single-chip computer 2, the pull-down circuit 1 provided in the present application can ensure that it is turned on before the power supply voltage VDD rises to the conduction threshold voltage of any type of active MOS device inside the single-chip computer 2, and the I / O port of the single-chip computer 2 is pulled down to the ground, so that the I / O port of the single-chip computer 2 is in a stable state to ensure the stability and reliability of the entire system. The pull-down circuit 1 provided in the present application can also ensure that it is turned off when the power supply voltage VDD rises to the conduction threshold voltage of any type of active MOS device inside the single-chip computer, releasing the I / O port of the single-chip computer 2, avoiding negative impact on the I / O port of the single-chip computer 2 and generating unnecessary power consumption.

[0075] The embodiment of the present application also provides a chip, including a single-chip microcomputer and the pull-down circuit described above. The I / O port of the single-chip microcomputer is electrically connected to the switch module in the pull-down circuit, and the power port of the single-chip microcomputer is electrically connected to the power detection module in the pull-down circuit. It should be noted that the single-chip microcomputer and the pull-down circuit are integrated on a silicon chip.

[0076] Specifically, during the power-on reset of the chip, the voltage detection module in the pull-down circuit is used to detect the power supply voltage at the power port of the microcontroller, and before the power supply voltage rises to the turn-on threshold voltage (i.e., the first threshold voltage) of any type of active MOS device inside the microcontroller, the first signal is output to the switch module in the pull-down circuit. The switch module is used to be turned on according to the first signal, so that the I / O port of the microcontroller is turned on to the ground, and the I / O port of the microcontroller is maintained in a certain low-level state, thereby ensuring that the I / O port of the microcontroller is in a stable state, thereby ensuring that the chip is in a stable state.

[0077] The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A pull-down circuit, It is characterized in that It includes a voltage detection module and a switch module, the voltage detection module is electrically connected to the switch module, the switch module is used to be electrically connected to the input / output port of the single-chip microcomputer, the switch module is also used for grounding, and the voltage detection module is used to be electrically connected to the power port of the single-chip microcomputer; The voltage detection module is used to detect the power supply voltage at the power supply port of the single-chip microcomputer, and output a first signal to the switch module when the power supply voltage is less than a first threshold voltage; The switch module is used to conduct according to the first signal, so that the input / output port of the single-chip microcomputer is connected to the ground.

2. The pull-down circuit according to claim 1, It is characterized in that The voltage detection module includes a first switch unit, a second switch unit, an energy storage unit and a logic unit, the first switch unit is electrically connected to the energy storage unit and the second switch unit respectively, the logic unit is electrically connected to the second switch unit and the switch module respectively, the first switch unit, the second switch unit and the energy storage unit are all used to be electrically connected to the power port of the single-chip microcomputer, and the first switch unit and the second switch unit are both used to be grounded; The energy storage unit is used to store energy and output a first voltage to the first switch unit and the second switch unit respectively, and the first voltage changes with the power supply voltage; when the power supply voltage is less than the first threshold voltage, the second switch unit is used to shut down according to the power supply voltage and the first voltage, and output a second signal to the logic unit, and the logic unit is used to convert the second signal into the first signal and transmit the first signal to the switch module; when the first voltage reaches the second threshold voltage, the first switch unit is used to turn on according to the first voltage.

3. The pull-down circuit according to claim 2, It is characterized in that The first switch unit includes a first field effect transistor and a second field effect transistor, the source of the first field effect transistor is used to be electrically connected to the power port of the single-chip computer, the gate of the first field effect transistor is used to be grounded, the drain of the first field effect transistor is respectively electrically connected to the energy storage unit, the second switch unit, the gate of the second field effect transistor and the drain of the second field effect transistor, and the source of the second field effect transistor is used to be grounded.

4. The pull-down circuit according to claim 2, It is characterized in that The second switch unit includes a third field effect transistor and a fourth field effect transistor, the source of the third field effect transistor is used to be electrically connected to the power port of the single-chip computer, the gate of the third field effect transistor is electrically connected to the energy storage unit and the first switch unit, respectively, the drain of the third field effect transistor is electrically connected to the logic unit and the drain of the fourth field effect transistor, respectively, the gate of the fourth field effect transistor is used to be electrically connected to the power port of the single-chip computer, and the source of the fourth field effect transistor is used to be grounded.

5. The pull-down circuit according to claim 2, It is characterized in that The energy storage unit includes a fifth field effect transistor, a gate of the fifth field effect transistor is electrically connected to the first switch unit and the second switch unit respectively, and a source of the fifth field effect transistor and a drain of the fifth field effect transistor are both used to be electrically connected to the power port of the single chip computer.

6. The pull-down circuit according to claim 2, It is characterized in that The logic unit includes a first inverter, an input end of the first inverter is electrically connected to the second switch unit, and an output end of the first inverter is electrically connected to the switch module.

7. The pull-down circuit according to any one of claims 1 to 6, It is characterized in that The switch module includes a third switch unit and a fourth switch unit, the third switch unit and the fourth switch unit are electrically connected to the voltage detection module respectively, the third switch unit is used to be electrically connected to the input / output port of the single-chip microcomputer, the fourth switch unit is used to be electrically connected to the power port of the single-chip microcomputer, and the third switch unit is also used to be grounded; The fourth switch unit is used to receive the first signal and be turned off according to the first signal; the third switch unit is used to receive the first signal and be turned on according to the first signal, so that the input / output port of the single-chip microcomputer is connected to the ground.

8. The pull-down circuit according to claim 7, It is characterized in that The third switch unit includes a sixth field effect transistor, a seventh field effect transistor and an eighth field effect transistor, the drain of the sixth field effect transistor is used to be electrically connected to the input / output port of the single-chip computer, the gate of the sixth field effect transistor is electrically connected to the voltage detection module, the gate of the seventh field effect transistor, the gate of the eighth field effect transistor and the fourth switch unit, respectively, the source of the sixth field effect transistor is electrically connected to the drain of the seventh field effect transistor and the fourth switch unit, the source of the seventh field effect transistor is electrically connected to the drain of the eighth field effect transistor, and the source of the eighth field effect transistor is used to be grounded.

9. The pull-down circuit according to claim 7, It is characterized in that The fourth switch unit includes a ninth field effect transistor, a gate of the ninth field effect transistor being electrically connected to the voltage detection module and the third switch unit respectively, a source of the ninth field effect transistor being used to be electrically connected to the power port of the single-chip computer, and a drain of the ninth field effect transistor being electrically connected to the third switch unit.

10. A chip, It is characterized in that The pull-down circuit comprises the pull-down circuit described in any one of claims 1 to 9.

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