Driving circuit of LINK indicating lamp and network equipment
By designing the conversion circuit of transistors, base resistors and charging capacitors in PROFINET industrial Ethernet equipment, converting the ACT signal into a continuous signal, the problem of PHY chip lacking the output end of the LINK signal is solved, and the driving of the LINK indicator light is realized to ensure the equipment It has ACT and LINK indicators.
Patent Information
- Application Number
- CN202420960300.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-07
- Publication Date
- 2024-12-24
- Estimated Expiration
- 2034-05-07
AI Technical Summary
In PROFINET industrial Ethernet devices, some PHY chips only have ACT signals and SPEED signals, but lack the LINK signal output, which makes it impossible to drive the LINK indicator light and cannot achieve the indication of the network port connection status.
A conversion circuit including transistor, base resistor and charging capacitor is designed. By converting the interruption signal at the output end of the ACT signal into a continuous signal, the LINK indicator light is driven, and the transistor is guided by the discharge and charging process of the charging capacitor and base resistor. , thereby illuminating the LINK indicator.
It realizes driving the LINK indicator light on a PHY chip that does not have the LINK signal output, so that the device can display the network port connection status normally and meets the product functional design requirements.
Smart Images

Figure CN222235101U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of Internet technology, and in particular to a driving circuit and network equipment for a LINK indicator light. Background Art
[0002] In the bus IO of PROFINET industrial Ethernet equipment, Ethernet PHY chip is used for Ethernet network data communication. Among them, PHY chip is an important chip in computer network and communication equipment, which is responsible for realizing the physical layer function of data transmission. PHY chip converts digital signal into analog signal and sends it to the communication medium; at the same time, it recovers digital signal from the received analog signal and transmits it to the upper chip for processing.
[0003] In some Ethernet devices, the product function design requires the use of specified PHY chips. In some cases, these specified PHY chips only have ACT and SPEED signals, while Ethernet devices require the device to have ACT and LINK indicators. Among them, the ACT indicator: flashes at 4Hz to indicate network data interaction, and is always on when there is no data interaction; the SPEED indicator: is used to indicate that the Ethernet bus is at a rate of 10Mbps or 100Mbps; the LINK indicator: is on to indicate that the network port has established a connection.
[0004] Therefore, how to use the above-mentioned PHY chip to realize that the Ethernet device has an ACT indicator light and a LINK indicator light is a technical problem that those skilled in the art need to solve. Utility Model Content
[0005] In view of the above problems, the present application provides a driving circuit for a LINK indicator light, which is used to solve the technical problem that some of the above-mentioned PHY chips are not capable of driving the LINK indicator light.
[0006] To achieve the above object, the present application provides a driving circuit for a LINK indicator light, comprising:
[0007] The PHY chip comprises an ACT signal output terminal, wherein the ACT signal output terminal is connected to an ACT indicator light;
[0008] A conversion circuit, used for converting the intermittent signal outputted from the ACT signal output terminal into a continuous signal to drive the LINK indicator light;
[0009] The conversion circuit comprises: a triode, a diode, a base resistor and a charging capacitor;
[0010] One end of the charging capacitor is grounded, the other end of the charging capacitor is connected to the anode of the diode, and the cathode of the diode is connected to the ACT signal output end;
[0011] The collector of the transistor is connected to the positive pole of the power supply; the emitter of the transistor is connected to the LINK indicator light; the base of the transistor is connected to one end of the base resistor, and the other end of the base resistor is connected to the common end of the charging capacitor and the diode.
[0012] Furthermore, the conversion circuit also includes a pull-up resistor, one end of which is connected to the base, and the other end of which is connected to the positive electrode of the power supply, for pulling up the voltage of the base of the transistor.
[0013] Furthermore, the ACT indicator light and the LINK indicator light are both light emitting diodes, and are respectively connected in series with current limiting resistors.
[0014] Furthermore, the diode is a switching diode.
[0015] Furthermore, when the ACT signal output terminal outputs a low voltage, the charging capacitor is discharged through the diode, and the base resistor has current to turn on the transistor, driving the LINK indicator light to light up;
[0016] When the ACT signal output terminal outputs a high voltage, the charging capacitor is charged through the base resistor, so that the transistor is turned on and the LINK indicator light is driven to light up.
[0017] Furthermore, the PHY chip also includes a SPEED signal output terminal, and the SPEED signal output terminal outputs a high or low level to indicate that the Ethernet bus is at a rate of 10 Mbps or 100 Mbps.
[0018] In order to solve the above technical problems, this application also provides another technical solution:
[0019] A network device comprises a driving circuit for a LINK indicator light, wherein the driving circuit for the LINK indicator light is any one of the driving circuits for the LINK indicator lights described above.
[0020] Furthermore, the network device is applied to a network device of an industrial Ethernet.
[0021] Different from the prior art, the above technical solution designs a conversion circuit connected to the ACT signal output end of the PHY chip, and the conversion circuit includes: a transistor, a diode, a base resistor and a charging capacitor; one end of the charging capacitor is grounded, the other end of the charging capacitor is connected to the positive electrode of the diode, and the negative electrode of the diode is connected to the ACT signal output end; the collector of the transistor is connected to the positive electrode of the power supply; the emitter of the transistor is connected to the LINK indicator; the base of the transistor is connected to one end of the base resistor, and the other end of the base resistor is connected to the common end of the charging capacitor and the diode. Therefore, when the ACT signal output end outputs a low voltage, the charging capacitor is discharged through the diode, and the base resistor has a current to turn on the transistor, driving the LINK indicator to light up; when the ACT signal output end outputs a high voltage, the charging capacitor is charged through the base resistor, so that the transistor is turned on and the LINK indicator is driven to light up. In this way, the intermittent ACT signal is converted into a continuous LINK signal to drive the LINK indicator, so that the PHY chip without a LINK signal output end can also drive the LINK indicator.
[0022] The above-mentioned records related to the content of the utility model are only an overview of the technical solution of the present application. In order to enable ordinary technicians in the field to more clearly understand the technical solution of the present application, and then implement it according to the text of the specification and the contents recorded in the drawings, and to make the above-mentioned purpose and other purposes, features and advantages of the present application easier to understand, the following is an explanation in combination with the specific implementation method and drawings of the present application. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] The drawings are only used to illustrate the principles, implementation methods, applications, characteristics and effects of the specific embodiments of the present application and other related contents, and shall not be considered as limitations of the present application.
[0024] In the drawings of the specification:
[0025] Figure 1 A circuit diagram of a driving circuit of a LINK indicator light according to a specific implementation method;
[0026] Figure 2 It is a schematic diagram of current flow when the ACT signal output terminal outputs a low voltage according to the specific implementation method;
[0027] Figure 3 It is a schematic diagram of current flow when the ACT signal output terminal outputs a high voltage according to the specific implementation method; DETAILED DESCRIPTION
[0028] In order to explain in detail the possible application scenarios, technical principles, specific schemes that can be implemented, and the purposes and effects that can be achieved, the following is a detailed description of the specific embodiments listed in conjunction with the accompanying drawings. The embodiments described herein are only used to more clearly illustrate the technical solutions of the present application, and are therefore only used as examples, and cannot be used to limit the scope of protection of the present application.
[0029] Reference to "embodiment" herein means that the specific features, structures or characteristics described in conjunction with the embodiment may be included in at least one embodiment of the present application. The term "embodiment" appearing in various places in the specification does not necessarily refer to the same embodiment, nor does it particularly limit its independence or association with other embodiments. In principle, in the present application, as long as there is no technical contradiction or conflict, the various technical features mentioned in the embodiments can be combined in any way to form a corresponding implementable technical solution.
[0030] Unless otherwise defined, the technical terms used in this document have the same meanings as those generally understood by those skilled in the art to which this application belongs; the use of relevant terms in this document is only for describing specific embodiments and is not intended to limit this application.
[0031] In the description of this application, the term "and / or" is an expression used to describe the logical relationship between objects, indicating that three relationships may exist, for example, A and / or B, which means: A exists, B exists, and A and B exist at the same time. In addition, the character " / " in this article generally indicates that the objects before and after are in an "or" logical relationship.
[0032] In the present application, terms such as “first” and “second” are merely used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship of quantity, priority or sequence between these entities or operations.
[0033] Without further limitations, in this application, the words "include", "comprises", "has" or other similar expressions used in the sentences are intended to cover non-exclusive inclusion. These expressions do not exclude the presence of additional elements in the process, method or product including the elements, so that the process, method or product including a series of elements may include not only those limited elements, but also other elements not explicitly listed, or also include elements inherent to such process, method or product.
[0034] Similar to the understanding in the Examination Guidelines, in this application, expressions such as "greater than", "less than", "exceed" and the like are understood to exclude the number itself; expressions such as "above", "below", "within" and the like are understood to include the number itself. In addition, in the description of the embodiments of this application, "multiple" means more than two (including two), and similar expressions related to "multiple" are also understood in this way, such as "multiple groups", "multiple times", etc., unless otherwise clearly and specifically limited.
[0035] In the description of the embodiments of the present application, space-related expressions used, such as "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "vertical", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicate the orientation or position relationship based on the orientation or position relationship shown in the specific embodiments or drawings, and are only for the convenience of describing the specific embodiments of the present application or facilitating the reader's understanding, and do not indicate or imply that the referred device or component must have a specific position, a specific orientation, or be constructed or operated in a specific orientation, and therefore cannot be understood as a limitation on the embodiments of the present application.
[0036] Unless otherwise expressly specified or limited, in the description of the embodiments of the present application, the terms such as "install", "connect", "connect", "fix", "set", etc. used should be understood in a broad sense. For example, the "connection" can be a fixed connection, a detachable connection, or an integrated setting; it can be a mechanical connection, an electrical connection, or a communication connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium; it can be the internal connection of two elements or the interaction relationship between two elements. For technicians in the technical field to which the present application belongs, the specific meanings of the above terms in the embodiments of the present application can be understood according to the specific circumstances.
[0037] See also Figure 1 This embodiment provides a driving circuit for a LINK indicator light. The driving circuit for the LINK indicator light is applied to Ethernet devices to drive the LINK indicator light, and is particularly applicable to PROFINET industrial Ethernet devices. The LINK indicator light is used to indicate whether the device is connected to Ethernet.
[0038] In this embodiment, the driving circuit of the LINK indicator light includes: a PHY chip and a conversion circuit, wherein the PHY chip includes an ACT signal output terminal, and the ACT signal output terminal is connected to the ACT indicator light.
[0039] like Figure 1As shown, PORT2_ACT_LED is the ACT signal output terminal of the PHY chip; LED_VDD is the positive pole of the power supply (usually 5V), GND is the ground, V5 is the ACT indicator light, and the light below V5 is the LINK indicator light.
[0040] The conversion circuit is used to convert the intermittent signal output by the ACT signal output terminal into a continuous signal to drive the LINK indicator light. Figure 1 As shown, the conversion circuit includes: a transistor Q5, a diode D6, a base resistor R48 and a charging capacitor C100. One end of the charging capacitor C100 is grounded GND, the other end of the charging capacitor C100 is connected to the positive electrode of the diode D6, and the negative electrode of the diode D6 is connected to the ACT signal output terminal PORT2_ACT_LED. In some embodiments, the diode is a switching diode.
[0041] The collector of the transistor Q5 is connected to the positive electrode of the power supply LED_VDD; the emitter of the transistor is connected to the LINK indicator light (in Figure 1 The base of the transistor Q5 is connected to one end of the base resistor R48, and the other end of the base resistor R48 is connected to the common end of the charging capacitor C100 and the diode.
[0042] In this embodiment, the PHY chip has only an ACT signal output terminal and a SPEED signal output terminal, but no LINK signal output terminal, and therefore cannot be connected to drive the LINK indicator light.
[0043] like Figure 2 As shown, the direction indicated by the arrow is the direction of current flow. When the ACT signal output terminal PORT2_ACT_LED outputs a low voltage, the current passes through the current limiting resistor R37 to light up the ACT indicator light V5. And when the ACT signal output terminal PORT2_ACT_LED outputs a low voltage, the diode D6 is turned on, the charging capacitor C100 is discharged through the diode D6, and the base resistor has current to turn on the transistor, and through the current amplification effect of the transistor Q5, the LINK indicator light is driven to light up.
[0044] like Figure 3As shown, the direction indicated by the arrow is the direction of current flow. When the ACT signal output terminal PORT2_ACT_LED outputs a high voltage, the diode D6 is cut off to prevent the high level signal of PORT2_ACT_LED from charging the charging capacitor C100. In addition, since the charging capacitor C100 has been quickly discharged when PORT2_ACT_LED is at a low level, when the ACT signal output terminal PORT2_ACT_LED outputs a high voltage, the charging capacitor C100 is charged through the base resistor R48, so that the transistor Q5 is turned on, driving the LINK indicator light to light up. That is, when the ACT signal output terminal PORT2_ACT_LED outputs a high voltage, the charging capacitor C100 will be slowly charged through the base of the transistor Q5 and the base resistor R48, so that a suitable current flows through the base. This process will last for a sufficient time until the next PORT2_ACT_LED low-level signal quickly discharges the charging capacitor C100, so that the transistor Q5 will be turned on, and there will be an intermittent low-level signal in PORT2_ACT_LED to keep the LINK light on. Therefore, through this embodiment, the intermittent ACT signal of the PHY chip can be converted into a continuous signal to drive the LINK indicator light, so that the PHY chip without a LINK signal output terminal can drive the LINK indicator light to work normally, and the product network port has both the ACT designated light and the LINK indicator light.
[0045] like Figure 1 As shown, the conversion circuit also includes a pull-up resistor R47, one end of the pull-up resistor R47 is connected to the base, and the other end of the pull-up resistor R47 is connected to the positive electrode of the power supply LED_VDD. The pull-up resistor R47 is used to pull up the voltage of the base of the transistor.
[0046] like Figure 1 The ACT indicator light and the LINK indicator light are both light emitting diodes, and are respectively connected in series with a current limiting resistor R37 and a current limiting resistor R39. The current limiting resistor R37 and the current limiting resistor R39 can limit the current flowing through the LINK indicator light and the ACT indicator light to prevent the LINK indicator light and the ACT indicator light from overcurrent.
[0047] In some embodiments, the PHY chip further includes a SPEED signal output terminal, and the SPEED signal output terminal outputs a high or low level to indicate that the Ethernet bus is at a rate of 10 Mbps or 100 Mbps.
[0048] In another embodiment, a network device is provided, including a driving circuit of a LINK indicator light, wherein the driving circuit of the LINK indicator light is the driving circuit of the LINK indicator light described in any one of the above embodiments. Further, the network device is applied to a network device of an industrial Ethernet.
[0049] In this embodiment, the discontinuous ACT signal can be converted into a continuous LINK signal to drive the LINK indicator light through the conversion circuit, so that a PHY chip without a LINK signal output terminal can also drive the LINK indicator light.
[0050] Finally, it should be noted that although the above embodiments have been described in the specification and drawings of this application, this does not limit the scope of patent protection of this application. All technical solutions generated by replacing or modifying equivalent structures or equivalent processes based on the essential concept of this application using the contents recorded in the specification and drawings of this application, as well as directly or indirectly implementing the technical solutions of the above embodiments in other related technical fields, are included in the scope of patent protection of this application.
Claims
1. A driving circuit for a LINK indicator light, characterized in that: include: The PHY chip comprises an ACT signal output terminal, wherein the ACT signal output terminal is connected to an ACT indicator light; A conversion circuit, used for converting the intermittent signal outputted from the ACT signal output terminal into a continuous signal to drive the LINK indicator light; The conversion circuit comprises: a triode, a diode, a base resistor and a charging capacitor; One end of the charging capacitor is grounded, the other end of the charging capacitor is connected to the anode of the diode, and the cathode of the diode is connected to the ACT signal output end; The collector of the transistor is connected to the positive pole of the power supply; the emitter of the transistor is connected to the LINK indicator light; the base of the transistor is connected to one end of the base resistor, and the other end of the base resistor is connected to the common end of the charging capacitor and the diode.
2. The driving circuit of the LINK indicator light according to claim 1, characterized in that: The conversion circuit also includes a pull-up resistor, one end of which is connected to the base, and the other end of which is connected to the positive electrode of the power supply, for pulling up the voltage of the base of the transistor.
3. The driving circuit of the LINK indicator light according to claim 1, characterized in that: The ACT indicator light and the LINK indicator light are both light emitting diodes, and are respectively connected in series with current limiting resistors.
4. The driving circuit of the LINK indicator light according to claim 1, characterized in that: The diode is a switching diode.
5. The driving circuit of the LINK indicator light according to claim 1, characterized in that: When the ACT signal output terminal outputs a low voltage, the charging capacitor is discharged through the diode, and the base resistor has current to turn on the transistor, driving the LINK indicator light to light up; When the ACT signal output terminal outputs a high voltage, the charging capacitor is charged through the base resistor, so that the transistor is turned on and the LINK indicator light is driven to light up.
6. The driving circuit of the LINK indicator light according to claim 1, characterized in that: The PHY chip further includes a SPEED signal output terminal, which outputs a high or low level to indicate that the Ethernet bus is at a rate of 10 Mbps or 100 Mbps.
7. A network device, comprising a driving circuit for a LINK indicator light, characterized in that: The driving circuit of the LINK indicator light is the driving circuit of the LINK indicator light according to any one of claims 1 to 6.
8. The network device according to claim 7, characterized in that: The network device is applied to a network device of an industrial Ethernet.
