Circuit for improving charge rate of charge pump

Abstract

The utility model discloses a circuit for improving the charging rate of a charge pump, which comprises a sampling module, a comparator, an oscillator, a high-voltage power supply, a high-voltage bias module, a low-voltage bias module, a high-side power tube, a low-side power tube, a first diode, a second diode, a pump capacitor and a filter capacitor, the output end of the sampling module is connected with the in-phase end of the comparator, the inverted input end of the comparator is connected with reference voltage, and the output end of the comparator is connected with one input end of the high-voltage bias module. The oscillator outputs a first clock signal of oscillation with a certain frequency, and the output end of the oscillator is connected with the high-voltage bias module, the low-voltage bias module and one input end of the high-voltage power supply. Another input end of the high-voltage power supply is connected with a power supply VM, and the high-voltage power supply outputs a second clock signal with a high level VM, a low level 0 and the same phase as the first clock signal, and is connected with one input end of the high-side power tube.

Description

Technical Field

[0001] The utility model belongs to the technical field of electronic circuits, and in particular relates to a circuit for improving the charging rate of a charge pump. Background Art

[0002] Charge Pump, also known as switched capacitor voltage converter, is a DC / DC converter that uses capacitors to store energy. It can increase or decrease the input voltage. Its internal FET (Field Effect Transistor) switch array controls the charging and discharging of the pump capacitor in a certain way, so that the input voltage increases or decreases by a certain factor, thereby obtaining the required output voltage. Charge pumps are generally divided into three categories: switching regulator boost pumps, non-adjustable capacitor charge pumps, and adjustable capacitor charge pumps. Its application scenarios are also very wide, and it is commonly used in gate drivers. In gate driver applications, the high-side driver needs to output a high level higher than the power supply voltage to drive the high-side power tube, so the power supply voltage needs to be boosted to power the high-side driver.

[0003] like Figure 1 The figure shows a simple charge pump structure block diagram, which includes four parts: clock signal processing circuit, drive circuit, charge and discharge circuit and sampling detection circuit. Since the build-up time of the charge pump output voltage is a charge and discharge process, the time for the output voltage to rise to the set voltage is the build-up time of the charge pump. The build-up time of the charge pump circuit reflects the driving ability of the charge pump. The shorter the circuit build-up time, the stronger the driving ability of the charge pump. Therefore, the build-up time parameter of the charge pump is a very important parameter indicator. The charge pump boost in the prior art has the following problems: Since the charge pump output voltage VCP needs to be increased to a voltage value much higher than the power supply voltage VM, the required pump capacitor is relatively large, so the VCP build-up time is long and the efficiency is relatively low. The long build-up time of the charge pump leads to weak driving ability of the charge pump. Utility Model Content

[0004] In view of the above problems, the utility model provides a circuit for improving the charging rate of a charge pump.

[0005] In order to solve the above technical problems, the utility model adopts the following technical solutions:

[0006] A circuit for improving the charging rate of a charge pump comprises a sampling module, a comparator, an oscillator, a high-voltage power supply, a high-voltage bias module, a low-voltage bias module, a high-side power tube, a low-side power tube, a first diode, a second diode, a pump capacitor and a filter capacitor. The input end of the sampling module is connected to the charge pump output voltage, the output end of the sampling module is connected to the in-phase end of the comparator, the inverting input end of the comparator is connected to a reference voltage, and the output end of the comparator is connected to an input end of the high-voltage bias module; the oscillator outputs a first clock signal of a certain frequency, and the output end is respectively connected to the high-voltage bias module, the low-voltage bias module and an input end of the high-voltage power supply; another input end of the high-voltage power supply is connected to a power supply VM, and the high-voltage power supply outputs a high level VM, A second clock signal with a low level of 0 and in phase with the first clock signal is connected to an input end of the high-side power tube; an output end of the high-voltage bias module is connected to an input end of the high-side power tube; an output end of the low-voltage bias module is connected to an input end of the low-side power tube; an output end of the high-side power tube and the low-side power tube is connected to a charge pump switch low potential CPL, a cathode of the first diode and an anode of the second diode are connected to a charge pump switch high potential CPH, an anode of the first diode is connected to a power supply VM, and a cathode of the second diode is connected to a charge pump output voltage; one end of the filter capacitor is connected to the power supply VM, and the other end of the filter capacitor is connected to the charge pump output voltage; one end of the pump capacitor is connected to the charge pump switch low potential, and the other end of the pump capacitor is connected to the charge pump switch high potential.

[0007] In a possible implementation manner, the high-side power tube is an NMOS power tube.

[0008] In a possible implementation manner, the low-side power tube is an NMOS power tube.

[0009] In a possible implementation manner, the high voltage power supply includes a first PMOS transistor, a second PMOS transistor, and a first NMOS transistor.

[0010] In a possible implementation, the sources of the first PMOS tube and the second PMOS tube are connected to a power supply, the drain of the first PMOS tube is connected to a gate, and is connected to the gate of the second PMOS tube and to a bias current; the gate of the first NMOS tube is connected to the output of an oscillator, the source of the first NMOS tube is grounded, and the drain of the second PMOS tube is connected to the drain of the first NMOS tube as the output end of the high-voltage power supply.

[0011] The utility model has the following beneficial effects:

[0012] (1) It can effectively shorten the VCP setup time, achieve higher efficiency and stronger charge pump driving capability.

[0013] (2) The circuit part has a simple circuit structure, low power consumption and strong applicability. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a block diagram of the charge pump principle in the prior art;

[0015] Figure 2 This is a circuit principle block diagram for improving the charging rate of a charge pump according to an embodiment of the utility model;

[0016] Figure 3 A circuit diagram of a high voltage power supply in a circuit for improving the charging rate of a charge pump according to an embodiment of the utility model;

[0017] Figure 4 It is a schematic diagram of the VCP establishment time waveform of the prior art solution and the embodiment of the utility model. DETAILED DESCRIPTION

[0018] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0019] See also Figure 2, shown is a circuit principle block diagram of an embodiment of the utility model for improving the charging rate of a charge pump, including a sampling module 12, a comparator 13, an oscillator 14, a high-voltage power supply 17, a high-voltage bias module 15, a low-voltage bias module 16, a high-side power tube 18, a low-side power tube 19, a first diode 20, a second diode 21, a pump capacitor 23 and a filter capacitor 22, the input end of the sampling module 12 is connected to the charge pump output voltage VCP, the output end of the sampling module 12 is connected to the in-phase end of the comparator 13, the inverting input end of the comparator 13 is connected to the reference voltage REF, and the output end of the comparator 13 is connected to an input end of the high-voltage bias module 15; the oscillator 14 outputs a first clock signal of a certain frequency, and the output end is respectively connected to the high-voltage bias module 15, the low-voltage bias module 16 and an input end of the high-voltage power supply 17; another input end of the high-voltage power supply 17 is connected to the power supply VM, The high-voltage power supply outputs a second clock signal with a high level of VM and a low level of 0 and in phase with the first clock signal, and is connected to an input end of the high-side power tube 18; the output end of the high-voltage bias module 15 is connected to an input end of the high-side power tube 18; the output end of the low-voltage bias module 16 is connected to an input end of the low-side power tube 19; an output end of the high-side power tube 18 and the low-side power tube 19 is connected to a charge pump switch low potential CPL, the cathode of the first diode 20 and the anode of the second diode 21 are connected to a charge pump switch high potential CPH, the anode of the first diode is connected to the power supply VM, and the cathode of the second diode is connected to the charge pump output voltage VCP; one end of the filter capacitor 22 is connected to the power supply VM, and the other end of the filter capacitor 22 is connected to the charge pump output voltage; one end of the pump capacitor 23 is connected to the charge pump switch low potential CPL, and the other end of the pump capacitor 23 is connected to the charge pump switch high potential CPL.

[0020] In the circuit for improving the charging rate of a charge pump according to an embodiment of the utility model, both the high-side power tube 18 and the low-side power tube 19 are NMOS power tubes.

[0021] Continue to see Figure 3 In the circuit for improving the charging rate of a charge pump according to an embodiment of the utility model, the high-voltage power supply includes a first PMOS tube 24, a second PMOS tube 25 and a first NMOS tube 27. The source of the first PMOS tube 24 and the second PMOS tube 25 are connected to the power supply, the drain of the first PMOS tube 24 is connected to the gate, and the gate of the second PMOS tube 25 is connected to the bias current; the gate of the first NMOS tube 27 is connected to the output of the oscillator, the source of the first NMOS tube 27 is grounded, and the drain of the second PMOS tube 25 and the first NMOS tube 24 are connected as the output end of the high-voltage power supply.

[0022] By means of a circuit for increasing the charging rate of the charge pump, the sampling module 12 detects the charge pump output voltage VCP and outputs a voltage proportional to VCP. The comparator 13 compares the voltage outputted from the sampling circuit 12 with the reference voltage REF and outputs a high-low level signal. The high-voltage bias module 15 receives the clock signal of the oscillator 14 and outputs a high-low level signal HO for controlling the high-side power tube 18; the low-voltage bias module 16 receives the clock signal of the oscillator 14 and outputs a high-low level signal LO for controlling the low-side power tube 19; the high-side power tube 18 and the low-side power tube 19 output a high-low oscillation signal CPL, which continuously charges and discharges the pump capacitor 23 to raise the CPH node voltage, and transmits it to VCP in one direction through the diode 21, and finally obtains a charge pump voltage VCP greater than the power supply voltage VM. The high-voltage power supply 17 receives the clock signal provided by the oscillator 14, outputs a second clock signal with a high level of VM and a low level of 0 and in phase with the first clock signal, and controls the opening and closing of the high-side power tube 18 together with the high-voltage bias 15. When VM power is supplied, oscillator 14 outputs clock signal control signal HO and LO output high and low levels. When HO outputs high level and LO outputs low level, since VCP has not been charged, the output voltage of high voltage bias module 15 is lower than VM, and high voltage power supply 17 outputs VM voltage, so HO outputs high level VM voltage, and CPL outputs voltage VM-V GS,18 When HO outputs a low level and LO outputs a high level, the CPL output voltage is 0. Therefore, CPL outputs a high level of VM-V under the clock control of the oscillator 14. GS,18 , a square wave signal with a low level of 0, where V GS,18 is the voltage between the gate and source of the high-side power tube 18. Then, the pump capacitor 23 is charged and discharged to raise the VCP voltage. Compared with the prior art, the present invention has a high-level voltage of VM-V GS , while the CPL high level voltage of the existing technical solution is VM-2V Z -V GS Therefore, the utility model solution CPL is from high level to VM-V GS , the low level is 0 to start charging and discharging the pump capacitor, while the existing technical solution CPL starts from the high level VM-V GS -2V Z , the low level is 0 to start charging and discharging the pump capacitor. In contrast, the charging and discharging time of the embodiment of the utility model is shorter and more efficient, thereby shortening the VCP establishment time. As shown in the following timing sequence Figure 4 As shown, t1 is the VCP establishment time of the prior art solution, t2 is the VCP establishment time of the utility model technology solution, and t2 is less than t1.

[0023] It should be understood that the exemplary embodiments described herein are illustrative rather than restrictive. Although one or more embodiments of the present invention are described in conjunction with the accompanying drawings, it should be understood by those skilled in the art that various changes in form and detail may be made without departing from the spirit and scope of the present invention as defined by the appended claims.

Claims

1. A circuit for increasing the charging rate of a charge pump, characterized in that: The invention comprises a sampling module, a comparator, an oscillator, a high-voltage power supply, a high-voltage bias module, a low-voltage bias module, a high-side power tube, a low-side power tube, a first diode, a second diode, a pump capacitor and a filter capacitor, wherein the input end of the sampling module is connected to the charge pump output voltage, the output end of the sampling module is connected to the in-phase end of the comparator, the inverting input end of the comparator is connected to the reference voltage, and the output end of the comparator is connected to an input end of the high-voltage bias module; the oscillator outputs a first clock signal of a certain frequency, and the output end is respectively connected to the high-voltage bias module, the low-voltage bias module and an input end of the high-voltage power supply; another input end of the high-voltage power supply is connected to the power supply VM, and the high-voltage power supply outputs a high level of VM, a low level of 0 and is connected to the first A second clock signal in phase with a clock signal is connected to an input end of a high-side power tube; an output end of a high-voltage bias module is connected to an input end of the high-side power tube; an output end of a low-voltage bias module is connected to an input end of a low-side power tube; an output end of the high-side power tube and a low-side power tube are connected to a charge pump switch low potential CPL, a cathode of a first diode and an anode of a second diode are connected to a charge pump switch high potential CPH, an anode of the first diode is connected to a power supply VM, and a cathode of the second diode is connected to a charge pump output voltage; one end of a filter capacitor is connected to the power supply VM, and the other end of the filter capacitor is connected to the charge pump output voltage; one end of a pump capacitor is connected to a charge pump switch low potential, and the other end of the pump capacitor is connected to a charge pump switch high potential.

2. The circuit for increasing the charging rate of a charge pump as claimed in claim 1, characterized in that: The high-side power tube is an NMOS power tube.

3. The circuit for increasing the charging rate of a charge pump as claimed in claim 1, characterized in that: The low-side power tube is an NMOS power tube.

4. The circuit for increasing the charging rate of a charge pump according to any one of claims 1 to 3, characterized in that: The high voltage power supply includes a first PMOS tube, a second PMOS tube and a first NMOS tube.

5. The circuit for increasing the charging rate of a charge pump as claimed in claim 4, characterized in that: The sources of the first PMOS tube and the second PMOS tube are connected to a power supply, the drain of the first PMOS tube is connected to a gate, and is connected to the gate of the second PMOS tube and to a bias current; the gate of the first NMOS tube is connected to the output of the oscillator, the source of the first NMOS tube is grounded, and the drain of the second PMOS tube and the first NMOS tube are connected as the output end of the high-voltage power supply.

Images