Two-wire system high-speed 485 communication circuit for electric energy meter
A high-speed digital isolator addresses the level mismatch issue between 3.3V MCU and 5V 485 chip systems in electric energy meters, enabling reliable communication and protection against damage.
Patent Information
- Application Number
- CN202420266228.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-02-02
- Publication Date
- 2024-12-27
- Estimated Expiration
- 2034-02-02
AI Technical Summary
The existing 485 communication circuit in electric energy meters fails to function properly when a 3.3V MCU system is used with a 5V 485 chip due to level mismatch, preventing the 485 chip from transitioning between sending and receiving states.
A high-speed single-channel digital isolator is introduced between the MCU circuit and the 485 chip to ensure level matching and electrical isolation, using a digital isolation chip to convert signals between the two systems.
This solution enables reliable communication at high speeds by ensuring level matching and electrical isolation, allowing the circuit to operate at a baud rate of 115200, and prevents damage to the MCU in case of issues with the 485 chip.
Smart Images

Figure CN222262701U_ABST
Abstract
Description
Technical Field
[0001] The utility model belongs to the technical field of 485 communication, and in particular relates to a two-wire high-speed 485 communication circuit for an electric energy meter. Background Art
[0002] The relationship between the two-wire system used in the 485 communication circuit of the current energy meter and the MCU circuit is as follows: Figure 1 As shown in the figure: the transmit / receive enable pin of the 485 chip is connected to the TX port of the MCU chip through a PNP transistor, and the TX port controls the on / off of the transistor to complete the switching of the transmit / receive state of the 485 chip. The RO data port of the 485 chip is connected to the RX port of the MCU chip, and the DI data port of the 485 chip is connected to the ground. In actual applications, it is found that the 485 communication circuit uses a 5V system, and if the MCU circuit uses a 3.3V system, the PNP transistor will not be able to be turned off. At this time, the 485 chip will always be in the sending state and cannot enter the receiving state, so that communication cannot proceed normally.
[0003] Therefore, further improvements are made to the above problems. Utility Model Content
[0004] The main purpose of the utility model is to provide a two-wire high-speed 485 communication circuit for an electric energy meter, in which a high-speed single-channel digital isolator is added between the MCU circuit and the 485 chip to ensure level matching at both ends of the 485 chip, and because the input and output levels on both sides of the high-speed single-channel digital isolator are only related to the power supply voltage on each side, it plays a role of electrical isolation, thereby ensuring the safety and reliability of the circuit.
[0005] To achieve the above purpose, the utility model provides a two-wire high-speed 485 communication circuit for an electric energy meter, comprising an MCU circuit, a level matching circuit and a 485 circuit, wherein the level matching circuit is connected between the MCU circuit and the 485 circuit, wherein:
[0006] The level matching circuit includes a digital isolation chip U1, the 485 circuit includes a 485 chip UC1, the VDDB terminal (8 pins) of the digital isolation chip U1 is connected to the power supply terminal 3.3V in one way and grounded through a capacitor C2 in another way, and the VO1 terminal (7 pins) and the VI2 terminal (6 pins) of the digital isolation chip U1 are electrically connected to the MCU circuit respectively;
[0007] The VDDA terminal (pin 1) of the digital isolation chip U1 is connected to the power supply terminal 5V in one way and is grounded through the capacitor C1 in the other way, the VI1 terminal (pin 2) of the digital isolation chip U1 is electrically connected to the RO terminal of the 485 chip U1 through the resistor RD6 and the VO2 terminal (pin 3) of the digital isolation chip U1 is electrically connected to the base of the transistor QC2 through the resistor RD8, the collector of the transistor QC2 is electrically connected to the DE terminal (pin 3, connected to pin 2 at the same time) of the 485 chip UC1, the A terminal (pin 6) of the 485 chip UC1 is connected to the first communication terminal (A) and the B terminal (pin 7) of the 485 chip UC1 is connected to the second communication terminal (B).
[0008] As a further preferred technical solution of the above technical solution, the GNDB terminal of the digital isolation chip U1 is grounded, and the GNDA terminal of the digital isolation chip U1 is grounded.
[0009] As a further preferred technical solution of the above technical solution, the emitter of the transistor QC2 is connected to the power supply terminal 5V, the collector of the transistor QC2 is grounded through the resistor RD7 and the DI terminal of the 485 chip is grounded.
[0010] As a further preferred technical solution of the above technical solution, the A terminal of the 485 chip UC1 is grounded through the resistor RC1 and the capacitor CC1 in sequence, and the common terminal of the resistor RC1 and the capacitor CC1 is connected to the power supply terminal 5V.
[0011] As a further preferred technical solution of the above technical solution, the B end of the 485 chip UC1 is grounded through a resistor RC2, and a diode DC1 is connected between the A end and the B end of the 485 chip UC1. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] Figure 1 This is the connection diagram between the existing 485 circuit and the MCU circuit.
[0013] Figure 2 The utility model is a schematic diagram of a two-wire high-speed 485 communication circuit for an electric energy meter.
[0014] Figure 3 The utility model discloses a circuit diagram of a two-wire high-speed 485 communication circuit for an electric energy meter. DETAILED DESCRIPTION
[0015] The following description is used to disclose the utility model so that those skilled in the art can implement the utility model. The preferred embodiments described below are only examples, and those skilled in the art can think of other obvious variations. The basic principles of the utility model defined in the following description can be applied to other embodiments, variations, improvements, equivalents, and other technical solutions that do not deviate from the spirit and scope of the utility model.
[0016] The utility model discloses a two-wire high-speed 485 communication circuit for an electric energy meter. The specific embodiment of the utility model is further described below in conjunction with a preferred embodiment.
[0017] In the embodiments of the present invention, those skilled in the art note that grounding and the like involved in the present invention may be regarded as prior art.
[0018] Preferred embodiments.
[0019] like Figure 2-3 As shown, the utility model discloses a two-wire high-speed 485 communication circuit for an electric energy meter, comprising an MCU circuit, a level matching circuit and a 485 circuit, wherein the level matching circuit is connected between the MCU circuit and the 485 circuit, wherein:
[0020] The level matching circuit includes a digital isolation chip U1, the 485 circuit includes a 485 chip UC1, the VDDB terminal (8 pins) of the digital isolation chip U1 is connected to the power supply terminal 3.3V in one way and grounded through a capacitor C2 in another way, and the VO1 terminal (7 pins) and the VI2 terminal (6 pins) of the digital isolation chip U1 are electrically connected to the MCU circuit respectively;
[0021] The VDDA terminal (pin 1) of the digital isolation chip U1 is connected to the power supply terminal 5V in one way and is grounded through the capacitor C1 in the other way, the VI1 terminal (pin 2) of the digital isolation chip U1 is electrically connected to the RO terminal of the 485 chip U1 through the resistor RD6 and the VO2 terminal (pin 3) of the digital isolation chip U1 is electrically connected to the base of the transistor QC2 through the resistor RD8, the collector of the transistor QC2 is electrically connected to the DE terminal (pin 3, connected to pin 2 at the same time) of the 485 chip UC1, the A terminal (pin 6) of the 485 chip UC1 is connected to the first communication terminal (A) and the B terminal (pin 7) of the 485 chip UC1 is connected to the second communication terminal (B).
[0022] Specifically, the GNDB terminal of the digital isolation chip U1 is grounded, and the GNDA terminal of the digital isolation chip U1 is grounded.
[0023] More specifically, the emitter of the transistor QC2 is connected to the power supply terminal 5V, the collector of the transistor QC2 is grounded through the resistor RD7 and the DI terminal of the 485 chip is grounded.
[0024] Furthermore, the A terminal of the 485 chip UC1 is grounded through the resistor RC1 and the capacitor CC1 in sequence, and the common terminal of the resistor RC1 and the capacitor CC1 is connected to the power supply terminal 5V.
[0025] Furthermore, the A terminal of the 485 chip UC1 is grounded through the resistor RC1 and the capacitor CC1 in sequence, and the common terminal of the resistor RC1 and the capacitor CC1 is connected to the power supply terminal 5V.
[0026] For this utility model:
[0027] The power supply voltage of the isolation chip side A is 5V, and the logic input and logic output of side A are connected to the RO port of the 485 chip and the TX0 port of the control enable pin. The power supply voltage of the isolation chip side B is 3.3V, and the logic input and logic output of side B are connected to the TX and RX ports of the MCU.
[0028] For data sending and receiving:
[0029] By default, when there is no data, the TX port is 3.3V high level. After passing through the isolation chip, it will output 5V high level, making the transistor cut off, the 485 chip RE low level enabled, and RO receiving data enabled. At this time, the data received from the AB port of the 485 chip will be transmitted to the isolation chip through the RO channel with a 5V signal, and the isolation chip will then transmit it to the MCU with a 3.3V signal to complete the data receiving process.
[0030] When sending data, the TX port will have a pull-down level, indicating that the data is being sent. At this time, the low level of the TX port is still a low level output after passing through the isolation chip, the transistor is turned on, and the 485 chip DE is enabled at a high level. When the data sent is '0', since the DI port is connected to the ground, the data '0' will be transmitted to the AB port at this time. AB<0, '0' is transmitted, and the low-level transmission is completed. When sending data '1', the transistor is cut off at this time, and RO is enabled in principle. Since it is still in the data sending state at this time, the 485 chip is in a high-impedance state in this state. The state at this time is determined by the A pull-up and B pull-down resistors. At this time, AB>0, '1' is transmitted, and the high-level transmission is completed.
[0031] For electrical isolation:
[0032] Since the input and output levels on both sides of the high-speed single-channel digital isolator AB are only related to the power supply voltage on their respective sides, it plays a role in electrical isolation and ensures the safety and reliability of the circuit.
[0033] Advantages of the utility model:
[0034] In practical applications, this circuit solves the problem of level mismatch between the 3.3V system MCU and the 5V system 485 chip. In actual use, the serial port baud rate can reach 115200. Because an isolation chip is used, the signals on both sides of AB are also isolated to prevent damage to the MCU when a problem occurs on the 485 chip end.
[0035] It is worth mentioning that the technical features such as grounding involved in this utility model patent application should be regarded as prior art. The specific structure, working principle and possible control method and spatial layout method of these technical features can be selected by conventional methods in the field, and should not be regarded as the invention point of this utility model patent. This utility model patent will not be further elaborated.
[0036] For those skilled in the art, it is still possible to modify the technical solutions described in the aforementioned embodiments, or to make equivalent substitutions for some of the technical features therein. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present utility model should be included in the protection scope of the present utility model.
Claims
1. A two-wire high-speed 485 communication circuit for an electric energy meter, characterized in that: It includes an MCU circuit, a level matching circuit and a 485 circuit, wherein the level matching circuit is connected between the MCU circuit and the 485 circuit, wherein: The level matching circuit includes a digital isolation chip U1, the 485 circuit includes a 485 chip UC1, the VDDB end of the digital isolation chip U1 is connected to the power supply end 3.3V in one way and is grounded through a capacitor C2 in the other way, and the VO1 end and the VI2 end of the digital isolation chip U1 are electrically connected to the MCU circuit respectively; The VDDA end of the digital isolation chip U1 is connected to the power supply end 5V in one way and is grounded through a capacitor C1 in the other way, the VI1 end of the digital isolation chip U1 is electrically connected to the RO end of the 485 chip U1 through a resistor RD6 and the VO2 end of the digital isolation chip U1 is electrically connected to the base of the transistor QC2 through a resistor RD8, the collector of the transistor QC2 is electrically connected to the DE end of the 485 chip UC1, the A end of the 485 chip UC1 is connected to the first communication end and the B end of the 485 chip UC1 is connected to the second communication end.
2. The two-wire high-speed 485 communication circuit for an electric energy meter according to claim 1, characterized in that: The GNDB terminal of the digital isolation chip U1 is grounded, and the GNDA terminal of the digital isolation chip U1 is grounded.
3. The two-wire high-speed 485 communication circuit for an electric energy meter according to claim 2, characterized in that: The emitter of the transistor QC2 is connected to the power supply terminal 5V, the collector of the transistor QC2 is grounded through the resistor RD7 and the DI terminal of the 485 chip is grounded.
4. The two-wire high-speed 485 communication circuit for an electric energy meter according to claim 3 is characterized in that: The A terminal of the 485 chip UC1 is grounded through the resistor RC1 and the capacitor CC1 in sequence, and the common terminal of the resistor RC1 and the capacitor CC1 is connected to the power supply terminal 5V.
5. The two-wire high-speed 485 communication circuit for an electric energy meter according to claim 4, characterized in that: The B terminal of the 485 chip UC1 is grounded through a resistor RC2, and a diode DC1 is connected between the A terminal and the B terminal of the 485 chip UC1.
