Signal plate arrangement structure of control chip

By designing the H-shaped layout and shielding layer structure on the control chip, the problem of poor shielding capabilities of traditional signal layout structures is solved, the stability of signal transmission and chip performance are improved, and the production difficulty is reduced.

CN222263111UActive Publication Date: 2024-12-27SHENZHEN BAQUATONG TECH CO LTD
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Patent Information

Application Number
CN202420667363.X
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-04-01
Publication Date
2024-12-27
Estimated Expiration
2034-04-01

AI Technical Summary

Technical Problem

The signal layout structure of traditional control chips is messy and has poor ability to shield external electromagnetic interference, resulting in unstable signal transmission and affecting the stability of chip operation.

Method used

A signal layout structure is designed, in which the signal processing module is located in the middle of the control chip motherboard, the signal input and output modules are respectively arranged on both sides to form an approximately H-shaped layout, and a first shielding plate is arranged on the uppermost layer and a second on both sides is arranged on both sides. The shielding plate forms an H-shaped shielding layer layout, and separates the signal lines through a Z-shaped bent signal line and a shielding baffle, and adds an insulating protective layer to reduce electromagnetic interference.

Benefits of technology

Effectively reduce the impact of external electromagnetic interference on signal transmission, improve the working performance and reliability of the control chip, ensure the stability of signal transmission, and simplify the production and processing process.

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Abstract

The utility model relates to a signal layout structure of a control chip, which comprises a control chip main board, a signal processing module is arranged in the middle of the surface of the control chip main board, a signal input module is arranged on the surface of the control chip main board on one side of the signal processing module, and a signal output module is arranged on the other side of the signal processing module. And an input signal wiring module is arranged between the signal processing module and the signal input module on the surface of the control chip mainboard. The signal processing module, the signal input module, the signal output module, the input signal wiring module and the output signal wiring module are arranged in an approximate H shape, the first shielding plate is arranged on the uppermost layer of the control chip mainboard, the second shielding plates are arranged on the two sides of the first shielding plate, and the H-shaped shielding layer layout is formed. The control chip can cover the signal processing module, the signal input module and the signal output module in a matched mode, the influence of external electromagnetic interference on signal transmission is effectively reduced, and the stability of signal transmission of the control chip is guaranteed.
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Description

Technical Field

[0001] The utility model relates to the technical field of control chips, in particular to a signal layout structure of a control chip. Background Art

[0002] A control chip is an integrated circuit chip used to control and manage the operation and functions of a computer system, electronic device or other system. The control chip is mainly composed of a microprocessor, memory, input / output interface and other auxiliary circuits.

[0003] With the development of science and technology, electronic devices are increasingly widely used in various fields. In electronic devices, the control chip is one of the core components, and its performance directly affects the performance of the entire device. The signal layout structure is an important part of the control chip, and its design is of great significance to improving the performance of the control chip. However, the traditional control chip signal layout structure is messy and has poor ability to shield external electromagnetic interference, resulting in unstable signal transmission and affecting the stability of the control chip. Utility Model Content

[0004] The utility model aims to provide a signal layout structure of a control chip with strong anti-electromagnetic interference capability, which effectively solves the problems raised in the above-mentioned background technology.

[0005] In order to achieve the above-mentioned purpose, the utility model provides the following technical solutions.

[0006] A signal layout structure of a control chip comprises a control chip mainboard, a signal processing module is arranged in the middle of the surface of the control chip mainboard, a signal input module is arranged on one side of the signal processing module, and a signal output module is arranged on the other side of the surface of the control chip mainboard; an input signal wiring module is arranged on the surface of the control chip mainboard between the signal processing module and the signal input module, and an output signal wiring module is arranged on the surface of the control chip mainboard between the signal processing module and the signal output module; a first shielding plate is arranged at the top layer of the control chip mainboard corresponding to the position of the signal processing module, and second shielding plates are arranged on both sides of the first shielding plate, one of the second shielding plates corresponds to the position of the input signal wiring module, and the other second shielding plate corresponds to the position of the output signal wiring module; the first shielding plate and the two second shielding plates are arranged in an H shape, and completely cover the input signal wiring module, the signal processing module and the output signal wiring module.

[0007] It can be seen that the signal processing module is arranged in the middle of the control chip mainboard, the signal input module and the signal output module are respectively arranged on both sides of the signal processing module, and the input signal wiring module is arranged between the signal processing module and the signal input module, and the output signal wiring module is arranged between the signal processing module and the signal output module, forming an approximately H-shaped structural layout. By arranging a first shielding plate on the top layer of the control chip mainboard and arranging a second shielding plate on both sides of the first shielding plate, an H-shaped shielding layer layout is formed, which can be matched to cover the signal processing module, the signal input module and the signal output module, and can effectively reduce the influence of external electromagnetic interference on signal transmission, ensure the stability of the control chip signal transmission, and improve the working performance and reliability of the control chip. The overall structural layout is orderly and the degree of symmetrical distribution is high, which reduces the difficulty of production and preparation and makes production and processing more convenient.

[0008] Furthermore, the signal input module includes a plurality of signal input ports, which are arranged at intervals at the side edge of the control chip mainboard along the width direction of the control chip mainboard, and each signal input port corresponds to an external signal source; the signal output module includes a plurality of signal output ports, which are arranged at intervals at the side edge of the control chip mainboard along the width direction of the control chip mainboard, and each signal output port corresponds to an external device.

[0009] The signal input port is arranged on one side of the control chip mainboard, and the signal output port is arranged on one side of the shielding baffle, which is convenient for connection with external signal sources and external devices. In addition, multiple signal output ports and signal input ports are provided, which can be applicable to multiple external signal sources to control multiple external devices, and has high practicality.

[0010] Furthermore, the input signal wiring module includes a plurality of input signal lines, each of which is bent in a Z-shape, one end of each of the input signal lines is electrically connected to the signal input port, and the other end is electrically connected to the input part of the signal processing module; the output signal wiring module includes a plurality of output signal lines, each of which is bent in a Z-shape, one end of each of the output signal lines is electrically connected to the signal output port, and the other end is electrically connected to the output part of the signal processing module.

[0011] The Z-shaped input signal lines and output signal lines greatly reduce the distribution range and are arranged in an orderly manner, which is convenient for production and preparation.

[0012] Furthermore, a shielding baffle is provided between two adjacent input signal lines and between two adjacent output signal lines; the bottom of the shielding baffle is fixed to the surface of the control chip mainboard, and the top of the shielding baffle is fixed to the bottom surface of the first shielding plate.

[0013] By setting a shielding baffle between the control chip mainboard and the first shielding plate, two adjacent input signal lines or two adjacent output signal lines can be separated, avoiding electromagnetic coupling between two adjacent input signal lines or two adjacent output signal lines to cause signal interference, and further improving the stability of signal transmission.

[0014] Furthermore, both the input signal line and the output signal line adopt a multi-layer wiring structure.

[0015] The input signal line and the output signal line adopt a multi-layer wiring structure, which has high space utilization efficiency, strong signal isolation capability, and improved signal transmission performance.

[0016] Furthermore, a first insulating protective layer is provided between the first shielding plate and the signal processing module, and a second insulating protective layer is provided between the input signal line and the output signal line and the second shielding plate.

[0017] By providing the second insulating protection layer and the second insulating protection layer, an insulating protection effect can be provided to the signal processing module, the input signal line and the output signal line, thereby further improving the stability of the control chip during operation.

[0018] Compared with the prior art, the beneficial effects of the present invention are as follows.

[0019] 1. The signal processing module, signal input module, signal output module, input signal wiring module and output signal wiring module in the utility model are approximately H-shaped in layout, a first shielding plate is arranged on the top layer of the control chip mainboard, and second shielding plates are arranged on both sides of the first shielding plate to form an H-shaped shielding layer layout, which can match and cover the signal processing module, signal input module and signal output module, effectively reduce the influence of external electromagnetic interference on signal transmission, ensure the stability of signal transmission of the control chip, and improve the working performance and reliability of the control chip.

[0020] 2. The utility model can separate two adjacent input signal lines or two adjacent output signal lines by setting a shielding baffle between the control chip mainboard and the first shielding plate, thereby avoiding electromagnetic coupling between the two adjacent input signal lines or two adjacent output signal lines and causing signal interference, and further improving the stability of signal transmission.

[0021] 3. The overall structural layout of the utility model is orderly and symmetrically distributed, which reduces the difficulty of production and preparation and makes production and processing more convenient. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 This is a schematic diagram of the signal layout structure of the control chip of the utility model;

[0023] Figure 2This is a schematic diagram of the local structure of the signal layout of the control chip of the utility model;

[0024] Figure 3 It is a side view schematic diagram of the signal layout structure of the control chip of the utility model;

[0025] Figure 4 It is a schematic diagram of the structural layout of the first shielding plate and the second shielding plate in the present invention.

[0026] In the figure: 01, control chip main board; 02, shielding baffle; 1, signal processing module; 2, signal input module; 21, signal input port; 3, signal output module; 31, signal output port; 4, input signal wiring module; 41, input signal line; 5, output signal wiring module; 51, output signal line; 6, first shielding plate; 61, second shielding plate; 62, first insulating protective layer; 63, second insulating protective layer. DETAILED DESCRIPTION

[0027] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0028] See also Figure 1-Figure 4 The utility model provides a signal layout structure of a control chip, including a control chip mainboard 01, a signal processing module 1 is arranged in the middle of the surface of the control chip mainboard 01, a signal input module 2 is arranged on one side of the signal processing module 1 on the surface of the control chip mainboard 01, and a signal output module 3 is arranged on the other side; an input signal wiring module 4 is arranged on the surface of the control chip mainboard 01 between the signal processing module 1 and the signal input module 2, and an output signal wiring module 5 is arranged on the surface of the control chip mainboard 01 between the signal processing module 1 and the signal output module 3; a first shielding plate 6 is arranged at the top layer of the control chip mainboard 01 corresponding to the position of the signal processing module 1, and second shielding plates 61 are arranged on both sides of the first shielding plate 6, wherein one second shielding plate 61 corresponds to the position of the input signal wiring module 4, and the other second shielding plate 61 corresponds to the position of the output signal wiring module 5; the first shielding plate 6 and the two second shielding plates 61 are arranged in an H shape, and completely cover the input signal wiring module 4, the signal processing module 1 and the output signal wiring module 5.

[0029] The signal layout structure of the control chip sets the signal processing module 1 in the middle of the control chip mainboard 01, sets the signal input module 2 and the signal output module 3 on both sides of the signal processing module 1, sets the input signal wiring module 4 between the signal processing module 1 and the signal input module 2, and sets the output signal wiring module 5 between the signal processing module 1 and the signal output module 3, forming an approximately H-shaped structural layout. By setting the first shielding plate 6 on the top layer of the control chip mainboard 01, and setting the second shielding plate 61 on both sides of the first shielding plate 6, an H-shaped shielding layer layout is formed, which can be matched to cover the signal processing module 1, the signal input module 2 and the signal output module 3, and can effectively reduce the impact of external electromagnetic interference on signal transmission, ensure the stability of the control chip signal transmission, and improve the working performance and reliability of the control chip. In addition, the overall structural layout is orderly and symmetrically distributed, which reduces the difficulty of production and preparation, making production and processing more convenient.

[0030] Specifically, the signal input module 2 includes a plurality of signal input ports 21, which are arranged at intervals along the width direction of the control chip mainboard 01 at the side edge of the control chip mainboard 01, and each signal input port 21 corresponds to an external signal source; the signal output module 3 includes a plurality of signal output ports 31, which are arranged at intervals along the width direction of the control chip mainboard 01 at the side edge of the control chip mainboard 01, and each signal output port 31 corresponds to an external device. The signal input port 21 is arranged on one side of the control chip mainboard 01, and the signal output port 31 is arranged on one side of the shielding baffle 02, which is convenient for connecting with an external signal source and an external device, and a plurality of signal output ports 31 and signal input ports 21 are provided, which can be applied to multiple external signal sources to control multiple external devices, and has high practicality.

[0031] Specifically, the input signal wiring module 4 includes a plurality of input signal lines 41, each of which is bent in a Z-shape, one end of each of which is electrically connected to the signal input port 21, and the other end of each of which is electrically connected to the input portion of the signal processing module 1; the output signal wiring module 5 includes a plurality of output signal lines 51, each of which is bent in a Z-shape, one end of each of which is electrically connected to the signal output port 31, and the other end of each of which is electrically connected to the output portion of the signal processing module 1. The input signal lines 41 and the output signal lines 51 that are bent in a Z-shape greatly reduce the distribution range, and are arranged and distributed in an orderly manner, which is convenient for production and preparation.

[0032] Specifically, a shielding baffle 02 is provided between two adjacent input signal lines 41 and between two adjacent output signal lines 51; the bottom of the shielding baffle 02 is fixed to the surface of the control chip mainboard 01, and the top of the shielding baffle 02 is fixed to the bottom surface of the first shielding plate 6. By providing the shielding baffle 02 between the control chip mainboard 01 and the first shielding plate 6, two adjacent input signal lines 41 or two adjacent output signal lines 51 can be separated, and the electromagnetic coupling phenomenon between the two adjacent input signal lines 41 or the two adjacent output signal lines 51 is avoided to cause signal mutual interference, and the stability of signal transmission is further improved.

[0033] Specifically, the input signal line 41 and the output signal line 51 both adopt a multi-layer wiring structure, which has high space utilization efficiency, strong signal isolation capability, and improved signal transmission performance.

[0034] Specifically, a first insulating protective layer 62 is provided between the first shielding plate 6 and the signal processing module 1, and a second insulating protective layer 63 is provided between the input signal line 41 and the output signal line 51 and the second shielding plate 61. The second insulating protective layer 63 and the second insulating protective layer 63 can provide an insulating protection effect for the signal processing module 1, the input signal line 41 and the output signal line 51, thereby further improving the stability of the control chip during operation.

[0035] It is worth noting that the shielding baffle 02, the second shielding plate 61 and the first insulating protection layer 62 in the present application are made of metal materials, such as aluminum or copper, to ensure an effective shielding effect.

[0036] In addition, the present application also includes other electronic components, such as memory, timers and counters, interrupt controllers, power managers, clock generators, and control logic and state machines, which are all prior art. Therefore, the present application no longer discloses in detail the specific structure, installation method, circuit connection method and working principle of the above-mentioned electronic components.

[0037] The above is a detailed description of the utility model in combination with specific embodiments, and it cannot be determined that the specific implementation methods of the present invention are limited to these descriptions. For ordinary technicians in the technical field to which the utility model belongs, making several equivalent substitutions or obvious modifications without departing from the concept of the present invention, and having the same performance or use, should be regarded as belonging to the patent protection scope of the utility model determined by the submitted claims.

Claims

1. A signal layout structure of a control chip, comprising a control chip mainboard (01), wherein a signal processing module (1) is provided in the middle of the surface of the control chip mainboard (01), characterized in that: The surface of the control chip mainboard (01) is provided with a signal input module (2) on one side of the signal processing module (1), and a signal output module (3) on the other side; An input signal wiring module (4) is provided on the surface of the control chip mainboard (01) between the signal processing module (1) and the signal input module (2), and an output signal wiring module (5) is provided on the surface of the control chip mainboard (01) between the signal processing module (1) and the signal output module (3); A first shielding plate (6) is provided at the top layer of the control chip mainboard (01) at a position corresponding to the signal processing module (1), and second shielding plates (61) are provided on both sides of the first shielding plate (6), wherein one of the second shielding plates (61) corresponds to the position of the input signal wiring module (4), and the other of the second shielding plates (61) corresponds to the position of the output signal wiring module (5); The first shielding plate (6) and the two second shielding plates (61) are arranged in an H shape and completely cover the input signal wiring module (4), the signal processing module (1) and the output signal wiring module (5).

2. The signal layout structure of a control chip according to claim 1, characterized in that: The signal input module (2) comprises a plurality of signal input ports (21), the plurality of signal input ports (21) being arranged at intervals along the width direction of the control chip mainboard (01) at the side edge of the control chip mainboard (01), and each of the signal input ports (21) corresponds to an external signal source; The signal output module (3) comprises a plurality of signal output ports (31), the plurality of signal output ports (31) being arranged at intervals along the width direction of the control chip mainboard (01) at the side edge of the control chip mainboard (01), and each of the signal output ports (31) corresponds to an external device.

3. The signal layout structure of a control chip according to claim 2, characterized in that: The input signal wiring module (4) comprises a plurality of input signal lines (41), each of the input signal lines (41) being bent in a Z-shape, one end of each of the input signal lines (41) being electrically connected to the signal input port (21), and the other end of each of the input signal lines (41) being electrically connected to the input portion of the signal processing module (1); The output signal wiring module (5) comprises a plurality of output signal lines (51), each of the output signal lines (51) being bent in a Z-shape, one end of each of the output signal lines (51) being electrically connected to the signal output port (31), and the other end of each of the output signal lines (51) being electrically connected to the output portion of the signal processing module (1).

4. The signal layout structure of a control chip according to claim 3, characterized in that: A shielding baffle (02) is provided between two adjacent input signal lines (41) and between two adjacent output signal lines (51); The bottom of the shielding baffle (02) is fixed to the surface of the control chip mainboard (01), and the top of the shielding baffle (02) is fixed to the bottom surface of the first shielding plate (6).

5. The signal layout structure of a control chip according to claim 3, characterized in that: The input signal line (41) and the output signal line (51) both adopt a multi-layer wiring structure.

6. The signal layout structure of a control chip according to claim 3, characterized in that: A first insulating protective layer (62) is provided between the first shielding plate (6) and the signal processing module (1), and a second insulating protective layer (63) is provided between the input signal line (41) and the output signal line (51) and the second shielding plate (61).