Battery offline detection circuit and battery pack management system
By designing a simplified battery offline detection circuit, using signal amplification module, comparison module and logic processing module, the complexity of the battery offline detection circuit is solved, safe and reliable charging and discharging monitoring of the battery is realized, and the system cost is reduced.
Patent Information
- Application Number
- CN202323426851.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-15
- Publication Date
- 2024-12-31
- Estimated Expiration
- 2033-12-15
AI Technical Summary
The existing offline battery detection circuit has problems such as complex circuits and complex control logic, which leads to increased detection difficulty and increased cost.
A battery offline detection circuit including a signal amplification module, a comparison module and a logic processing module was designed. By amplifying the positive and negative battery offline signals and comparing them with the reference voltage, the offline state results are output, which simplifies the detection logic and reduces the cost. .
Reliable detection of the battery offline status is realized, safe monitoring during the battery charging and discharging process is simplified, and the complexity and cost of the battery management system is reduced.
Smart Images
Figure CN222280807U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of battery monitoring, in particular to a battery offline detection circuit and a battery pack management system. Background Art
[0002] With the continuous development of the new energy industry and the strong support of national policies, battery production is increasing day by day. In the fields of battery composition, battery pack application, and automotive battery string, consumers pay special attention to battery capacity, price and other indicators. Battery safety is also an important reference point for their selection.
[0003] When the battery is charging and discharging, if the positive and negative lines of the battery are not connected normally, that is, the battery is offline, the charging and discharging status of the battery cannot be detected, which may cause overcharging or over-discharging of the battery. More seriously, safety accidents such as battery bulging or even battery fire may occur.
[0004] In the prior art, the battery offline detection circuit uses a capacitor and a high-position battery. The high-position battery has a high common-mode voltage to the ground, and a high common-mode voltage operational amplifier is also required. The prior art has the problems of complex circuits and complex control logic. Utility Model Content
[0005] The technical problem to be solved by the utility model is that the existing battery offline detection circuit has the problems of complex circuit and complex control logic.
[0006] In order to solve the above problems, the utility model provides a battery offline detection circuit, including: a signal amplification module, used to amplify the positive and negative offline signals of the detected battery and output two detection signals, the signal amplification module is electrically connected to the detected battery; a comparison module, used to compare the detection signal with a reference voltage and output two comparison results, the comparison module is electrically connected to the signal amplification module; a logic processing module, used to process the two comparison results and output the detection result of the offline state of the detected battery, the logic processing module is electrically connected to the comparison module.
[0007] Furthermore, the signal amplification module includes a first submodule and a second submodule, the first submodule is electrically connected to the positive electrode of the detected battery, and the second submodule is connected to the negative electrode of the detected battery.
[0008] Furthermore, the first submodule includes a first transistor, a first resistor, a second resistor and a third resistor, wherein the emitter of the first transistor is electrically connected to the power supply through the third resistor, the base of the first transistor is electrically connected to the positive electrode of the detected battery through the second resistor, the base of the first transistor is electrically connected to the first resistor through the second resistor and grounded, and the collector of the first transistor is grounded; the second submodule includes a second transistor, a fourth resistor, a fifth resistor and a sixth resistor, wherein the emitter of the second transistor is electrically connected to the power supply through the sixth resistor, the base of the second transistor is electrically connected to the negative electrode of the detected battery through the fifth resistor, the base of the second transistor is electrically connected to the fourth resistor through the fifth resistor and grounded, and the collector of the second transistor is grounded.
[0009] Furthermore, the comparison module includes a first comparator, a second comparator and a reference voltage input submodule, the non-inverting input terminal of the first comparator is electrically connected to the emitter of the first transistor, the non-inverting input terminal of the second comparator is electrically connected to the emitter of the second transistor, and the inverting input terminals of the first comparator and the second comparator are both connected to the reference voltage input submodule.
[0010] Furthermore, the logic processing module is a logic OR gate circuit, the logic OR gate circuit includes a first OR gate circuit and a second OR gate circuit, and the battery offline detection circuit also includes a seventh resistor and an eighth resistor; wherein the input end of the first OR gate circuit is electrically connected to the first comparator and connected to a power supply through the seventh resistor; the input end of the second OR gate circuit is electrically connected to the second comparator and connected to a power supply through the eighth resistor; the output ends of the first OR gate circuit and the second OR gate circuit are connected through a sampling line.
[0011] On the other hand, the utility model also provides a battery pack management system, which includes the above-mentioned battery offline detection circuit and battery, and the battery offline detection circuit is used to detect the connection status of the positive line and the negative line of the battery during the charging and discharging process.
[0012] Compared with the prior art, the battery offline detection circuit of the embodiment of the utility model has the following beneficial effects: the battery offline signal can be detected by a simple battery offline detection circuit, and then the online state of the battery can be monitored, so that the battery can be reliably and safely charged and discharged. The detection logic of the battery offline detection circuit of the embodiment of the utility model is simple and the cost is low. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] Figure 1 It is a module schematic diagram of the battery offline circuit of the utility model;
[0014] Figure 2 It is a circuit diagram of a battery offline circuit of the utility model.
[0015] Among them, 100 is a signal amplification module, 200 is a comparison module, and 300 is a logic processing module.
[0016] Description of main component symbols:
[0017] A first transistor Q1, a second transistor Q2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a first comparator U1, a second comparator U2, a reference voltage Vref, a first OR gate circuit D1, a second OR gate circuit D2, a detected battery BAT, and a power supply VCC. DETAILED DESCRIPTION
[0018] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and cannot be understood as limiting the present application.
[0019] In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.
[0020] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the electrical connection mentioned below is referred to as connection. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.
[0021] In the present application, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.
[0022] The disclosure below provides many different embodiments or examples to realize the different structures of the present application. In order to simplify the disclosure of the present application, the parts and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present application. In addition, the present application can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplification and clarity, which itself does not indicate the relationship between the various embodiments and / or settings discussed. In addition, the various specific processes and material examples provided by the present application, but those of ordinary skill in the art can appreciate the application of other processes and / or the use of other materials.
[0023] like Figure 1 As shown, an embodiment of the present application provides a battery offline detection circuit. The battery offline detection circuit includes: a signal amplification module 100, a comparison module 200 and a logic processing module 300; wherein the signal amplification module 100 is used to amplify the positive and negative offline signals of the detected battery BAT and output two detection signals, and the signal amplification module 100 is electrically connected to the detected battery BAT; the comparison module 200 is used to compare the detection signal with the reference voltage Vref and output two comparison results, and the comparison module 200 is electrically connected to the signal amplification module 100; the logic processing module 300 is used to process the two comparison results and output the detection result of the offline state of the detected battery, and the logic processing module 300 is electrically connected to the comparison module 200.
[0024] In the prior art, there are two technical solutions for determining whether a battery is offline: determining whether a battery is offline by sampling the voltage across the charging and discharging capacitors, which consumes battery power and requires a collection module with high common mode capability; connecting a switch device in series on the battery sampling line, which consumes battery power and requires a comparison module with high common mode capability when detecting high-level batteries, which increases the cost. The above two solutions also have the problem of complex circuits and complex control logic.
[0025] In the battery offline detection circuit of the embodiment of the present application, the two ends of the detected battery BAT are electrically connected by two signal amplification modules 100, the other ends of the two signal amplification modules 100 are electrically connected to two comparison modules 200 respectively, the other ends of the two comparison modules 200 are electrically connected to two logic processing modules 300 respectively, and the two logic processing modules 300 jointly output the detection result.
[0026] Specifically, the two signal amplification modules 100 are electrically connected to the positive electrode and the negative electrode of the detected battery BAT, respectively. The positive and negative electrode offline signals of the detected battery BAT are amplified by the signal amplification modules 100, and each outputs a detection signal of the positive electrode and a detection signal of the negative electrode of the detected battery BAT; the detection signal of the positive electrode and the detection signal of the negative electrode of the detected battery BAT are respectively input into two comparison modules 200, and are compared with the reference voltage Vref of the other input end in the comparison module 200, so as to output two comparison results; the two comparison results are respectively input into the logic processing module 300 for processing, and then the logic processing module 300 outputs the detection results of the positive line and the negative line of the detected battery BAT.
[0027] It is easy to understand that the detection result is used to determine whether the positive and negative lines of the detected battery BAT are offline, that is, whether they are disconnected, so as to facilitate timely processing when the positive and negative lines of the detected battery BAT are offline, avoiding overcharging or over-discharging that affects battery safety.
[0028] The detected battery BAT may be a single cell or any single cell in a battery string, and the equipment using the battery may be a battery formation equipment, a battery pack management system, and the like.
[0029] See also Figure 2 In some embodiments, the signal amplification module 100 includes a first submodule and a second submodule, the first submodule 100 is electrically connected to the positive electrode of the detected battery BAT, and the second submodule 100 is electrically connected to the negative electrode of the detected battery BAT.
[0030] Specifically, the signal amplification module 100 is electrically connected to the positive and negative electrodes of the detected battery BAT, respectively. The first submodule of the signal amplification module 100 is electrically connected to the positive electrode of the detected battery BAT, first amplifies the offline signal of the positive electrode of the detected battery BAT, and then outputs the offline signal of the positive electrode of the detected battery BAT. The second submodule of the signal amplification module 100 is electrically connected to the negative electrode of the detected battery BAT, first amplifies the offline signal of the negative electrode of the detected battery BAT, and then outputs the offline signals of the positive and negative electrodes of the detected battery BAT.
[0031] See also Figure 2In some embodiments, the first submodule 100 includes a first transistor Q1, a first resistor R1, a second resistor R2 and a third resistor R3, wherein the emitter of the first transistor Q1 is electrically connected to a power source VCC through the third resistor R3, the base of the first transistor Q1 is electrically connected to the positive electrode of the detected battery BAT through the second resistor R2, the base of the first transistor Q1 is electrically connected to the first resistor R1 through the second resistor R2 and is grounded, and the collector of the first transistor Q1 is grounded.
[0032] Specifically, the first transistor Q1 may be a PNP transistor, and the model of the first transistor Q1 may be 9012 or 8550.
[0033] In this embodiment, the amplification factor of the first transistor Q1 is k, and the product of the resistance of the third resistor R3 and the amplification factor k of the first transistor is much larger than the resistance of the second resistor R2, that is, R3*k>>R2; the voltage across the first resistor R1 is V 11 , the voltage across the second resistor R2 is V 22 , the voltage across the third resistor R3 is V 33 , the emitter-base voltage of the first transistor Q1 is reduced to V Q1-eb ; V1 represents the voltage of the positive electrode of the detected battery BAT after amplification of the detection signal.
[0034] The power supply VCC is connected to the emitter of the first transistor Q1 through the third resistor R3. The third resistor R3 constitutes the emitter DC current loop of the first transistor Q1. The DC current flowing out from the DC power supply VCC passes through the third resistor R3 and flows into the first transistor Q1 via the emitter of the first transistor Q1. There is only one resistor, the third resistor R3, in the emission loop of the first transistor Q1. The third resistor R3 only has a feedback effect on the DC signal, so the third resistor R3 is called the emitter negative feedback resistor. The DC negative feedback effect of the third resistor R3 can stabilize the DC working electrical signal and provide a stable DC bias voltage for the amplifier circuit. At the same time, this is also the premise for ensuring the normal operation of the AC circuit.
[0035] The base of the first transistor Q1 is connected to the positive electrode of the detected battery BAT through the second resistor R2, one end of the second resistor R2 is connected to the base of the first transistor Q1, and the other end of the second resistor R2 is respectively connected to the positive electrode of the detected battery BAT and the first resistor R1. The second resistor R2 is a current limiting resistor, because the base to emitter of the transistor is a diode, in order to prevent the base to emitter of the first transistor Q1 from being turned on, the second resistor R2 is set to limit the base current from the base to the emitter.
[0036] Depend on Figure 2It can be seen that the first end of the first resistor R1 is connected to the detected battery BAT and the second resistor R2, and the second end of the first resistor R1 is grounded, that is, the first resistor R1 is a pull-down resistor. The resistance of the first resistor R1 can be megohm-level. When the positive line of the detected battery BAT is normally connected, the current of the positive electrode of the detected battery BAT flows through the first resistor R1 and then returns to the ground. The first resistor R1 can pull down the level to avoid voltage suspension and cause circuit instability.
[0037] When the positive line of the detected battery BAT is connected normally, the current of the positive electrode of the detected battery BAT flows to the first resistor. At this time, the voltage at the intersection of the path of the first resistor R1 and the detected battery BAT and the path of the second resistor R2 and the detected battery BAT is the positive electrode voltage of the detected battery BAT, where the voltage is V bat+ At this time, the current of the power supply VCC first passes through the third resistor R3, then through the emitter and base of the first transistor Q1, and after amplification, flows through the second resistor R2, and finally flows through the first resistor R1 and returns to the ground. At this time, the voltage of this circuit can be expressed by the expression: VCC-V 33 -V Q1-eb -V 22 =V bat+ .
[0038] Because the first transistor Q1 is a PNP transistor, Ic = kIb, Ie = (k+1)Ib. The current flowing through the third resistor R3 is the emitter current Ie, and the current flowing through the second resistor R2 is the base current Ib. The current condition can be substituted into the voltage expression of the circuit condition at this time, VCC-Ie*R3-V Q1-eb -Ib*R2=V bat+ , we can conclude that Ib=(VCC-V Q1_eb -V bat+ ) / [R3*(k+1)+R2], because the amplification factor k is much greater than 1, 1 can be ignored, Ib=(VCC-V Q1_eb -V bat+ ) / (R3*k+R2). V1 is the voltage of the amplified battery positive electrode offline detection signal, that is, the voltage of the emitter of the first transistor Q1. Since the emitter of the first transistor Q1 is connected to the power supply VCC through the third resistor R3, the voltage V1 of the emitter of the first transistor Q1 = VCC-V 33 , Ie=(k+1)Ib and Ib=(VCC-V Q1_eb -V bat+ ) / (R3*k+R2) into it, we can get V1=VCC-(VCC-V Q1_eb -V bat+ )*R3*k / (R3*k+R2). Since R3*k>>R2, it can be simplified to V1=VQ1_eb +V bat+ That is, when the positive line of the detected battery BAT is normally connected, the voltage V of the amplified battery positive electrode offline detection signal is 正接 =V1=V Q1_eb +V bat+ .
[0039] When the positive line of the detected battery BAT is not connected normally, that is, it is disconnected, the path between the first resistor R1 and the detected battery BAT is open, and the current of the power supply VCC first passes through the third resistor R3, then through the emitter and base of the first transistor Q1, and after the amplified current flows through the second resistor R2, and finally flows through the first resistor R1 and returns to the ground. At this time, the voltage expression of the circuit situation is different from that when the positive line is normally connected, which is VCC-V 33 -V Q1-eb -V 22 -V 11 =0. The current flowing through the third resistor R3 is the emitter current Ie, the current flowing through the second resistor R2 is the base current Ib, and the current flowing through the first resistor R1 is the base current Ib. Substituting the current into the voltage expression of the circuit at this time, we can get Ib=(VCC-V Q1_eb ) / (R3*k+R2+R1), the emitter voltage V1 of the first transistor Q1 is also V1=VCC-V 33 , we can get: V1 = VCC-(VCC-V Q1_eb )*R3*k / (R3*k+R2+R1). That is, when the positive line of the detected battery BAT is disconnected, V 掉线 =V1=VCC-(VCC-V Q1_eb )*R3*k / (R3*k+R2+R1).
[0040] See also Figure 2 In some embodiments, the second submodule 100 includes a second transistor Q2, a fourth resistor R4, a fifth resistor R5 and a sixth resistor R6, wherein the emitter of the second transistor Q2 is electrically connected to the power supply VCC through the sixth resistor R6, the base of the second transistor Q2 is electrically connected to the negative electrode of the detected battery BAT through the fifth resistor R5, the base of the second transistor Q2 is electrically connected to the fourth resistor R4 through the fifth resistor R5 and grounded, and the collector of the second transistor Q2 is grounded.
[0041] Specifically, the second transistor Q2 may be a PNP transistor, and the model of the second transistor Q2 may be 9012 or 8550.
[0042] In this embodiment, the amplification factor of the second transistor Q2 is k, and the product of the resistance of the sixth resistor R6 and the amplification factor k of the second transistor Q2 is much larger than the resistance of the fifth resistor R5, that is, R6*k>>R5; the fourth resistor R4 is completely consistent with the first resistor R1, and the voltage across the fourth resistor R4 is V 44 The fifth resistor R5 is completely consistent with the second resistor R2, and the voltage across the fifth resistor R5 is V 55 The sixth resistor R6 is completely consistent with the third resistor R3, and the voltage across the sixth resistor R6 is V 66 The second transistor Q2 is completely consistent with the first transistor Q1, and the emitter base voltage of the second transistor Q2 is reduced to V Q2-eb ; V2 represents the voltage of the amplified battery negative electrode offline detection signal.
[0043] The power supply VCC is connected to the emitter of the second transistor Q2 through the sixth resistor R6. The sixth resistor R6 constitutes the emitter DC current loop of the second transistor Q2. The DC current flowing out from the DC power supply VCC passes through the sixth resistor R6 and flows into the second transistor Q2 via the emitter of the second transistor Q2. There is only one resistor, the sixth resistor R6, in the emission loop of the second transistor Q2. The sixth resistor R6 only has a feedback effect on the DC signal, so the sixth resistor R6 is called the emitter negative feedback resistor. The DC negative feedback effect of the sixth resistor R6 can stabilize the DC working electrical signal and provide a stable DC bias voltage for the amplifier circuit. At the same time, this is also a prerequisite for ensuring the normal operation of the AC circuit.
[0044] The base of the second transistor Q2 is connected to the negative electrode of the detected battery BAT through the fifth resistor R5, one end of the fifth resistor R5 is connected to the base of the second transistor Q2, and the other end of the fifth resistor R5 is respectively connected to the negative electrode of the detected battery BAT and the fourth resistor R4. The fifth resistor R5 is a current limiting resistor, because the base to emitter of the transistor is a diode, in order to prevent the base to emitter of the second transistor Q2 from being turned on, the fifth resistor R5 is set to limit the base current from the base to the emitter.
[0045] As can be seen from the figure, the first end of the fourth resistor R4 is connected to the detected battery BAT and the fifth resistor R5, and the second end of the fourth resistor R4 is grounded, that is, the fourth resistor R4 is a pull-down resistor. The resistance value of the fourth resistor R4 can be megohm-level. When the negative line of the detected battery BAT is normally connected, the fourth resistor R4 can pull down the level to avoid voltage suspension and cause circuit instability.
[0046] When the negative line of the detected battery BAT is connected normally, the current of the negative electrode of the detected battery BAT flows to the fourth resistor R4. At this time, the voltage at the intersection of the fourth resistor R4 and the path of the detected battery BAT and the fifth resistor R5 and the path of the detected battery BAT is the negative electrode voltage of the detected battery BAT, where the voltage is Vbat-. At this time, the current of the power supply VCC first passes through the sixth resistor R6, then through the emitter and base of the second transistor Q2, and flows through the fifth resistor R5 after the amplified current, and finally flows through the fourth resistor R4 and returns to the ground. At this time, the voltage condition of this circuit can be expressed by the expression: VCC-V 66 -V Q2-eb -V 55 =V bat- .
[0047] Because the second transistor Q2 is a PNP transistor, Ic = kIb, Ie = (k+1)Ib. The current flowing through the sixth resistor R6 is the emitter current Ie, and the current flowing through the fifth resistor R5 is the base current Ib. The current condition can be substituted into the voltage expression of the circuit condition at this time, VCC-Ie*R6-V Q2-eb -Ib*R5=V bat- , we can conclude that Ib=(VCC-V Q2_eb -V bat+ ) / [R6*(k+1)+R5], because the amplification factor k is much greater than 1, 1 can be ignored, Ib=(VCC-V Q2_eb -V bat- ) / (R6*k+R5). V2 is the voltage of the amplified battery negative electrode offline detection signal, that is, the voltage of the emitter of the second transistor Q2. Since the emitter of the second transistor Q2 is connected to the power supply VCC through the sixth resistor R6, the emitter voltage of the second transistor Q2 V2 = VCC-V 66 , Ie=(k+1)Ib and Ib=(VCC-V Q2_eb -V bat- ) / (R6*k+R5) into it, we can get V2=VCC-(VCC-V Q2_eb -V bat- )*R6*k / (R6*k+R5). Since R6*k>>R5, it can be simplified to V2=V Q2_eb +V bat- That is, when the negative electrode line of the detected battery BAT is normally connected, the voltage V of the amplified battery negative electrode offline detection signal is 负接 =V2=V Q2_eb +V bat- .
[0048] When the negative line of the detected battery BAT is not connected normally, the path between the fourth resistor R4 and the detected battery BAT is open, and the current of the power supply VCC first passes through the sixth resistor R6, then through the emitter and base of the second transistor Q2, and after the amplified current flows through the fifth resistor R5, and finally flows through the fourth resistor R4 and returns to the ground. At this time, the voltage expression of the circuit situation is different from that when the positive line is connected normally, which is VCC-V 66 -V Q2-eb -V 55 -V 44 =0. The current flowing through the sixth resistor R6 is the emitter current Ie2, the current flowing through the second resistor R5 is the base current Ib2, and the current flowing through the fourth resistor R4 is the base current Ib2. Substituting the current into the voltage expression of the circuit at this time, it can be obtained that Ib2 = (VCC-V Q2_eb ) / (R6*k+R5+R4), the emitter voltage V2 of the second transistor Q2 is also V2=VCC-V6, so: V2=VCC-(VCC-V Q2_eb )*R6*k / (R6*k+R5+R4). That is, when the negative line of the detected battery BAT is disconnected, V2=VCC-(VCC-V Q2_eb )*R6*k / (R6*k+R5+R4), the voltage at this time is equal to the voltage when the positive line of the detected battery is disconnected.
[0049] There are four conditions for connecting the positive and negative wires of the tested battery BAT:
[0050] The first one is that when the positive and negative lines of the tested battery BAT are connected normally, V1 = V 正接 =V Q1_eb +V bat+ , V2=V 负接 =V Q2_eb +V bat- ;
[0051] The second type is when the positive line of the detected battery BAT is connected normally and the negative line is not connected normally, V1 = V 正接 =V Q1_eb +V bat+ , V2=V 掉线 =VCC-(VCC-V Q1_eb )*R3*k / (R3*k+R2+R1);
[0052] The third type is when the positive line of the detected battery BAT is not connected normally and the negative line is connected normally, V1 = V 掉线 =VCC-(VCC-V Q1_eb )*R3*k / (R3*k+R2+R1), V2=V 负接 =VQ2_eb +V bat- ;
[0053] Fourth, when the positive and negative lines of the detected battery BAT are not connected normally, the amplified positive and negative offline voltages of the battery output by V1 and V2 are both V 掉线 =VCC-(VCC-V Q1_eb )*R3*k / (R3*k+R2+R1).
[0054] See also Figure 2 In some embodiments, the comparison module 200 includes a comparator and a reference voltage Vref input submodule, the comparator includes a first comparator U1 and a second comparator U2, the non-inverting input terminal of the first comparator U1 is electrically connected to the emitter of the first transistor Q1, the non-inverting input terminal of the second comparator U2 is electrically connected to the emitter of the second transistor Q2, and the inverting input terminals of the first comparator U1 and the second comparator U2 are both electrically connected to the reference voltage Vref input submodule.
[0055] Specifically, a comparator is an electronic component with two input terminals and one output terminal. Its basic principle is to compare two input signals and output the comparison result to the output terminal. The output level of the comparator can be high or low, indicating the magnitude relationship between the two input signals.
[0056] Specifically, the non-inverting input terminal of the first comparator U1 is connected to the emitter of the first transistor Q1, and the signal input to the non-inverting input terminal of the first comparator U1 is the amplified battery positive electrode offline detection signal V1; the inverting input terminal of the first comparator U1 is connected to the reference voltage Vref input submodule, and the signal input to the inverting input terminal of the first comparator U1 is the reference voltage Vref.
[0057] Specifically, the non-inverting input terminal of the second comparator U2 is connected to the emitter of the second transistor Q2, and the signal input to the non-inverting input terminal of the second comparator U2 is the amplified battery negative electrode offline detection signal V2; the inverting input terminal of the second comparator U2 is connected to the reference voltage Vref input submodule, and the signal input to the inverting input terminal of the first comparator U1 is the reference voltage Vref.
[0058] It should be noted that the reference voltage Vref can be provided by dividing the 9V power supply voltage, and no other reference source is required. The value of the reference voltage Vref is greater than V 正接 And less than VDrop.
[0059] The principle of the comparator in this embodiment is as follows: if the voltage of the signal input to the non-inverting input terminal of the comparator is greater than the reference voltage input to its inverting input terminal, the comparison result output by the comparator is the high level H; if the voltage of the signal input to the non-inverting input terminal of the comparator is less than the reference voltage input to its inverting input terminal, the comparison result output by the comparator is the low level L.
[0060] Therefore, when the positive and negative wires of the battery BAT to be detected are both properly connected, V1 < Vref and V2 < Vref, the comparison result output by the first comparator U1 is the low level L, and the comparison result output by the second comparator U2 is the low level L.
[0061] When the positive wire of the battery BAT to be detected is properly connected and the negative wire is not properly connected, V1 < Vref and V2 > Vref, the comparison result output by the first comparator U1 is the low level L, and the comparison result output by the second comparator U2 is the high level H.
[0062] When the positive wire of the battery BAT to be detected is not properly connected and the negative wire is properly connected, V1 > Vref and V2 < Vref, the comparison result output by the first comparator U1 is the high level H, and the comparison result output by the second comparator U2 is the low level L.
[0063] When the positive and negative wires of the battery BAT to be detected are both not properly connected, V1 > Vref and V2 > Vref, the comparison result output by the first comparator U1 is the high level H, and the comparison result output by the second comparator U2 is the high level H.
[0064] Please refer to Figure 2 , in some embodiments, the logic processing module 300 is a logical OR gate circuit. The logical OR gate circuit includes a first OR gate circuit D1 and a second OR gate circuit D2. The battery offline detection circuit further includes a seventh resistor R7 and an eighth resistor R8.
[0065] Among them, the input terminal of the first OR gate circuit D1 is electrically connected to the first comparator U1 and is also connected to the power supply VCC through the seventh resistor R7; the input terminal of the second OR gate circuit D2 is electrically connected to the second comparator U2 and is also connected to the power supply VCC through the eighth resistor R8; the output terminals of the first OR gate circuit D1 and the second OR gate circuit D2 are connected through a sampling line.
[0066] Specifically, there are many ways to implement a logical OR gate circuit, the most common of which is to use transistors or integrated circuits. In an OR gate circuit implemented by transistors, two transistors and two resistors are usually used, where the base of one transistor receives an input signal, the base of the other transistor receives another input signal, the collectors of the two transistors are connected to the positive pole of the power supply through a resistor, and the output signal is taken from the collectors of the two transistors. In an OR gate circuit implemented by an integrated circuit, several transistors and other components are usually used, and the output signal is taken from the pins of the integrated circuit.
[0067] Depend on Figure 2 It can be seen that the seventh resistor R7 and the eighth resistor R8 connect the logic OR gate circuit to the power supply VCC, and the seventh resistor R7 and the eighth resistor R8 are pull-up resistors. When the two comparison results of the first comparator U1 and the second comparator U2 have not been input to the logic OR gate circuit, the logic OR gate circuit provides a defined default state for the input pin by setting the seventh resistor R7 and the eighth resistor R8 to connect the power supply VCC, which can prevent the logic OR gate circuit from being accidentally switched and ensure that the input signal is a fixed voltage, even if the switch is disconnected or there is no connection, and pull the input signal line to a high level.
[0068] In the comparison module 200 , the first comparator U1 uses its comparison result as the input signal of the first OR gate circuit D1 , and the second comparator U2 uses its comparison result as the input signal of the second OR gate circuit D2 .
[0069] According to the principle of logical OR operation: when at least one of the two input signals is at a high level, the output signal is at a high level; only when both input signals are at a low level, the output signal is at a low level. In this embodiment, there are four situations as follows:
[0070] The comparison result output by the first comparator U1 is a low level L, the comparison result output by the second comparator U2 is a low level L, and the detection result of the offline signal Vout output by the logic OR gate circuit is L;
[0071] The comparison result output by the first comparator U1 is a low level L, the comparison result output by the second comparator U2 is a high level H, and the detection result of the offline signal Vout output by the logic OR gate circuit is H;
[0072] The comparison result output by the first comparator U1 is a high level H, the comparison result output by the second comparator U2 is a low level L, and the detection result of the offline signal Vout output by the logic OR gate circuit is H;
[0073] The comparison result output by the first comparator U1 is a high level H, the comparison result output by the second comparator U2 is a high level H, and the detection result of the offline signal Vout output by the logic OR gate circuit is H.
[0074] Combine the connection conditions of the positive and negative lines of the tested battery BAT with the above, specifically:
[0075] When the positive and negative lines of the detected battery BAT are connected normally, the comparison result output by the first comparator U1 is a low level L, the comparison result output by the second comparator U2 is a low level L, and the detection result of the offline signal Vout output by the logic OR gate circuit is L;
[0076] When the positive line of the detected battery BAT is normally connected and the negative line is not normally connected, the comparison result output by the first comparator U1 is a low level L, the comparison result output by the second comparator U2 is a high level H, and the detection result of the offline signal Vout output by the logic OR gate circuit is H;
[0077] When the positive line of the detected battery BAT is not connected normally and the negative line is connected normally, the comparison result output by the first comparator U1 is a high level H, the comparison result output by the second comparator U2 is a low level L, and the detection result of the offline signal Vout output by the logic OR gate circuit is H;
[0078] When the positive and negative lines of the detected battery BAT are not connected normally, the comparison result output by the first comparator U1 is high level H, the comparison result output by the second comparator U2 is high level H, and the detection result of the offline signal Vout output by the logic OR gate circuit is H.
[0079] As shown in the table below, it can be concluded from the above four situations that only when the positive and negative lines of the detected battery BAT are connected normally, the detection result will be L; if one of the positive and negative lines of the detected battery BAT is not connected normally, the detection result will be H.
[0080] Testing line V1 V2 Vout Offset H L H Drop Negative L H H Lose positive and negative H H H Normal connection L L L
[0081] The circuit provided by the utility model can clearly understand whether the positive electrode line and the negative electrode line of the detected battery BAT are normally connected through the detection result.
[0082] The utility model also provides a battery pack management system, which includes the above-mentioned battery offline detection circuit and battery, and the battery offline detection circuit is used to detect the connection status of the positive line and the negative line of the battery during the charging and discharging process. In particular, the battery pack management system can also include a battery module, a thermal management system, a battery management system, an electrical system and structural parts.
[0083] Specifically, the equipment used by the battery offline detection circuit can be equipment involving single battery or battery string sampling, that is, battery formation equipment, battery pack management system and other equipment. The battery management system in the battery pack management system is responsible for real-time acquisition, state estimation, energy management, safety protection, information management, etc. Charging management is part of energy management. The battery offline detection circuit is used to monitor the online status of the battery, so that the battery can be reliably and safely charged and discharged, ensuring the safe and reliable operation of the lithium battery system.
[0084] The working process of the utility model is as follows: a battery offline detection circuit includes a signal amplification module 100, a comparison module 200 and a logic processing module 300. Through the signal amplification module 100, the positive and negative offline signals of the detected battery BAT are amplified and transmitted to the comparison module 200 for comparison operation, and then the two comparison results are transmitted to the logic processing module 300 for operation to obtain the detection result. Only when the positive and negative lines of the detected battery BAT are normally connected, the detection result will be L; if the positive and negative lines of the detected battery BAT are not normally connected, the detection result is H.
[0085] In summary, the embodiments of the utility model provide a battery offline detection circuit and a battery pack management system, wherein the circuit and control logic of the battery offline detection circuit are simple, and no high common-mode voltage operational amplifier is required, so the cost is not high and no capacitor is required, so the battery capacity itself does not need to be consumed.
[0086] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and substitutions can be made without departing from the technical principle of the present invention. These improvements and substitutions should also be regarded as the protection scope of the present invention.
Claims
1. A battery offline detection circuit, characterized in that: The battery offline detection circuit comprises: A signal amplification module, used to amplify the positive and negative offline signals of the detected battery and output two detection signals, the signal amplification module is electrically connected to the detected battery; A comparison module, used for comparing the detection signal with a reference voltage and outputting two comparison results, wherein the comparison module is electrically connected to the signal amplification module; The logic processing module is used to process the two comparison results and output the detection result of the offline state of the detected battery. The logic processing module is electrically connected to the comparison module.
2. A battery offline detection circuit as claimed in claim 1, characterized in that: The signal amplification module includes a first submodule and a second submodule, wherein the first submodule is electrically connected to the positive electrode of the detected battery, and the second submodule is electrically connected to the negative electrode of the detected battery.
3. A battery offline detection circuit as claimed in claim 2, characterized in that: The first submodule includes a first transistor, a first resistor, a second resistor and a third resistor, wherein the emitter of the first transistor is electrically connected to a power source through the third resistor, the base of the first transistor is electrically connected to the positive electrode of the detected battery through the second resistor, the base of the first transistor is electrically connected to the first resistor through the second resistor and is grounded, and the collector of the first transistor is grounded; The second submodule includes a second transistor, a fourth resistor, a fifth resistor and a sixth resistor, wherein the emitter of the second transistor is electrically connected to a power supply through the sixth resistor, the base of the second transistor is electrically connected to the negative electrode of the detected battery through the fifth resistor, the base of the second transistor is electrically connected to the fourth resistor through the fifth resistor and to ground, and the collector of the second transistor is grounded.
4. A battery offline detection circuit as claimed in claim 3, characterized in that: The comparison module includes a first comparator, a second comparator and a reference voltage input submodule, the non-inverting input terminal of the first comparator is electrically connected to the emitter of the first transistor, the non-inverting input terminal of the second comparator is electrically connected to the emitter of the second transistor, and the inverting input terminals of the first comparator and the second comparator are both electrically connected to the reference voltage input submodule.
5. A battery offline detection circuit as claimed in claim 4, characterized in that: The logic processing module is a logic OR gate circuit, the logic OR gate circuit includes a first OR gate circuit and a second OR gate circuit, and the battery offline detection circuit also includes a seventh resistor and an eighth resistor; Among them, the input end of the first OR gate circuit is electrically connected to the first comparator and connected to the power supply through the seventh resistor; the input end of the second OR gate circuit is electrically connected to the second comparator and connected to the power supply through the eighth resistor; the output ends of the first OR gate circuit and the second OR gate circuit are connected through a sampling line.
6. A battery pack management system, characterized in that: The battery pack management system comprises a battery offline detection circuit and a battery as described in any one of claims 1 to 5, wherein the battery offline detection circuit is used to detect the connection status of the positive line and the negative line of the battery during the charging and discharging process.