Signal conversion circuit capable of outputting multi-channel video signals for splicing display
By setting up the main control circuit of the Android motherboard and the video signal conversion chip in the signal conversion circuit, the splicing display of multiple 1080P resolution video signals is realized, which solves the problem that multiple outputs cannot be achieved in the existing technology and improves the user experience.
Patent Information
- Application Number
- CN202420533486.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-19
- Publication Date
- 2024-12-31
- Estimated Expiration
- 2034-03-19
AI Technical Summary
The existing stitched display Android motherboard cannot achieve multiple channels and output 1080P resolution video signals for stitching display, which is difficult to meet user needs.
Design a signal conversion circuit, including the main control circuit of the Android motherboard and the video signal conversion circuit. By setting up video signal conversion chips U44, U45, U18, and U19, it can output up to six 1080P resolution video signals to the splicing display screen to realize multiple channels. Splicing display of video signals.
The simultaneous output and splicing display of multiple 1080P resolution video signals are realized, which improves the user experience and solves the problem that cannot meet the needs of multiple outputs in the prior art.
Smart Images

Figure CN222283315U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of circuits, in particular to a signal conversion circuit capable of outputting multi-channel video signals for splicing and display. Background Art
[0002] HDMI (High-Definition Multimedia Interface) video signal, also known as high-definition multimedia video signal, is the first digital interface that supports transmission over a single cable without compression of all-digital high-definition, multi-channel audio, and intelligent format and control command data.
[0003] 4K-HDMI video signal refers to HDMI video signal with 4K resolution, that is, HDMI video signal with 4096×2160 pixel resolution, which is 4 times the resolution of 2K projector and HDTV, and belongs to ultra-high-definition resolution. At this resolution, the audience will be able to see every detail and every close-up in the picture. If the cinema adopts the amazing 4096×2160 pixels, no matter where in the cinema, the audience can clearly see every detail of the picture, and the film will be colorful and the text will be clear and sharp. 1080P resolution video signal is also a grade of HD resolution.
[0004] Splicing display is a display system that uses hardware and software to achieve ultra-high resolution, ultra-large screen, and comprehensive application platform for non-single screens. It is usually composed of M×N (m, n=1, 2, 3...) display units. As a modern video tool, splicing display has been widely used in various fields, such as large-scale postal and telecommunications systems, radio and television broadcasting, security monitoring, military command, industrial process control, traffic management command, public security command monitoring, various production scheduling, communication network management, energy distribution and transportation, etc. Large-screen splicing display can centrally display signals from multiple different signal sources such as RGB, Video and network to meet the user's needs for large-area display of various shared information and comprehensive information. In short, departments that need panoramic browsing and unified command need to choose large-screen splicing display systems.
[0005] Most of the Android motherboards with splicing displays on the market can only output 2 or 3 channels of native HDMI-OUT signals received from the signal source, and then output and connect 2-3 display screens to perform a simple 2-channel or 3-channel splicing display solution. It is impossible to achieve the function of simultaneously outputting multiple channels of high-definition resolution video signals for splicing display, which is difficult to meet people's usage needs. Utility Model Content
[0006] In order to solve the problems in the prior art, the utility model provides a signal conversion circuit capable of outputting multiple video signals for splicing display. By arranging an Android mainboard main control circuit, a video signal conversion circuit and a splicing display screen that cooperate with each other in the signal conversion circuit capable of outputting multiple video signals for splicing display, the Android mainboard main control circuit can output a maximum of two 1080P resolution video signals to the splicing display screen, and the video signal conversion circuit can output a maximum of four 1080P resolution video signals to the splicing display screen to complete the splicing display, and can realize the function of simultaneously outputting multiple 1080P resolution video signals for splicing display, thereby solving the problem in the prior art that the Android mainboard with splicing display cannot realize the simultaneous output of multiple 1080P resolution video signals for splicing display and is difficult to meet people's usage needs.
[0007] The utility model provides a signal conversion circuit capable of outputting multiple video signals for splicing display, comprising an Android mainboard main control circuit, a video signal conversion circuit and a splicing display screen, wherein the input end of the Android mainboard main control circuit is connected to an HDMI video signal source, the output end of the Android mainboard main control circuit is connected to the input end of the video signal conversion circuit, the output end of the Android mainboard main control circuit can be connected to at most two of the splicing display screens, the video signal conversion circuit is provided with a video signal conversion chip U44, a video signal conversion chip U45, a video signal conversion chip U18 and a video signal conversion chip U19, the output end of the video signal conversion circuit can be connected to at most four of the splicing display screens, the Android mainboard main control circuit and the video signal conversion circuit can output a total of at most six 1080P resolution video signals to the splicing display screen to complete the splicing display.
[0008] The utility model is further improved. The main control circuit of the Android mainboard is provided with a main control chip U1. The main control chip U1 is provided with 82 pins. The AG1, AG2, AJ1, AJ2, AK2, AK3, AL1, AL2, AH2, and AH3 pins of the main control chip U1 can be connected to a spliced display screen. The AN2, AP2, AN4, AP4, AM5, AN5, AN6, AP6, AM3, and AN3 pins of the main control chip U1 can also be connected to a spliced display screen. The G29, G27, AN13, AP13, AN14, AP14, AN15, AP15, AN16, and AP16 pins of the main control chip U1 are connected to the input of the video signal conversion chip U44. The V28, V29, AN8, AP8, AN9, AP9, AN10, AP10, AN11, and AP11 pins of the main control chip U1 are connected to the input end of the video signal conversion chip U45, the AN26, AN26, AN24, AP24, AN25, AP25, AN27, AP27, AN28, AP28, G29, and G27 pins of the main control chip U1 are connected to the input end of the video signal conversion chip U18, and the AN20, AN20, AN18, AP18, AN19, AP19, AN21, AP21, AN22, AP22, F26, and F27 pins of the main control chip U1 are connected to the input end of the video signal conversion chip U19.
[0009] The utility model is further improved. The video signal conversion chip U44 is provided with 64 pins. The 50th and 51st pins of the video signal conversion chip U44 are respectively connected to the G29th and G27th pins of the main control chip U1, and the 3rd, 4th, 5th, 6th, 10th, 11th, 12th and 13th pins of the video signal conversion chip U44 are respectively connected to the AN13th, AP13th, AN14, AP14, AN15, AP15, AN16 and AP16 pins of the main control chip U1.
[0010] The utility model is further improved. The video signal conversion chip U45 is provided with 64 pins. The 50th and 51st pins of the video signal conversion chip U45 are respectively connected to the V28th and V29th pins of the main control chip U1, and the 3rd, 4th, 5th, 6th, 10th, 11th, 12th and 13th pins of the video signal conversion chip U44 are respectively connected to the AN8th, AP8th, AN9, AP9, AN10, AP10, AN11 and AP11 pins of the main control chip U1.
[0011] The utility model is further improved. The video signal conversion chip U18 is provided with 64 pins. The 62nd and 61st pins of the video signal conversion chip U18 are respectively connected to the G29th and G27th pins of the main control chip U1, and the 1st, 2nd, 3rd, 4th, 7th, 8th, 9th, 10th, 11th and 12th pins of the video signal conversion chip U18 are respectively connected to the AN26th, AN26th, AN24th, AP24th, AN25th, AP25th, AN27th, AP27th, AN28th and AP28th pins of the main control chip U1.
[0012] The utility model is further improved. The video signal conversion chip U19 is provided with 64 pins. The 62nd and 61st pins of the video signal conversion chip U18 are respectively connected to the F26th and F27th pins of the main control chip U1, and the 1st, 2nd, 3rd, 4th, 7th, 8th, 9th, 10th, 11th and 12th pins of the video signal conversion chip U18 are respectively connected to the AN20th, AN20th, AN18th, AP18th, AN19th, AP19th, AN21, AP21, AN22 and AP22 pins of the main control chip U1.
[0013] The utility model is further improved, and the model of the main control chip U1 is RK3588.
[0014] The utility model is further improved in that the models of the video signal conversion chip U44 and the video signal conversion chip U45 are both LT8711HE_QFN64.
[0015] The utility model is further improved in that the models of the video signal conversion chip U18 and the video signal conversion chip U19 are both LT8912B_QFN64.
[0016] Compared with the prior art, the beneficial effects of the utility model are: providing a signal conversion circuit capable of outputting multiple video signals for splicing display, by arranging an Android mainboard main control circuit, a video signal conversion circuit and a splicing display screen that cooperate with each other in the signal conversion circuit capable of outputting multiple video signals for splicing display, the Android mainboard main control circuit can output up to two 1080P resolution video signals to the splicing display screen, the video signal conversion circuit can output up to four 1080P resolution video signals to the splicing display screen to complete the splicing display, and can realize the function of simultaneously outputting multiple 1080P resolution video signals for splicing display, and can select up to 6 1080P resolution video signals for simultaneous output and splicing into 1 complete picture, the operation is simple, and the user experience of the user is greatly improved, and the problem that the Android mainboard with splicing display in the prior art cannot realize the simultaneous output of multiple 4K-HDMI video signals for splicing display and is difficult to meet people's usage needs is solved. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] In order to more clearly illustrate the solutions in the present invention or the prior art, a brief introduction is given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0018] Figure 1 This is a principle block diagram of a signal conversion circuit capable of outputting multiple video signals for splicing and displaying;
[0019] Figure 2 This is a circuit diagram of the main control circuit of the Android mainboard of the utility model;
[0020] Figure 3 A circuit diagram of a video signal conversion circuit of the utility model;
[0021] Figure 4 A circuit diagram of a video signal conversion circuit of the utility model;
[0022] Figure 5 A circuit diagram of a video signal conversion circuit of the utility model;
[0023] Figure 6 A circuit diagram of a video signal conversion circuit of the utility model;
[0024] Figure 7 This is a 6-screen display splicing effect diagram of the video signal of the utility model. DETAILED DESCRIPTION
[0025] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by technicians in the technical field of the present utility model; the terms used in the specification of the application herein are only for the purpose of describing specific embodiments and are not intended to limit the present utility model; the terms "including" and "having" and any variations thereof in the specification and claims of the present utility model and the above-mentioned drawings are intended to cover non-exclusive inclusions. The terms "first", "second", etc. in the specification and claims of the present utility model or the above-mentioned drawings are used to distinguish different objects, rather than to describe a specific order.
[0026] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present invention. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.
[0027] In order to enable those skilled in the art to better understand the solution of the utility model, the technical solution in the embodiment of the utility model will be clearly and completely described below in conjunction with the accompanying drawings.
[0028] like Figure 1-7 As shown, the utility model provides a signal conversion circuit capable of outputting multiple video signals for splicing display, including an Android mainboard main control circuit, a video signal conversion circuit and a splicing display screen, the input end of the Android mainboard main control circuit is connected to an HDMI video signal source, the output end of the Android mainboard main control circuit is connected to the input end of the video signal conversion circuit, the output end of the Android mainboard main control circuit can be connected to at most 2 splicing display screens, the video signal conversion circuit is provided with a video signal conversion chip U44, a video signal conversion chip U45, a video signal conversion chip U18 and a video signal conversion chip U19, and the output end of the video signal conversion circuit can be connected to at most 4 splicing display screens. In this embodiment, the Android mainboard main control circuit and the video signal conversion circuit can output at most six 1080P resolution video signals to the splicing display screen to complete the splicing display, and can realize the function of simultaneously outputting 1080P resolution video signals for splicing display, and can select at most 6 1080P resolution video signals to be output simultaneously and spliced into 1 complete picture, which is simple to operate and greatly improves the user experience of the user.
[0029] like Figure 2As shown, the main control circuit of the Android mainboard is provided with a main control chip U1. The model of the main control chip U1 is RK3588. The main control chip U1 is provided with 82 pins. The AG1, AG2, AJ1, AJ2, AK2, AK3, AL1, AL2, AH2, and AH3 pins of the main control chip U1 can be connected to a spliced display screen. The AN2, AP2, AN4, AP4, AM5, AN5, AN6, AP6, AM3, and AN3 pins of the main control chip U1 can also be connected to a spliced display screen. The G29, G27, AN13, AP13, AN14, AP14, AN15, AP15, AN16, and AP16 pins of the main control chip U1 are connected to the video signal conversion chip U44. The input end is connected, the V28, V29, AN8, AP8, AN9, AP9, AN10, AP10, AN11, and AP11 pins of the main control chip U1 are connected to the input end of the video signal conversion chip U45, the AN26, AN26, AN24, AP24, AN25, AP25, AN27, AP27, AN28, AP28, G29, and G27 pins of the main control chip U1 are connected to the input end of the video signal conversion chip U18, and the AN20, AN20, AN18, AP18, AN19, AP19, AN21, AP21, AN22, AP22, F26, and F27 pins of the main control chip U1 are connected to the input end of the video signal conversion chip U19. In this embodiment, the Android main board main control circuit can also convert the HDMI video signal obtained from the HDMI video signal source into up to two 1080P resolution video signals and output them to the spliced display screen at the same time.
[0030] like Figure 3-4As shown, the video signal conversion chip U44 has 64 pins, the 50th and 51st pins of the video signal conversion chip U44 are respectively connected to the G29th and G27th pins of the main control chip U1, and the 3rd, 4th, 5th, 6th, 10th, 11th, 12th, and 13th pins of the video signal conversion chip U44 are respectively connected to the AN13th, AP13th, AN14th, AP14th, AN15th, AP15th, AN16th, and AP16th pins of the main control chip U1; the video signal conversion chip U45 has 64 pins , the 50th and 51st pins of the video signal conversion chip U45 are respectively connected to the V28th and V29th pins of the main control chip U1, and the 3rd, 4th, 5th, 6th, 10th, 11th, 12th and 13th pins of the video signal conversion chip U44 are respectively connected to the AN8th, AP8th, AN9th, AP9th, AN10th, AP10th, AN11th and AP11th pins of the main control chip U1; the models of the video signal conversion chip U44 and the video signal conversion chip U45 are both LT8711HE_QFN64. In this embodiment, the video signal conversion chip U44 and the video signal conversion chip U45 can respectively convert the HDMI video signal obtained from the HDMI video signal source into a 1080P resolution video signal and output it to the spliced display screen at the same time.
[0031] like Figure 5-6 As shown, the video signal conversion chip U18 has 64 pins, the 62nd and 61st pins of the video signal conversion chip U18 are respectively connected to the G29th and G27th pins of the main control chip U1, and the 1st, 2nd, 3rd, 4th, 7th, 8th, 9th, 10th, 11th and 12th pins of the video signal conversion chip U18 are respectively connected to the AN26th, AN26th, AN24th, AP24th, AN25th, AP25th, AN27th, AP27th, AN28th and AP28th pins of the main control chip U1; the video signal conversion chip U19 has 64 pins, The 62nd and 61st pins of the video signal conversion chip U18 are respectively connected to the F26th and F27th pins of the main control chip U1, and the 1st, 2nd, 3rd, 4th, 7th, 8th, 9th, 10th, 11th and 12th pins of the video signal conversion chip U18 are respectively connected to the AN20th, AN20th, AN18th, AP18th, AN19th, AP19th, AN21th, AP21th, AN22th and AP22th pins of the main control chip U1; the models of the video signal conversion chip U18 and the video signal conversion chip U19 are both LT8912B_QFN64. In this embodiment, the video signal conversion chip U18 and the video signal conversion chip U19 can respectively convert the HDMI video signal obtained from the HDMI video signal source into a 1080P resolution video signal and output it to the spliced display screen at the same time.
[0032] As can be seen from the above, the utility model provides a signal conversion circuit capable of outputting multiple video signals for splicing display. By arranging an Android mainboard main control circuit, a video signal conversion circuit and a splicing display screen that cooperate with each other in the signal conversion circuit capable of outputting multiple video signals for splicing display, the Android mainboard main control circuit can output up to two 1080P resolution video signals to the splicing display screen, and the video signal conversion circuit can output up to four 1080P resolution video signals to the splicing display screen to complete the splicing display. It can realize the function of simultaneously outputting multiple 1080P resolution video signals for splicing display, and can select up to 6 1080P resolution video signals to be output simultaneously and spliced into 1 complete picture. The operation is simple, which greatly improves the user experience of the user, and solves the problem that the Android mainboard with splicing display in the prior art cannot realize the simultaneous output of multiple 1080P resolution video signals for splicing display and is difficult to meet people's usage needs.
[0033] The specific implementation methods described above are preferred implementation methods of the present utility model, and are not intended to limit the specific implementation scope of the present utility model. The scope of the present utility model includes but is not limited to the specific implementation methods. All equivalent changes made in accordance with the present utility model are within the protection scope of the present utility model.
Claims
1. A signal conversion circuit capable of outputting multiple video signals for splicing and display, characterized in that: It includes an Android mainboard main control circuit, a video signal conversion circuit and a spliced display screen, wherein the input end of the Android mainboard main control circuit is connected to an HDMI video signal source, the output end of the Android mainboard main control circuit is connected to the input end of the video signal conversion circuit, the output end of the Android mainboard main control circuit can be connected to at most 2 spliced display screens, the video signal conversion circuit is provided with a video signal conversion chip U44, a video signal conversion chip U45, a video signal conversion chip U18 and a video signal conversion chip U19, the output end of the video signal conversion circuit can be connected to at most 4 spliced display screens, the Android mainboard main control circuit and the video signal conversion circuit can output at most six 1080P resolution video signals to the spliced display screen to complete spliced display.
2. The signal conversion circuit capable of outputting multiple video signals for splicing and displaying according to claim 1, characterized in that: The Android mainboard main control circuit is provided with a main control chip U1, and the main control chip U1 is provided with 82 pins. The AG1, AG2, AJ1, AJ2, AK2, AK3, AL1, AL2, AH2, and AH3 pins of the main control chip U1 can be connected to one of the spliced display screens, and the AN2, AP2, AN4, AP4, AM5, AN5, AN6, AP6, AM3, and AN3 pins of the main control chip U1 can also be connected to one of the spliced display screens. The G29, G27, AN13, AP13, AN14, AP14, AN15, AP15, AN16, and AP16 pins of the main control chip U1 are connected to the input end of the video signal conversion chip U44. The V28, V29, AN8, AP8, AN9, AP9, AN10, AP10, AN11, and AP11 pins of the main control chip U1 are connected to the input end of the video signal conversion chip U45, the AN26, AN26, AN24, AP24, AN25, AP25, AN27, AP27, AN28, AP28, G29, and G27 pins of the main control chip U1 are connected to the input end of the video signal conversion chip U18, and the AN20, AN20, AN18, AP18, AN19, AP19, AN21, AP21, AN22, AP22, F26, and F27 pins of the main control chip U1 are connected to the input end of the video signal conversion chip U19.
3. The signal conversion circuit capable of outputting multiple video signals for splicing and displaying according to claim 2, characterized in that: The video signal conversion chip U44 is provided with 64 pins. The 50th and 51st pins of the video signal conversion chip U44 are respectively connected to the G29th and G27th pins of the main control chip U1. The 3rd, 4th, 5th, 6th, 10th, 11th, 12th and 13th pins of the video signal conversion chip U44 are respectively connected to the AN13th, AP13th, AN14th, AP14th, AN15th, AP15th, AN16th and AP16th pins of the main control chip U1.
4. The signal conversion circuit capable of outputting multiple video signals for splicing and displaying according to claim 3, characterized in that: The video signal conversion chip U45 is provided with 64 pins, the 50th and 51st pins of the video signal conversion chip U45 are respectively connected to the V28th and V29th pins of the main control chip U1, and the 3rd, 4th, 5th, 6th, 10th, 11th, 12th, and 13th pins of the video signal conversion chip U44 are respectively connected to the AN8th, AP8th, AN9th, AP9th, AN10, AP10, AN11, and AP11 pins of the main control chip U1.
5. The signal conversion circuit capable of outputting multiple video signals for splicing display according to claim 4, characterized in that: The video signal conversion chip U18 is provided with 64 pins, the 62nd and 61st pins of the video signal conversion chip U18 are respectively connected to the G29th and G27th pins of the main control chip U1, and the 1st, 2nd, 3rd, 4th, 7th, 8th, 9th, 10th, 11th and 12th pins of the video signal conversion chip U18 are respectively connected to the AN26th, AN26th, AN24th, AP24th, AN25th, AP25th, AN27th, AP27th, AN28th and AP28th pins of the main control chip U1.
6. The signal conversion circuit capable of outputting multiple video signals for splicing display according to claim 5, characterized in that: The video signal conversion chip U19 is provided with 64 pins, the 62nd and 61st pins of the video signal conversion chip U18 are respectively connected to the F26th and F27th pins of the main control chip U1, and the 1st, 2nd, 3rd, 4th, 7th, 8th, 9th, 10th, 11th and 12th pins of the video signal conversion chip U18 are respectively connected to the AN20th, AN20th, AN18th, AP18th, AN19th, AP19th, AN21th, AP21th, AN22th and AP22th pins of the main control chip U1.
7. The signal conversion circuit capable of outputting multiple video signals for splicing display according to claim 6, characterized in that: The model of the main control chip U1 is RK3588.
8. The signal conversion circuit capable of outputting multiple video signals for splicing display according to claim 7, characterized in that: The models of the video signal conversion chip U44 and the video signal conversion chip U45 are both LT8711HE_QFN64.
9. The signal conversion circuit capable of outputting multiple video signals for splicing display according to claim 8, characterized in that: The models of the video signal conversion chip U18 and the video signal conversion chip U19 are both LT8912B_QFN64.