Electrical interconnect and multilayer heater

Abstract

An electrical interconnect for connecting layers of a multi-layer heater includes a shaped body having a lower end portion and an upper end portion. The lower end portion has a contact area smaller than a contact area of the upper end portion, and the contact area of the lower end portion is proximate to a heating layer and the contact area of the upper end portion is proximate to a routing layer.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of U.S. Patent Application No. 17 / 497,280, filed on October 8, 2021. The disclosure of the above application is incorporated herein by reference. Technical Field

[0003] The present disclosure relates to electrical interconnect structures for multi-layer heater constructions. Background Art

[0004] The statements in this section merely provide background information related to the present disclosure and may not constitute prior art.

[0005] A typical multi-layer heater construction (e.g., a ceramic pedestal) may include electrical interconnect structures between at least two electrically active layers. For example, one or more electrical interconnect structures may be used between a heating layer and a subsequent routing layer, the heating layer and routing layer being physically separated by an electrically insulating layer (i.e., a dielectric layer). In other examples, a multi-layer heater construction may include several heating layers and several routing layers, with electrical interconnect structures extending between layers and electrical interconnect structures extending up to the top of the heater assembly, where they may or may not serve as a terminal for further electrical connection of the heater.

[0006] Challenges associated with electrical interconnect structures / vias include fabricating an electrical interconnect structure / via by a conventional tape masking process. Such a tape masking typically results in a cylindrical via geometry with sharp outside edges and vertical faces, which creates a challenge during subsequent coating steps after a routing layer. Therefore, it is difficult to obtain uniform layer properties along such edges and faces. Alternatively, the vias can be filled with a conductive material prior to coating of the routing layer, however, additional manufacturing steps will be used, which complicates the manufacturing process. Among the challenges of constructing multilayer heaters such as ceramic pedestals in semiconductor processing, these challenges are addressed by the present disclosure. Utility Model Content

[0007] This section provides a general summary of the disclosure, and is not a comprehensive disclosure of its full scope or all of its features.

[0008] In one form, the present disclosure provides an electrical interconnect for connecting layers of a multi-layer heater. The electrical interconnect includes a formed body having a lower portion and an upper portion. The lower portion has a contact area that is smaller than a contact area of ​​the upper portion, and the contact area of ​​the lower portion is proximate to a heating layer, while the contact area of ​​the upper portion is proximate to a routing layer.

[0009] In variations of the electrical interconnect, which may be implemented independently or in any combination: the forming body defines a varying circular cross-sectional area; the forming body includes a concave radius extending around a periphery and adjacent to the lower end portion of the forming body; the forming body includes a convex radius extending around a periphery and adjacent to the upper end portion of the forming body; the forming body defines a side wall extending between the lower end portion and the upper end portion at an angle that may not exceed about 45 degrees; and the forming body includes a plurality of independent segments.

[0010] In another form, the present disclosure provides a multilayer heater comprising a heating layer, a dielectric layer, a routing layer, and at least one through hole. The dielectric layer is disposed above the heating layer. The routing layer is disposed above the dielectric layer. The through hole extends from the heating layer through the dielectric layer and to the routing layer, thereby forming an electrical interconnection. The through hole includes a formed body having a lower portion and an upper portion. The lower portion has a contact area that is smaller than a contact area of ​​the upper portion, and the contact area of ​​the lower portion is proximate to the heating layer, while the contact area of ​​the upper portion is proximate to the routing layer.

[0011] In a variation of the multilayer heater, which may be implemented independently or in any combination: the heating layer includes a plurality of resistive traces and at least one resistive trace extends near the lower end portion of the through hole and below the upper end portion; the forming body defines a varying circular cross-sectional area; the forming body includes a concave radius extending around a periphery of the forming body and adjacent to the lower end portion; the forming body includes a convex radius extending around a periphery of the forming body and adjacent to the upper end portion; the forming body includes a plurality of independent segments; the through hole defines a side wall extending through the dielectric layer at an angle that may not exceed about 45 degrees; and the through hole extends at least partially into the heating layer.

[0012] In yet another form, the present disclosure provides a multilayer heater comprising a heating layer, a dielectric layer, and a routing layer. The dielectric layer is disposed above the heating layer and comprises at least one aperture exposing the heating layer. The routing layer is disposed above the dielectric layer and extends into the aperture and onto the heating layer. The aperture is shaped to have a lower portion and an upper portion. The lower portion has an opening that is smaller than an opening of the upper portion, and the opening of the lower portion is proximate to the heating layer, while the opening of the upper portion is proximate to the routing layer.

[0013] In some variations of the multilayer heater of the above paragraph, a protective layer is formed over the routing layer.

[0014] In yet another form, the present disclosure provides a process for forming a multilayer heater. The process includes forming a heating layer; forming a dielectric layer above the heating layer, the dielectric layer including at least one aperture exposing the heating layer; and forming a routing layer above the dielectric layer, the routing layer extending into the aperture and onto the exposed heating layer. The aperture is formed to have a lower portion and an upper portion. The lower portion has an opening that is smaller than an opening of the upper portion, and the opening of the lower portion is proximate to the heating layer, while the opening of the upper portion is proximate to the routing layer.

[0015] In variations of forming the multilayer heater, they can be implemented independently or in any combination: when forming the dielectric layer, the opening is formed by using a mask; the opening is formed by removing an area of ​​the dielectric layer using a subtractive process; at least a portion of the heating layer is removed by a subtractive process; the subtractive process is selected from the group consisting of laser ablation, mechanical milling, chemical etching, water jet and combinations of the foregoing; the opening is formed by the following steps: first depositing and curing a masking agent onto the heating layer, applying the dielectric layer over the masking agent and the heating layer, removing the masking agent, and then removing a portion of the dielectric layer to form the opening; forming a protective layer over the routing layer; and flattening an upper surface of the protective layer.

[0016] In yet another form, the present disclosure provides a process for forming a multilayer heater. The process includes forming a heating layer; forming a dielectric layer above the heating layer, the dielectric layer including at least one aperture exposing the heating layer; forming a through hole in the at least one aperture, the through hole contacting the heating layer; and forming a routing layer above the dielectric layer, the routing layer contacting the through hole. The aperture is shaped to have a lower portion and an upper portion. The lower portion has an opening that is smaller than an opening of the upper portion, and the opening of the lower portion is proximate to the heating layer, while the opening of the upper portion is proximate to the routing layer.

[0017] Further areas of applicability will become apparent from the description provided herein.It should be understood that the description and specific examples are intended for purposes of illustration only and are not intended to limit the scope of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order that the present disclosure may be well understood, its different forms will now be described by way of example and with reference to the accompanying drawings, in which:

[0019] Figure 1 is a side view of a ceramic pedestal assembly constructed according to the teachings of the present disclosure;

[0020] Figure 2ais a partial side cross-sectional view of a ceramic pedestal assembly constructed according to the present disclosure, with a shaped aperture formed in a dielectric layer of the ceramic pedestal assembly and a routing layer of the ceramic pedestal assembly removed for clarity;

[0021] Figure 2b for Figure 2a a partial side cross-sectional view of a ceramic pedestal assembly including the routing layer;

[0022] Figure 2c is a partial side cross-sectional view of an alternative ceramic pedestal assembly including a resistive trace formed in a resistive layer of the ceramic pedestal assembly;

[0023] Figure 3a is a partial side cross-sectional view of a ceramic pedestal assembly constructed according to the present disclosure, with an alternative shaped aperture formed in a dielectric layer of the ceramic pedestal assembly and with a routing layer of the ceramic pedestal assembly removed for clarity;

[0024] Figure 3b for Figure 3a a partial side cross-sectional view of a ceramic pedestal assembly including the routing layer;

[0025] Figure 4a is a partial side cross-sectional view of an alternative ceramic pedestal assembly constructed in accordance with the present disclosure;

[0026] Figure 4b for Figure 4a A partial side cross-sectional view of a ceramic pedestal assembly having a planarization protection layer over a routing layer of the ceramic pedestal assembly;

[0027] Figure 5 A flow chart illustrating a method of forming a ceramic pedestal assembly according to the teachings of the present disclosure;

[0028] Figure 6 A perspective view of a plurality of through holes inserted into a substrate, wherein a dielectric layer is removed for clarity;

[0029] Figure 7 is a top view of the plurality of through holes inserted into the substrate, wherein the dielectric layer is removed for clarity;

[0030] Figure 8a for Figure 6 and Figure 7 A perspective view of a through hole shown;

[0031] Figure 8b for Figure 8a Another stereoscopic view of the through hole;

[0032] Figure 8c for Figure 8a A side view of a through hole;

[0033] Figure 8d for Figure 8a A top view of a through hole;

[0034] Figure 9a A perspective view of an alternative through hole constructed according to the present disclosure;

[0035] Figure 9b for Figure 9a a side view of a through hole; and

[0036] Fig.10 A flow chart illustrating a method of forming a ceramic pedestal assembly according to the teachings of the present disclosure is shown.

[0037] The drawings described herein are for illustration purposes only and are not intended to limit the scope of the present disclosure in any way. DETAILED DESCRIPTION

[0038] The following description is merely exemplary in nature and is not intended to limit the present disclosure, its application or uses. It should be understood that throughout the drawings, corresponding reference numerals indicate similar or corresponding components and features.

[0039] Reference Figure 1 A support pedestal 20 constructed in accordance with the teachings of the present disclosure is generally used in a semiconductor processing chamber to support and heat a heating target, such as a wafer, thereon. In an exemplary form, the support pedestal 20 includes a ceramic pedestal assembly or multilayer heater 22 and a tubular shaft 24 attached to a central region 23 of the pedestal assembly 22. The pedestal assembly 22 includes a top surface 25 for supporting a substrate, such as a wafer (not shown) thereon; and a bottom surface 27 to which the tubular shaft 24 is attached. The support pedestal 20 further includes a plurality of electrical / power leads 26 housed in the tubular shaft 24 for connecting at least one electrical element / layer embedded in the pedestal assembly 22 to an external power source. Depending on the application, the electrical layer may be a resistive heating layer, a temperature sensor, an electrode for an electrostatic chuck (ESC), or a radio frequency (RF) antenna, and combinations of the foregoing, among others.

[0040] Reference Figure 2a and 2b , a side cross-sectional view of a portion of a ceramic pedestal assembly 22 according to the teachings of the present disclosure. In this form, the ceramic pedestal assembly 22 includes a ceramic substrate 30, a resistor layer 32, a dielectric layer 34, and a routing layer 36 ( Figure 2b). The resistive layer 32 and the routing layer 36 are disposed on opposite surfaces of the dielectric layer 34 and in different planes. The resistive layer 32 is also disposed on an upper surface of the ceramic substrate 30 (that is, disposed between the ceramic substrate 30 and the dielectric layer 34) and generates heat. The resistive layer 32 may include a plurality of independently controllable resistive heating elements and may define one or more heating zones. The resistive layer 32 may be formed on the upper surface of the ceramic substrate 30 by, for example, physical vapor deposition (PVD), sputtering, thin foil, thermal spray deposition, or any method known in the art.

[0041] The dielectric layer 34 is disposed on the resistive layer 32 and between the resistive layer 32 and the routing layer 36. The dielectric layer 34 insulates the resistive layer 32 and the routing layer 36 and includes at least one aperture 38 in one form that exposes the resistive layer 32. As shown, the aperture 38 is shaped to define a variable circular cross-sectional area. However, it should be understood that the cross section may be another suitable shape other than circular (such as, for example, elliptical or polygonal) and should not be limited to a circular cross section as exemplified herein. The aperture 38 is shaped to have a lower end portion 40 and an upper end portion 42. The lower end portion 40 has an opening 44 that is smaller than an opening 46 of the upper end portion 42. The opening 44 of the lower end portion 40 is close to the resistive layer 32, while the opening 46 of the upper end portion 42 is close to the routing layer 36. The aperture 38 also defines a side wall 48 extending at an angle α between the lower end portion 40 and the upper end portion 42. In one form, the angle α is equal to or less than 45 degrees. As further shown in this form, the sidewall 48 increases in slope toward the center of the aperture 38 down to the resistive layer 32. The aperture 38 also has a smooth outside edge 50 in this form.

[0042] The routing layer 36 is disposed on the dielectric layer 34 and extends into the aperture 38 (that is, disposed on the sidewalls 48 of the aperture 38) and onto the exposed resistive layer 32. The routing layer 36 is disposed on the exposed resistive layer 32 in the central region of the aperture 38, so that an electrical connection is formed through a planar contact between the routing layer 36 and the resistive layer 32. In this manner, the routing layer 36 electrically connected to one or more of the cables 26 supplies electricity to one or more regions of the resistive layer 32. In this form, the resistive layer 32 is continuous in the region where the electrical connection is formed (that is, in the region where there is a planar contact between the routing layer 36 and the resistive layer 32). In some examples, such as Figure 2c As shown, the resistive layer 32 includes a plurality of resistive traces 37 and at least one of the resistive traces 37 extends near the lower end portion 40 of the aperture 38 and below the upper end portion 42. In this way, the resistive traces 37 can be more densely located in the area where the electrical connection is formed to reduce cold spots that may result from not actively heating the area where the electrical connection is formed.

[0043] Reference Figure 3a and 3b , a side cross-sectional view of a portion of a ceramic pedestal assembly 122 is shown according to the teachings of the present disclosure. The structure and function of the ceramic pedestal assembly 122 may be similar or identical to the pedestal assembly 22 described above, except for any exceptions mentioned below. The ceramic pedestal assembly 122 includes a ceramic substrate 130, a resistor layer 132, a dielectric layer 134, and a routing layer 136 ( Figure 3b ). The resistor layer 132 and the routing layer 136 are disposed on opposite surfaces of the dielectric layer 134 and in different planes. The resistor layer 132 is also disposed on an upper surface of the ceramic substrate 130 (that is, disposed between the ceramic substrate 130 and the dielectric layer 134) and generates heat. The resistor layer 132 can be formed on the upper surface of the ceramic substrate 130 by, for example, physical vapor deposition (PVD), sputtering, thin foil, thermal spray deposition, or any method known in the art.

[0044] The dielectric layer 134 is disposed on the resistor layer 132 and between the resistor layer 132 and the routing layer 136. The dielectric layer 134 substantially insulates the resistor layer 132 and the routing layer 136 and in one form includes at least one aperture 138 that exposes the resistor layer 132 and the ceramic substrate 130. The aperture 138 is formed to have a lower portion 140 and an upper portion 142. The lower portion 140 has an opening 144 that is smaller than an opening 146 of the upper portion 142. The opening 144 of the lower portion 140 is proximate to the resistor layer 132, while the opening 146 of the upper portion 142 is proximate to the routing layer 136. The aperture 138 also defines a side wall 148 having a first portion 148a and a second portion 148b. The first portion 148a has a linear surface and is positioned proximate to the routing layer 136. The first portion 148a also extends at an angle α between the lower portion 140 and the upper portion 142. The angle α may be equal to or less than 45 degrees. The second portion 148b has a nonlinear surface and is positioned adjacent to the resistive layer 132. In the example provided, the second portion 148b has an elliptical shape, however, in some forms, the second portion 148b may be another suitable shape (e.g., a spherical shape).

[0045] The routing layer 136 is disposed on the dielectric layer 134 and extends into the aperture 138 (ie, disposed on the first and second portions 148a, 148b of the sidewall 148). Figure 3b As shown, because the aperture 138 formed in the dielectric layer 134 extends through the resistive layer 132 and at least partially through the ceramic substrate 130, the resistive layer 132 may be discontinuous at an area near the aperture 138. The routing layer 136 disposed on the dielectric layer 134 may contact the resistive layer 132 along an annular region 150 thereof, thereby forming an electrical connection.

[0046] Reference Figure 4a and 4b , a side cross-sectional view of a portion of a ceramic pedestal assembly 222 is shown according to the teachings of the present disclosure. The structure and function of the ceramic pedestal assembly 222 may be similar or identical to the pedestal assemblies 22, 122 described above, except for any exceptions mentioned below. The ceramic pedestal assembly 222 includes a ceramic substrate 230, a resistor layer 232, a first dielectric layer 234, a routing layer 236, and a second dielectric layer 237. The structure and function of the ceramic substrate 230, the resistor layer 232, the first dielectric layer 234, and the routing layer 236 may be similar or identical to the ceramic substrate 30, the resistor layer 32, the dielectric layer 34, and the routing layer 236 described above, respectively, and therefore will not be described in detail.

[0047] The second dielectric layer 237 is disposed on the routing layer 236 and electrically and mechanically isolates the routing layer 236 from external influences. In one form, the second dielectric layer 237 is planarized using a subtractive process such as, for example, laser ablation, mechanical milling, chemical etching, water jetting, and combinations of the foregoing, among others. In this way, a flat surface is provided for subsequent assembly of a multi-layer heater engine.

[0048] Reference Figure 5 , a method 300 of forming a ceramic pedestal assembly as described above is illustrated in a schematic form. At 302, a resistive layer is formed on an upper surface of the ceramic substrate. The resistive layer can be formed on the upper surface of the ceramic substrate by, for example, physical vapor deposition (PVD), sputtering, thin foil, thermal spray deposition, or any method known in the art.

[0049] Next, at 306, a dielectric layer is formed over the resistive layer. The dielectric layer includes at least one aperture exposing the resistive layer. In one form, the aperture is formed by using a mask when forming the dielectric layer. In another form, the aperture is formed by removing areas of the dielectric layer using a subtractive process. The subtractive process is selected from the group consisting of laser ablation, mechanical milling, chemical etching, water jet, and combinations thereof. In this manner, the aperture is formed to have a lower portion, an upper portion, and a side wall extending at an angle between the lower portion and the upper portion. The lower portion has an opening that is smaller than an opening of the upper portion. The angle may be equal to or less than 45 degrees.

[0050] Finally, a routing layer is formed over the dielectric layer and extends into the aperture (that is, disposed on the sidewalls of the aperture) and onto the exposed resistive layer at 310. The routing layer may be formed using, for example, thermal spray deposition so that an electrical interconnect structure having a defined thickness is formed from the routing layer down to the resistive layer.

[0051] The method 300 is only one example of forming a ceramic pedestal assembly of the present disclosure and may include other or alternative steps. For example, in another form, the method 300 further includes removing at least a portion of the resistive layer ( Figure 3a and 3b ).

[0052] In yet another form, method 300 includes forming the orifice by first depositing and curing a liquid masking agent onto the resistive layer, applying the dielectric layer over the masking agent and the resistive layer, removing the masking agent, and then using a subtractive process to remove portions of the dielectric layer to form the orifice. The liquid masking agent may be, for example, a UV (ultraviolet) curable masking agent.

[0053] In yet another form, method 300 may include forming a protection layer above the routing layer and planarizing an upper surface of the protection layer. Figure 4b ).

[0054] Reference Figure 6 and Figure 7 , a multilayer heater 422 is illustrated. The multilayer heater 422 includes a ceramic substrate (not shown), a resistor layer 432, a dielectric layer (not shown), a routing layer (not shown), and a plurality of through holes 438. The resistor layer 432 and the routing layer are disposed on opposite surfaces of the dielectric layer and are disposed in different planes. The resistor layer 432 is also disposed on an upper surface of the ceramic substrate (that is, disposed between the ceramic substrate and the dielectric layer) and generates heat. The resistor layer 432 is in contact with the through hole 438 and includes a plurality of resistor traces 440. The resistor layer 432 can be formed on the upper surface of the ceramic substrate by, for example, physical vapor deposition (PVD), sputtering, thin foil, thermal spray deposition, or any method known in the art.

[0055] The dielectric layer (not shown) is disposed on the resistor layer 432 and between the resistor layer 432 and the routing layer. The dielectric layer substantially insulates the resistor layer 432 and the routing layer and in one form includes at least one aperture (not shown) exposing the resistor layer. The aperture is shaped to define a variable circular cross-sectional area. However, it should be understood that the cross section may be another suitable shape as described above and should not be limited to a circular cross section. The structure of the aperture may be similar or identical to the apertures 38, 138 described above, and therefore will not be described in detail. The routing layer is disposed on the dielectric layer and in contact with the through hole 438.

[0056] See also Figures 8a-8d, illustrating a through hole 438 among a plurality of through holes 438. Each through hole 438 extends from the resistive layer 432 through the dielectric layer and to the routing layer, thereby forming an electrical interconnection. Each through hole 438 includes a forming body 444 having a lower portion 446 and an upper portion 448. The lower portion 446 has a contact area that is smaller than a contact area of ​​the upper portion 448. For example, the lower portion 446 may have a contact area with an extended diameter of, for example, 1 millimeter (mm), while the upper portion 448 has a contact area with an extended diameter of, for example, 3 millimeters (mm). A length of the through hole 438 from the lower portion 446 to the upper portion 448 may be, for example, 300 micrometers (μm). The contact area of ​​the lower portion 446 is adjacent to a heating layer, while the contact area of ​​the upper portion 448 is adjacent to a routing layer. The forming body 444 has a varying circular cross-sectional area. In some configurations, the forming body 444 cross-sectional area may have a different shape. The body 444 includes a concave radius 450 extending around a perimeter and adjacent to the lower end portion 446 of the body 444. The body 444 also includes a convex radius 452 extending around a perimeter and adjacent to the upper end portion 448 of the body 444. Figure 6 and Figure 7 ) extends near the lower end portion 446 of the through hole 438 and below the upper end portion 448. In this way, the resistive traces 440 can be pulled in the area where the electrical interconnect is formed to reduce cold spots in the unheated area. One or more of the resistive traces 440 can be arranged in a circle around the through hole 438 (in Figure 7 438 and the surrounding portions of the circuitry on the resistive layer 432).

[0057] In some forms, such as Figure 8d As shown, the through hole 438 may have a cavity 460 filled with a conductive material such as tin 462, for example at the lower end portion 446, to facilitate electrical interconnection to other electromechanical components of the multi-layer heater 422. Such filling of the cavity 460 with tin 462 may be accomplished in a dedicated process, such as an ultrasonic welding process.

[0058] Reference Figure 9a and 9b , illustrating another through hole 538. Through hole 538 may be incorporated into multilayer heater 422 instead of or in addition to through hole 438. The structure and function of through hole 538 may be similar or identical to through hole 438, except for any exceptions noted below.

[0059] The through hole 538 includes a formation 544 having a lower portion 546 and an upper portion 548. The lower portion 546 has a contact area that is smaller than a contact area of ​​the upper portion 548. The contact area of ​​the lower portion 546 is close to a heating layer, while the contact area of ​​the upper portion 548 is close to a routing layer. The formation 544 of the through hole 538 also includes a plurality of independent segments 550 spaced apart from each other. It should be understood that although three segments are shown, the through hole 538 may include more or fewer independent segments 550. The spaces between the segments 550 are filled with conductive material, and thus the segmentation provides improved adhesion of subsequent layers. The through hole 538 also includes a certain redundancy, so that if one of the segments fails, the remaining segments can take over the current load.

[0060] Reference Fig.10 , a method 600 of forming a ceramic pedestal assembly as described above is illustrated in a schematic form. At 602, a resistive layer is formed on an upper surface of the ceramic substrate. The resistive layer may be formed on the upper surface of the ceramic substrate by, for example, physical vapor deposition (PVD), sputtering, thin foil, thermal spray deposition, or any method known in the art.

[0061] Next, at 606, a dielectric layer is formed over the resistive layer. The dielectric layer includes at least one aperture exposing the resistive layer. In one form, the aperture is formed by using a mask when forming the dielectric layer. In another form, the aperture is formed by removing areas of the dielectric layer using a subtractive process. The subtractive process is selected from the group consisting of laser ablation, mechanical milling, chemical etching, water jet, and combinations thereof. In this manner, the aperture is formed to have a lower portion, an upper portion, and a side wall extending at an angle between the lower portion and the upper portion. The lower portion has an opening that is smaller than an opening of the upper portion. The angle may be equal to or less than 45 degrees.

[0062] Next, a through hole is formed in the at least one opening of the dielectric layer at 610. The through hole contacts the resistive layer and may have a shape corresponding to the opening of the dielectric layer.

[0063] Finally, a routing layer is formed over the dielectric layer and in contact with the via, thereby forming an electrical interconnect at 614. The routing layer may be formed using, for example, thermal spray deposition.

[0064] It should be understood that the ceramic pedestal assembly is not limited to this particular multi-layer structure, and that the pedestal assembly may further include additional functional layers (e.g., bonding layers, dielectric layers, sensing layers, and protective layers, etc.) while still remaining within the scope of the present disclosure. In one example, the pedestal assembly further includes additional heating layers and routing layers, with interconnect structures buried between layers and interconnect structures reaching to the top of the heater configuration, where the interconnect structure may or may not serve as a terminal for further electrical contact of the heater construction (e.g., with or without through-holes or blind vias for electrical connection to external components).

[0065] The ceramic pedestal assembly of the present disclosure provides the benefit of an electrical interconnect having a shape that improves the thermal characteristics of the heater. The present disclosure also provides the benefit of improving the manufacturing process of the ceramic pedestal assembly (e.g., reducing the number of manufacturing steps while allowing the manufacturing process to be semi-automated or fully automated). The ceramic pedestal assembly of the present disclosure also provides the benefit of an electrical interconnect having a smooth outer edge, which provides high operational reliability, particularly when the routing layer is deposited using thermal spray deposition.

[0066] Unless otherwise expressly indicated herein, all numerical values ​​indicating mechanical / thermal properties, composition percentages, dimensions and / or tolerances, or other characteristics when describing the scope of the present disclosure should be understood to be modified by the word "about" or "approximately". Such modification is necessary for a variety of reasons including industrial implementation, material, manufacturing, and assembly tolerances, and testing capabilities.

[0067] As used herein, the phrase "at least one of A, B, and C" should be construed as a logical (A or B or C), using a non-exclusive logical "or", and should not be construed as "at least one A, at least one B, and at least one C."

[0068] The description of the present disclosure is merely exemplary in nature, and therefore, variations that do not depart from the essence of the present disclosure are intended to fall within the scope of the present disclosure. Such variations should not be regarded as departing from the spirit and scope of the present disclosure.

Claims

1. An electrical interconnect for connecting several layers of a multi-layer heater, the electrical interconnect comprising a formed body having a lower end portion and an upper end portion, wherein the lower end portion has a contact area smaller than a contact area of ​​the upper end portion, and the contact area of ​​the lower end portion is close to the heating layer, and the contact area of ​​the upper end portion is close to the routing layer.

2. The electrical interconnect of claim 1, wherein the formed body defines a varying circular cross-sectional area.

3. The electrical interconnect of claim 1, wherein the forming body includes a concave radius extending around the periphery and adjacent the lower end portion of the forming body.

4. The electrical interconnect of claim 1, wherein the forming body includes a convex radius extending around the periphery and adjacent the upper end portion of the forming body.

5. The electrical interconnect of claim 1, wherein the body defines a sidewall extending at an angle of no more than about 45 degrees between the lower end portion and the upper end portion.

6. The electrical interconnect of claim 1, wherein the formed body comprises a plurality of separate segments.

7. A multilayer heater comprising: Heating layer; a dielectric layer disposed above the heating layer; a routing layer disposed over the dielectric layer; and at least one through-hole extending from the heating layer, through the dielectric layer and to the routing layer, thereby forming an electrical interconnect, the at least through-hole comprising: A formed body having a lower portion and an upper portion, wherein the lower portion has a contact area smaller than a contact area of ​​the upper portion, and the contact area of ​​the lower portion is close to the heating layer, while the contact area of ​​the upper portion is close to the routing layer.

8. The multilayer heater of claim 7, wherein the heating layer comprises a plurality of resistive traces and at least one resistive trace extends near the lower end portion and below the upper end portion of the at least one through hole.

9. The multilayer heater of claim 7, wherein the shaped body defines a varying circular cross-sectional area.

10. The multilayer heater of claim 7, wherein the forming body includes a concave radius extending around a periphery of the forming body and adjacent the lower end portion.

11. The multilayer heater of claim 7, wherein the forming body includes a convex radius extending around a periphery of the forming body and adjacent the upper end portion.

12. The multilayer heater of claim 7, wherein the formed body comprises a plurality of independent sections.

13. The multilayer heater of claim 7, wherein the at least one through-hole defines a sidewall that extends through the dielectric layer at an angle of no more than about 45 degrees.

14. The multilayer heater of claim 7, wherein the at least one through hole extends at least partially into the heating layer.

15. A multilayer heater comprising: Heating layer; a dielectric layer disposed above the heating layer, the dielectric layer comprising at least one aperture exposing the heating layer; and a routing layer disposed over the dielectric layer and extending into the aperture and onto the heating layer, The orifice is formed to have a lower portion and an upper portion, wherein the lower portion has an opening smaller than an opening of the upper portion, and the opening of the lower portion is proximate to the heating layer, while the opening of the upper portion is proximate to the routing layer.

16. The multilayer heater of claim 15, further comprising a protection layer formed over the routing layer.

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