Solar cell and photovoltaic module

Abstract

A solar cell includes a silicon substrate, a first passivation film, and a second passivation film. The silicon substrate includes a first surface, a second surface opposite to the first surface, and a side surface connecting the first surface and the second surface. The first passivation film is located on the first surface. And the tunneling oxide layer, the doped polycrystalline silicon layer and the second passivation film are sequentially arranged on the second surface from inside to outside. The second passivation film partially covers the surface, away from the silicon substrate, of the doped polycrystalline silicon layer. The second passivation film extends from the periphery of the silicon substrate to the center of the silicon substrate to form a ring shape. The ratio of the thickness of the first passivation film to the thickness of the second passivation film is 1.5-6. The utility model also provides a photovoltaic module comprising the solar cell. According to the solar cell provided by the invention, the original preparation process route is not changed, and only adaptive adjustment is carried out on the winding plating passivation film, so that the winding plating passivation film can be matched with the non-uniform doping concentration of the passivation contact layer, and the effect of improving the conversion efficiency and the yield of a cell product is achieved.

Description

Technical Field

[0001] The present application relates to the field of photovoltaic technology, and more specifically, to a solar cell and a photovoltaic module including the solar cell. Background Art

[0002] Tunnel Oxide Passivating Contacts (TOPCon) cells are a type of photovoltaic crystalline silicon cells. TOPCon cells form an extremely thin silicon oxide layer (i.e., tunnel oxide layer) on the back of the silicon wafer, and then form a layer of phosphorus-doped microcrystalline amorphous mixed silicon film. The mixed silicon film is transformed into polycrystalline during the annealing process. The silicon oxide layer and the phosphorus-doped polycrystalline silicon film together form a passivation contact layer on the back of the silicon substrate. However, in the process of depositing the back passivation contact layer, due to the influence of the uneven thermal field distribution inside the furnace tube, the phosphorus source used for doping decomposes too quickly in the back edge area of ​​the silicon substrate during the deposition process, which will cause the phosphorus concentration in the back edge area to be too high, while the phosphorus concentration near the center is low. The high concentration of phosphorus source will cause the density of the passivation contact layer at the edge to deteriorate, thereby causing the corrosion resistance of the passivation contact layer in the edge area to deteriorate. In the subsequent process of forming metal and semiconductor contact, the edge area is prone to burn through too deep, resulting in increased metal recombination at the edge, a rapid drop in the open circuit voltage of the battery, and the destruction of the tunnel passivation structure. Its carrier transport will also deteriorate, resulting in a significant drop in the fill factor, affecting the battery efficiency. Utility Model Content

[0003] In view of this, the present application provides a solar cell, comprising:

[0004] A silicon substrate comprising a first surface, a second surface opposite to the first surface, and a side surface connecting the first surface and the second surface;

[0005] A first passivation film, located on the first surface;

[0006] A tunneling oxide layer, a doped polysilicon layer, and a second passivation film are sequentially arranged on the second surface from inside to outside;

[0007] A second passivation film partially covers a surface of the doped polysilicon layer outside the second surface that is away from the silicon substrate, and the second passivation film extends from the periphery of the silicon substrate to the center of the silicon substrate to form a ring;

[0008] The ratio of the thickness of the first passivation film to the thickness of the second passivation film is 1.5-6.

[0009] In the normal preparation process of the passivation contact battery of the present application, while depositing the passivation film (aluminum oxide) on the first surface (front), the thickness and expansion width of the passivation film (aluminum oxide) on the second surface (back) are regulated from the process point of view, so that the corrosion resistance of the passivation film to the slurry is utilized in the subsequent metallization process. The passivation film can inhibit corrosion to a certain extent, thereby controlling the corrosion depth of the high-concentration doped area at the edge not to be too deep, so as to ensure good ohmic contact and reduce metal recombination, thereby ensuring that the battery has a higher efficiency. The passivation technology battery solution of the present application does not change the original process route, but only makes adaptive adjustments to the passivation film (aluminum oxide) so that it can match the uneven doping concentration of the passivation contact layer, thereby improving the conversion efficiency and yield rate of the battery product. Because the back passivation film is only partially set, the thickness needs to be controlled, otherwise it will cause the appearance of color difference on the back, black EL edge and other defective films. The first passivation film is set to a regular thickness to meet the passivation requirements. When the thickness of the first passivation film is 1.5-6 times the thickness of the second passivation film, the color of the second passivation film itself will not be particularly obvious and will have a large color difference that affects the appearance. It can also achieve the regulation of the slurry corrosion depth during the metallization process, and can also passivate the defects on the edge of the battery cell. In the actual process, the type of passivation film and the looseness of the edge of the doped polysilicon layer can be matched according to different situations. Here, the thickness of the first passivation film and the thickness of the second passivation film are the thickness values ​​measured at a plurality of randomly selected measurement points on the first passivation film and the second passivation film, and the average value is taken as the thickness of the first passivation film and the thickness of the second passivation film respectively.

[0010] In some embodiments, the thickness of the second passivation film decreases from the periphery of the silicon substrate toward the center of the silicon substrate. There are holes and defects caused by over-etching at the edge of the cell, and these holes or defects are more distributed at the periphery of the silicon substrate, so the thickness of the second passivation film required is thicker as it is closer to the periphery of the silicon substrate.

[0011] In some embodiments, the ratio of the thickness of the first passivation film to the edge thickness of the second passivation film is 2-3.5, and the edge thickness of the second passivation film refers to the thickness of the area of ​​the second passivation film extending from the periphery of the silicon substrate to the center of the silicon substrate, which accounts for 1 / 3-2 / 3 of the total width.

[0012] In some embodiments, the edge thickness of the second passivation film is in the range of 1.7 nm to 3.3 nm. The thickness of the second passivation film is controlled within this range to effectively control the color difference.

[0013] In some embodiments, the second passivation film extends from the periphery of the silicon substrate to the center of the silicon substrate to form a regular ring, and the contour line of the second passivation film close to the center of the silicon substrate is a rectangle. The rectangle includes a regular rectangle and a quasi-rectangle (such as a rounded rectangle, a cut-corner rectangle, a curved rectangle, etc.).

[0014] In some embodiments, the silicon substrate is rectangular, and the width of the second passivation film extending from the four sides of the silicon substrate to the center of the silicon substrate is smaller than the width of the second passivation film extending from the top corner of the silicon substrate to the center of the silicon substrate. The area distribution of the defect holes existing at the top corner of the silicon substrate is wider and more dispersed than that at the four edges, and the second passivation film at the top corner of the silicon substrate needs to be wider than that at the four sides of the silicon substrate.

[0015] In some embodiments, the ratio of the width of the second passivation film extending from the top corner of the silicon substrate to the center of the silicon substrate to the width of the second passivation film extending from the four sides of the silicon substrate to the center of the silicon substrate is 1.2-2.3. The distribution area of ​​the second passivation film needs to be controlled, because a passivation film that is too wide will affect the absorption of light, or cause color difference, or lead to the production of defective cells. Therefore, controlling it within the above ratio range can ensure effective passivation of defects at the top corners and four sides without affecting the appearance and performance of the cell.

[0016] In some embodiments, the width of the second passivation film extending from the four sides of the silicon substrate to the center of the silicon substrate is 5.4±0.8 mm;

[0017] The width of the second passivation film extending from the top corner of the silicon substrate to the center of the silicon substrate is 8.8±1.1 mm.

[0018] In some embodiments, an additional passivation film is formed on the side surface.

[0019] In some embodiments, the silicon substrate is an N-type silicon substrate, the solar cell further includes a P-type doped layer, the P-type doped layer is located between the silicon substrate and the first passivation film, and the doped polysilicon layer is an N-type doped polysilicon layer; or, the silicon substrate is a P-type silicon substrate, the solar cell further includes an N-type doped layer, the N-type doped layer is located between the silicon substrate and the first passivation film, and the doped polysilicon layer is a P-type doped polysilicon layer;

[0020] The solar cell further includes an anti-reflection film, which covers a surface of the first passivation film facing away from the silicon substrate, and a surface of the second passivation film and the doped polysilicon layer facing away from the silicon substrate.

[0021] The present application also provides a photovoltaic assembly, comprising at least one of the above-mentioned solar cells. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 is a schematic cross-sectional view of a solar cell according to an embodiment of the present application.

[0023] Figure 2 is a schematic diagram of the second surface of a solar cell.

[0024] Figure 3 This is a schematic diagram of the placement of silicon wafers during the preparation of a solar cell according to an embodiment of the present application.

[0025] Description of main component symbols:

[0026] Solar cell 100

[0027] Silicon substrate 10

[0028] P-type doped layer 20

[0029] First passivation film 30A

[0030] Tunneling oxide layer 40

[0031] N-type doped polysilicon layer 50

[0032] Second passivation film 30B

[0033] First surface 11

[0034] Second surface 12

[0035] Side surface 13

[0036] Side passivation film 30C

[0037] Anti-reflection film 60

[0038] Vehicle 200 DETAILED DESCRIPTION

[0039] The preparation method of the solar cell of the present application, especially the preparation method of TOPCon solar cell, adopts atomic layer deposition method. By setting the placement method of silicon wafers in the coating chamber (a pair of silicon wafers placed back to back in a single slot), not only can a layer of aluminum oxide with uniform thickness be deposited on the front of the cell, but also the thickness and size of the aluminum oxide plated around the edge area of ​​the back of the cell can be controlled. In this way, due to the coverage of the aluminum oxide passivation film, the tunneling passivation structure in the edge area is prevented from being corroded too deeply, thereby reducing metal composite losses and preventing the tunneling passivation structure from being destroyed, thereby ensuring that the battery has a higher efficiency.

[0040] The present application provides a solar cell. The solar cell may be a TOPCon solar cell. Figure 1, the solar cell 100 includes a silicon substrate 10 , a first passivation film 30A and a second passivation film 30B.

[0041] The silicon substrate 10 is an N-type silicon substrate, including a first surface 11, a second surface 12 opposite to the first surface 11, and a side surface 13 connecting the first surface 11 and the second surface 12. In the embodiment of the present application, the first surface 11 is the front surface, and the second surface 12 is the back surface. Figure 1 Not shown, the first surface 11 is actually a relatively uneven velvet surface. The first passivation film 30A is located on the first surface 11. The second passivation film 30B is located on the second surface 12 and partially covers the second surface 12. The thickness of the second passivation film 30B is less than the thickness of the first passivation film 30A. The ratio of the thickness of the first passivation film 30A to the thickness of the second passivation film 30B is 1.5-6.

[0042] In the present application, the coverage area of ​​the first passivation film 30A covering the first surface 11 is greater than the coverage area of ​​the second passivation film 30B covering the second surface 12. In some embodiments, the first passivation film 30A completely covers the first surface 11.

[0043] Because the second passivation film 30B on the back is only partially set, the thickness needs to be controlled, otherwise it will cause the appearance of color difference on the back, blackening of the EL edge and other defective films. The first passivation film 30A is set to a regular thickness to meet the passivation requirements. When the thickness of the first passivation film 30A is 1.5-6 times the thickness of the second passivation film 30B, the color of the second passivation film 30B itself will not be particularly obvious and will have a large color difference that affects the appearance. It can also achieve the regulation of the slurry corrosion depth during the metallization process, and can also passivate the defects on the edge of the battery cell. In the actual process, it can be matched according to the type of passivation film and the looseness of the edge of the doped polysilicon layer. Here, the thickness of the first passivation film 30A and the thickness of the second passivation film 30B are the thickness values ​​randomly selected from multiple measurement points on the first passivation film 30A and the second passivation film 30B, respectively, and the average value is taken as the thickness of the first passivation film 30A and the thickness of the second passivation film 30B.

[0044] In the embodiment of the present application, the solar cell 100 further includes a P-type doped layer 20, a tunneling oxide layer 40, and an N-type doped polysilicon layer 50. The P-type doped layer 20 is located on the first surface 11. The P-type doped layer 20 and the first passivation film 30A are located on the first surface 11 from the inside to the outside. That is, the first passivation film 30A is located on the side of the P-type doped layer 20 away from the silicon substrate 10; the P-type doped layer 20 is located between the silicon substrate 10 and the first passivation film 30A. The tunneling oxide layer 40, the N-type doped polysilicon layer 50, and the second passivation film 30B are located on the second surface 12 from the inside to the outside. The second passivation film 30B partially covers the surface of the N-type doped polysilicon layer 50 away from the silicon substrate 10. The N-type doped polysilicon layer 50 is located between the tunneling oxide layer 40 and the second passivation film 30B.

[0045] It can be understood that the side surface 13 is covered with a side passivation film 30C. The side passivation film 30C completely covers the side surface 13. The side passivation film 30C on the side surface 13 connects the first passivation film 30A and the second passivation film 30B.

[0046] In the embodiment of the present application, the element doped in the P-type doped layer 20 is boron. The element doped in the N-type doped polysilicon layer 50 is phosphorus. The first passivation film 30A, the second passivation film 30B and the side passivation film 30C are all made of aluminum oxide.

[0047] The thickness of the first passivation film 30A is more uniform than that of the second passivation film 30B, and the thickness range of the first passivation film 30A is 5.9±0.4nm (e.g., 5.9nm, 6nm, 6.2nm, 6.3nm). The thickness of the second passivation film 30B decreases along the periphery of the silicon substrate 10 toward the center of the silicon substrate 10. There are defects caused by holes and over-etching at the edge of the battery cell, and these holes or defects are more distributed at the periphery of the silicon substrate 10, so the closer to the periphery of the silicon substrate 10, the thicker the thickness of the second passivation film 30B is required. The thickness range of the edge area of ​​the second passivation film 30B is 1.7nm-3.3nm, (e.g., 1.7nm, 1.9nm, 2.0nm, 2.1nm, 2.2nm, 2.3nm, 2.4nm, 2.6nm, 2.9nm, 3.1nm, 3.3nm). Further, the thickness range of the edge area of ​​the second passivation film 30B is 1.9nm-3.1nm. The thickness of the second passivation film 30B gradually decreases from the edge thickness range of 1.7 nm to 3.3 nm toward the center of the silicon substrate 10. The thickness of the second passivation film 30B is controlled within this range to effectively control the color difference.

[0048] In some embodiments, the ratio of the thickness of the first passivation film 30A to the edge thickness of the second passivation film 30B is 2-3.5. The edge thickness of the second passivation film 30B refers to the thickness of the area where the width of the second passivation film 30B extending from the periphery of the silicon substrate 10 to the center of the silicon substrate 10 accounts for 1 / 3-2 / 3 of the total width. For example, the edge thickness of the second passivation film 30B refers to the thickness of the area where the width of the second passivation film 30B extending from the periphery of the silicon substrate 10 to the center of the silicon substrate 10 accounts for 1 / 2 of the total width. The defects caused by the edge holes and over-etching of the second surface 12 of the battery cell, and the excessive thickness and area of ​​the passivation film on the back side will lead to the appearance color difference of the back side, the blackening of the EL edge, etc., so it is necessary to control the thickness of the back side passivation film, which can not only ensure the depth of the tunnel passivation structure being corroded, but also effectively passivate the defects and edge holes, improve the battery performance, and will not bring adverse effects.

[0049] The thickness of the second passivation film 30B in the region where the width extending from the periphery of the silicon substrate 10 to the center of the silicon substrate 10 accounts for 1 / 3-2 / 3 of the total width means that the position of the measurement point can be selected according to the actual width of the second passivation film 30B. When the width allows, the measurement point can be located in the region where the width extending from the periphery of the silicon substrate 10 to the center of the silicon substrate 10 accounts for 1 / 3 of the total width. When the overall width is narrow and does not meet the measurement requirements, the measurement point can be located in the region where the width extending from the periphery of the silicon substrate 10 to the center of the silicon substrate 10 accounts for 2 / 3 of the total width. When other widths allow, the measurement point can also be located in the region where the width extending from the periphery of the silicon substrate 10 to the center of the silicon substrate 10 accounts for 1 / 2 of the total width.

[0050] In some embodiments, although not shown in the figure, the direction in which the second passivation film 30B extends from the periphery of the silicon substrate 10 to the center of the silicon substrate 10 is divided into three regions according to the width, namely, the first region, the second region, and the third region connected in sequence, the first region surrounds and connects the second region, and the second region surrounds and connects the third region. The first region is a region extending from the periphery of the silicon substrate 10 to the center of the silicon substrate 10, and the width accounts for 1 / 3 of the total width of the second passivation film 30B. The second region is a region extending from the periphery of the first region to the center of the silicon substrate 10, and the width accounts for 1 / 3 of the total width of the second passivation film 30B. The third region is a region extending from the periphery of the second region to the center of the silicon substrate 10, and the width accounts for 1 / 3 of the total width of the second passivation film 30B. The thickness of the first region>the thickness of the second region>the thickness of the third region.

[0051] In some embodiments, the thickness of the first passivation film 30A is greater than the thickness of the side passivation film 30C.

[0052] In some embodiments, the thickness of the passivation film at the intersection of the first passivation film 30A and the side passivation film 30C is less than the thickness of the first passivation film 30A; and / or, the thickness of the passivation film at the intersection of the first passivation film 30A and the side passivation film 30C is less than the thickness of the side passivation film 30C near the second surface 12. The film thickness can be detected by general means, such as using an ellipsometer.

[0053] like Figure 2 As shown, in some embodiments, the second passivation film 30B extends from the periphery of the silicon substrate 10 to the center of the silicon substrate 10 to form a regular ring with a certain width. The contour line of the second passivation film 30B close to the center of the silicon substrate 10 is a rectangle. The rectangle in the present application includes a conventional rectangle and a quasi-rectangle (such as a rounded rectangle, a cut-corner rectangle, a curved rectangle, etc.).

[0054] In some embodiments, the second passivation film 30B may also be formed in an irregular ring shape. For example, the contour line of the second passivation film 30B close to the center of the silicon substrate 10 is an irregular curve.

[0055] The width of the second passivation film 30B extending from the four sides of the silicon substrate 10 to the center of the silicon substrate 10 is smaller than the width of the second passivation film 30B extending from the top corner of the silicon substrate 10 to the center of the silicon substrate 10. The area distribution of the defect holes existing at the top corner of the silicon substrate 10 is wider and more dispersed than that at the four edges, and the second passivation film 30B located at the top corner of the silicon substrate 10 needs to be wider than that at the four sides of the silicon substrate 10.

[0056] The ratio of the width of the second passivation film 30B extending from the top corner of the silicon substrate 10 to the center of the silicon substrate 10 to the width of the second passivation film 30B extending from the four sides of the silicon substrate 10 to the center of the silicon substrate 10 is 1.2-2.3. The distribution area of ​​the second passivation film 30B needs to be controlled, because a too wide passivation film will affect the absorption of light, or cause color difference, or lead to the production of defective cells, so controlling it within the above ratio range can ensure effective passivation of the top corners and four side defects without affecting the appearance and performance of the battery cell.

[0057] In the embodiment of the present application, the silicon substrate 10 is rectangular, and the width of the second passivation film 30B extending from the four edges of the silicon substrate 10 to the center of the silicon substrate 10 is 5.4±0.8mm. The width of the second passivation film 30B extending from the top corner of the silicon substrate 10 to the center of the bottom of the silicon substrate 10 is 8.8±1.1mm. The corner area of ​​the silicon substrate 10 has more defects, a larger area, and a poorer density of the passivation contact layer. Therefore, the corner area requires a larger extension width of the passivation film to meet the demand. The solar cell 100 also includes an anti-reflection film 60 located on the first surface 11 side and the second surface 12 side. The anti-reflection film 60 covers the surface of the first passivation film 30A away from the silicon substrate 10, the second passivation film 30B and the surface of the N-type doped polysilicon layer 50 away from the silicon substrate 10.

[0058] Although not shown, the solar cell 100 further includes other components, such as electrodes formed of a conductive paste.

[0059] In the normal preparation process of the passivation contact battery of the present application, while depositing the passivation film (aluminum oxide) on the first surface (front), the thickness and expansion width of the passivation film (aluminum oxide) on the second surface (back) are regulated from the process point of view, so that the corrosion resistance of the passivation film on the second surface (back) to the slurry is utilized in the subsequent metallization process. The passivation film can inhibit corrosion to a certain extent, thereby controlling the corrosion depth of the high-concentration doped area at the edge not to be too deep, so as to ensure good ohmic contact and reduce metal recombination, thereby ensuring that the battery has a higher efficiency. The passivation technology battery solution of the present application does not change the original process route, but only makes adaptive adjustments to the passivation film (aluminum oxide) so that it can match the uneven doping concentration of the passivation contact layer, thereby improving the conversion efficiency and yield rate of the battery product.

[0060] It is understandable that the silicon substrate 10 is not limited to an N-type silicon substrate. In some embodiments, the silicon substrate 10 can be replaced with a P-type silicon substrate, then the P-type doped layer 20 needs to be replaced with an N-type doped layer, and the N-type doped polysilicon layer 50 needs to be replaced with a P-type doped polysilicon layer, and the N-type doped layer is located between the silicon substrate 10 and the first passivation film 30A. The tunneling oxide layer 40, the P-type doped polysilicon layer and the second passivation film 30B are sequentially located on the second surface 12 from the inside to the outside. The anti-reflection film 60 covers the surface of the first passivation film 30A away from the silicon substrate 10, the second passivation film 30B and the surface of the P-type doped polysilicon layer away from the silicon substrate 10.

[0061] Compared with the solar cell without aluminum oxide passivation film formed by coating on the second surface (back side) (before optimization), the solar cell of the present application has been optimized and improved in terms of open circuit voltage, conversion efficiency, photoluminescence brightness, metal J0 (dark state saturation current density of metal contact area) recombination loss, etc. Compared with before optimization, the open circuit voltage of the solar cell of the present application can be increased by 0.5-1mV, the conversion efficiency can be increased by 0.05%-0.15%, and the light intensity is 96mW / cm under the atmospheric factor of AM1.5G. 2 ) The photoluminescence brightness is increased by 500-700, and J0 decreases (during the metallization process, the high doping concentration area at the edge of the passivation contact layer is protected by the aluminum oxide passivation film, and the corrosion resistance of the slurry is enhanced, thereby reducing the corrosion depth of the edge area and reducing the metal J0 composite loss).

[0062] In the step of depositing the passivation film of the present application, a pair of silicon substrates 10 are placed back to back in a receiving groove, so that the passivation film is deposited completely on the front side and partially on the back side. The process is simple, the production capacity is large, and the equipment investment is low.

[0063] The present application also provides a photovoltaic module (not shown) including at least one of the above-mentioned solar cells 100 , for example, including at least two of the above-mentioned solar cells 100 spliced ​​to each other.

[0064] The method for preparing a solar cell comprises the following steps S1 to S10.

[0065] S1: Cleaning and texturing the silicon substrate.

[0066] The silicon substrate includes a first surface, a second surface opposite to the first surface, and a side surface connecting the first surface and the second surface. In the embodiment of the present application, the first surface is the front side of the silicon substrate, and the second surface is the back side of the silicon substrate. The silicon substrate is an N-type silicon substrate, and the N-type silicon substrate is doped with an N-type doping element, and the N-type doping element can be at least one of the five group elements such as phosphorus (P), bismuth (Bi), antimony (Sb), and arsenic (As).

[0067] The purpose of texturing on the surface of the silicon substrate is to remove the mechanical damage layer on the surface of the silicon substrate, remove surface oil and impurity particles, form an undulating velvet structure, increase the surface area of ​​the silicon substrate, increase the absorption of sunlight, and reduce the reflection of sunlight.

[0068] In the embodiment of the present application, the first surface (front) is a velvet surface with a velvet height of 0-3 μm and a reflectivity of 7.0%-10.5%; the second surface (back) is a polished surface with a back polishing reflectivity of ≥41%. The height of the tower base on the back is 0.10 μm-0.25 μm, and the lateral size of the tower base on the back is 6 μm-12 μm.

[0069] S2: Boron diffusion is performed on the silicon substrate.

[0070] The impurity element boron is diffused on the side where the first surface of the silicon substrate is located. The boron source can be selected from one or more precursors such as BCl3, BBr3, B2H6, trimethyl boron, etc. During the boron diffusion process, a P-type doping layer (boron diffusion layer) is formed at a certain depth inward on the surface of the silicon substrate (including the first surface, the second surface and the side surface), and a borosilicate glass (BSG) layer is formed on the outermost side of the silicon substrate due to the high concentration of boron.

[0071] S3: Use laser to process the position where the gate line is to be formed later to form a selective emitter.

[0072] The purpose of step S3 is to perform high-concentration doping at the contact point between the subsequent metal gate line and the silicon substrate and its vicinity to reduce the contact resistance between the metal electrode and the silicon substrate; and to perform low-concentration doping in the area outside the electrode to reduce the recombination of the diffusion layer. By optimizing the emitter, the output current and voltage of the solar cell are increased, thereby increasing the photoelectric conversion efficiency.

[0073] S4: performing oxidation treatment on the silicon substrate.

[0074] The function of step S2 is that the boron diffusion is controlled to be performed within a first temperature range, and the oxidation treatment is controlled to be performed within a second temperature range, and the second temperature range is greater than the first temperature range. In some embodiments, the first temperature range is 700°C-900°C, and the second temperature range is 950°C-1050°C.

[0075] S5: removing the boron-doped diffusion layer and the borosilicate glass (BSG) layer on the second surface and the side surface of the silicon substrate.

[0076] S6: forming a tunneling oxide layer and a doped polysilicon layer on the second surface of the silicon substrate.

[0077] In some embodiments, a tunneling oxide layer and an intrinsic amorphous silicon layer are first formed sequentially from the inside to the outside on the side where the second surface is located, and then phosphorus diffusion is performed on the side where the second surface is located, so that the intrinsic amorphous silicon layer is converted into a doped polysilicon layer. Since the silicon substrate is an N-type silicon substrate, the doping element in the doped polysilicon layer can be an N-type doping element, for example, the doping element is phosphorus. The tunneling oxide layer is silicon oxide.

[0078] When LPCVD is performed on the side where the second surface is located, an intrinsic amorphous silicon layer will be generated on the first surface and the side surface. When phosphorus diffusion is performed on one side of the second surface, at least a portion of the intrinsic amorphous silicon layer will be converted into a polycrystalline silicon layer doped with phosphorus on the first surface and the side surface. In addition, the polycrystalline silicon layer on the first surface and the side surface and the outermost side of the doped polycrystalline silicon layer on the second surface will form a phosphosilicate glass (PSG) layer due to the high phosphorus content.

[0079] S7: remove the polysilicon and BSG coated on the first surface and the PSG on the second surface.

[0080] This step can be performed by etching using a tank machine containing an etching solution to remove the polysilicon and BSG on the first surface and the PSG on the second surface.

[0081] S8: The silicon substrates are placed back to back to deposit a passivation film.

[0082] In step S8, a passivation film is deposited by atomic layer deposition, and the passivation film is aluminum oxide.

[0083] Step S8 specifically includes: providing a carrier 200 for loading a silicon substrate, such as Figure 3 As shown, a plurality of receiving grooves (not shown) are provided on the carrier 200, and a pair of silicon substrates 10 with the second surfaces 12 relatively fitted (back to back) are placed in each receiving groove, so that the first surface 11 of the silicon substrate 10 is relatively exposed; the carrier is pushed into the cavity of atomic layer deposition, and reaction gas and dilution gas are introduced into the cavity so that the reaction gas reacts to form aluminum oxide deposited on the surface of the silicon substrate. The reaction gas is evenly distributed in the cavity under the carrying of the dilution gas. An air inlet and an air exhaust port are provided in the cavity, the air inlet is used to pass gas, and the air outlet is used to extract gas. During the deposition process, while the reaction gas and dilution gas are introduced into the air inlet, the gas needs to be extracted through the air outlet.

[0084] The carrier 200 may be a metal boat or a graphite boat. The silicon substrates 10 are placed back to back, with each receiving slot containing a pair of back to back silicon substrates 10. Since the silicon substrates 10 are arranged back to back, most of the aluminum oxide will be deposited on the first surface 11 (front), and aluminum oxide will only be deposited on the edge area of ​​the second surface 12 (back). The reaction gas may be O3, H2O, and trimethylaluminum (TMA). The diluent gas may be nitrogen, an inert gas, etc.

[0085] The passivation film formed on the first surface side is evenly distributed on the entire first surface, that is, completely covers the first surface. The thickness of the passivation film on the first surface is uniform and the thickness range is 5.9±0.4 nm.

[0086] The passivation film formed on the second surface side extends a certain width along the periphery of the silicon substrate toward the center of the silicon substrate to form a ring, that is, the passivation film on the second surface partially covers the second surface. The thickness of the passivation film on the second surface gradually decreases from a thickness range of 2.1 ± 0.2 nm. In step S8, the shape / size and thickness of the passivation film formed on the second surface can be controlled by controlling the air pressure in the deposition chamber during the aluminum oxide deposition process and / or setting a baffle. For example, the second passivation film is formed into a regular ring, and the contour line of the second passivation film close to the center of the silicon substrate is a rectangle.

[0087] The side surface is also covered with a side passivation film, and the side passivation film completely covers the side surface.

[0088] In the embodiment of the present application, the silicon substrate 10 is rectangular, and the width of the second passivation film extending from the four edges of the silicon substrate to the center of the silicon substrate is 5.4±0.8 mm. The width of the second passivation film extending from the top corner of the silicon substrate to the center of the silicon substrate is 8.8±1.1 mm.

[0089] S9: Depositing an anti-reflection film on both the first surface and the second surface.

[0090] Anti-reflection film has the function of reducing reflection and increasing transmission.

[0091] In some embodiments, the anti-reflection film is a silicon nitride film.

[0092] S10: forming metal grid lines on the first surface and the second surface of the silicon substrate to form a solar cell.

[0093] The surface gate line position of the silicon substrate is the electrode position, the contact part between the electrode and the silicon substrate is a heavily doped p++ region, and the area between the electrodes is a lightly doped p+ layer.

[0094] In some embodiments, step S10 includes printing a conductive metal paste on both the first surface and the second surface, curing the conductive metal paste by sintering to form a metal grid line, and making the metal atoms in the conductive metal paste contact the silicon substrate. It can be understood that the conductive metal paste can be cured by sintering to form a metal grid line combined with the silicon substrate. The conductive metal paste is printed on the anti-reflection film, and the metal atoms in the conductive metal paste will pass through the passivation film and the anti-reflection film and contact the silicon substrate during the sintering process. The conductive metal paste can be silver paste, copper paste, etc., but is not limited to this. In some embodiments, a plurality of conductive metals are mixed in the conductive metal paste. The printing method of the conductive metal paste can be screen printing or laser pattern transfer, etc., but is not limited to this.

[0095] In the normal preparation process of the passivation contact battery of the present application, while depositing the passivation film (aluminum oxide) on the first surface (front), the thickness and expansion width of the passivation film (aluminum oxide) on the second surface (back) are regulated from the process point of view, so that the corrosion resistance of the passivation film to the slurry is utilized in the subsequent metallization process. The passivation film can inhibit corrosion to a certain extent, thereby controlling the corrosion depth of the high-concentration doped area at the edge not to be too deep, so as to ensure good ohmic contact and reduce metal recombination, thereby ensuring that the battery has a higher efficiency. The passivation technology battery solution of the present application does not change the original process route, but only makes adaptive adjustments to the passivation film (aluminum oxide) so that it can match the uneven doping concentration of the passivation contact layer, thereby improving the conversion efficiency and yield rate of the battery product.

[0096] The above implementation modes are only used to illustrate the technical solutions of the present application and are not intended to limit the present application. Although the present application has been described in detail with reference to the above preferred implementation modes, a person skilled in the art should understand that the technical solutions of the present application may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present application.

Claims

1. A solar cell, characterized in that: include: A silicon substrate comprising a first surface, a second surface opposite to the first surface, and a side surface connecting the first surface and the second surface; A first passivation film, located on the first surface; A tunneling oxide layer, a doped polysilicon layer, and a second passivation film are sequentially arranged on the second surface from inside to outside; A second passivation film partially covers a surface of the doped polysilicon layer away from the silicon substrate, wherein the second passivation film extends from the periphery of the silicon substrate to the center of the silicon substrate to form a ring; The ratio of the thickness of the first passivation film to the thickness of the second passivation film is 1.5-6.

2. The solar cell according to claim 1, characterized in that: The thickness of the second passivation film decreases along the periphery of the silicon substrate toward the center of the silicon substrate.

3. The solar cell according to claim 2, characterized in that: The ratio of the thickness of the first passivation film to the edge thickness of the second passivation film is 2-3.5, and the edge thickness of the second passivation film refers to the thickness of the area of ​​the second passivation film extending from the periphery of the silicon substrate to the center of the silicon substrate, which accounts for 1 / 3-2 / 3 of the total width.

4. The solar cell according to claim 2, characterized in that: The edge thickness of the second passivation film ranges from 1.7nm to 3.3nm, and the edge thickness of the second passivation film refers to the thickness of the second passivation film extending from the periphery of the silicon substrate to the center of the silicon substrate, which accounts for 1 / 3 to 2 / 3 of the total width.

5. The solar cell according to claim 1, characterized in that: The second passivation film extends from the periphery of the silicon substrate to the center of the silicon substrate to form a regular ring shape, and the contour line of the second passivation film close to the center of the silicon substrate is a rectangle.

6. The solar cell according to claim 1, characterized in that The silicon substrate is rectangular, and a width of the second passivation film extending from four sides of the silicon substrate to the center of the silicon substrate is smaller than a width of the second passivation film extending from a vertex of the silicon substrate to the center of the silicon substrate.

7. The solar cell according to claim 6, characterized in that: The ratio of the width of the second passivation film extending from the top corner of the silicon substrate to the center of the silicon substrate to the width of the second passivation film extending from the four sides of the silicon substrate to the center of the silicon substrate is 1.2-2.

3.

8. The solar cell according to claim 6, characterized in that: The width of the second passivation film extending from the four sides of the silicon substrate to the center of the silicon substrate is 5.4±0.8 mm; The width of the second passivation film extending from the top corner of the silicon substrate to the center of the silicon substrate is 8.8±1.1 mm.

9. The solar cell according to any one of claims 1 to 8, characterized in that The silicon substrate is an N-type silicon substrate, the solar cell further includes a P-type doped layer, the P-type doped layer is located between the silicon substrate and the first passivation film, and the doped polysilicon layer is an N-type doped polysilicon layer; or, the silicon substrate is a P-type silicon substrate, the solar cell further includes an N-type doped layer, the N-type doped layer is located between the silicon substrate and the first passivation film, and the doped polysilicon layer is a P-type doped polysilicon layer; The solar cell further includes an anti-reflection film, which covers a surface of the first passivation film facing away from the silicon substrate, and a surface of the second passivation film and the doped polysilicon layer facing away from the silicon substrate.

10. A photovoltaic module, characterized in that: Comprising at least one solar cell according to any one of claims 1 to 9.

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