Computer device and computer equipment

Abstract

The utility model discloses a computer device and computer equipment, the computer device comprises at least two storage devices, at least two computing power modules and a main control module, the at least two computing power modules are mutually communicated, and each computing power module is coupled with at least one storage device through a cable. The computing power modules and the storage device are arranged on different circuit boards, and the main control module is coupled with the at least two computing power modules. According to the computer device, the computing power modules are coupled with the storage devices, the capacity of the device can be expanded, the computing power modules and the storage devices are arranged on different circuit boards, and the heat dissipation problem of the device can be improved.

Description

Technical Field

[0001] The present application relates to the technical field of electronic equipment, in particular to computer devices and computer equipment. Background Art

[0002] As the number and performance of server and CPU (Central Processing Unit) cores in computer devices continue to increase, the bandwidth and capacity of memory in computer devices lag far behind that of the CPU. The gap between the two is getting bigger and bigger. This gap has seriously affected the improvement of the computing power performance of the entire system, resulting in the problem of "memory wall".

[0003] With the continuous development of industries such as big data and artificial intelligence, the demand for computer equipment to meet low latency, high bandwidth, and large-capacity memory is becoming more and more urgent. Utility Model Content

[0004] The present application provides a computer device and a computer equipment. By coupling multiple computing power modules with multiple storage devices, the capacity of the device can be expanded, and the computing power modules and storage devices are arranged on different circuit boards, which can improve the heat dissipation problem of the device.

[0005] In order to solve the above technical problems, the present application provides a computer device, including at least two storage devices, at least two computing modules and a main control module. The at least two computing modules are interconnected, and each computing module is coupled to at least one storage device through a cable; the computing module and the storage device are arranged on different circuit boards; and the main control module is coupled to at least two computing modules.

[0006] In some embodiments, at least two computing power modules communicate with each other via a PCIe channel.

[0007] In some embodiments, the main control module includes a main control chip, a channel selection chip, at least one network chip and at least one memory. Among them, the channel selection chip is coupled to the main control chip; at least one network chip is coupled to the channel selection chip, at least one network chip communicates with the main control chip through the channel selection chip, and each network chip is used to provide bandwidth to the main control chip; at least one memory is coupled to the main control chip, and each memory is used to provide memory capacity to the main control chip; one end of each channel interface is coupled to the channel selection chip, and the other end of each channel interface is coupled to the computing power module.

[0008] In some embodiments, the main control chip further includes a non-volatile storage chip and a baseboard management control chip, wherein the non-volatile storage chip is used to store system firmware; the baseboard management control chip is coupled to the non-volatile storage chip, and the baseboard management control chip is used to run the system firmware.

[0009] In some embodiments, the storage device includes at least one memory integrated module, at least one first channel interface and at least one storage master chip, wherein one end of each storage master chip is coupled to the computing power module via a cable, and the other end of each storage master chip is coupled to the memory integrated module via the first channel interface.

[0010] In some embodiments, each memory integrated module includes a second channel interface, a buffer chip and at least one storage chip. The buffer chip is coupled to the first channel interface through the second channel interface, and the buffer chip is used to process the data sent by the storage master chip to obtain processed data; at least one storage chip is coupled to the buffer chip, and each storage chip is used to store processed data; the first non-volatile storage chip is coupled to the storage chip, and the first non-volatile storage chip is used to store processed data and parameter information of the storage chip.

[0011] In some embodiments, the memory chip further includes a power supply module and at least one second non-volatile memory chip. The power supply module is coupled to the memory integration module and the memory control chip; at least one second non-volatile memory chip is coupled to the memory control chip, and the second non-volatile memory chip is used to store computer firmware, and the computer firmware is run by the memory control chip.

[0012] In some embodiments, the computer device further includes at least one backplane, each backplane is provided with at least two connectors, each connector is used to connect the main control module and the storage device, and the backplane is used to supply power to the main control module and the storage device.

[0013] In some embodiments, the computer device also includes a switching mode power supply, which is coupled to a storage device, a computing power module, and a main control module, and is used to supply power to the storage device, the computing power module, and the main control module.

[0014] In order to solve the above technical problems, the present application provides a computer device, comprising the above-mentioned computer device, a housing and a plurality of heat dissipation modules. The computer device is arranged in the housing, some heat dissipation modules are arranged on the surface of the housing, and some heat dissipation modules are arranged in the housing, and the heat dissipation modules are used to dissipate heat from the computer device.

[0015] The computer device provided in some embodiments of the present application includes at least two storage devices, at least two computing power modules and a main control module. Among them, at least two computing power modules are interconnected, and each computing power module is coupled to at least one storage device through a cable; the computing power module and the storage device are arranged on different circuit boards; and the main control module is coupled to at least two computing power modules. The above-mentioned computer device can expand the capacity of the device by coupling multiple computing power modules with multiple storage devices, and the computing power modules and storage devices are arranged on different circuit boards, which can improve the heat dissipation problem of the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. Among them:

[0017] Figure 1 is a schematic diagram of a computer device in some embodiments of the present application;

[0018] Figure 2 is a schematic diagram of a computer device in some embodiments of the present application;

[0019] Figure 3 is a schematic diagram of a computer device in some embodiments of the present application;

[0020] Figure 4 is a schematic diagram of a computer device in some embodiments of the present application;

[0021] Figure 5 is a schematic diagram of a main control module in some embodiments of the present application;

[0022] Figure 6 is a schematic diagram of a main control module in some embodiments of the present application;

[0023] Figure 7 is a schematic diagram of a storage device in some embodiments of the present application;

[0024] Figure 8 is a schematic diagram of a storage device in some embodiments of the present application;

[0025] Fig. 9 is a schematic diagram of a memory integrated module in some embodiments of the present application;

[0026] Fig.10 is a schematic diagram of a computer device in some embodiments of the present application;

[0027] Fig.11 is a schematic diagram of a computer device in some embodiments of the present application. DETAILED DESCRIPTION

[0028] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. It will be understood that the specific embodiments described herein are only used to explain the present application, rather than to limit the present application. It should also be noted that, for ease of description, only some but not all structures related to the present application are shown in the drawings. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present application.

[0029] See also Figure 1 , Figure 1 1 is a schematic diagram of a computer device in some embodiments of the present application, wherein the computer device 10 includes at least two storage devices 101, at least two computing modules 102, and a main control module 103. The at least two computing modules 102 are interconnected, and each computing module 102 is coupled to at least one storage device 101 via a cable; the computing modules 102 and the storage devices 101 are arranged on different circuit boards; and the main control module 103 is coupled to at least two computing modules 102.

[0030] The computer device 10 provided in some embodiments of the present application can expand the memory capacity of the device by coupling multiple computing modules 102 with multiple storage devices 101, and the computing modules 102 and storage devices 101 are arranged on different circuit boards, which can improve the heat dissipation problem of the device.

[0031] In some embodiments, the computing power module 102 includes a CPU chip and multiple HBM (High Bandwidth Memory) chips. Each HBM chip is coupled to the CPU chip. The CPU chip and the HBM chip are arranged on a circuit board. The computing power module 102 can provide high-bandwidth, high-capacity and low-power data transmission.

[0032] In some embodiments, the number of storage devices 101 and computing modules 102 can be determined according to actual conditions and is not limited here. For example, the computer device 10 includes 3 storage devices 101 and 3 computing modules 102; for another example, the computer device 10 includes 3 storage devices 101 and 4 computing modules 102; for another example, the computer device 10 includes 4 storage devices 101 and 3 computing modules 102.

[0033] In some embodiments, the storage device 101 and the computing module 102 in the computer device 10 are arranged on different circuit boards, and the positional relationship between the storage device 101 and the computing module 102 can be determined according to actual conditions, and is not limited here. For example, the storage device 101 is arranged around the computing module 102; for another example, the computing module 102 is arranged around the storage device 101.

[0034] In some embodiments, at least two storage devices 101 included in the computer device 10 may be the same or different; at least two computing modules 102 included in the computer device 10 may be the same or different. When the computer device 10 includes multiple different storage devices 101 and / or multiple different computing modules 102, the storage device 101 is coupled to the computing module 102, and more storage devices 101 and / or computing modules 102 can be expanded.

[0035] In some embodiments, at least two computing modules 102 are connected via a high-speed link. Specifically, at least two computing modules 102 are interconnected via a PCIe (Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard) channel. For example, the link width between any two computing modules 102 is "×16", and the transmission rate of each link is 16GB / s.

[0036] In some embodiments, the main control module 103 and the computing power module 102 are connected via a high-speed link. Specifically, the main control module 103 and the computing power module 102 communicate with each other via a PCIe channel. For example, the link width between the main control module 103 and the computing power module 102 is "×16", and the transmission rate of each link is 16GB / s.

[0037] In some embodiments, Figure 2 As shown, the computer device 10 also includes a plurality of connectors 1021. The connectors 1021 and the computing power module 102 are arranged on the same circuit board. The computing power module 102 is connected to the connectors 1021, and the storage device 101 and the connectors 1021 are coupled via cables to achieve communication between the computing power module 102 and the storage device 101.

[0038] It can be understood that the computing power module 102 can be coupled to at least one connector 1021 , and one connector 1021 is coupled to one storage device 101 .

[0039] In some embodiments, the storage device 101 is connected to the connector 1021 via a high-speed link. For example, the link width between the connector 1021 and the storage device 101 is "×8", and the transmission rate of each link is 16 GB / s.

[0040] In some embodiments, the computing module 102 is connected to the connector 1021 via a high-speed link. For example, the link width between the computing module 102 and the connector 1021 is "×8", and the transmission rate of each link is 16 GB / s.

[0041] In some embodiments, Figure 2 As shown, the computer device 10 also includes a computing power motherboard 201. The computing power module 102 and the connector 1021 are arranged on the computing power motherboard 201, and the storage device 101 is arranged on another circuit board. By arranging the storage device 101 and the computing power module 102 on different circuit boards, the heat accumulation generated by the storage device 101 and the computing power module 102 during operation can be reduced, and the heat dissipation rate can be improved.

[0042] In some embodiments, Figure 2 As shown, the computing power mainboard 201 is also provided with a memory 2011 (such as SPI NOR) and a computing power mainboard management control chip 2012 (Baseboard Management Controller, BMC), wherein the computing power mainboard management control chip 2012 is used to store system firmware.

[0043] See also Figure 3 , Figure 3 1 is a schematic diagram of a computer device 10 in some embodiments of the present application. The computer device 10 includes at least two storage devices 101, at least two computing modules 102, a main control module 103 and at least one backplane 104. Each backplane 104 is provided with at least two connectors 1041, each connector 1041 is used to connect the main control module 103 and the storage device 101, and the backplane 104 is used to transmit power to the main control module 103 and the storage device 101.

[0044] In some embodiments, the number and location of the backplanes 104 can be determined based on actual conditions, and the number and location of the connectors 1041 on each backplane 104 can be determined based on actual conditions, and are not limited here.

[0045] In one application scenario, the computer device 10 includes 11 storage devices 101, 1 main control module 103 and two backplanes 104, wherein each backplane 104 is provided with 6 connectors 1041, wherein the 6 connectors 1041 on one backplane 104 are used to connect 6 storage devices 101, and the 6 connectors 1041 on the other backplane 104 are used to connect 5 storage devices 101 and 1 main control module 103, so as to provide DC high-voltage power to the storage devices 101 and the main control modules 103 respectively through the connectors 1041.

[0046] In some embodiments, the connector 1041 on the backplane 104 is not only used to connect the storage device 101 and the main control module 103, but the connector 1041 on the backplane 104 is also used to connect the computing power mainboard management control chip 2012 to provide a DC high-voltage power supply to the storage device 101 and the main control module 103, and to connect the storage device 101 with the computing power mainboard management control chip 2012 through a low-speed link.

[0047] See also Figure 4 , Figure 4 1 is a schematic diagram of a computer device 10 in some embodiments of the present application. The computer device 10 includes at least two storage devices 101, at least two computing modules 102, a main control module 103, at least one backplane 104 and a switch mode power supply 105. The switch mode power supply 105 is coupled to the storage device 101, the computing module 102 and the main control module 103, and the switch mode power supply 105 is used to supply power to the storage device 101, the computing module 102 and the main control module 103.

[0048] The computer device 10 provided in some embodiments of the present application supplies power to the storage device 101 and the main control module 103 through the backplane 104, and supplies power to the storage device 101, the computing power module 102 and the main control module 103 through the switch mode power supply 105, so as to provide the required power to each module in the computer device 10, thereby ensuring that each module in the computer device 10 operates under a stable and continuous power supply.

[0049] See also Figure 5 , Figure 5 1 is a schematic diagram of the main control module 103 in some embodiments of the present application. The main control module 103 includes a main control chip 1031 , a channel selection chip 1032 , at least one network chip 1033 , at least one memory 1034 and at least two channel interfaces 1035 .

[0050] Among them, the channel selection chip 1032 is coupled to the main control chip 1031; at least one network chip 1033 is coupled to the channel selection chip 1032, at least one network chip 1033 communicates with the main control chip 1031 through the channel selection chip 1032, and each network chip 1033 is used to provide bandwidth to the main control chip 1031; at least one memory 1034 is coupled to the main control chip 1031, and each memory 1034 is used to provide memory capacity to the main control chip 1031; one end of each channel interface 1035 is coupled to the channel selection chip 1032, and the other end of each channel interface 1035 is coupled to the computing power module 102.

[0051] In some embodiments, the main control module 103 and the channel selection chip 1032 are connected via a high-speed link. Specifically, if the main control module 103 and the channel selection chip 1032 communicate with each other via a PCIe channel, the channel interface 1035 is a PCIe interface. For example, the link width between the main control module 103 and the channel selection chip 1032 is "×16", and the transmission rate of each link is 16GB / s.

[0052] In some embodiments, the main control chip 1031 corresponds to a CPU (Central Processing Unit); the channel selection chip 1032 corresponds to a PCIe Switch chip; and the network chip 1033 corresponds to an Ethernet chip.

[0053] In some embodiments, each network chip 1033 may provide a preset bandwidth, such as 400 Ggbps, 420 Ggbps, or 500 Ggbps.

[0054] In some embodiments, the memory 1034 may correspond to SIMM (Single In-line Memory Module), DIMM (Dual-Inline-Memory-Modules), RIMM (Rambus Inline Memory Module), SO-DIMM (Amal outline Aual In-line Memory Module), UDIMM (Unbuffered Dual In-Line Memory Modules or Unregistered Dual In-Line Memory Modules), RDIMM (Registered Rambus Inline Memory Module), LRDIMM (Load-Reduced Dual-Inline-Memory-Modules), or others, without limitation here.

[0055] In some embodiments, the multiple memories 1034 included in the main control module 103 may be the same or different, and there is no limitation here.

[0056] In some embodiments, the number of memories 1034 included in the main control module 103 can be determined according to actual conditions and is not limited here. For example, the number of memories 1034 in the main control module 103 is 2, 4, 5, 8, 10, 15, or 16.

[0057] In some embodiments, Figure 5 As shown, the main control module 103 further includes a non-volatile storage chip 1036 and a baseboard management control chip 1037. The non-volatile storage chip 1036 is used to store system firmware; the baseboard management control chip 1037 is coupled to the non-volatile storage chip 1036, and the baseboard management control chip 1037 is used to run the system firmware.

[0058] In an application scenario, such as Figure 6 As shown, the main control module 103 includes a CPU, a PCIe Switch chip, four Ethernet chips, multiple RDIMMs, a BMC (Baseboard Management Controller, BMC), SPI NOR, and a PCIe interface. Among them, the Ethernet chip is used to provide bandwidth to the CPU; RDIMM is used to provide dynamically accessible memory to the CPU; SPI NOR is used to store system firmware, and the system firmware runs in the BMC.

[0059] In some embodiments of the present application, the main control module 103 can provide bandwidth to the main control chip 1031 through the network chip 1033 to increase memory bandwidth, and can provide dynamically accessible memory capacity to the main control chip 1031 through the memory 1034 to increase memory capacity, thereby achieving capacity expansion.

[0060] See also Figure 7 , Figure 7 1 is a schematic diagram of a storage device 101 in some embodiments of the present application. The storage device 101 includes at least one memory integrated module 1011, at least one first channel interface 1012, and at least one storage master chip 1013. One end of each storage master chip 1013 is coupled to the computing power module 102 through a cable, and the other end of each storage master chip 1013 is coupled to the memory integrated module 1011 through the first channel interface 1012.

[0061] In some embodiments, the number and location of the memory integrated modules 1011, the first channel interface 1012, and the storage master chip 1013 in the storage device 101 can be determined according to actual conditions and are not limited here. For example, the storage device 101 includes 8 memory integrated modules 1011, 2 first channel interfaces 1012, and 2 storage master chips 1013.

[0062] In some embodiments, the first channel interface 1012 is a DDR (Dual Data Rate SDRAM) interface, such as a DDR4 interface or a DDR5 interface.

[0063] In some embodiments, the storage master control chip 1013 and the computing power mainboard management control chip 2012 are connected via a low-speed link.

[0064] See also Figure 8 , Figure 81 is a schematic diagram of a storage device 101 in some embodiments of the present application. The storage device 101 includes at least one memory integrated module 1011, at least one first channel interface 1012, at least one storage master chip 1013, a power supply module 1014, and at least one second non-volatile storage chip 1015. The power supply module 1014 is coupled to the memory integrated module 1011 and the storage master chip 1013; at least one second non-volatile storage chip 1015 is coupled to the storage master chip 1013, and the second non-volatile storage chip 1015 is used to store computer firmware (system firmware), and the computer firmware is run by the storage master chip 1013.

[0065] In some embodiments, the storage device 101 further includes a DC high voltage interface 1016 , and the power supply module 1014 is connected to the DC high voltage interface 1016 using a cable to transmit power to the power supply module 1014 through the DC high voltage interface 1016 .

[0066] In some embodiments, the storage device 101 also includes a PCB (Printed Circuit Board), at least one memory integrated module 1011, at least one first channel interface 1012, at least one storage master control chip 1013, a power supply module 1014, a DC high voltage interface 1016 and at least one second non-volatile storage chip 1015 are arranged on the PCB.

[0067] In some embodiments, see Fig. 9 The memory integrated module 1011 includes a second channel interface 301, a buffer chip 302, at least one storage chip 303 and a first non-volatile storage chip 304. The buffer chip 302 is coupled to the first channel interface 1012 through the second channel interface 301, and the buffer chip 302 is used to process the data sent by the storage master chip 1013 to obtain processed data; at least one storage chip 303 is coupled to the buffer chip 302, and each storage chip 303 is used to store processed data; the first non-volatile storage chip 304 is coupled to the storage chip 303, and the first non-volatile storage chip 304 is used to store processed data and parameter information of the storage chip 303.

[0068] In some embodiments, the storage chip 303 corresponds to a DDR chip, such as a DDR4 chip or a DDR5 chip, which is not limited here.

[0069] In some embodiments, the buffer chip 302 can bridge the external control signal and the memory chip 303 to amplify and adjust the control signal and then transmit it to the memory chip 303 .

[0070] In some embodiments, the first non-volatile memory chip 304 may store preset parameters corresponding to the memory chip 303 and control parameters corresponding to the storage control signal.

[0071] In some embodiments, the memory integrated module 1011 further includes a PCB board, the buffer chip 302 , at least one storage chip 303 and the first non-volatile storage chip 304 are all disposed on the PCB board, and the second channel interface 301 is coupled to the PCB board.

[0072] See also Fig.10 and Fig.11 , Fig.10 and Fig.11 The computer device 100 includes a computer device 10 , a housing 1001 and a plurality of heat dissipation modules 1002 .

[0073] The computer device 10 includes the computer device 10 described in any of the above embodiments, which will not be described in detail here.

[0074] In some embodiments, part of the heat dissipation module 1002 is disposed on the outer surface of the housing 1001 , and part of the heat dissipation module 1002 is disposed inside the housing 1001 . The heat dissipation module 1002 is used to dissipate heat from the computer device 10 .

[0075] In some embodiments, the heat dissipation module 1002 may include a fan and metal fins, etc., and the speed of the fan may be adjusted according to the temperature inside the shell 1001 to adjust the temperature inside the shell 1001 and further adjust the temperature of the computer device 10 disposed in the shell 1001.

[0076] In some embodiments, the number and location of the heat dissipation modules 1002 in the computer device 100 can be determined according to actual conditions, and are not limited here. For example, the computer device 100 includes two heat dissipation modules 1002, one of which is disposed on the surface of the housing 1001 to draw air from outside the housing 1001 through the heat dissipation module 1002 and dissipate heat for the computer device 10 disposed in the housing 1001, and the other heat dissipation module 1002 is disposed in the housing 1001 to dissipate heat for the computer device 10 disposed in the housing 1001.

[0077] The computer device 10 built into the computer device 100 in some embodiments of the present application can provide a larger memory capacity and memory bandwidth, and the computer device 100 is provided with a heat dissipation module 1002, and the heat dissipation module 1002 is used for heat dissipation processing, which can ensure the performance of the computer device 100.

[0078] In summary, the computer device 10 provided in some embodiments of the present application can expand the capacity of the computer device 10 by coupling multiple computing power modules 102 with multiple storage devices 101, and the computing power modules 102 and the storage devices 101 are connected through high-speed cables. The computing power modules 102 and the storage devices 101 are arranged on different circuit boards, and the computing power modules 102 and the storage devices 101 are deconstructed and connected with cables, which can improve the heat dissipation problem, increase space, increase memory capacity and memory bandwidth.

[0079] The computer device 10 and the computer equipment 100 provided in some embodiments of the present application can improve the "memory wall" problem that occurs in the related art.

[0080] The above description is only an implementation method of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly used in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A computer device, characterized in that: The computer device comprises: At least two storage devices; At least two computing modules, the at least two computing modules are interconnected, and each of the computing modules is coupled to at least one of the storage devices via a cable; the computing modules and the storage devices are arranged on different circuit boards; A main control module is coupled to the at least two computing power modules.

2. The computer device according to claim 1, characterized in that The at least two computing power modules communicate with each other via a PCIe channel.

3. The computer device according to claim 1, characterized in that The main control module comprises: Main control chip; A channel selection chip, coupled to the main control chip; At least one network chip is coupled to the channel selection chip, the at least one network chip communicates with the main control chip through the channel selection chip, and each of the network chips is used to provide bandwidth to the main control chip; At least one memory, the at least one memory is coupled to the main control chip, and each of the memories is used to provide memory capacity to the main control chip; At least two channel interfaces, one end of each channel interface is coupled to the channel selection chip, and the other end of each channel interface is coupled to the computing power module.

4. The computer device according to claim 3, characterized in that The main control module also includes: A non-volatile memory chip for storing system firmware; The baseboard management control chip is coupled to the non-volatile storage chip, and the baseboard management control chip is used to run the system firmware.

5. The computer device according to claim 1, characterized in that: The storage device comprises: at least one memory integration module; at least one first channel interface; At least one storage master control chip, one end of each of the storage master control chips is coupled to the computing power module through a cable, and the other end of each of the storage master control chips is coupled to the memory integrated module through the first channel interface.

6. The computer device according to claim 5, characterized in that Each of the memory integrated modules comprises: Second channel interface; a buffer chip, the buffer chip being coupled to the first channel interface via the second channel interface, the buffer chip being used to process the data sent by the storage master control chip to obtain processed data; at least one storage chip, the at least one storage chip is coupled to the buffer chip, each of the storage chips is used to store the processed data; The first non-volatile storage chip is coupled to the storage chip, and the first non-volatile storage chip is used to store the processed data and parameter information of the storage chip.

7. The computer device according to claim 5, characterized in that The storage device also includes: A power supply module, coupled to the memory integrated module and the storage main control chip; At least one second non-volatile storage chip is coupled to the storage main control chip, the second non-volatile storage chip is used to store computer firmware, and the computer firmware is run by the storage main control chip.

8. The computer device according to claim 1, characterized in that The computer device further comprises: At least one backplane, each of which is provided with at least two connectors, each of which is used to connect the main control module and the storage device, and the backplane is used to supply power to the main control module and the storage device.

9. The computer device according to claim 1, characterized in that: The computer device further comprises: A switch mode power supply is coupled to the storage device, the computing power module and the main control module, and the switch mode power supply is used to supply power to the storage device, the computing power module and the main control module.

10. A computer device, characterized in that: The computer device comprises: The computer device according to any one of claims 1 to 9; a housing, wherein the computer device is disposed in the housing; A plurality of heat dissipation modules, some of which are arranged on the surface of the shell, and some of which are arranged in the shell, and the heat dissipation modules are used to dissipate heat for the computer device.

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