Heterojunction solar cell and heterojunction solar cell

Abstract

The utility model belongs to the field of solar cells, and relates to a heterojunction solar cell sheet and a heterojunction solar cell, the heterojunction solar cell sheet comprises a cell substrate and metal grid lines, and the cell substrate is provided with a front surface and a back surface which are opposite to each other; the metal grid lines extend along a first direction and are arranged on the front surface and the back surface of the cell substrate; the metal grid lines comprise first metal grid lines and second metal grid lines which are arranged at intervals and are connected with each other; a plurality of grooves are formed in the front surface and the back surface of the cell substrate at intervals along the extension direction of the metal grid lines; the first metal grid lines are embedded in the grooves, and the second metal grid lines are arranged on the surfaces of the front face and the back face of the battery base body in the first direction. The heterojunction solar cell comprises a plurality of heterojunction solar cell pieces and a solder strip, and the plurality of heterojunction solar cell pieces are electrically connected through the solder strip. The problem that in the prior art, a main-grid-free heterojunction solar cell is directly welded to an auxiliary grid line through a welding strip, and consequently the connection strength is low is solved.

Description

Technical Field

[0001] The present application relates to the technical field of solar cells, and in particular to a heterojunction solar cell sheet and a heterojunction solar cell. Background Art

[0002] Solar cells are usually diode structures made of one or more semiconductor materials of the same type combined together to form a homojunction, or different types of semiconductor materials combined together to form a heterojunction. Semiconductor materials absorb sunlight and convert it into electricity. Semiconductor materials absorb sunlight to generate electron and hole carriers. After separation by the built-in electric field of the diode, the electrons and holes are respectively gathered in the n-type and p-type semiconductor regions to form an electric potential. In order to effectively transport electrons and holes to the external circuit, metal electrodes are usually made on the front surface (first light-receiving surface) and the back surface (second light-receiving surface) of the semiconductor material. The metal electrodes form good electrical contact with the semiconductor material to effectively transport the photogenerated carriers to the external circuit.

[0003] Heterojunction (HJT) cells are mainly made by depositing intrinsic α-Si:H layers on the front and back sides of n-type silicon wafers, and then preparing p-type α-Si:H layers and n-type α-Si:H layers respectively, and then using low-temperature silver paste to screen print, dry and solidify them; in actual production, transparent conductive oxide film (TCO) can also be deposited on the surface of silicon wafers before metallization. The process of heterojunction cells is relatively short, with only four major steps, namely cleaning and texturing, amorphous silicon deposition, TCO deposition, and screen printing and curing. Screen printing and curing is to use low-temperature silver paste to screen print screen-printed grid lines. The grid lines generally include wider main grid lines and thinner secondary grid lines or fine grid lines. The main grid lines and secondary grid lines can collect current.

[0004] Traditional crystalline silicon solar cell packaging uses welding ribbons to connect the cells in series. Adjacent cells are connected by welding ribbons to connect the main grid lines on the front of the cells with the main grid lines on the back of the adjacent cells. In order to ensure welding strength, wider main grid lines are often required to increase the contact area. However, the wider the main grid lines are, the more low-temperature silver paste is required for screen printing, resulting in high silver paste consumption and the main grid lines blocking the light-receiving surface.

[0005] In order to solve the above problems, the prior art sets multiple large-area solder joints on multiple fine grid lines, and the connecting lines other than the solder joints are designed to be thin wires close to the metal grid lines. Although this method can reduce the silver consumption and the shielding of the light-receiving surface by the main grid line, the silver paste consumption is still very high. The silver paste consumption of a single M10 (182mm*182mm) size heterojunction solar cell is more than 140mg, which is still higher than that of a conventional crystalline silicon solar cell. At the same time, the large-area grid line increases the shading area.

[0006] In order to reduce the shielding of the grid line on the battery surface and further reduce the cost of electrode production, the busbar-free battery technology has become a hot topic of research. The current busbar-free battery directly removes the busbars on the front and back of the solar cell, and the welding strip is directly welded to the secondary grid line. However, due to the abnormal situation that the welding strip and the secondary grid line are not welded (the welding tension is unqualified) or cannot be welded, at the same time, because the metal grid line focuses on current collection, the selection of the paste will focus on the selection of conductive properties, which will reduce the connection strength between the paste and the battery body surface. This problem is more serious in heterojunction solar cells made by low-temperature silver paste screen printing process. Utility Model Content

[0007] Based on this, a heterojunction solar cell sheet and a heterojunction solar cell are provided to solve the problem of low connection strength caused by directly welding a main grid heterojunction solar cell to a secondary grid line through a welding ribbon in the prior art.

[0008] In one aspect, a heterojunction solar cell is provided, comprising:

[0009] a battery substrate having opposite front and back surfaces;

[0010] Metal grid lines, the metal grid lines extending along a first direction and arranged on the front and back sides of the battery substrate; the metal grid lines include first metal grid lines and second metal grid lines arranged at intervals and connected to each other;

[0011] A plurality of grooves are arranged at intervals on the front and back sides of the battery substrate along the extending direction of the metal grid lines; the first metal grid lines are embedded in the grooves, and the second metal grid lines are arranged on the front and back surfaces of the battery substrate along the first direction.

[0012] In one embodiment, the height of the first metal gate line is H2, the height of the second metal gate line is H1, the depth of the groove is H3, the height H2 of the first metal gate line is less than or equal to the sum of the depth H3 of the groove and the height H1 of the second metal gate line, or the height H2 of the first metal gate line is greater than the sum of the depth H3 of the groove and the height H1 of the second metal gate line.

[0013] In one embodiment, the width of the metal gate line is W1, the width of the groove is W2, the width W1 of the metal gate line is less than or equal to the width W2 of the groove, or the width W1 of the metal gate line is greater than the width W2 of the groove.

[0014] In one of the embodiments, the width of the groove is less than 40 microns, the length of the groove is less than 120 microns, and the depth of the groove is less than 30 microns.

[0015] In one embodiment, the first metal gate line and the second metal gate line are made of the same or different types of paste.

[0016] In one embodiment, the first metal grid line and the second metal grid line are silver grid lines made of the same type of paste.

[0017] In one embodiment, the

[0018] The battery matrix comprises:

[0019] a silicon substrate having opposing front and back surfaces;

[0020] A first intrinsic silicon-containing film, a first conductivity type doped silicon-containing film and a first transparent conductive film are sequentially stacked on the front side of the silicon substrate;

[0021] A second intrinsic silicon-containing film, a second conductivity type doped silicon-containing film, and a second transparent conductive film are sequentially stacked on the back side of the silicon substrate.

[0022] In one embodiment, the first intrinsic silicon-containing film and / or the second intrinsic silicon-containing film is a single-layer structure of one of microcrystalline silicon film, nanocrystalline silicon film, amorphous silicon film, microcrystalline silicon oxide film, nanocrystalline silicon oxide film, amorphous silicon oxide film, microcrystalline silicon carbide film, nanocrystalline silicon carbide film and amorphous silicon carbide film, or a stacked-layer structure of at least one of the following films;

[0023] The first conductive type doped silicon-containing film and / or the second conductive type doped silicon-containing film is a single-layer structure of one of microcrystalline silicon film, nanocrystalline silicon film, amorphous silicon film, microcrystalline silicon oxide film, nanocrystalline silicon oxide film, amorphous silicon oxide film, microcrystalline silicon carbide film, nanocrystalline silicon carbide film and amorphous silicon carbide film, or a stacked-layer structure of at least one of the following films;

[0024] The first transparent conductive film and / or the second transparent conductive film is a single-layer structure or a stacked-layer structure of a doped metal oxide film, or a single-layer structure or a stacked-layer structure of a nitride film.

[0025] In one embodiment, the first intrinsic silicon-containing film and / or the second intrinsic silicon-containing film has a thickness of 1-50 nm;

[0026] The thickness of the first transparent conductive film and / or the second transparent conductive film is 1-100 nm;

[0027] The thickness of the first conductivity type doped silicon-containing film and / or the second conductivity type doped silicon-containing film is 1-50 nm.

[0028] In another aspect, a heterojunction solar cell is provided.

[0029] include:

[0030] A plurality of heterojunction solar cells, wherein the heterojunction solar cells are any one of the heterojunction solar cells described above;

[0031] A welding ribbon is used to electrically connect the plurality of heterojunction solar cells.

[0032] The above-mentioned heterojunction solar cell has a groove pre-arranged in the welding contact point area of ​​the battery substrate, and the first metal grid line is arranged in the groove by low-temperature silver paste screen printing. During assembly, the first metal grid line on the front side of the heterojunction solar cell is welded to the first metal grid line on the back side of the adjacent heterojunction solar cell by a welding ribbon. Since the groove increases the contact area between the first metal grid line and the battery substrate, the mechanical connection strength between the first metal grid line and the battery substrate is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 It is a schematic diagram of the structure of a heterojunction solar cell of the utility model;

[0034] Figure 2 This is a schematic diagram of the structure of a heterojunction solar cell of the utility model;

[0035] Figure 3 This is a schematic diagram of the battery matrix and the groove structure of the utility model;

[0036] Figure 4 This is a cross-sectional schematic diagram of the heterojunction solar cell of the utility model.

[0037] Figure 5 This is a first schematic diagram of the metal grid lines and grooves of the heterojunction solar cell of the utility model;

[0038] Figure 6 This is a second schematic diagram of the metal grid lines and grooves of the heterojunction solar cell of the utility model.

[0039] Reference numerals: 10, heterojunction solar cell; 11, cell substrate; 12, groove; 13, metal grid line; 13a, first metal grid line; 13b, second metal grid line; 20, welding strip. DETAILED DESCRIPTION

[0040] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0041] It should be noted that the illustrations provided in this embodiment are only used to schematically illustrate the basic concept of the present invention. Therefore, the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0042] The structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification so as to facilitate understanding and reading by persons familiar with this technology. They are not used to limit the conditions under which the present invention can be implemented, and therefore have no substantive technical significance. Any structural modification, change in proportion or adjustment of size, without affecting the effects and purposes that can be achieved by the present invention, should still fall within the scope of the technical contents disclosed by the present invention.

[0043] The directions or positional relationships indicated by the terms "upper", "lower", "left", "right", "middle", "longitudinal", "lateral", "horizontal", "inner", "outer", "radial", "circumferential" and the like in this specification are based on the directions or positional relationships shown in the drawings and are only for the convenience of simplifying the description. They do not indicate or imply that the devices or elements referred to must have a specific direction, be constructed and operate in a specific direction, and therefore cannot be understood as limiting the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.

[0044] A heterojunction solar cell provided by this embodiment is described in detail below with reference to the accompanying drawings.

[0045] Reference Figure 1 and Figure 2 The heterojunction solar cell includes a plurality of heterojunction solar cell sheets 10 and welding ribbons 20 . During assembly, the adjacent heterojunction solar cell sheets 10 are welded and electrically connected together through the welding ribbons 20 .

[0046] The heterojunction solar cell 10 includes a cell substrate 11 and a plurality of metal grid lines 13. The cell substrate 11 includes a front side and a back side opposite to each other, wherein the front side is a light-receiving side of the heterojunction solar cell 10, and the back side is a backlight side of the heterojunction solar cell 10. The metal grid lines 13 are extended along a first direction and arranged on the front side and the back side of the cell substrate 11. The plurality of metal grid lines 13 are arranged at intervals in a second direction of the cell substrate 11, and the first direction is perpendicular to the second direction. The metal grid lines 13 are used for conducting electricity and are also used for welding with the welding strips 20, so as to connect adjacent heterojunction solar cells 10.

[0047] The battery substrate 11 is in the shape of a rectangular parallelepiped as a whole, and in other embodiments, it can also be set to other shapes as needed. The battery substrate 11 includes a silicon substrate, a first intrinsic silicon-containing film, a first conductivity type doped silicon-containing film, a first transparent conductive film, a second intrinsic silicon-containing film, a second conductivity type doped silicon-containing film, and a second transparent conductive film.

[0048] The silicon substrate also includes a relative front side and a back side, wherein a first intrinsic silicon-containing film, a first conductivity type doped silicon-containing film and a first transparent conductive film are sequentially stacked on the front side of the silicon substrate, and a second intrinsic silicon-containing film, a second conductivity type doped silicon-containing film and a second transparent conductive film are sequentially stacked on the back side of the silicon substrate.

[0049] The thickness of the first intrinsic silicon-containing film and the second intrinsic silicon-containing film is 1-50 nm. In this embodiment, the first intrinsic silicon-containing film and the second intrinsic silicon-containing film have the same performance and are both single-layer structures of microcrystalline silicon films.

[0050] In other embodiments, the first intrinsic silicon-containing film and the second intrinsic silicon-containing film may also be a single-layer structure of a thin film such as a nanocrystalline silicon film, an amorphous silicon film, a microcrystalline silicon oxide film, a nanocrystalline silicon oxide film, an amorphous silicon oxide film, a microcrystalline silicon carbide film, a nanocrystalline silicon carbide film or an amorphous silicon carbide film.

[0051] In other embodiments, the first intrinsic silicon-containing film and the second intrinsic silicon-containing film may also be a stacked structure of the above-mentioned films, or a mixed film layer obtained by mixing the materials of the above-mentioned films. The first intrinsic silicon-containing film and the second intrinsic silicon-containing film may be arranged in the same manner, so that the first intrinsic silicon-containing film and the second intrinsic silicon-containing film are a stacked structure or a mixed material film structure with the same performance.

[0052] In other embodiments, the first intrinsic silicon-containing film and the second intrinsic silicon-containing film may also be two structures with different properties, such as the first intrinsic silicon-containing film and the second intrinsic silicon-containing film are both stacked structures of several identical films overlapped, but the number of overlapping layers of the stacked structures is different, even if the materials are the same, the first intrinsic silicon-containing film and the second intrinsic silicon-containing film have different properties. For example, the first intrinsic silicon-containing film is composed of two layers of microcrystalline silicon films and one layer of nanocrystalline silicon films overlapped to form three layers, and the second intrinsic silicon-containing film is composed of one layer of microcrystalline silicon film and two layers of nanocrystalline silicon films overlapped to form three layers.

[0053] In other embodiments, the first intrinsic silicon-containing film and the second intrinsic silicon-containing film may also be a stacked structure in which several different films mentioned above are overlapped, such as the first intrinsic silicon-containing film is formed by a microcrystalline silicon film and a nanocrystalline silicon film overlapping each other, and the second intrinsic silicon-containing film is formed by an amorphous silicon film and a microcrystalline silicon oxide film overlapping each other.

[0054] In other embodiments, the first intrinsic silicon-containing film and the second intrinsic silicon-containing film are formed by mixing materials of the above-mentioned several different films, such as the first intrinsic silicon-containing film is a film formed by mixing materials of a microcrystalline silicon film and a nanocrystalline silicon film, and the second intrinsic silicon-containing film is a film formed by mixing materials of an amorphous silicon film and a microcrystalline silicon oxide film.

[0055] The thickness of the silicon-containing film doped with the first conductivity type and the silicon-containing film doped with the second conductivity type is also 1-50 nm. In this embodiment, the silicon-containing film doped with the first conductivity type and the silicon-containing film doped with the second conductivity type have the same performance and are both single-layer structures of microcrystalline silicon films.

[0056] Similarly, in other embodiments, the silicon-containing film doped with the first conductivity type and the silicon-containing film doped with the second conductivity type may also be a single-layer structure of a nanocrystalline silicon film, an amorphous silicon film, a microcrystalline silicon oxide film, a nanocrystalline silicon oxide film, an amorphous silicon oxide film, a microcrystalline silicon carbide film, a nanocrystalline silicon carbide film or an amorphous silicon carbide film. Alternatively, it may be a stack of the above-mentioned films or a mixed layer of film materials, and the silicon-containing film doped with the first conductivity type and the silicon-containing film doped with the second conductivity type may be arranged in the same manner, so that the silicon-containing film doped with the first conductivity type and the silicon-containing film doped with the second conductivity type are a stacked structure or a mixed material film structure with the same performance.

[0057] In other embodiments, the silicon-containing film doped with the first conductivity type and the silicon-containing film doped with the second conductivity type may also be two structures with different properties. For example, the silicon-containing film doped with the first conductivity type and the silicon-containing film doped with the second conductivity type are both multiple layers of the same type of film overlapped with each other, but the number of layers of the silicon-containing film doped with the first conductivity type and the silicon-containing film doped with the second conductivity type are different. Even if the materials are the same, the properties of the silicon-containing film doped with the first conductivity type and the silicon-containing film doped with the second conductivity type are different.

[0058] In other embodiments, the first conductive type doped silicon-containing film and the second conductive type doped silicon-containing film may also be a stacked structure in which the above-mentioned different films are overlapped, or the first conductive type doped silicon-containing film and the second conductive type doped silicon-containing film may be a mixture of materials of different films.

[0059] The thickness of the first transparent conductive film and the second transparent conductive film is 1-100nm. In this embodiment, the first transparent conductive film and the second transparent conductive film are a doped metal oxide film single-layer structure, wherein the metal oxide is indium oxide, tin oxide, zinc oxide or cadmium oxide, and the doping element is indium, tin, calcium, aluminum, cadmium, zinc, cerium or fluorine.

[0060] In some embodiments, the first transparent conductive film and the second transparent conductive film may also be a stacked structure in which multiple oxides are stacked and arranged in multiple layers, or a film formed by a mixture of multiple oxides.

[0061] In some embodiments, the first transparent conductive film and the second transparent conductive film may also be a single-layer structure of a nitride film, such as a titanium nitride film, or may be a stacked structure in which multiple layers of the same or different nitrides are overlapped, or may be a film formed by a mixture of multiple nitrides. The first transparent conductive film and the second transparent conductive film may be of the same type as described above or may be of different types as described above.

[0062] Reference Figure 1 and Figure 2 A plurality of grooves 12 are arranged at intervals on the front and back sides of the battery substrate 11 along the extension direction of the metal grid line 13, each groove 12 corresponds to a welding contact point area, and the welding contact point area refers to the position where the welding ribbon 20 is welded to the metal grid line 13 when assembling adjacent heterojunction solar cells 10.

[0063] Reference Figure 2 and Figure 3 The width of each groove 12 is less than 40 microns, the length is less than 120 microns, and the depth is less than 30 microns. Compared with setting a continuous through groove, it causes less damage to the battery matrix 11 and is conducive to reducing the fragmentation rate.

[0064] The metal grid lines 13 include a first metal grid line 13a and a second metal grid line 13b that are spaced apart and connected to each other. The second metal grid line 13b is fixed to the front and back sides of the battery substrate 11 along a first direction. The first metal grid line 13a is embedded in the groove 12 and fixed to the bottom wall of the groove 12. When the width of the first metal grid line 13a is equal to the width of the groove 12, the first metal grid line 13a can also be fixed to the side wall of the groove 12, further enhancing the connection strength of the first metal grid line 13a.

[0065] During production, the metal grid lines 13 are screen printed with low-temperature metal paste on the front and back of the battery substrate 11, and then dried and cured. The first metal grid lines 13a and the second metal grid lines 13b can be screen printed with the same low-temperature metal paste, such as low-temperature silver paste.

[0066] In other embodiments, the first metal grid line 13a and the second metal grid line 13b may also use two different types of low-temperature metal pastes. For example, the first metal grid line 13a in the groove 12 region needs to bear the function of connecting with the welding strip 20, so a metal paste with higher solderability can be used for screen printing, such as aluminum, copper, titanium alloy, etc. The second metal grid line 13b in the plane region does not need to bear the function of connecting with the welding strip 20, but only needs to bear the conduction function, so a metal paste with better conduction performance can be used for screen printing, such as copper, zinc, aluminum, etc.

[0067] Reference Figure 4 The height of the first metal grid line 13a is H2, the height of the second metal grid line 13b is H1, and the depth of the groove 12 is H3. In this embodiment, the height H2 of the first metal grid line 13a is equal to the sum of the depth H3 of the groove 12 and the height H1 of the second metal grid line 13b, so that the surface of the heterojunction solar cell 10 is smoother.

[0068] In other embodiments, the height H2 of the first metal grid line 13a may also be less than the sum of the depth H3 of the groove 12 and the height H1 of the second metal grid line 13b, or the height H2 of the first metal grid line 13a may be greater than the sum of the depth H3 of the groove 12 and the height H1 of the second metal grid line 13b. In other words, the sum of the height H2 of the first metal grid line 13a and the height H1 of the second metal grid line 13b and the depth H3 of the groove 12 on the front and back sides of the battery substrate 11 may be the same or different, as long as the conduction and welding requirements with the welding strip 20 are met.

[0069] Reference Figure 5 and Figure 6 The width of the metal grid line 13 is W1, and the width of the groove 12 is W2. In this embodiment, the width W1 of the metal grid line 13 is equal to the width W2 of the groove 12, which can not only meet the welding requirements with the welding strip 20, but also can minimize the shielding of the battery substrate 11.

[0070] In other embodiments, the width W1 of the metal grid line 13 may be smaller than the width W2 of the groove 12, or the width W1 of the metal grid line 13 may be larger than the width W2 of the groove 12. As long as the welding requirements of the welding strip 20 can be met, however, if the width W1 of the metal grid line 13 is too small, the welding strength may be low, and if the width W1 of the metal grid line 13 is too large, the battery substrate 11 may be blocked too much, thereby affecting the light receiving.

[0071] Implementation principle of this embodiment: In this embodiment, a groove 12 is pre-set in the welding contact area of ​​the battery substrate 11. When the low-temperature silver paste is screen-printed, the first metal grid line 13a is set in the groove 12. When assembled, the first metal grid line 13a on the front of the heterojunction solar cell 10 is welded to the first metal grid line 13a on the back of the adjacent heterojunction solar cell 10 through the welding strip 20. Since the groove 12 increases the contact area between the first metal grid line 13a and the battery substrate 11, the mechanical connection strength between the first metal grid line 13a and the battery substrate 11 is improved. Multiple independent grooves 12 are arranged at intervals in a direction parallel to the metal grid line 13, instead of setting a continuous through groove, which solves the problems of long laser process time of the continuous through groove, reduced production capacity, large damage to the substrate, increased fragmentation rate, increased comprehensive production cost, reduced effective velvet area, increased reflectivity, and reduced current. In addition, local grooves 12 are used to increase the contact area instead of increasing the width of the metal grid lines 13 in this area, thereby reducing the surface shading area and improving the current and efficiency of the battery. The obtained heterojunction solar cell 10 has a simple structure, strong operability, and is suitable for large-scale production.

[0072] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0073] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the utility model patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A heterojunction solar cell, characterized in that: include: A battery substrate (11), wherein the battery substrate (11) has a front side and a back side facing each other; Metal grid lines (13), the metal grid lines (13) extending along a first direction and arranged on the front and back sides of the battery substrate (11); the metal grid lines (13) comprising first metal grid lines (13a) and second metal grid lines (13b) arranged at intervals and connected to each other; A plurality of grooves (12) are arranged at intervals on the front and back sides of the battery substrate (11) along the extension direction of the metal grid lines (13); the first metal grid lines (13a) are embedded in the grooves (12), and the second metal grid lines (13b) are arranged on the front and back surfaces of the battery substrate (11) along the first direction.

2. The heterojunction solar cell according to claim 1, characterized in that: The height of the first metal gate line (13a) is H2, the height of the second metal gate line (13b) is H1, the depth of the groove (12) is H3, the height H2 of the first metal gate line (13a) is less than or equal to the sum of the depth H3 of the groove (12) and the height H1 of the second metal gate line (13b), or the height H2 of the first metal gate line (13a) is greater than the sum of the depth H3 of the groove (12) and the height H1 of the second metal gate line (13b).

3. The heterojunction solar cell according to claim 1, characterized in that: The width of the metal grid line (13) is W1, the width of the groove (12) is W2, the width W1 of the metal grid line (13) is less than or equal to the width W2 of the groove (12), or the width W1 of the metal grid line (13) is greater than the width W2 of the groove (12).

4. The heterojunction solar cell according to any one of claims 1 to 3, characterized in that: The width of the groove (12) is less than 40 micrometers, the length of the groove (12) is less than 120 micrometers, and the depth of the groove (12) is less than 30 micrometers.

5. The heterojunction solar cell according to claim 1, characterized in that: The first metal grid lines (13a) and the second metal grid lines (13b) are made of the same or different types of paste.

6. The heterojunction solar cell according to claim 5, characterized in that: The first metal grid lines (13a) and the second metal grid lines (13b) are silver grid lines made of the same type of paste.

7. The heterojunction solar cell according to claim 1, characterized in that: The battery matrix (11) comprises: a silicon substrate having opposing front and back surfaces; A first intrinsic silicon-containing film, a first conductivity type doped silicon-containing film and a first transparent conductive film are sequentially stacked on the front side of the silicon substrate; A second intrinsic silicon-containing film, a second conductivity type doped silicon-containing film, and a second transparent conductive film are sequentially stacked on the back side of the silicon substrate.

8. The heterojunction solar cell according to claim 7, characterized in that: The first intrinsic silicon-containing film and / or the second intrinsic silicon-containing film is a single-layer structure of one of microcrystalline silicon film, nanocrystalline silicon film, amorphous silicon film, microcrystalline silicon oxide film, nanocrystalline silicon oxide film, amorphous silicon oxide film, microcrystalline silicon carbide film, nanocrystalline silicon carbide film and amorphous silicon carbide film, or a stacked-layer structure of at least one of the following films; The first conductive type doped silicon-containing film and / or the second conductive type doped silicon-containing film is a single-layer structure of one of microcrystalline silicon film, nanocrystalline silicon film, amorphous silicon film, microcrystalline silicon oxide film, nanocrystalline silicon oxide film, amorphous silicon oxide film, microcrystalline silicon carbide film, nanocrystalline silicon carbide film and amorphous silicon carbide film, or a stacked-layer structure of at least one of the following films; The first transparent conductive film and / or the second transparent conductive film is a single-layer structure or a stacked-layer structure of a doped metal oxide film, or a single-layer structure or a stacked-layer structure of a nitride film.

9. The heterojunction solar cell according to claim 7, characterized in that: The thickness of the first intrinsic silicon-containing film and / or the second intrinsic silicon-containing film is 1-50 nm; The thickness of the first transparent conductive film and / or the second transparent conductive film is 1-100 nm; The thickness of the first conductivity type doped silicon-containing film and / or the second conductivity type doped silicon-containing film is 1-50 nm.

10. A heterojunction solar cell, characterized in that: include: A plurality of heterojunction solar cells (10), wherein the heterojunction solar cells (10) are the heterojunction solar cells (10) according to any one of claims 1 to 9; A welding ribbon (20), through which the plurality of heterojunction solar cell sheets (10) are electrically connected.

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