Three-color Micro-LED device

Abstract

The utility model discloses a three-color Micro-LED device in the technical field of light emitting diodes, the three-color Micro-LED device comprises a substrate, an n-type GaN layer, a mask layer, n-type GaN nanorods and a coating layer, each n-type GaN nanorod is arranged in a window of one mask layer and extends back to the substrate; the coating layer comprises a quantum well layer, an electron barrier layer and a p-type GaN layer, and the quantum well layer is arranged on the outer surface of the n-type GaN nanorod; wherein the quantum well layer comprises a Ga surface, an N surface and an m / a surface which are mutually isolated, and light emitted from the Ga surface, the N surface and the m / a surface has different wavelengths; the electron blocking layer is arranged on the outer surface of the quantum well layer; the p-type GaN layer is arranged on the outer surface of the electron blocking layer. According to the utility model, the three-color Micro-LED device with a plurality of LED light-emitting structures is obtained, and each LED light-emitting structure is provided with three mutually isolated p-type regions, so that the current density of the p-type electrode of each p-type region can be regulated and controlled, the brightness and gray level of light with different wavelengths can be adjusted in an auxiliary manner, and the performance of the device can be ensured.

Description

Technical Field

[0001] The utility model relates to the technical field of micro light emitting diodes, and in particular to a three-color Micro-LED device. Background Art

[0002] With the continuous advancement of display technology, Micro Light Emitting Diode (Micro-LED) has gradually become an important development direction in the future display technology field due to its high brightness, high contrast, long life and low energy consumption. The key to realizing the widespread application of Micro-LED technology in the field of full-color display is how to efficiently integrate RGB three-color Micro-LED chips on the same substrate. In order to achieve a high-resolution full-color display effect on the display screen, tens of thousands of tiny LEDs need to be accurately transferred from their original growth substrate to the target substrate. This technical process is called "mass transfer".

[0003] From a theoretical perspective, mass transfer technology provides the possibility for efficient manufacturing of Micro-LED displays, but in actual operation, it faces many technical challenges. First, in order to ensure the color uniformity and consistency of the display, the picking and placement accuracy of individual Micro-LEDs is extremely high. In addition, when dealing with hundreds of millions of tiny LEDs, even a small damage rate can lead to significant defects and defective product rates. Therefore, controlling the damage rate during the transfer process is also a technical issue.

[0004] At present, one of the mainstream methods to achieve RGB full-color display is to use InGaN materials to manufacture blue and green LEDs, and use InP materials to manufacture red LEDs. However, there is a material mismatch problem between InGaN-based and InP-based LEDs. Due to the essential differences between InGaN-based LEDs and InP-based LEDs in terms of growth conditions, processing technology, and driving methods, there are many challenges when integrating them into the same display system. For example: the mismatch in the thermal expansion coefficients of the two materials may cause stress when working at different temperatures, which in turn seriously affects the reliability and service life of the device.

[0005] In view of the complexity and cost considerations of mass transfer technology, as well as the mismatch between InGaN and InP materials, researchers have explored a technical solution that does not rely on mass transfer technology, but directly grows RGB quantum wells on the same substrate to integrate RGB Micro-LEDs. However, the superposition of quantum well layers of different wavelengths may lead to lattice mismatch and stress accumulation, thus affecting the quality of the material and device performance. In addition, defects and non-radiative recombination centers that may appear at the interface of the stacked RGB quantum wells will further reduce the luminous efficiency of the device. At the same time, the stacked quantum well structure may also generate more heat during operation, and the accumulation and uneven distribution of heat will seriously affect the performance and life of the device. Utility Model Content

[0006] The purpose of the utility model is to provide a three-color Micro-LED device, which is used to obtain a three-color Micro-LED device with multiple LED light-emitting structures, and each LED light-emitting structure has three mutually isolated p-type regions, so that the current density of the p-type electrode of each p-type region can be regulated, and the situation in which the device performance is affected by uneven heat distribution can be avoided.

[0007] The purpose of the utility model is achieved by the following technical solutions:

[0008] The utility model discloses a three-color Micro-LED device, comprising:

[0009] substrate;

[0010] An n-type GaN layer, wherein the n-type GaN layer is disposed on the substrate;

[0011] A mask layer, wherein the mask layer is disposed on the n-type GaN layer, and a plurality of windows are formed on the mask layer to partially expose the n-type GaN layer;

[0012] A plurality of LED light-emitting structures, wherein the LED light-emitting structures include: n-type GaN nanocolumns and a cladding layer, each of the n-type GaN nanocolumns is arranged in a corresponding window and extends back to the substrate; the cladding layer includes:

[0013] A quantum well layer, wherein the quantum well layer is arranged on the outer surface of the n-type GaN nanocolumn; wherein the quantum well layer includes a Ga face, an N face and an m / a face that are isolated from each other, and the light emitted from the Ga face, the N face and the m / a face has different wavelengths;

[0014] An electron blocking layer, wherein the electron blocking layer is arranged on the outer surface of the quantum well layer;

[0015] A p-type GaN layer is disposed on an outer surface of the electron blocking layer.

[0016] Furthermore, the LED light emitting structure further includes:

[0017] A p-type electrode, used to connect the positive electrode of an external power source; wherein the p-type electrode includes a first p-type electrode, a second p-type electrode and a third p-type electrode, the first p-type electrode is arranged on the p-type GaN layer located on the m / a plane; the second p-type electrode abuts the p-type GaN layer located on the Ga plane and is arranged on the mask layer; the third p-type electrode abuts the p-type GaN layer located on the N plane and is arranged on the mask layer;

[0018] An n-type electrode is disposed on the n-type GaN layer and is used to connect to a negative electrode of an external power source.

[0019] Further, the second p-type electrode includes a first sub-electrode and a second sub-electrode coupled to the first sub-electrode, the first sub-electrode is arranged on the mask layer, the second sub-electrode is arranged on the first sub-electrode and abuts against the p-type GaN layer located on the Ga surface; and / or

[0020] The third p-type electrode includes a third sub-electrode and a fourth sub-electrode coupled to the third sub-electrode, the third sub-electrode is disposed on the mask layer, and the fourth sub-electrode is disposed on the third sub-electrode and abuts the p-type GaN layer located on the N-side.

[0021] Furthermore, there are multiple windows arranged in a lattice, each window is a rectangle, the long side of the rectangle corresponds to the m / a plane direction of the n-type GaN layer, and the short side of the rectangle corresponds to the c-plane direction and -c-plane direction of the n-type GaN layer.

[0022] Furthermore, the length of the long side of the rectangle is 1 to 10 μm, the length of the short side of the rectangle is 100 to 500 nm, the distance between two adjacent windows in the long side direction of the rectangle is 1 to 5 μm, and the distance between two adjacent windows in the short side direction of the rectangle is 2 to 10 μm.

[0023] Furthermore, the area of ​​the Ga surface or the N surface of the quantum well layer is larger than the area of ​​the non-polar surface of the side wall.

[0024] Further, the substrate is an r-plane sapphire substrate, an a / m-plane GaN substrate or an a / m-plane AlN substrate; and / or

[0025] The thickness of the n-type GaN layer is 500 nm to 2 μm; and / or,

[0026] Furthermore, the thickness of the mask layer is 30-200 nm, and the material of the mask layer is SiNx, SiO2 or Al2O3;

[0027] The height of the n-type GaN nanocolumn is 500-5000 nm;

[0028] Furthermore, the quantum well layer includes InGaN layers and GaN layers alternately stacked with a cycle period of 1 to 10, wherein the thickness of the InGaN layer is 2 to 3 nm, and the thickness of the GaN layer is 8 to 15 nm;

[0029] Furthermore, the thickness of the electron blocking layer is 10 to 30 nm, and the electron blocking layer is an AlGaN electron blocking layer;

[0030] Furthermore, the thickness of the p-type GaN layer is 50-300 nm.

[0031] Compared with the prior art, the beneficial effects of the present invention include at least:

[0032] The manufacturing method of the present invention can obtain a three-color Micro-LED device with multiple LED light-emitting structures, and each LED light-emitting structure has three mutually isolated p-type regions. By adjusting the current density of the p-type electrode of each LED light-emitting structure, the brightness and grayscale of light of different wavelengths can be adjusted.

[0033] Furthermore, the utility model has a non-polar n-type GaN nanocolumn with three different polarity faces, namely, Ga face, N face and m / a face, to achieve the integration of RGB three-color Micro-LED devices on a single n-type GaN nanocolumn, greatly improving the pixel integration density, which is conducive to the realization of smaller size and higher resolution Micro-LED devices, such as Micro-LED display screens.

[0034] Furthermore, the utility model has multiple LED light-emitting structures on the same substrate, and has three mutually isolated p-type regions on different crystal planes of the n-type GaN nanocolumns of each LED light-emitting structure. By utilizing the different incorporation efficiencies of In atoms in different crystal plane directions, the three colors of each LED light-emitting structure can be separately controlled, making it easier to control current driving and thermal management. In addition, due to the sufficient strain relaxation of the n-type GaN nanocolumns, when growing structures such as quantum well layers, the material structure characteristics and device performance will not be affected by stress accumulation, and the situation in which the device performance is affected by uneven heat distribution can be avoided. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 This is a schematic structural diagram of an embodiment of a three-color Micro-LED device provided by the utility model;

[0036] Figure 2 It is a schematic structural diagram of the coating layer and nanocolumns in the three-color Micro-LED device provided by the utility model.

[0037] Figure 3 It is a structural schematic diagram of the mask layer provided by the utility model.

[0038] Figure 4 It is a structural schematic diagram of another embodiment of the three-color Micro-LED device provided by the utility model.

[0039] Figure 5 It is a flow chart of an embodiment of a method for manufacturing a three-color Micro-LED device provided by the present invention.

[0040] FIG. 6A to FIG. 6E It is a cross-sectional schematic diagram of the manufacturing process of the three-color Micro-LED device provided by the present invention.

[0041] Fig. 7A yes Fig.6D Top view of the .

[0042] Figure 7B yes Fig. 6E Top view of the .

[0043] Figure 8 It is a schematic diagram of the structure of the coating layer before and after etching provided by the utility model.

[0044] FIG. 9A to FIG. 9G It is a cross-sectional schematic diagram of the manufacturing process of the P-type electrode in the three-color Micro-LED device provided by the present invention.

[0045] Fig.10 It is a schematic diagram of the structure of a three-color Micro-LED device in the prior art.

[0046] In the figure: 1, substrate; 2, n-type GaN layer; 3, mask layer; 4, n-type GaN nanocolumn; 5, quantum well layer; 6, electron blocking layer; 7, p-type GaN layer; 801, first p-type electrode; 802, second p-type electrode; 803, third p-type electrode; 82, n-type electrode; 91, m / a plane; 92, Ga plane; 93, N plane; 94, r plane; 100, cladding layer; 201, first photoresist layer; 202, first electrode window; 203, second photoresist layer; 204, second electrode window; 802a, first sub-electrode; 802b, second sub-electrode; 803a, third sub-electrode; 803b, fourth sub-electrode. DETAILED DESCRIPTION

[0047] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided to make the present invention more comprehensive and complete and to fully convey the concepts of example embodiments to those skilled in the art. The same reference numerals in the figures represent the same or similar structures, and thus their repeated description will be omitted.

[0048] The words expressing positions and directions described in the present utility model are all explained by taking the accompanying drawings as examples, but they can be changed as needed, and all such changes are included in the protection scope of the present utility model.

[0049] Please refer to Figure 1 and Figure 2 , Figure 1 1 is a schematic diagram of the structure of an embodiment of a three-color Micro-LED device provided by the utility model. Figure 2 It is a schematic diagram of the structure of the coating layer and nanocolumns in the three-color Micro-LED device provided by the utility model. The three-color Micro-LED device includes: a substrate 1, an n-type GaN layer 2, a mask layer 3 and multiple LED light-emitting structures. The LED light-emitting structure includes an n-type GaN nanocolumn 4 and a coating layer 100.

[0050] The substrate 1 can be an r-plane sapphire substrate, an a / m-plane GaN substrate or an a / m-plane AlN substrate to prepare a three-color Micro-LED device with an n-type GaN nanocolumn 4 having a non-polar surface. The non-polar surface has good electron transmission properties in the n-type GaN nanocolumn 4, which helps to improve the luminous efficiency and stability of the Micro-LED device, so that the three-color Micro-LED device can achieve richer color performance and improve display quality.

[0051] The n-type GaN layer 2 is disposed on the substrate 1, and the thickness of the n-type GaN layer 2 is 500nm to 2μm, for example, 500nm, 700nm, 900nm, 1.1μm, 1.3μm, 1.5μm, 1.7μm, 1.9μm or 2μm. Specifically, using r-plane sapphire, a / m-plane GaN or a / m-plane AlN as the substrate 1 can form a good lattice match with the n-type GaN layer 2, can reduce lattice defects in the manufacturing process, and further improve the performance and reliability of the Micro-LED device.

[0052] The mask layer 3 is arranged on the n-type GaN layer 2, and the thickness of the mask layer 3 is 30 to 200 nm, for example, it can be 30 nm, 50 nm, 70 nm, 90 nm, 110 nm, 130 nm, 150 nm, 170 nm, 190 nm, or 200 nm; the material of the mask layer 3 is preferably SiNx, SiO2 or Al2O3. Further, a plurality of windows are opened on the mask layer 3 to partially expose the n-type GaN layer 2. Specifically, those skilled in the art can open a plurality of windows on the mask layer 3 according to actual needs, and arrange the plurality of windows in a lattice interval to obtain a first exposed area arranged in a lattice interval, which not only realizes precise control and selective processing of the surface of the n-type GaN layer 2, but also protects the non-exposed part of the n-type GaN layer 2, avoiding unnecessary processing or damage.

[0053] When applied, the window can be set to any shape, such as: circle, oval, square, rectangle, triangle or polygon, etc. Preferably, Figure 3 As shown, each window is set to a rectangle, and the long side direction of the rectangle corresponds to the m / a plane 91 direction of the n-type GaN layer 2, and the short side directions of the rectangle correspond to the c-plane and -c-plane directions of the n-type GaN layer 2 respectively.

[0054] Further, the length D1 of the long side of the rectangle is set to 1-10 μm, the length D2 of the short side of the rectangle is set to 100-500 nm, and the distance D3 between two adjacent windows in the long side direction of the rectangle is set to 1-5 μm, and the distance D4 between two adjacent windows in the short side direction of the rectangle is set to 2-10 μm; for example, D1 can be 1 μm, 2 μm, 3 μm, 4 μm, 5 μm, 6 μm, 7 μm, 8 μm, 9 μm or 10 μm. μm, D2 can be 100nm, 150nm, 200nm, 250nm, 300nm, 350nm, 400nm, 450nm or 500nm, D3 can be 1μm, 1.5μm, 2μm, 2.5μm, 3μm, 3.5μm, 4μm, 4.5μm or 5μm, and D4 can be 2μm, 3μm, 4μm, 5μm, 6μm, 7μm, 8μm, 9μm or 10μm. In actual application, since the Ga surface 92 and the N surface 93 have better electron transmission characteristics, those skilled in the art can correspond the long side of the rectangular window to the Ga surface 92 and the N surface 93 of the n-type GaN layer 2, so that the area of ​​the Ga surface 92 and the N surface 93 of the subsequent epitaxial growth of the n-type GaN nanocolumn 4 is larger than the area of ​​the non-polar surface of the side wall, which can improve the luminous efficiency and stability of the n-type GaN nanocolumn 4. An n-type GaN nanocolumn 4 is arranged in each window, and the extension direction of the n-type GaN nanocolumn 4 is back to the substrate 1, forming an n-type GaN nanocolumn 4 with a smaller size and a higher surface area; specifically, the height of the n-type GaN nanocolumn 4 is 500 to 5000nm, for example, it can be 500nm, 1000nm, 1500nm, 2000nm, 2500nm, 3000nm, 3500nm, 4000nm or 5000nm.

[0055] The Ga surface 92 , N surface 93 and m / a surface 91 of the cladding layer 100 of the present invention are isolated from each other, and the area of ​​the Ga surface 92 or the N surface 93 is larger than the area of ​​the non-polar surface of the side wall.

[0056] In one embodiment, if Figure 2 As shown, the cladding layer 100 includes a quantum well layer 5 , an electron blocking layer 6 and a p-type GaN layer 7 .

[0057] The quantum well layer 5 is arranged on the outer surface of the n-type GaN nanocolumn 4. When used, the quantum well layer 5 includes InGaN layers and GaN layers alternately stacked with a cycle period of 1-10, for example, it can be 1 cycle, 2 cycles, 3 cycles, 4 cycles, 5 cycles, 6 cycles, 7 cycles, 8 cycles, 9 cycles or 10 cycles; the quantum well layer 5 includes 1-10 layers of InGaN layers / GaN layers, so that the quantum well layer 5 has multiple energy levels, so that light of different wavelengths can be generated. Therefore, the multi-color light emission of the Micro-LED device can be achieved by further adjusting the structure and composition of the quantum well layer 5 to meet the needs of different application scenarios.

[0058] Furthermore, in order to ensure that the quantum well layer 5 has sufficient luminous intensity while maintaining good stability and reliability, the thickness of the InGaN layer is set to 2 to 3 nm, and the thickness of the GaN layer is set to 8 to 15 nm; for example, the thickness of the InGaN layer can be 2 nm, 2.1 nm, 2.2 nm, 2.3 nm, 2.4 nm, 2.5 nm, 2.6 nm, 2.7 nm, 2.8 nm, 2.9 nm or 3 nm, and the thickness of the GaN layer can be 8 nm, 8.5 nm, 9 nm, 9.5 nm, 10 nm, 10.5 nm, 11 nm, 10.5 nm, 11 nm, 11.5 nm, 12 nm, 12.5 nm, 13 nm, 13.5 nm, 14 nm, 14.5 nm or 15 nm. In practical applications, the quantum well layer 5 includes mutually isolated Ga face 92, N face 93 and m / a face 91, and the light emitted from Ga face 92, N face 93 and m / a face 91 has different wavelengths, so that the quantum well layer 5 has different emission wavelengths. In some preferred embodiments, those skilled in the art can optimize the luminescence performance of the device by controlling the area and proportion of different crystal faces to achieve more precise color control and higher color saturation.

[0059] The electron blocking layer 6 is arranged on the outer surface of the quantum well layer 5 to prevent electrons from overflowing from the n-type region of the device to the p-type region of the device, thereby improving the efficiency of the device. Preferably, the material of the electron blocking layer 6 is AlGaN, and the thickness of the electron blocking layer 6 is 10 to 30 nm, for example, 10 nm, 12 nm, 14 nm, 16 nm, 18 nm, 20 nm, 22 nm, 24 nm, 26 nm, 28 nm or 30 nm.

[0060] The p-type GaN layer 7 is arranged on the outer surface of the electron blocking layer 6, and the thickness of the p-type GaN layer 7 is 50 to 300 nm, for example, it can be 50 nm, 75 nm, 100 nm, 125 nm, 150 nm, 175 nm, 200 nm, 225 nm, 250 nm, 275 nm or 300 nm.

[0061] In some preferred embodiments, Figure 1 As shown, the three-color Micro-LED device may also include a p-type electrode and an n-type electrode 82. Further, the p-type electrode includes a first p-type electrode 801, a second p-type electrode 802, and a third p-type electrode 803. The first p-type electrode 801 is arranged on the p-type GaN layer 7 located on the m / a surface 91; the second p-type electrode 802 abuts the p-type GaN layer 7 located on the Ga surface 92, and is arranged on the mask layer 3; the third p-type electrode 803 abuts the p-type GaN layer 7 located on the N surface 93, and is arranged on the mask layer 3. Preferably, the second p-type electrode 802 is arranged on the electron blocking layer 6 of the Ga surface 92, the first p-type electrode 801 is arranged on the electron blocking layer 6 of the m / a surface 91, and the third p-type electrode 803 is arranged on the electron blocking layer 6 of the N surface 93, and each p-type electrode is used to connect the positive electrode of the external power supply. The n-type electrode 82 is arranged on the n-type GaN layer 2, and is used to connect the negative electrode of the external power supply to form a complete current loop.

[0062] In some preferred embodiments, Figure 4 As shown, the second p-type electrode 802 includes a first sub-electrode and a second sub-electrode coupled to the first sub-electrode, the first sub-electrode is arranged on the mask layer 3, the second sub-electrode is arranged on the first sub-electrode, and abuts the p-type GaN layer 7 located on the Ga surface 92. The third p-type electrode 803 includes a third sub-electrode and a fourth sub-electrode coupled to the third sub-electrode, the third sub-electrode is arranged on the mask layer 3, the fourth sub-electrode is arranged on the third sub-electrode, and abuts the p-type GaN layer 7 located on the N surface 93.

[0063] When applied, the entire device shares an n-type electrode 82 to connect to the negative electrode of the external power supply, which can not only simplify the manufacturing process, but also reduce the number of electrodes required. However, each crystal face has an independent p-type electrode, so that the p-type region of each LED light-emitting structure in the device can be independently connected to the positive electrode of the external power supply. Further, when the second p-type electrode 802 located on the Ga surface 92 of any LED light-emitting structure is connected to the positive electrode of the external power supply, the corresponding LED light-emitting structure emits blue light; when the third p-type electrode 803 of the N surface 93 of any LED light-emitting structure is connected to the positive electrode of the external power supply, the corresponding LED light-emitting structure emits red light; when the first p-type electrode 801 of the m / a surface 91 of any LED light-emitting structure is connected to the positive electrode of the external power supply, the corresponding LED light-emitting structure emits green light. When applied, when the p-type electrodes of the Ga surface 92, N surface 93 and m / a surface 91 of any LED light-emitting structure are all connected to the positive electrode of the external power supply, the corresponding LED light-emitting structure emits light of the corresponding color. In practical applications, the current density of each p-type electrode of each LED light-emitting structure in the drive control device can be driven according to actual needs to adjust the brightness and grayscale of light of different wavelengths.

[0064] In addition, the utility model introduces a method for manufacturing a three-color Micro-LED device, which can obtain a three-color Micro-LED device with the above-mentioned technical characteristics.

[0065] See also Figure 5 and Figure 6A to Figure 6E , Figure 5 This is a flow chart of an embodiment of a method for manufacturing a three-color Micro-LED device provided by the present invention. FIG. 6A to FIG. 6E This is a cross-sectional schematic diagram of the manufacturing process of the three-color Micro-LED device provided by the utility model. The manufacturing method of the utility model includes the following steps:

[0066] Step S1 : epitaxially growing an n-type GaN layer 2 on a substrate 1 , and depositing a mask layer 3 on the n-type GaN layer 2 .

[0067] Step S1 includes steps S11 and S12.

[0068] Step S11: Fig. 6A As shown, an n-type GaN layer 2 is formed on a substrate 1 .

[0069] Since it is necessary to grow n-type GaN nanocolumns 4 with non-polar faces, r-plane 94 sapphire, a / m-plane GaN or a / m-plane AlN is selected as the substrate 1; the n-type GaN layer 2 can be epitaxially grown on the substrate 1 by methods such as Metal-organic Chemical Vapor Deposition (MOCVD), Molecular beam epitaxy (MBE) or Hydride Vapor Phase Epitaxy (HVPE).

[0070] In one embodiment, under a third growth condition, a third carrier gas and a third reaction source are introduced to epitaxially grow an n-type GaN layer (2) on a substrate (1); wherein the third growth condition comprises: a temperature of 1000-1100° C., a pressure of 100-400 mbar, a V / III ratio of the third reaction source of 500-3000, and the third carrier gas is H2 or a mixed gas of H2 and N2; for example, the temperature may be 1000° C., 1010° C., 1020° C., 1030° C., 1040° C., 1050° C., 1060° C., 1070° C., 1080° C., 1110° C., 1120° C., 1130° C., 1140° C., 1150° C., 1160° C., 1170° C., 1180° C., 1190° C., 1210° C., 1220° C., 1230° C., 1240° C., 1250° C., 1260° C., 1270° C., 1280° C., 1290° C., 1300° C., 1310° C., 1320° C., 1330° C., 1340° C., 1350° C., 1360° C., 1370° C., 1380° C., 1390° C., 1400° C., 1410° C., 1420° C., 1430° C., 1440° C., 1450 ℃, 1080℃, 1090℃ or 1100℃, the pressure can be 100mbar, 125mbar, 150mbar, 175mbar, 200mbar, 225mbar, 250mbar, 300mbar, 325mbar, 350mbar, 375mbar or 400mbar, and the V / III ratio of the third reaction source can be 500, 750, 1000, 1025, 1500, 1750, 2000, 2250, 2500, 2750 or 3000.

[0071] It is worth noting that the V / III ratio is the stoichiometric ratio of group V elements to group III elements.

[0072] Furthermore, the materials required to form the n-type GaN layer 2 include: trimethylgallium (TMGa), SiH 4 and NH 3 . The TMGa flow rate is 20-100sccm, the NH3 flow rate is 3000-12000sccm, and the SiH4 flow rate is 0.2-2sccm; for example, the TMGa flow rate can be 20sccm, 30sccm, 40sccm, 50sccm, 60sccm, 70sccm, 80sccm, 90sccm or 100sccm, the NH3 flow rate can be 3000sccm, 4000sccm, 5000sccm, 6000sccm, 7000sccm, 8000sccm, 9000sccm, 10000sccm, 11000sccm or 12000sccm, and the SiH4 flow rate can be 0.2sccm, 0.4sccm, 0.6sccm, 0.8sccm, 1sccm, 1.2sccm, 1.4sccm, 1.6sccm, 1.8sccm or 2sccm. Those skilled in the art can set the thickness of the n-type GaN layer 2 to 500 nm to 2 μm according to specific application requirements, such as device performance, material quality and other factors.

[0073] In some preferred embodiments, after the epitaxial growth is completed, those skilled in the art can continue to perform annealing or surface treatment and other steps to further improve the quality and performance of the n-type GaN layer 2 .

[0074] The beneficial effects of the above technical solution are as follows: using r-plane 94 sapphire, a / m-plane GaN or a / m-plane AlN as the substrate 1 can form a good lattice match with the n-type GaN layer 2, can reduce lattice defects in the manufacturing process, and further improve the performance and reliability of the Micro-LED device.

[0075] Step S12: Fig. 6A As shown, a mask layer 3 is formed on the n-type GaN layer 2 .

[0076] Based on the plasma enhanced chemical vapor deposition (PECVD) method, the low pressure chemical vapor deposition (LPCVD) method, the atomic layer deposition (ALD) method or the magnetron sputtering method, the chemically and thermally stable SiN x , SiO2 or Al2O3 and other materials, and deposit a mask layer 3 on the n-type GaN layer 2 to protect the substrate 1 and the n-type GaN layer 2.

[0077] Furthermore, in order to ensure that the mask layer 3 has sufficient stability and uniformity to meet the needs of subsequent nanocolumn growth, the thickness of the mask layer 3 is set to 30-200 nm. Those skilled in the art can adjust the thickness of the mask layer 3 according to actual needs.

[0078] Step S2 : opening a plurality of windows on the mask layer 3 to partially expose the n-type GaN layer 2 , and epitaxially growing n-type GaN nanorods 4 on the exposed n-type GaN layer 2 .

[0079] Step S2 includes step S21 and step S22.

[0080] Step S21: Based on photolithography or etching technology, multiple windows are opened on the mask layer 3 to expose part of the n-type GaN layer 2. Figure 6B .

[0081] When multiple windows are opened, the multiple windows are arranged in a lattice at intervals to obtain a first exposed area arranged in a lattice at intervals. Further, the windows can be set to any shape, such as: circular, elliptical, square, rectangular, triangular, polygonal, etc. Preferably, each window is set to a rectangle to control the area of ​​each crystal face of the subsequent epitaxial growth of the n-type GaN nanocolumn 4.

[0082] In one embodiment, based on photolithography or etching technology, a plurality of rectangular windows arranged in a dot matrix are formed on the mask layer 3, and the long side direction of each rectangular window corresponds to the m / a plane 91 direction of the n-type GaN layer 2, and the short side directions of the rectangular window correspond to the c-plane and -c-plane directions of the n-type GaN layer 2, respectively. Figure 3 . Further, the length D1 of the long side of the rectangle is set to 1-10 μm, the length D2 of the short side of the rectangle is set to 100-500 nm, and the distance D3 between two adjacent windows in the long side direction of the rectangle is set to 1-5 μm, and the distance D4 between two adjacent windows in the short side direction of the rectangle is set to 2-10 μm. When applied, those skilled in the art can correspond the long sides of the rectangular windows to the Ga surface 92 and the N surface 93 of the n-type GaN layer 2, so that the area of ​​the Ga surface 92 and the N surface 93 of the subsequent epitaxial growth of the n-type GaN nanocolumn 4 is larger than the area of ​​the non-polar surface of the side wall.

[0083] Step S22: Based on the MOCVD method, epitaxially grow n-type GaN nanorods 4 on the n-type GaN layer 2 exposed in each window, referring to Figure 6C .

[0084] Under the fourth growth condition, a fourth carrier gas and a fourth reaction source are introduced to grow n-type GaN nanocolumns 4; wherein the fourth growth condition includes a temperature of 1000-1100° C., a pressure of 50-200 mbar, a V / III ratio of the fourth reaction source of 50-1000, and the fourth carrier gas is H2 or a mixed gas of H2 and N2; for example, the temperature can be 1000° C., 1010° C., 1020° C., 1030° C., 1040° C., 1050° C., 1060° C., 1070° C., 1080° C., 1090° C., 1111° C., 1120° C., 1130° C., 1140° C., 1150° C., 1160° C., 1170° C., 1180° C., 1190° C., 1210° C., 1220° C., 1230° C., 1240° C., 1250° C., 1260° C., 1270° C., 1280° C., 1290° C., 1310° C., 1320° C., 1330° C., 1340° C., 1350° C., 1360° C., 1370° C., 1380° C., 1390° C., 1400° C., 1410° C., 1420° C., 1430° C. The temperature can be 050°C, 1060°C, 1070°C, 1080°C, 1090°C or 1100°C, the pressure can be 50mbar, 75mbar, 100mbar, 125mbar, 150mbar, 175mbar or 200mbar, and the V / III ratio of the fourth reaction source can be 50, 100, 200, 300, 400, 500, 600, 700, 800, 900 or 1000.

[0085] Further, the materials for growing the n-type GaN nanocolumns 4 include: TMGa, SiH4, and NH3. The flow rates of the source materials: the TMGa flow rate is 20 to 100 sccm, the NH3 flow rate is 200 to 3000 sccm, and the SiH4 flow rate is 0.2 to 2 sccm; for example, the TMGa flow rate is 20 sccm, 30 sccm, 40 sccm, 50 sccm, 60 sccm, 70 sccm, 80 sccm, 90 sccm, or 100 sccm, and the NH3 flow rate is 200 sccm, 300 sccm, 400 sccm, 500 sccm , 750sccm, 1000sccm, 1250sccm, 1500sccm, 1750sccm, 2000sccm, 2250sccm, 2500sccm, 2750sccm or 3000sccm, and the SiH4 flow rate is 0.2sccm, 0.4sccm, 0.6sccm, 0.8sccm, 1sccm, 1.2sccm, 1.4sccm, 1.6sccm, 1.8sccm or 2sccm. Those skilled in the art can set the height of the n-type GaN nanorod 4 to 500-5000nm according to specific application requirements, such as device performance, material quality and other factors.

[0086] In some preferred embodiments, after the epitaxial growth is completed, those skilled in the art may characterize and test the obtained n-type GaN nanorods 4 to evaluate whether their quality, structure and performance meet expectations, such as using scanning electron microscope (SEM), transmission electron microscope (TEM) or X-ray diffractometer (XRD) to analyze the morphology and structure of the n-type GaN nanorods 4, and using electrical testing methods to evaluate the conductive properties of the n-type GaN nanorods 4.

[0087] By forming a plurality of rectangular windows arranged in a lattice on the mask layer 3, the surface of the n-type GaN layer 2 can be precisely controlled and selectively processed; since the Ga surface 92 and the N surface 93 have better electron transmission characteristics, the long sides of the rectangular windows correspond to the Ga surface 92 and the N surface 93 of the n-type GaN layer 2, so that the area of ​​the Ga surface 92 and the N surface 93 of the subsequent epitaxially grown n-type GaN nanocolumn 4 is larger than the area of ​​the non-polar surface of the side wall, which can improve the luminous efficiency and stability of the n-type GaN nanocolumn 4. In addition, the n-type GaN nanocolumn 4 with a smaller size and a higher surface area can absorb and emit light more effectively, thereby improving the luminous efficiency of the device.

[0088] Step S3: growing a quantum well layer 5 covering the outer surface of each n-type GaN nanorod 4 .

[0089] Based on the MOCVD method, 1-10 cycles of InGaN layer and GaN layer are alternately coated on the outer surface of the n-type GaN nanocolumn 4 to form 1-10 layers of InGaN / GaN layer to obtain the quantum well layer 5. Fig.6D , Fig. 7A as well as Figure 2 Furthermore, the quantum well layer 5 grows not only on the top surface of the n-type GaN nanocolumn 4, but also on the side surface of the n-type GaN nanocolumn 4, thereby completely covering the outer surface of the n-type GaN nanocolumn 4, increasing the light-emitting area of ​​the quantum well, and improving the light-emitting efficiency and brightness of the device.

[0090] In one embodiment, under a first growth condition, a first carrier gas and a first reaction source are introduced to grow an InGaN layer; wherein the first growth condition includes a temperature of 700 to 800° C., a pressure of 200 to 600 mbar, and a V / III ratio of the first reaction source of 10,000 to 40,000. For example, the temperature may be 700° C., 710° C., 720° C., 730° C., 740° C., 750° C., 760° C., 770° C., 780° C., 790° C., or 800° C., and the pressure may be 2 00mbar, 250mbar, 300mbar, 350mbar, 400mbar, 450mbar, 500mbar, 550mbar or 600mbar, the V / III ratio of the first reaction source can be 10000, 12500, 15000, 17500, 20000, 22500, 25000, 27500, 30000, 32500, 35000, 37500 or 40000; the first carrier gas is N2.

[0091] Under the second growth condition, a second carrier gas and a second reaction source are introduced to grow a GaN layer; wherein the second growth condition includes a temperature of 830-950°C, a pressure of 200-600 mbar, and a V / III ratio of the second reaction source of 5000-20000. For example, the temperature may be 830°C, 850°C, 870°C, 890°C, 910°C, 930°C or 950°C, the pressure may be 200 mbar, 250 mbar, 300 mbar, 350 mbar, 400 mbar, 450 mbar, 500 mbar, 550 mbar or 600 mbar, the V / III ratio of the first reaction source may be 5000, 7500, 10000, 12500, 15000, 17500 or 20000; and the second carrier gas is N2.

[0092] Further, the materials required for growing the InGaN layer include: triethylgallium (TEGa), trimethylindium (TMIn), and NH3. The Ga-In ratio is 0.1 to 0.4; for example, the TEGa flow rate can be 20sccm, 30sccm, 40sccm, 50sccm, 60sccm, 70sccm, or 80sccm, the TMIn flow rate can be 50sccm, 60sccm, 70sccm, 80sccm, 90sccm, 100sccm, 110sccm, 120sccm, 130sccm, 140sccm, or 150sccm, and the NH3 flow rate can be 5000sccm, 7500sccm, 10000sccm, 12500sccm, 15000sccm, 17500sccm, or 20000sccm. The TEGa flow rate is 20-80 sccm, the TMIn flow rate is 50-150 sccm, and the NH3 flow rate is 5000-20000 sccm. Those skilled in the art can set the thickness of the InGaN layer to 2-3 nm according to specific application requirements.

[0093] The materials required for growing the GaN layer include: TMGa and NH3. The TMGa flow rate is 20 to 50 sccm, and the NH3 flow rate is 5000 to 20000 sccm; for example, the TMGa flow rate can be 20 sccm, 25 sccm, 30 sccm, 35 sccm, 40 sccm, 45 sccm or 50 sccm, and the NH3 flow rate can be 5000 sccm, 7500 sccm, 10000 sccm, 12500 sccm, 15000 sccm, 17500 sccm or 20000 sccm. Those skilled in the art can set the thickness of the GaN layer to 8 to 15 nm according to specific application requirements.

[0094] In some preferred embodiments, after the growth is completed, those skilled in the art may perform subsequent processing on the device, such as annealing, passivation, etc., to further improve the performance and stability of the device.

[0095] By setting up multiple layers of InGaN / GaN layers, the quantum well layer 5 has multiple energy levels, so that light of different wavelengths can be generated, and multi-color light emission of the Micro-LED device can be achieved to meet the needs of different application scenarios. In addition, due to the difference in energy levels of In and Ga, the quantum well layer 5 with InGaN / GaN layers can form an effective quantum confinement effect of electrons and holes, thereby improving the luminous efficiency of the device. Furthermore, by precisely controlling the thickness and composition of the quantum well layer 5, the optoelectronic performance of the device can be effectively controlled.

[0096] Step S4: growing an electron blocking layer 6 on the outer surface of the quantum well layer 5 and growing a p-type GaN layer 7 on the outer surface of the electron blocking layer 6; wherein the quantum well layer 5, the electron blocking layer 6 and the p-type GaN layer 7 form a cladding layer 100.

[0097] Step S4 includes step S41 and step S42.

[0098] Step S41: forming an electron blocking layer 6.

[0099] Based on the MOCVD method, an electron blocking layer 6 is grown on the outer surface of the quantum well layer 5, referring to Fig.6D , Fig. 7A as well as Figure 2 Specifically, the material of the electron blocking layer 6 is AlGaN, and the electron blocking layer 6 is not only grown on the top surface of the quantum well layer 5, but also grown on the side surface of the quantum well layer 5, thereby completely covering the outer surface of the quantum well layer 5, and is used to prevent electrons from overflowing from the n-type region of the device to the p-type region of the device, thereby improving the efficiency of the device.

[0100] In one embodiment, under the fifth growth condition, a fifth carrier gas and a fifth reaction source are introduced to grow the electron blocking layer 6; wherein the fifth growth condition includes a temperature of 950 to 1100° C., a pressure of 100 to 200 mbar, and a V / III ratio of the fifth reaction source of 5000 to 10000. For example, the temperature may be 950° C., 970° C., 990° C., 1010° C., 1030° C., 1050° C., 1070° C., 1090° C. or 1100° C., and the pressure may be 1 00mba, 110mba, 120mba, 130mba, 140mba, 150mba, 160mba, 170mba, 180mba, 190mba or 200mbar, the V / III ratio of the fifth reaction source can be 5000, 5500, 6000, 6500, 7000, 7500, 8000, 8500, 9000, 9500 or 10000; the fifth carrier gas is H2 or a mixed gas of H2 and N2.

[0101] Further, the materials required for forming the electron blocking layer 6 include: TMGa, trimethylaluminum (TMAl) and NH3. The flow rates of the source materials: the flow rate of TMGa is 20-100 sccm, the flow rate of TMAl is 20-100 sccm, and the flow rate of NH3 is 2000-5000 sccm; for example, the flow rate of TMGa can be 20 sccm, 30 sccm, 40 sccm, 50 sccm, 60 sccm, 70 sccm, 80 sccm, 90 sccm or 100 sccm, the flow rate of TMAl can be 20 sccm, 30 sccm, 40 sccm, 50 sccm, 60 sccm, 70 sccm, 80 sccm, 90 sccm or 100 sccm, and the flow rate of NH3 can be 2000 sccm, 2500 sccm, 3000 sccm, 3500 sccm, 4000 sccm, 4500 sccm, or 5000 sccm. Those skilled in the art can set the thickness of the electron blocking layer 6 to 10-30 nm according to specific application requirements.

[0102] Step S42 : forming a p-type GaN layer 7 .

[0103] Based on the epitaxial growth technology, a p-type GaN layer 7 is grown on the outer surface of the electron blocking layer 6, referring to Figure 2 , Fig.6D as well as Fig. 7A Furthermore, the p-type GaN layer 7 is not only grown on the top surface of the electron blocking layer 6 , but also grown on the side surface of the electron blocking layer 6 , thereby completely covering the outer surface of the electron blocking layer 6 .

[0104] In one embodiment, under the sixth growth condition, a sixth carrier gas and a sixth reaction source are introduced to grow the p-type GaN layer 7; wherein the sixth growth condition includes a temperature of 950-1100°C, a pressure of 100-400 mbar, and a V / III ratio of the sixth reaction source of 5000-20000. For example, the temperature may be 950°C, 970°C, 990°C, 1010°C, 1030°C, 1050°C, 1070°C, 1090°C or 1100°C, the pressure may be 100 mbar, 150 mbar, 200 mbar, 250 mbar, 300 mbar, 350 mbar or 400 mbar, and the V / III ratio of the sixth reaction source may be 5000, 7500, 10000, 12500, 15000, 17500 or 20000; the sixth carrier gas is H2 or a mixed gas of H2 and N2.

[0105] Further, the materials required for forming the p-type GaN layer 7 include: TMGa, NH3, and bismuthocene magnesium (CP2Mg). The TMGa flow rate is 20-100 sccm, the NH3 flow rate is 1000-5000 sccm, and the CP2Mg flow rate is 100-400 sccm; for example, the TMGa flow rate can be 20 sccm, 30 sccm, 40 sccm, 50 sccm, 60 sccm, 70 sccm, 80 sccm, 90 sccm or 100 sccm, the NH3 flow rate is 1000 sccm, 1500 sccm, 2000 sccm, 2500 sccm, 3000 sccm, 3500 sccm, 4000 sccm, 4500 sccm or 5000 sccm, and the CP2Mg flow rate is 100 sccm, 150 sccm, 200 sccm, 250 sccm, 300 sccm, 350 sccm or 400 sccm. Those skilled in the art can set the thickness of the p-type GaN layer 7 to 50-300 nm according to specific application requirements.

[0106] In some preferred embodiments, after the growth is completed, those skilled in the art may perform subsequent processing on the device, such as annealing, cleaning and packaging, to further improve the performance and stability of the device.

[0107] The p-type GaN layer is the p-type conductive region of the three-color LED device, and its quality has an important influence on the performance of the device. In this step, the thickness of the p-type GaN layer is controlled at 50 to 300 nm, and this thickness range can ensure sufficient conductivity and luminescence performance. The growth temperature is set at 950 to 1100 ° C, the pressure range is slightly wider (100 to 400 mbar), the V / III ratio is 5000 to 20000, and the carrier gas is H2 (or a mixture of H2 and N2). These parameters are selected to optimize the crystal quality and electrical properties of the p-type GaN layer. During the growth process, the temperature and pressure in the reaction chamber, as well as the flow rate and ratio of the source material, need to be strictly controlled to ensure the uniformity and consistency of the growth. At the same time, the growth process needs to be monitored and adjusted in real time to deal with possible abnormal situations.

[0108] Step S5: Etching the cladding layer 100 to isolate the Ga surface 92, N surface 93 and m / a surface 91 of the quantum well layer 5 from each other to obtain a three-color Micro-LED device, wherein the light emitted from the Ga surface 92, N surface 93 and m / a surface 91 has different wavelengths.

[0109] refer to Figure 1 , Fig. 6E as well as Figure 8Based on the etching technology, the connection between the top and the side of the n-type GaN nanocolumn 4 and the cladding layer 100 on the non-polar surface of the side wall are etched to expose part of the n-type GaN nanocolumn 4, and the Ga surface 92, N surface 93 and m / a surface 91 of the quantum well layer 5 are isolated from each other to obtain a three-color Micro-LED device.

[0110] It is worth noting that the r surface of the coating layer 100 is an inclined surface, that is, Figure 8 In (a), BCGF, CDHG, DAEH and ABFE are four faces; EFIV is the Ga face, GHKK is the N face (or, EFIV is the N face, GHKK is the Ga face). The sidewall non-polar face of the cladding layer 100 refers to the two faces FGJI and EHKV on the side of the cladding layer 100. After etching the r face and the sidewall non-polar face of the cladding layer 100, the obtained Figure 8 (b) After etching, the surface MNSQ is flush with the surface CBWR, and the surface LOTP is flush with the surface ADVU.

[0111] Due to the particularity of the structure, the uniformity and density of the various material layers epitaxially grown on the r-plane 94 at the connection between the top and the side of the n-type GaN nanocolumn 4 are poor. Etching away this part of the material layer covering the growth can effectively prevent leakage. In some preferred embodiments, those skilled in the art can optimize the luminous performance of the device by controlling the area and proportion of different crystal planes to achieve more precise color control and higher color saturation.

[0112] The photolithography process of the utility model may include processes such as coating, exposure, development and degumming; the etching process may be a dry etching process, such as an inductively coupled plasma dry etching (ICP) process, but is not limited thereto. The gas used in the ICP process may be a gas such as chlorine and / or hydrogen chloride. The power of ICP etching is 600-1000W, the pressure is 2-5Pa, and the voltage is 100-200V; for example, the power may be 600W, 650W, 700W, 750W, 800W, 850W, 900W, 950W or 1000W, the pressure may be 2Pa, 2.5Pa, 3Pa, 3.5Pa, 4Pa, 4.5Pa or 5Pa, and the voltage may be 100V, 110V, 120V, 130V, 140V, 150V, 160V, 170V, 180V, 190V or 200V. During etching: Reference Fig. 6E as well as Figure 7B The first photolithography etching is performed to etch the r-surface 94, and the etching depth is not less than the growth thickness of the cladding layer 100, and the remaining photoresist is removed after etching; Figure 1 as well as Fig. 6EThe second photolithography process is performed to perform two non-polar side etchings until the n-type GaN nanocolumn 4 is exposed, and the remaining photoresist is removed after etching.

[0113] In practical application, the method for manufacturing a three-color Micro-LED device also includes the following steps:

[0114] Step S6: forming electrodes.

[0115] Based on physical vapor deposition or sputtering method, using conductive material, first p-type electrode 801 to third p-type electrode 803 are deposited on each p-type GaN layer 7, and n-type electrode 82 is deposited on n-type GaN layer 2. Figure 1 .

[0116] When applied, the entire device shares an n-type electrode 82 to connect to the negative electrode of the external power supply, which can not only simplify the manufacturing process, but also reduce the number of electrodes required. However, each crystal face has an independent p-type electrode, so that the p-type region of each LED light-emitting structure in the device can be independently connected to the positive electrode of the external power supply. Further, when the p-type electrode 81 of the Ga face 92 of any LED light-emitting structure is connected to the positive electrode of the external power supply, the corresponding LED light-emitting structure emits blue light; when the p-type electrode 81 of the N face 93 of any LED light-emitting structure is connected to the positive electrode of the external power supply, the corresponding LED light-emitting structure emits red light; when the p-type electrode 81 of the m / a face 91 of any LED light-emitting structure is connected to the positive electrode of the external power supply, the corresponding LED light-emitting structure emits green light. When applied, when the p-type electrodes 81 of the Ga face 92, N face 93 and m / a face 91 of any LED light-emitting structure are all connected to the positive electrode of the external power supply, the corresponding LED light-emitting structure emits light of the corresponding color. In practical applications, the current density of each p-type electrode 81 of each LED light-emitting structure in the drive control device can be driven according to actual needs to adjust the brightness and grayscale of light of different wavelengths.

[0117] In one embodiment, in order to prepare the first p-type electrode 801 to the third p-type electrode 803, the following scheme may be adopted:

[0118] (A) Fig. 9A As shown, a first photoresist layer 201 is formed on the surface of the device obtained in step S5.

[0119] (B) Fig. 9B As shown, the first photoresist layer 201 is photolithographically processed to form a first electrode window 202 .

[0120] (C) Fig. 9C As shown, electrode material is deposited in the first electrode window 202 to form a first p-type electrode 801 , a first sub-electrode 802 a and a third sub-electrode 803 a .

[0121] (D) Fig.9D As shown, a second photoresist layer 203 is formed on the surface of the device obtained in step (D).

[0122] (E) Fig.9E As shown, the second photoresist layer 203 is photolithographically processed to form a second electrode window 204 .

[0123] (F) Fig.9F As shown, electrode material is deposited in the second electrode window 204 to form a second sub-electrode 802b and a fourth sub-electrode 803b.

[0124] (G) The first photoresist layer 201 and the second photoresist layer 203 are removed, and finally the second p-type electrode 802 and the third p-type electrode 803 are obtained. Figure 9G shown.

[0125] In some preferred embodiments, after the electrode preparation is completed, those skilled in the art may further package and test the device, and then apply it to various lighting and display devices.

[0126] Embodiment 1:

[0127] Please refer to Figure 2 and Figure 4 This embodiment provides a method for manufacturing a three-color Micro-LED device, which includes the following steps:

[0128] Step S1: Provide an r-plane sapphire substrate, adopt the MOCVD method, set the temperature to 1000°C and the pressure to 100 mbar, introduce TMGa and NH3 as reaction sources (V / III ratio is 500), SiH4 as a doping source, and H2 as a carrier gas, and epitaxially grow an n-type GaN layer 2 with a thickness of 500 nm on the substrate 1.

[0129] Step S2: using the PECVD method, depositing a mask layer 3 with a thickness of 30 nm on the n-type GaN layer 2 .

[0130] Step S3: Based on the photolithography technology, a plurality of windows are opened on the mask layer 3 to partially expose the n-type GaN layer 2. The window shape is a rectangle with a long side length of 1 μm and a short side length of 100 nm. The distance between two adjacent windows in the long side direction of the rectangle is 1 μm and the distance between two adjacent windows in the short side direction of the rectangle is 2 μm.

[0131] Step S4: Using the MOCVD method, setting the temperature to 1000°C and the pressure to 50 mbar, introducing TMGa and NH3 as reaction sources (V / III ratio is 50), SiH4 as a doping source, and H2 as a carrier gas, epitaxially grow n-type GaN nanocolumns 4 with a height of 500 nm on the exposed n-type GaN layer 2 in each window.

[0132] Step S5: adopting the MOCVD method and using N2 as a carrier gas, sequentially coating and growing an InGaN layer and a GaN layer on the outer surface of the n-type GaN nanorod 4 to form a quantum well layer 5.

[0133] The thickness of the InGaN layer is 2 nm. The growth conditions of the InGaN layer are as follows: the temperature is set to 700° C., the pressure is set to 200 mbar, TMIn, TEGa, and NH 3 are introduced as reaction sources (V / III ratio is 10000), and N 2 is used as a carrier gas.

[0134] The thickness of the GaN layer is 8 nm, and the growth conditions of the GaN layer are as follows: the temperature is set to 830° C., the pressure is 200 mbar, TMGa and NH 3 are introduced as reaction sources (V / III ratio is 5000), and N 2 is used as a carrier gas.

[0135] Step S6: Using the MOCVD method, set the temperature to 950°C and the pressure to 100 mbar, introduce TMAl, TMGa and NH3 as reaction sources (V / III ratio is 5000), and H2 as a carrier gas to grow an electron blocking layer 6 with a thickness of 10 nm on the outer surface of the quantum well layer 5.

[0136] Step S7: Based on the epitaxial growth technology, the temperature is set to 950°C and the pressure is set to 100 mbar, TMGa and NH3 are introduced as reaction sources (V / III ratio is 5000), CP2Mg is used as the doping source, H2 is used as the carrier gas, and a p-type GaN layer 7 with a thickness of 50 nm is grown on the outer surface of the electron blocking layer 6.

[0137] Step S8: using etching technology, etching the connection between the top and the side of the n-type GaN nanocolumn 4 and the coating layer 100 on the non-polar surface of the side wall, so that the n-type GaN nanocolumn 4 is partially exposed, and the Ga surface 92, N surface 93 and m / a surface 91 of the quantum well layer 5 are isolated from each other.

[0138] Step S9: using physical vapor deposition or sputtering to deposit a p-type electrode on each p-type GaN layer 7 and an n-type electrode 82 on the n-type GaN layer 2 to obtain a three-color Micro-LED device.

[0139] Example 2

[0140] Please refer to Figure 2 and Figure 4 This embodiment provides a method for manufacturing a three-color Micro-LED device, which includes the following steps:

[0141] Step S1: Provide an m-plane GaN substrate, adopt the MOCVD method, set the temperature to 1050°C and the pressure to 250 mbar, introduce TMGa and NH3 as reaction sources (V / III ratio is 1750), SiH4 as a doping source, H2 and N2 as carrier gases, and epitaxially grow an n-type GaN layer 2 with a thickness of 1.25 μm on the substrate 1.

[0142] Step S2: using the PECVD method, depositing a mask layer 3 with a thickness of 115 nm on the n-type GaN layer 2 .

[0143] Step S3: Based on the photolithography technology, a plurality of windows are opened on the mask layer 3 to partially expose the n-type GaN layer 2. The window shape is a rectangle with a long side length of 5 μm and a short side length of 300 nm. The distance between two adjacent windows in the long side direction of the rectangle is 2.5 μm and the distance between two adjacent windows in the short side direction of the rectangle is 6 μm.

[0144] Step S4: Using the MOCVD method, setting the temperature to 1050°C and the pressure to 125 mbar, introducing TMGa and NH3 as reaction sources (V / III ratio is 525), SiH4 as doping source, H2 and N2 as carrier gas, epitaxially growing n-type GaN nanocolumns 4 with a height of 2750 nm on the exposed n-type GaN layer 2 in each window.

[0145] Step S5: adopting the MOCVD method and using N2 as a carrier gas, InGaN layers and GaN layers are alternately grown on the outer surface of the n-type GaN nanorod 4, with a cycle period of 5, to form a quantum well layer 5.

[0146] The thickness of the InGaN layer is 2.5 nm. The growth conditions of the InGaN layer are as follows: the temperature is set to 750° C., the pressure is set to 400 mbar, TMIn, TEGa, and NH 3 are introduced as reaction sources, and the V / III ratio of the reaction source is 35000.

[0147] The thickness of the GaN layer is 11.5 nm. The growth conditions of the GaN layer are as follows: the temperature is set to 890° C., the pressure is 400 mbar, TMGa and NH 3 are introduced as reaction sources, and the V / III ratio of the reaction source is 12500.

[0148] Step S6: Using the MOCVD method, set the temperature to 1025°C and the pressure to 150 mbar, introduce TMAl, TMGa and NH3 as reaction sources (V / III ratio is 7500), H2 and N2 as carrier gases, and grow an electron blocking layer 6 with a thickness of 20 nm on the outer surface of the quantum well layer 5.

[0149] Step S7: Based on the epitaxial growth technology, the temperature is set to 1025°C and the pressure is set to 250 mbar, TMGa and NH3 are introduced as reaction sources (V / III ratio is 12500), CP2Mg is used as the doping source, H2 and N2 are used as carrier gases, and a p-type GaN layer 7 with a thickness of 175 nm is grown on the outer surface of the electron blocking layer 6.

[0150] Step S8: using etching technology, etching the connection between the top and the side of the n-type GaN nanocolumn 4 and the coating layer 100 on the non-polar surface of the side wall, so that the n-type GaN nanocolumn 4 is partially exposed, and the Ga surface 92, N surface 93 and m / a surface 91 of the quantum well layer 5 are isolated from each other.

[0151] Step S9: using physical vapor deposition or sputtering to deposit a p-type electrode 81 on each p-type GaN layer 7 and an n-type electrode 82 on the n-type GaN layer 2 to obtain a three-color Micro-LED device.

[0152] Example 3

[0153] Please refer to Figure 2 and Figure 4 This embodiment provides a method for manufacturing a three-color Micro-LED device, which includes the following steps:

[0154] Step S1: Provide an m-plane AlN substrate, adopt the MOCVD method, set the temperature to 1100°C and the pressure to 400 mbar, introduce TMGa and NH3 as reaction sources (V / III ratio is 3000), SiH4 as a doping source, H2 and N2 as carrier gases, and epitaxially grow an n-type GaN layer 2 with a thickness of 2 μm on the substrate 1.

[0155] Step S2: using the PECVD method, depositing a mask layer 3 with a thickness of 200 nm on the n-type GaN layer 2 .

[0156] Step S3: Based on the photolithography technology, a plurality of windows are opened on the mask layer 3 to partially expose the n-type GaN layer 2. The window shape is a rectangle with a long side length of 10 μm and a short side length of 500 nm. The distance between two adjacent windows in the long side direction of the rectangle is 5 μm and the distance between two adjacent windows in the short side direction of the rectangle is 10 μm.

[0157] Step S4: Using the MOCVD method, setting the temperature to 1100°C and the pressure to 200 mbar, introducing TMGa and NH3 as reaction sources (V / III ratio is 1000), SiH4 as doping source, H2 and N2 as carrier gas, epitaxially grow n-type GaN nanocolumns 4 with a height of 5000 nm on the exposed n-type GaN layer 2 in each window.

[0158] Step S5: adopting the MOCVD method and using N2 as a carrier gas, InGaN layers and GaN layers are alternately grown on the outer surface of the n-type GaN nanorod 4 with a cycle period of 10 to form a quantum well layer 5.

[0159] The thickness of the InGaN layer is 3 nm. The growth conditions of the InGaN layer are as follows: the temperature is set to 800° C., the pressure is set to 600 mbar, TMIn, TEGa, and NH 3 are introduced as reaction sources, and the V / III ratio of the reaction source is 40,000.

[0160] The thickness of the GaN layer is 15 nm. The growth conditions of the GaN layer are as follows: the temperature is set at 950° C. and the pressure is set at 600 mbar. TMGa and NH 3 are introduced as reaction sources. The V / III ratio of the reaction source is 20,000.

[0161] Step S6: Using the MOCVD method, set the temperature to 1100°C and the pressure to 200 mbar, introduce TMAl, TMGa and NH3 as reaction sources (V / III ratio is 10000), H2 and N2 as carrier gases, and grow an electron blocking layer 6 with a thickness of 30 nm on the outer surface of the quantum well layer 5.

[0162] Step S7: Based on the epitaxial growth technology, the temperature is set to 1100°C and the pressure is set to 400 mbar, TMGa and NH3 are introduced as reaction sources (V / III ratio is 20000), CP2Mg is used as the doping source, H2 and N2 are used as carrier gases, and a p-type GaN layer 7 with a thickness of 300 nm is grown on the outer surface of the electron blocking layer 6.

[0163] Step S8: using etching technology, etching the connection between the top and the side of the n-type GaN nanocolumn 4 and the coating layer 100 on the non-polar surface of the side wall, so that the n-type GaN nanocolumn 4 is partially exposed, and the Ga surface 92, N surface 93 and m / a surface 91 of the quantum well layer 5 are isolated from each other.

[0164] Step S9: using physical vapor deposition or sputtering to deposit a p-type electrode 81 on each p-type GaN layer 7 and an n-type electrode 82 on the n-type GaN layer 2 to obtain a three-color Micro-LED device.

[0165] Comparative Example 1

[0166] Comparative Example 1 is a Micro-LED device prepared by an existing stacked growth method. The Micro-LED device includes a substrate and a plurality of LED light-emitting units arranged on the substrate. Each LED light-emitting unit includes a stacked blue quantum well layer, a green quantum well layer, and a red quantum well layer. Fig.10 As shown, the specific preparation process can refer to the existing technology and will not be described in detail here.

[0167] The three-color Micro-LED devices of Examples 1 to 3 and Comparative Example 1 were tested, and the performance test results obtained are shown in Table 1.

[0168] Table 1 Performance test results of three-color Micro-LED devices

[0169]

[0170] It can be seen from the test results that the Micro-LED device manufactured using the method of the utility model has a lower turn-on voltage, the intensity uniformity of the RGB three-color Micro-LED device is improved, and the reduction in device efficiency under high current is alleviated, which provides great help for improving device performance.

[0171] In summary, the manufacturing method of the utility model can obtain a three-color Micro-LED device with multiple LED light-emitting structures, and each LED light-emitting structure has three mutually isolated p-type regions. By adjusting the current density of the p-type electrode of each LED light-emitting structure, the brightness and grayscale of light of different wavelengths can be adjusted.

[0172] Furthermore, the utility model prepares an n-type GaN nanocolumn 4 with a non-polar surface through selective epitaxy, constructs three different polarity surfaces, namely, Ga surface 92, N surface 93 and m / a surface 91, and realizes the integration of three colors of RGB Micro-LED devices on a single n-type GaN nanocolumn 4, thereby greatly improving the integration density of pixels, and is conducive to the realization of smaller size and higher resolution Micro-LED devices, such as Micro-LED display screens.

[0173] Furthermore, due to the particularity of the structure, the uniformity and density of the epitaxially grown material layers at the connection between the top and the side of the n-type GaN nanocolumn 4 of the present invention are poor. Etching away this part of the coated grown material layer can effectively prevent leakage and improve the reliability of the device.

[0174] Furthermore, the utility model forms multiple LED light-emitting structures on the same substrate, and constructs three mutually isolated p-type regions on different crystal planes of the n-type GaN nanocolumns 4 of each LED light-emitting structure. By utilizing the different incorporation efficiencies of In atoms in different crystal plane directions, the utility model can realize separate control of the three colors of each LED light-emitting structure, making it easier to control current driving and thermal management. In addition, due to the sufficient strain relaxation of the n-type GaN nanocolumns 4, when growing structures such as the quantum well layer 5, the material structural characteristics and device performance will not be affected by stress accumulation, and the situation in which the device performance is affected by uneven heat distribution can be avoided.

[0175] Although the embodiments of the utility model have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the utility model. Ordinary technicians in the field can change, modify, replace and modify the above embodiments within the scope of the utility model without departing from the principles and purpose of the utility model. All of these changes should fall within the scope of protection of the claims of the utility model.

Claims

1. A three-color Micro-LED device, characterized in that: include: Substrate (1); An n-type GaN layer (2), the n-type GaN layer (2) being arranged on the substrate (1); A mask layer (3), the mask layer (3) being arranged on the n-type GaN layer (2), and having a plurality of windows on the mask layer (3) for partially exposing the n-type GaN layer (2); A plurality of LED light-emitting structures, the LED light-emitting structures comprising: n-type GaN nanocolumns (4) and a cladding layer (100), each of the n-type GaN nanocolumns (4) being arranged in a corresponding window and extending back toward the substrate (1); the cladding layer comprising: A quantum well layer (5), the quantum well layer (5) being arranged on the outer surface of the n-type GaN nanocolumn (4); wherein the quantum well layer (5) comprises a Ga surface (92), an N surface (93) and an m / a surface (91) which are isolated from each other, and light emitted from the Ga surface (92), the N surface (93) and the m / a surface (91) has different wavelengths; An electron blocking layer (6), wherein the electron blocking layer (6) is arranged on the outer surface of the quantum well layer (5); A p-type GaN layer (7) is provided on the outer surface of the electron blocking layer (6).

2. The three-color Micro-LED device according to claim 1, characterized in that: The LED light emitting structure further comprises: a p-type electrode for connecting to the positive electrode of an external power source; wherein the p-type electrode comprises a first p-type electrode (801), a second p-type electrode (802) and a third p-type electrode (803); the first p-type electrode (801) is arranged on the p-type GaN layer (7) located on the m / a surface (91); the second p-type electrode (802) abuts the p-type GaN layer (7) located on the Ga surface (92) and is arranged on the mask layer (3); the third p-type electrode (803) abuts the p-type GaN layer (7) located on the N surface (93) and is arranged on the mask layer (3); An n-type electrode (82), the n-type electrode (82) being arranged on the n-type GaN layer (2) and used for connecting to a negative electrode of an external power source.

3. The three-color Micro-LED device according to claim 2, characterized in that: The second p-type electrode (802) includes a first sub-electrode and a second sub-electrode coupled to the first sub-electrode, the first sub-electrode is arranged on the mask layer (3), and the second sub-electrode is arranged on the first sub-electrode and abuts against the p-type GaN layer (7) located on the Ga surface (92).

4. The three-color Micro-LED device according to claim 2, characterized in that: The third p-type electrode (803) comprises a third sub-electrode and a fourth sub-electrode coupled to the third sub-electrode, the third sub-electrode being arranged on the mask layer (3), the fourth sub-electrode being arranged on the third sub-electrode and abutting against the p-type GaN layer (7) located on the N surface (93).

5. The three-color Micro-LED device according to claim 1, characterized in that: The windows are multiple and arranged in a lattice at intervals, each of the windows is a rectangle, the long side direction of the rectangle corresponds to the m / a plane direction of the n-type GaN layer (2), and the short side directions of the rectangle correspond to the c-plane direction and -c-plane direction of the n-type GaN layer (2).

6. The three-color Micro-LED device according to claim 5, characterized in that: The length of the long side of the rectangle is 1 to 10 μm, the length of the short side of the rectangle is 100 to 500 nm, the distance between two adjacent windows in the long side direction of the rectangle is 1 to 5 μm, and the distance between two adjacent windows in the short side direction of the rectangle is 2 to 10 μm.

7. The three-color Micro-LED device according to claim 1, characterized in that: The area of ​​the Ga surface (92) or the N surface (93) of the quantum well layer (5) is larger than the area of ​​the non-polar surface of the side wall.

8. The three-color Micro-LED device according to claim 1, characterized in that: The substrate (1) is an r-plane sapphire substrate, an a / m-plane GaN substrate or an a / m-plane AlN substrate; and / or The thickness of the n-type GaN layer (2) is 500 nm to 2 μm; and / or, The thickness of the mask layer (3) is 30 to 200 nm, and the material of the mask layer (3) is SiNx, SiO2 or Al2O3; and / or, The height of the n-type GaN nanocolumn (4) is 500-5000 nm.

9. The three-color Micro-LED device according to claim 1, characterized in that: The quantum well layer (5) comprises InGaN layers and GaN layers alternately stacked with a cycle period of 1 to 10, wherein the thickness of the InGaN layer is 2 to 3 nm, and the thickness of the GaN layer is 8 to 15 nm; and / or The thickness of the electron blocking layer (6) is 10 to 30 nm, and the electron blocking layer (6) is an AlGaN electron blocking layer (6); and / or, The thickness of the p-type GaN layer (7) is 50-300 nm.

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