Power supply system and multi-power-domain power-on and power-off control device thereof
Through the design of the upper and lower power control devices of the multi -electrical source domain, the cooperation of the degraded circuit and the discharge circuit is used to realize the order of the load and the counter -sequential power. Stability and generality.
Patent Information
- Application Number
- CN202420418986.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-05
- Publication Date
- 2025-01-28
- Estimated Expiration
- 2034-03-05
AI Technical Summary
The prior art is difficult to effectively realize the sequential power-on and reverse power-down control of multi-power domains. Especially in complex multi-core and multi-function embedded systems, traditional RC delay circuits cannot meet the timing requirements of reverse shutdown, and are dedicated to power management. Chips and MCUs are less stable in practical applications.
The upper and lower power control devices of a multi -electric source domain are designed, including N power circuits, N's decompression circuits, and N residual release circuits. Caller and counter -sequence. This device ensures the accurate control of the timing of the upper and lower electricity through the cooperation of the delayed circuit and the residual pressure release circuit.
The order of the load is realized and the reverse sequence is turned off to ensure the stability of the system and avoid the limitations of power, the number of power domain channels, and the universality.
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Figure CN222420844U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of system power supply control, in particular to a power supply system and a power-up and power-down control device of multiple power supply domains thereof. Background Art
[0002] In some devices, such as some complex multi-core multi-function embedded systems, due to different functional requirements, manufacturing processes, working mechanisms, response times and other factors of various functional modules, these modules need to be powered on and off according to the set power-on and power-off sequences. If the timing is not handled properly, it is very easy to cause system instability or even permanent damage. In some traditional solutions, the control method using traditional RC delay circuits can only meet the same timing of opening and closing, that is, the timing of sequential opening and sequential closing. For example, when powering on, it is powered on in the order of A, then B, and then C. When powering off, it will also be powered off in the order of A, then B, and then C.
[0003] In some occasions, a power-on and power-off timing sequence of sequential opening and reverse closing is required. The above-mentioned RC delay circuit cannot meet the requirements of such occasions. If the timing sequence of sequential opening and reverse closing is to be met, one current solution is to use a dedicated power management chip. Since such chips are generally designed for the corresponding control timing of the manufacturer's own DSP (Digital Signal Processor) chip, there will be limitations in power, number of power domain channels, versatility, etc. Another solution is to use a simple MCU (Micro Controller Unit) to control the entire power system, but the MCU itself needs to withstand the challenges brought by sudden power supply interference, which makes the stability in actual applications very low.
[0004] In summary, how to effectively solve the problem of realizing power-on and power-off control of multiple power domains is a technical problem that those skilled in the art urgently need to solve. Utility Model Content
[0005] The utility model aims to provide a power supply system and a power-on and power-off control device of multiple power supply domains, so as to effectively solve the problem of realizing power-on and power-off control of multiple power supply domains.
[0006] In order to solve the above technical problems, the utility model provides the following technical solutions:
[0007] In a first aspect, the utility model provides a power-on and power-off control device for multiple power domains, comprising: N power supply circuits, N voltage-reducing circuits, and N residual voltage discharge circuits, where N is a positive integer not less than 2;
[0008] The input ends of the N de-voltage circuits are all connected to the power input end, the output ends of the N de-voltage circuits are sequentially connected to the enable ends of the N power supply circuits in a one-to-one correspondence, and the output ends of the N power supply circuits are respectively connected to N loads;
[0009] Wherein, in the order from 1 to N, the conduction voltages of the N voltage-reducing circuits increase in sequence;
[0010] The first ends of the N residual pressure release circuits are connected to the output ends of the N power supply circuits in sequence and one by one, the second ends of the N residual pressure release circuits are grounded, and the control ends of the N residual pressure release circuits are connected to the output ends of the N pressure relief circuits in sequence and one by one;
[0011] Among them, when the i-th pressure relief circuit is in the on state, the i-th power supply circuit supplies power to the load connected to the i-th power supply circuit; when the i-th pressure relief circuit is not in the on state, the first end of the i-th residual pressure discharge circuit is grounded through the second end of the i-th residual pressure discharge circuit to release the electric energy of the output end of the i-th power supply circuit, i is a positive integer and 1≤i≤N.
[0012] In one embodiment, it further includes: N delay circuits;
[0013] The input ends of the N delay circuits are connected one-to-one with the output ends of the N voltage-reducing circuits in sequence, and the output ends of the N delay circuits are connected one-to-one with the enable ends of the N power supply circuits in sequence.
[0014] In one implementation, the N delay circuits have the same structure and are all delay circuits based on resistors and capacitors.
[0015] In one embodiment, each of the N delay circuits comprises: a first resistor, a second resistor and a first capacitor;
[0016] The first end of the first resistor serves as the input end of the delay circuit, the second end of the first resistor is respectively connected to the first end of the second resistor and the first end of the first capacitor and the connection ends serve as the output end of the delay circuit, and the second end of the second resistor and the second end of the first capacitor are both grounded.
[0017] In one implementation, each of the voltage reduction circuits includes a diode, and a cathode of the diode is used as an input end of the voltage reduction circuit, and an anode of the diode is used as an output end of the voltage reduction circuit.
[0018] In one implementation, it further includes: a decoupling circuit connected to the power input terminal for suppressing interference.
[0019] In one implementation, the decoupling circuit is a decoupling circuit formed by N capacitors connected in parallel.
[0020] In one implementation, each of the N residual voltage discharge circuits comprises: a first switch module, a second switch module, a third resistor, and a fourth resistor;
[0021] The first end of the third resistor serves as the control end of the residual voltage discharge circuit, the second end of the third resistor is connected to the control end of the first switch module, the first end of the first switch module is respectively connected to the second end of the fourth resistor and the control end of the second switch module, the first end of the fourth resistor is connected to the power input end, the second end of the first switch module and the second end of the second switch module are both grounded, and the first end of the second switch module serves as the first end of the residual voltage discharge circuit;
[0022] Wherein, both the first switch module and the second switch module are switches that are turned on when the control end is at a high level.
[0023] In one implementation, each of the N residual voltage discharge circuits further includes a fifth resistor and a sixth resistor;
[0024] The first end of the fifth resistor serves as the first end of the residual voltage discharge circuit, and the second end of the fifth resistor is connected to the first end of the second switch module;
[0025] A first end of the sixth resistor is connected to a first end of the first switch module, and a second end of the sixth resistor is grounded.
[0026] In a second aspect, the utility model provides a power supply system, including the power-on and power-off control device for multiple power domains as described above.
[0027] The technical solution provided by the embodiment of the utility model is applied, and N power supply circuits are provided, all of which can receive electric energy input, and the output ends of the N power supply circuits are respectively connected to N loads, so for any one of the N power supply circuits, after the power supply circuit is enabled, it can supply power to the load. In the scheme of the present application, the input ends of the N decompression circuits are all connected to the electric energy input end, and the output ends of the N decompression circuits are sequentially connected to the enable ends of the N power supply circuits in a one-to-one correspondence, that is, in the scheme of the present application, the enable control of the N power supply circuits can be performed by the N decompression circuits, and the control of the power-on timing of the N loads is realized. Specifically, different decompression circuits have different conduction voltages, and specifically, the conduction voltages of the N decompression circuits rise in sequence from 1 to N. Taking the i-th decompression circuit as an example, the conduction voltage of the i-th decompression circuit refers to the conduction state between the input end of the i-th decompression circuit and the output end of the i-th decompression circuit when the voltage at the input end of the i-th decompression circuit is higher than the conduction voltage of the i-th decompression circuit itself. Since the voltage at the preset power input terminal is from low to high when powered on, the N de-voltage circuits will be turned on in sequence, which enables the N power supply circuits in sequence, that is, in the scheme of the present application, the N loads will be powered on in sequence in the order of 1 to N. When powered off, due to the presence of residual body capacitance at the output terminal of the power supply circuit, the power-off timing of the load is uncontrollable if no influence is applied. The scheme of the present application realizes the reverse shutdown timing through the cooperation of N de-voltage circuits and N residual pressure discharge circuits. Specifically, different de-voltage circuits have different turn-on voltages, and when powered off, the voltage at the power input terminal is from high to low. Therefore, specifically in the order from N to 1, the N de-voltage circuits are turned into the off state in sequence. When the i-th de-voltage circuit is in the on state, the i-th power supply circuit can supply power to the load connected to the i-th power supply circuit. When the i-th depressurization circuit is not in the on state, that is, the i-th depressurization circuit is turned off, the first end of the i-th residual pressure discharge circuit is grounded through the second end of the i-th residual pressure discharge circuit, thereby releasing the electric energy at the output end of the i-th power supply circuit, thus eliminating the influence of the residual bulk capacitance at the output end of the power supply circuit. Since the N depressurization circuits are turned off in sequence from N to 1 during power-off, the N residual pressure discharge circuits release the electric energy at the output end of the power supply circuit in sequence from N to 1, that is, the power-off of the N loads is realized in sequence from N to 1.
[0028] In summary, in the solution of the present application, N loads can be powered on sequentially in the order from 1 to N, and N loads can be powered off in the order from N to 1, that is, the solution of the present application realizes the power-on and power-off timing of sequential opening and reverse closing. In addition, the solution of the present application does not have limitations in terms of power, number of power domain channels, versatility, etc. BRIEF DESCRIPTION OF THE DRAWINGS
[0029] In order to more clearly illustrate the embodiments of the utility model or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0030] Figure 1 It is a first structural schematic diagram of the power-on and power-off control device of multiple power domains in the utility model;
[0031] Figure 2 It is a second structural schematic diagram of the power-on and power-off control device for multiple power domains in the utility model;
[0032] Figure 3 It is a third structural schematic diagram of the power-on and power-off control device for multiple power domains in the utility model;
[0033] Figure 4 It is a fourth structural schematic diagram of the power-on and power-off control device for multiple power domains in the utility model;
[0034] Figure 5 It is a schematic diagram of simulation results in a specific implementation manner of the utility model. DETAILED DESCRIPTION
[0035] The core of the utility model is to provide a power-on and power-off control device for multiple power domains, which can power on N loads in sequence from 1 to N, and power off N loads in sequence from N to 1, that is, the scheme of the present application realizes the power-on and power-off timing sequence of sequential opening and reverse closing. In addition, the scheme of the present application does not have limitations in terms of power, number of power domain channels, versatility, etc.
[0036] In order to enable those skilled in the art to better understand the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present invention.
[0037] Please refer to Figure 1 , Figure 1This is a first structural schematic diagram of the power-up and power-down control device for multiple power domains in the utility model, and the power-up and power-down control device for multiple power domains may include: N power circuits 10, N voltage-reducing circuits 20, and N residual pressure discharge circuits 30, where N is a positive integer not less than 2. The power terminals of the N power circuits 10 may all be connected to a preset power input terminal to receive power input through the power input terminal.
[0038] The input ends of the N voltage-reducing circuits 20 are all connected to the power input end, the output ends of the N voltage-reducing circuits 20 are connected to the enable ends of the N power supply circuits 10 one by one in sequence, and the output ends of the N power supply circuits 10 are connected to N loads respectively;
[0039] The conduction voltages of the N back-off circuits 20 increase in sequence from 1 to N. That is, taking the i-th back-off circuit 20 as an example, when the voltage at the input end of the i-th back-off circuit 20 is higher than the conduction voltage of the i-th back-off circuit 20 itself, the input end of the i-th back-off circuit 20 and the output end of the i-th back-off circuit 20 are in conduction state; i is a positive integer and 1≤i≤N;
[0040] The first ends of the N residual pressure release circuits 30 are connected to the output ends of the N power supply circuits 10 one by one in sequence, the second ends of the N residual pressure release circuits 30 are grounded, and the control ends of the N residual pressure release circuits 30 are connected to the output ends of the N pressure relief circuits 20 one by one in sequence;
[0041] When the i-th buck circuit 20 is in the on state, the i-th power supply circuit 10 can supply power to the load connected to the i-th power supply circuit 10. When the i-th buck circuit 10 is in the on state, the first end of the i-th residual pressure discharge circuit 30 and the second end of the i-th residual pressure discharge circuit 30 are in the off state. When the i-th buck circuit 20 is not in the on state, the first end of the i-th residual pressure discharge circuit 30 is grounded through the second end of the i-th residual pressure discharge circuit 30 to release the electric energy of the output end of the i-th power supply circuit 10.
[0042] Specifically, the solution of the present application is provided with N power supply circuits 10, and the specific circuit structure of the power supply circuit 10 can be set and adjusted according to actual needs. For example, it can be a boost power supply circuit 10 with an enable end, a buck power supply circuit 10 with an enable end, or a voltage-stabilized power supply circuit 10 with an enable end. It can be set and adjusted according to actual needs, and can have an enable end and provide the required voltage level for the load. Figure 1 In FIG. 1 , the enable terminal of each power supply circuit 10 is marked as EN.
[0043] The power supply ends of the N power supply circuits 10 are all connected to the preset power input ends, so that they can receive power input through the power input ends, and the output ends of the N power supply circuits 10 are respectively connected to N loads. Therefore, when the enable end of a power supply circuit 10 is valid, the power supply circuit 10 can supply power to the connected load.
[0044] The input terminals of the N back-off circuits 20 are all connected to the power input terminal, and the output terminals of the N back-off circuits 20 are sequentially connected to the enable terminals of the N power supply circuits 10 in a one-to-one correspondence, and the conduction voltages of the N back-off circuits 20 are sequentially increased in order from 1 to N. The conduction voltage described in the present application can also be referred to as the breakdown voltage of the back-off circuit 20. Taking the i-th back-off circuit 20 as an example, when the input terminal voltage of the i-th back-off circuit 20 is higher than the conduction voltage of the i-th back-off circuit 20 itself, the input terminal of the i-th back-off circuit 20 and the output terminal of the i-th back-off circuit 20 are in a conduction state. Since the output terminals of the N back-off circuits 20 are sequentially connected to the enable terminals of the N power supply circuits 10 in a one-to-one correspondence, it means that when the input terminal voltage of the i-th back-off circuit 20 is higher than the conduction voltage of the i-th back-off circuit 20 itself, the i-th back-off circuit 20 will be turned on, and the enable terminal of the i-th power supply circuit 10 to which it is connected can be enabled.
[0045] Since the voltage at the preset power input terminal gradually rises from zero when powered on, the N voltage relief circuits 20 will be turned on in sequence, so that the N power supply circuits 10 are enabled in sequence, that is, in the scheme of the present application, the N loads will be powered on in sequence from the 1st to the Nth order.
[0046] In addition, it should be noted that when the i-th voltage relief circuit 20 is in the on state, the first end of the i-th residual pressure discharge circuit 30 and the second end of the i-th residual pressure discharge circuit 30 are in the off state, that is to say, during the power-on stage and the normal working process after power-on, each residual pressure discharge circuit 30 does not work, that is, each residual pressure discharge circuit 30 has no effect on the timing when powering on.
[0047] When power is turned off, due to the existence of residual body capacitance at the output end of the power supply circuit 10, if no influence is applied, even if the enable end of each power supply circuit 10 is disabled in a specified order, the power-off timing of the load will be uncontrollable. In this regard, the solution of the present application is to achieve the reverse shutdown timing through the cooperation of N depressurization circuits 20 and N residual pressure discharge circuits 30. The first ends of the N residual pressure discharge circuits 30 are connected to the output ends of the N power supply circuits 10 in sequence, and the second ends of the N residual pressure discharge circuits 30 are grounded. The control ends of the N residual pressure discharge circuits 30 are connected to the output ends of the N depressurization circuits 20 in sequence.
[0048] Specifically, as described above, different back-off circuits 20 have different on-state voltages, and the on-state voltages of the N back-off circuits 20 increase in sequence from 1 to N, and when power is turned off, the voltage at the power input terminal gradually decreases from a high voltage to zero. Therefore, the N back-off circuits 20 specifically change to an off state in sequence from N to 1.
[0049] When the i-th de-voltage circuit 20 is not in the on state, that is, when the i-th de-voltage circuit 20 is turned off, the first end of the i-th residual voltage discharge circuit 30 is grounded through the second end of the i-th residual voltage discharge circuit 30, so that the electric energy of the output end of the i-th power supply circuit 10 can be released. Therefore, when the power is turned off, after the i-th de-voltage circuit 20 is turned off, the influence of the residual body capacitance at the output end of the power supply circuit 10 can be quickly eliminated through the i-th residual voltage discharge circuit 30. Since the N de-voltage circuits 20 are turned off in sequence from N to 1 when the power is turned off, the N residual voltage discharge circuits 30 will also release the electric energy of the output end of the corresponding power supply circuit 10 in the order from N to 1 when the power is turned off, that is, the power-off of N loads in the order from N to 1 is realized.
[0050] From the above, it can be seen that in the scheme of the present application, N loads can be powered on sequentially in the order from 1 to N, and N loads can be powered off in the order from N to 1, thereby realizing a power-on and power-off timing sequence of sequential opening and reverse closing.
[0051] In a specific implementation of the present invention, please refer to Figure 2 , may also include: N delay circuits 40;
[0052] The input ends of the N delay circuits 40 are connected to the output ends of the N voltage-reducing circuits 20 in sequence in one-to-one correspondence, and the output ends of the N delay circuits 40 are connected to the enable ends of the N power supply circuits 10 in sequence in one-to-one correspondence.
[0053] As can be seen from the above description, by setting the values of the on-voltages of the N back-off circuits 20, the sequential power-on of the N loads can be achieved. This implementation further takes into account that in some cases, the difference in the on-voltages of the N back-off circuits 20 may not be particularly large, especially when the value of N is very large, there will be a situation where the on-voltage values of some back-off circuits 20 are similar. In some cases, not only are there requirements for the power-on sequence of the N loads, but there may also be certain requirements for the specific delay durations of different loads in the power-on sequence. In this regard, in this implementation, by adding N delay circuits 40, the required specific delay duration can be more easily achieved, that is, on the basis of satisfying the order from 1 to N to enable the N loads to be powered on sequentially, in this implementation, the specific delay durations of different loads in the power-on sequence can be fine-tuned.
[0054] The specific circuit structures of the N delay circuits 40 can be set and adjusted according to actual needs. For example, in a specific implementation of the present invention, considering that the RC delay circuit 40 has a simple structure and high reliability, the structures of the N delay circuits 40 can be the same and all are delay circuits 40 based on resistors and capacitors, that is, all are RC delay circuits. This design with the same structure is also convenient for implementation in practical applications. Of course, in other occasions, other specific circuit structures of the delay circuit 40 can be selected according to needs, which does not affect the implementation of the present invention.
[0055] See also Figure 3 In a specific implementation of the present utility model, each of the N delay circuits 40 may include: a first resistor R1, a second resistor R2 and a first capacitor C1;
[0056] The first end of the first resistor R1 serves as the input end of the delay circuit 40, the second end of the first resistor R1 is respectively connected to the first end of the second resistor R2 and the first end of the first capacitor C1 and the connected ends serve as the output end of the delay circuit 40, and the second end of the second resistor R2 and the second end of the first capacitor C1 are both grounded.
[0057] Figure 3 In order to facilitate viewing, N is set to 2, that is, only two delay circuits 40 are shown. Figure 3 Taking the first delay circuit 40 in the upper part as an example, the delay circuit 40 is composed of a first resistor R1, a second resistor R2 and a first capacitor C1. After the first voltage relief circuit 20 is turned on, the first capacitor C1 needs to be charged. Therefore, it takes a certain delay for the voltage at the enable end of the first power circuit 10 to reach its trigger threshold, so that the first power circuit 10 is enabled. In practical applications, the voltage trigger thresholds of the enable ends of each power circuit 10 can usually be set to the same value.
[0058] The specific structure of the voltage reduction circuit 20 in the solution of the present application can be set and adjusted according to actual needs, and the functional requirement that the on-state voltages of N voltage reduction circuits increase sequentially can be achieved.
[0059] For example, in a specific embodiment of the present invention, considering that the voltage reduction circuit 20 of the present application can be easily implemented by a diode, the N voltage reduction circuits 20 can all include a diode, and the cathode of the diode is used as the input end of the voltage reduction circuit 20, and the anode of the diode is used as the output end of the voltage reduction circuit 20. In practical applications, a voltage regulator diode or a transient suppression diode is usually used.
[0060] For further information, see Figure 3 Each of the N buck circuits 20 includes a Zener diode, and the cathode of the Zener diode is used as the input end of the buck circuit 20, and the anode of the Zener diode is used as the output end of the buck circuit 20.
[0061] This implementation takes into account that when the buck circuit 20 is implemented based on a Zener diode, some Zener diodes have a wide critical interval, and when the solution of the present application uses a Zener diode to implement the buck circuit 20, it is hoped that the critical interval is as narrow as possible, so that by selecting different device models, different conduction voltages of the buck circuit 20 can be divided. That is to say, in the most ideal case, the critical interval can be represented by a value, and the value is the value of the conduction voltage of the buck circuit 20. In this regard, this implementation uses a Zener diode to implement the buck circuit 20, which can have a very narrow critical interval, which is also convenient for dividing different conduction voltages of the buck circuit 20.
[0062] Figure 3 In the example, the preset power input terminal is marked as VIN, the Zener diode in the first voltage relief circuit 20 is marked as D1, and its conduction voltage or breakdown voltage is recorded as Z1. The Zener diode in the second voltage relief circuit 20 is marked as D2, and its conduction voltage or breakdown voltage is recorded as Z2, Z1<Z2. Therefore, when the power is turned on, VIN rises from low to high. Since D1 is broken down and turned on first, the enable terminal of the first power supply circuit 10 reaches the voltage trigger threshold of the enable terminal first, and the first power supply circuit 10 can output power to the first load. The voltage output by the first power supply circuit 10 to the first load is Figure 3 As VIN continues to rise, it will break through and turn on D2, so that the enable end of the second power supply circuit 10 reaches the voltage trigger threshold of the enable end first, and the second power supply circuit 10 can output power to the second load. The voltage output by the second power supply circuit 10 to the second load is Figure 3 Marked as V2.
[0063] In a specific implementation of the present invention, please refer to Figure 3 , each of the N residual voltage discharge circuits 30 includes: a first switch module Q1, a second switch module Q2, a third resistor R3, and a fourth resistor R4;
[0064] The first end of the third resistor R3 serves as the control end of the residual voltage discharge circuit 30, the second end of the third resistor R3 is connected to the control end of the first switch module Q1, the first end of the first switch module Q1 is respectively connected to the second end of the fourth resistor R4 and the control end of the second switch module Q2, the first end of the fourth resistor R4 is connected to the power input end, the second end of the first switch module Q1 and the second end of the second switch module Q2 are both grounded, and the first end of the second switch module Q2 serves as the first end of the residual voltage discharge circuit 30.
[0065] The first switch module Q1 and the second switch module Q2 are switches that are turned on when the control terminal is at a high level.
[0066] In this implementation, each of the N residual pressure relief circuits 30 is the same, which is also a design commonly used in practical applications, facilitating the implementation of the solution.
[0067] Taking the first power supply circuit 10 as an example, when the first power supply circuit 10 is powered on and started, since the control end of the second switch module Q2 is not powered at first, the second switch module Q2 in the first residual pressure discharge circuit 30 is in the off state, which makes the first residual pressure discharge circuit 30 in the off state. As the voltage at the power input end increases, the first pressure relief circuit 20 is turned on, and the control end of the first switch module Q1 in the first residual pressure discharge circuit 30 is at a high level. At this time, the first switch module Q1 in the first residual pressure discharge circuit 30 is turned on, which makes the control end and the second end of the second switch module Q2 in the first residual pressure discharge circuit 30 grounded, so that the second switch module Q2 of the first residual pressure discharge circuit 30 is in the off state.
[0068] During the normal operation of the first power supply circuit 10, the first switch module Q1 of the first residual voltage discharge circuit 30 continues to remain in the on state, which means that the second switch module Q2 of the first residual voltage discharge circuit 30 continues to remain in the off state, that is, the first residual voltage discharge circuit 30 remains in the off state. Therefore, it can be seen that the first residual voltage discharge circuit 30 has no effect on the power-on sequence.
[0069] When the power is turned off, since VIN drops from high to low, during the process, the Zener diode D2 in the second voltage relief circuit 20 does not meet the conduction condition first, so the enable end of the second power supply circuit 10 will lose power supply, that is, the voltage at the enable end of the second power supply circuit 10 is lower than the voltage trigger threshold of the enable end, making V2 disabled. In actual applications, multiple capacitors are set between the output end of the second power supply circuit 10 and the load. Due to the influence of these body capacitors, if the second residual voltage discharge circuit 30 is not set, even if V2 is disabled, V2 cannot be quickly reduced. However, the second residual voltage discharge circuit 30 is set in the solution of the present application, by Figure 3 It can be seen from the specific circuit structure that after the Zener diode D2 in the second voltage relief circuit 20 is turned off, the control end of the first switch module Q1 of the second residual voltage discharge circuit 30 is at a low level, so that the first switch module Q1 is turned off. At this time, VIN still has a certain value, so that the control end of the second switch module Q2 of the second residual voltage discharge circuit 30 is at a high level, that is, after the first switch module Q1 of the second residual voltage discharge circuit 30 is turned off, the second switch module Q2 of the second residual voltage discharge circuit 30 can be turned on for a short time. During this time period, V2 can be quickly reduced, that is, the power-off of the second load is achieved.
[0070] Similarly, as VIN continues to drop, the Zener diode D1 in the first voltage relief circuit 20 will not meet the conduction condition, so the enable end of the first power supply circuit 10 will lose power supply, that is, the enable end voltage of the first power supply circuit 10 is lower than the voltage trigger threshold of the enable end, making V1 disabled. Similarly to the above, through the first residual voltage discharge circuit 30, V1 can be quickly reduced, that is, the power-off of the first load is achieved.
[0071] Further, in a specific implementation of the present utility model, each of the N residual voltage discharge circuits 30 may further include a fifth resistor R5 and a sixth resistor R6;
[0072] The first end of the fifth resistor R5 serves as the first end of the residual voltage discharge circuit 30, and the second end of the fifth resistor R5 is connected to the first end of the second switch module Q2;
[0073] A first end of the sixth resistor R6 is connected to the first end of the first switch module Q1 , and a second end of the sixth resistor R6 is grounded.
[0074] See also Figure 4Taking the first residual voltage discharge circuit 30 as an example, by setting the fifth resistor R5, when V1 is rapidly reduced, a certain current limiting effect can be achieved to avoid damage to circuit components caused by overcurrent. After setting the sixth resistor R6, after the Zener diode D1 does not meet the conduction condition, the first switch module Q1 can be turned off more quickly, thereby turning on the second switch module Q2 in time to reduce V1.
[0075] Further, in a specific embodiment of the present invention, please refer to Figure 2 , and may also include: a decoupling circuit connected to the power input terminal for suppressing interference, thereby improving the stability of the circuit.
[0076] The specific circuit structure of the decoupling circuit can also be set and adjusted as needed. In a specific implementation of the present invention, the decoupling circuit can be specifically a decoupling circuit composed of N capacitors in parallel, which has a simple structure, high reliability, and good decoupling effect.
[0077] For example, in one case, see Figure 4 , each branch where the power supply circuit 10 is located is provided with a capacitor, Figure 4 They are marked as C11 and C12 respectively, that is, in this case, N parallel capacitors are used to implement the decoupling circuit in this implementation, which can suppress the interference of the input power supply, that is, reduce the non-monotonic fluctuation when the voltage rises / drops.
[0078] See also Figure 5 , is a schematic diagram of simulation results in a specific implementation mode, Figure 5 The VIN curve in is the voltage variation curve of the preset power input terminal, the EN1 curve is the voltage variation curve of the enable terminal of the first power circuit 10, and the EN2 curve is the voltage variation curve of the enable terminal of the second power circuit 10. It can be seen that when power is on, as VIN rises, EN1 reaches the turn-on condition at time t1, that is, EN1 will enable V1 output before EN2, and then EN2 reaches the turn-on condition at time t2 to enable V2 output. When power is off, EN2 stops V2 output at time t3, and then EN1 stops V1 output at time t4.
[0079] Using the technical solution provided by the embodiment of the utility model, N power supply circuits 10 are provided, and the power supply terminals of the N power supply circuits 10 are all connected to the preset power input terminal to receive power input through the power input terminal, and the output terminals of the N power supply circuits 10 are respectively connected to N loads, so that for any one of the N power supply circuits 10, after the power supply circuit 10 is enabled, it can supply power to the load. In the scheme of the present application, the input terminals of the N back pressure circuits 20 are all connected to the power input terminal, and the output terminals of the N back pressure circuits 20 are sequentially connected to the enable terminals of the N power supply circuits 10 in a one-to-one correspondence, that is, in the scheme of the present application, the enablement control of the N power supply circuits 10 can be performed through the N back pressure circuits 20, and the power-on timing of the N loads is controlled. Specifically, different back pressure circuits 20 have different on-state voltages, and specifically, the on-state voltages of the N back pressure circuits 20 rise in sequence from 1 to N. Taking the i-th back pressure circuit 20 as an example, the on-voltage of the i-th back pressure circuit 20 refers to the on-state between the input end of the i-th back pressure circuit 20 and the output end of the i-th back pressure circuit 20 when the voltage at the input end of the i-th back pressure circuit 20 is higher than the on-voltage of the i-th back pressure circuit 20 itself. Since the voltage at the preset power input end position is from low to high at power-on startup, the N back pressure circuits 20 will be turned on in sequence, which also enables the N power supply circuits 10 in sequence, that is, in the scheme of the present application, the N loads will be powered on in sequence in the order of the 1st to the Nth. When powering off, due to the presence of the residual body capacitance at the output end position of the power supply circuit 10, if no influence is applied, the power-off timing of the load cannot be controlled. The scheme of the present application is to achieve the reverse shutdown timing through the cooperation of the N back pressure circuits 20 and the N residual pressure discharge circuits 30. Specifically, different de-voltage relief circuits 20 have different conduction voltages, and when the power is turned off, the voltage at the position of the power input terminal is from high to low, therefore, specifically in the order from N to 1, the N de-voltage relief circuits 20 are turned off in sequence. When the i-th de-voltage relief circuit 20 is in the on state, the i-th power supply circuit 10 can supply power to the load connected to the i-th power supply circuit 10, and the first end of the i-th residual pressure discharge circuit 30 and the second end of the i-th residual pressure discharge circuit 30 are in the off state, that is, the i-th residual pressure discharge circuit 30 does not work at this time. When the i-th de-voltage relief circuit 20 is not in the on state, that is, the i-th de-voltage relief circuit 20 is turned off at this time, the first end of the i-th residual pressure discharge circuit 30 is grounded through the second end of the i-th residual pressure discharge circuit 30, thereby releasing the power at the output end of the i-th power supply circuit 10, and thus eliminating the influence of the residual body capacitance at the output end of the power supply circuit 10.Since the N voltage relief circuits 20 are turned off in sequence in the order from N to 1 during power-off, the N residual pressure discharge circuits 30 release the electric energy at the output end of the power supply circuit 10 in the order from N to 1, that is, the N loads are powered off in the order from N to 1.
[0080] In summary, in the solution of the present application, N loads can be powered on sequentially in the order from 1 to N, and N loads can be powered off in the order from N to 1, that is, the solution of the present application realizes the power-on and power-off timing of sequential opening and reverse closing. In addition, the solution of the present application does not have limitations in terms of power, number of power domain channels, versatility, etc.
[0081] Corresponding to the above embodiments of the up and down power control device for multiple power domains, the embodiments of the utility model further provide a power supply system, which may include the up and down power control device for multiple power domains as in any of the above embodiments, which may correspond to the above.
[0082] It should also be noted that, in this application, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, article or device. In the absence of further restrictions, the elements defined by the statement "comprise a ..." do not exclude the presence of other identical elements in the process, article or device including the elements.
[0083] Each embodiment in this specification is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the embodiments can be referenced to each other. Specific examples are used in this application to illustrate the principle and implementation method of the utility model. The description of the above embodiments is only used to help understand the technical solution and core idea of the utility model. It should be pointed out that for ordinary technicians in this technical field, without departing from the principle of the utility model, the utility model can also be improved and modified, and these improvements and modifications also fall within the scope of protection of the utility model.
Claims
1. A power-on and power-off control device for multiple power domains, characterized in that: include: N power supply circuits, N pressure relief circuits, and N residual pressure discharge circuits, where N is a positive integer not less than 2; The input ends of the N de-voltage circuits are all connected to the power input end, the output ends of the N de-voltage circuits are sequentially connected to the enable ends of the N power supply circuits in a one-to-one correspondence, and the output ends of the N power supply circuits are respectively connected to N loads; Wherein, in the order from 1 to N, the conduction voltages of the N voltage-reducing circuits increase in sequence; The first ends of the N residual pressure release circuits are connected to the output ends of the N power supply circuits in sequence and one by one, the second ends of the N residual pressure release circuits are grounded, and the control ends of the N residual pressure release circuits are connected to the output ends of the N pressure relief circuits in sequence and one by one; Among them, when the i-th pressure relief circuit is in the on state, the i-th power supply circuit supplies power to the load connected to the i-th power supply circuit; when the i-th pressure relief circuit is not in the on state, the first end of the i-th residual pressure discharge circuit is grounded through the second end of the i-th residual pressure discharge circuit to release the electric energy of the output end of the i-th power supply circuit, i is a positive integer and 1≤i≤N.
2. The power-on and power-off control device for multiple power domains according to claim 1, characterized in that: Also includes: N delay circuits; The input ends of the N delay circuits are connected one-to-one with the output ends of the N voltage-reducing circuits in sequence, and the output ends of the N delay circuits are connected one-to-one with the enable ends of the N power supply circuits in sequence.
3. The power-up and power-down control device for multiple power domains according to claim 2, characterized in that: The structures of the N delay circuits are all the same and are all delay circuits based on resistors and capacitors.
4. The power-on and power-off control device for multiple power domains according to claim 3, characterized in that: Each of the N delay circuits comprises: a first resistor, a second resistor and a first capacitor; The first end of the first resistor serves as the input end of the delay circuit, the second end of the first resistor is respectively connected to the first end of the second resistor and the first end of the first capacitor and the connection ends serve as the output end of the delay circuit, and the second end of the second resistor and the second end of the first capacitor are both grounded.
5. The power-on and power-off control device for multiple power domains according to claim 1, characterized in that: Each of the voltage reduction circuits includes a diode, and the cathode of the diode is used as the input end of the voltage reduction circuit, and the anode of the diode is used as the output end of the voltage reduction circuit.
6. The power-on and power-off control device for multiple power domains according to claim 1, characterized in that: Also includes: A decoupling circuit connected to the power input terminal and used for suppressing interference.
7. The power-up and power-down control device for multiple power domains according to claim 6, characterized in that: The decoupling circuit is a decoupling circuit formed by connecting N capacitors in parallel.
8. The power-on and power-off control device for multiple power domains according to any one of claims 1 to 7, characterized in that: Each of the N residual voltage discharge circuits comprises: a first switch module, a second switch module, a third resistor and a fourth resistor; The first end of the third resistor serves as the control end of the residual voltage discharge circuit, the second end of the third resistor is connected to the control end of the first switch module, the first end of the first switch module is respectively connected to the second end of the fourth resistor and the control end of the second switch module, the first end of the fourth resistor is connected to the power input end, the second end of the first switch module and the second end of the second switch module are both grounded, and the first end of the second switch module serves as the first end of the residual voltage discharge circuit; Wherein, both the first switch module and the second switch module are switches that are turned on when the control end is at a high level.
9. The power-on and power-off control device for multiple power domains according to claim 8, characterized in that: Each of the N residual voltage discharge circuits further includes a fifth resistor and a sixth resistor; The first end of the fifth resistor serves as the first end of the residual voltage discharge circuit, and the second end of the fifth resistor is connected to the first end of the second switch module; A first end of the sixth resistor is connected to a first end of the first switch module, and a second end of the sixth resistor is grounded.
10. A power supply system, characterized in that: The invention comprises the power-on and power-off control device for multiple power domains as claimed in any one of claims 1 to 9.
Citation Information
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