Nationwide VPX mainboard based on Feiteng D2000 processor

Abstract

The utility model discloses a nationwide VPX mainboard based on a Feiteng D2000 processor. The nationwide VPX mainboard comprises a minimum system, a dual-redundancy gigabit Ethernet and 10-gigabit Ethernet unit, an SRIO interface conversion unit and a state control management unit, wherein the minimum system is composed of the Feiteng D2000 processor and an X100 set sheet. Domestic components are selected for the design of the mainboard, and the localization rate is 100%; on the basis of full-localization design of hardware and software, on the basis of ensuring functional performance, independent and controllable design requirements are completely met from the hardware level and the software level, various domestic interface chips are compatible, stability and reliability are achieved, and applicability is high.

Description

Technical Field

[0001] The utility model relates to the technical field of computer communication, in particular to a domestically produced VPX mainboard based on a Feiteng D2000 processor. Background Art

[0002] With the rapid development of domestic integrated circuits and the huge improvement of domestic CPU data processing capabilities, domestic CPUs are currently widely used in industrial automation control, intelligent equipment, railway transportation, military industry and other fields. In order to improve the data calculation and processing capabilities of equipment, manufacturers usually use multiple CPUs for parallel processing, which causes the equipment to occupy too much space and has low operating stability. An abnormality in a single device may cause the entire system to be paralyzed or fail.

[0003] Therefore, it is necessary to design a domestically produced VPX motherboard based on Feiteng D2000 processor to overcome the above problems. Utility Model Content

[0004] In order to avoid the above problems, a domestically produced VPX motherboard based on the Feiteng D2000 processor is provided. It uses a domestically produced CPU as the main processor and a domestically produced Galaxy Kirin operating system. At the same time, the peripherals are equipped with domestically produced interface chips, which can realize Gigabit Ethernet, 10 Gigabit Ethernet, PCIe interface, SRIO interface communication and data interaction, and realize the domestic production of hardware and software. The motherboard design uses domestic components, with a localization rate of 100%; based on the domestically produced design of hardware and software, on the basis of ensuring functional performance, it fully meets the independent and controllable design requirements from the hardware and software levels, is compatible with a variety of domestic interface chips, is stable and reliable, and has strong applicability.

[0005] The utility model provides a domestically produced VPX motherboard based on Feiteng D2000 processor, comprising: a minimum system composed of Feiteng D2000 processor and X100 chipset, dual redundant Gigabit Ethernet and 10 Gigabit Ethernet units, SRIO interface conversion unit and state control management unit.

[0006] Preferably, the Feiteng D2000 processor is connected to 8 DDR4 particles and 1 QSPI NOR FLASH.

[0007] Preferably, the X100 chip set is interconnected with the Feiteng D2000 through a PCIe×16 interface as an EP device, DDR4 particles and Flash are mounted externally, and PCIE interface, SATA interface, display interface, and USB interface are externally connected.

[0008] Preferably, the X100 chip set expands the mSATA interface to accommodate an external 64GB SSD chip.

[0009] Preferably, the dual redundant Gigabit Ethernet and 10 Gigabit Ethernet units include a WX1860AL2 chip, which is externally connected to a 1-way PCIE×2 interface extended by the X100 chip set, converts 2-way Gigabit Ethernet interfaces, and configures the 2 network ports as dual redundant Ethernet interfaces.

[0010] Preferably, the dual redundant Gigabit Ethernet and 10 Gigabit Ethernet units include a PHY chip YT8521, which is externally connected to one RGMII interface of the Feiteng D2000 processor, leading out one 1000BASE-T interface, which is led out to the front panel of the module via RJ45 for module and system debugging.

[0011] Preferably, the dual redundant Gigabit Ethernet and 10 Gigabit Ethernet units include WX1820, which is externally connected to the 1 PCIE×8 interface of the Feiteng D2000 processor to realize the conversion of PCIE to 2 10 Gigabit electrical port signals, and is connected to the optical module HTA8525-MD-003SA to convert the 2 10 Gigabit electrical signals into 2 optical signals of the MT interface, which are led out to P6 of the mixed VPX connector and docked with the external MT optical port.

[0012] Preferably, the SRIO interface conversion unit includes a PRB0400 chip, which is externally connected to a 1-way PCIE×4 interface of the Feiteng D2000 processor, converts a 1-way PCIE×4 signal into a 1-way SRIO×4 signal at a rate of 5 Gbps, and leads it out to P1 of the VPX connector.

[0013] Preferably, the state control management unit includes an STC8H series MCU, and the periphery includes an EEPROM, a temperature sensor, a current sensor and a voltage detection. The STC8H series MCU and the Feiteng D2000 processor lead out GPIO and UART interfaces to the outside to collect the voltage, current status, temperature and power enable control information of all power supplies in the board.

[0014] Preferably, one I2C interface of the MCU is led out to P0 of the VPX to access the IPMB health management of the system.

[0015] Compared with the prior art, the utility model has the following beneficial effects:

[0016] 1. The motherboard design uses domestic components, with a localization rate of 100%, reducing the risk of information security leakage when using imported components; based on the national localization design of hardware and software, on the basis of ensuring functional performance, it fully meets the independent and controllable design requirements from the hardware and software levels, ensuring information security and breaking through the foreign chip ban to a certain extent;

[0017] 2. The motherboard is compatible with the domestically produced Kylin V10 operating system. All drivers and applications in the board are based on the Kylin V10 operating system. It is compatible with a variety of domestically produced interface chips, stable, reliable and highly applicable.

[0018] 3. Reliability improvement measures mainly include:

[0019] 1) Dual redundant network: when one network interface fails, it can immediately switch to another network interface, and the switching time is within 90ms;

[0020] 2) The two 10G Ethernet ports back up each other. When one of the 10G optical ports fails to communicate properly, the other backup optical port can be used for communication.

[0021] 3) The board integrates multiple temperature sensors, current and voltage sensors to monitor the temperature and all power supplies in the board. When over-temperature, over-voltage or over-current occurs, the abnormal power supply is cut off in time to avoid irreversible damage to the board and slow down the aging of components;

[0022] 4) All status information in the board is saved in the EEPROM log file external to the MCU of the status control management unit, which is convenient for assisting in analyzing the cause of the abnormality when an abnormality occurs. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 This is a structural schematic diagram of a domestically produced VPX motherboard based on a Feiteng D2000 processor according to a preferred embodiment of the utility model;

[0024] Figure 2 This is a design block diagram of the minimum system composed of the Feiteng D2000 processor and the X100 chip set in a preferred embodiment of the utility model;

[0025] Figure 3 A design block diagram of a dual redundant Gigabit Ethernet and 10 Gigabit Ethernet unit of a preferred embodiment of the utility model;

[0026] Figure 4 A design block diagram of an SRIO interface conversion unit in a preferred embodiment of the utility model;

[0027] Figure 5 This is a design block diagram of a state control management unit of a preferred embodiment of the utility model. DETAILED DESCRIPTION

[0028] The technical solution of the present invention will be described clearly and completely below in conjunction with the accompanying drawings. In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inside", "outside" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.

[0029] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0030] like Figures 1 to 5 As shown, this embodiment provides a domestically produced VPX motherboard based on the Feiteng D2000 processor, including: a minimum system consisting of a Feiteng D2000 processor and an X100 chip set, dual redundant Gigabit Ethernet and 10 Gigabit Ethernet units, an SRIO interface conversion unit and a status control management unit.

[0031] like Figure 1 and Figure 2 As shown in the figure, the motherboard uses the domestic Feiteng D2000 processor, ARM architecture core, and the maximum main frequency is 2.0GHz. Among them, the Feiteng D2000 processor chip is connected to 8 DDR4 particles with a total capacity of 16GB and a maximum data rate of 2400MT / S for data cache; at the same time, the Feiteng D2000 processor is connected to a QSPI NOR FLASH as the startup FLASH, and GigaDevice's 16MB FLASH device is selected to store the CPU startup boot program.

[0032] At the same time, the Feiteng D2000 processor is connected to an X100 chip. As an EP device, the X100 chip is connected to the Feiteng D2000 through a PCIe×16 interface, with DDR4 chips and Flash mounted externally. At the same time, it leads to a variety of peripheral interfaces such as PCIE interface, SATA interface, display interface, USB interface, etc. to realize interface expansion, data processing and image processing functions. Among them, the Feiteng X100 chip is a supporting chip for the Feiteng processor. It can be used with the Feiteng series processor to realize a complete computer solution for various usage scenarios. It can also be used as a display chip to build an independent graphics card for various terminal and server application scenarios. The X100 chip is connected to a 4GB DDR4 chip for caching data; the X100 chip is connected to a 16MB QSPI Flash for the X100 chip to store firmware and startup files, and GigaDevice's 16MB FLASH device is selected; the X100 chip's extended mSATA interface is connected to a 64GB SSD chip for the module's storage system files and log files.

[0033] Dual redundant Gigabit Ethernet is mainly designed through Netcom's WX1860 chip, which converts the PCIE interface into 2-way Gigabit dual redundant network ports. In addition, the CPU's RGMII interface is converted into 1-way Gigabit Ethernet interface for debugging through Yutai Microelectronics' Gigabit PHY chip. 10 Gigabit Ethernet is mainly converted into a 10 Gigabit electrical port through Netcom's WX1820 chip, and the conversion of electrical signals and optical signals is realized through optical modules, and external communication is led out. The SRIO interface conversion unit converts the PCIE interface into an SRIO interface through Jingxinwei's PRB0400 chip, and realizes data interaction through VPX. The state control management unit is designed with the STC8H series MCU as the main control chip. The periphery includes EEPROM, temperature sensor, current sensor, voltage detection, etc., to realize the temperature, current, and voltage monitoring in the board, ensure the stability of the board state, and realize the power on and off control and reset control of the board power supply, so as to realize the state control and management of the whole board.

[0034] like Figure 1 and Figure 3The figure shows the design block diagram of the dual redundant Gigabit Ethernet and 10 Gigabit Ethernet units. The 1-way RGMII interface of the Feiteng D2000 processor is connected to the PHY chip YT8521 of Yutai Microelectronics, leading to a 1000BASE-T interface; it is led to the front panel of the module through RJ45 for module and system debugging. The Feiteng D2000 processor uses one of the PCIE×8 interfaces to connect to the WX1820 of Netxun to realize the conversion of PCIE to 2-way 10 Gigabit electrical port signals, and uses the optical module HTA8525-MD-003SA of AVIC Optronics to convert the 2-way 10 Gigabit electrical signals into 2-way MT interface optical signals, leading to the P6 of the mixed VPX connector, and docking with the external MT optical port to realize the communication and data exchange of 10 Gigabit optical signals. At the same time, the 1-way PCIE×2 interface expanded by the X100 set is connected to the WX1860AL2 chip of Netxon, converting 2-way Gigabit Ethernet interfaces and configuring the 2 network ports as dual-redundant Ethernet interfaces, which can achieve dual-redundant network switching performance within 90ms and improve the reliability of the Gigabit network interface.

[0035] like Figure 1 and Figure 4 The figure shows the design block diagram of the SRIO interface conversion unit. The 1-way PCIE×4 interface of Feiteng D2000 is connected to the PRB0400 chip of Jingxin Microelectronics, which converts 1-way PCIE×4 signal into 1-way SRIO×4 signal with a rate of 5Gbps, and leads it to P1 of the VPX connector to realize data interaction and communication with external SRIO devices.

[0036] like Figure 1 and Figure 5 As shown in the figure, it is a design block diagram of the state control management unit. The Feiteng D2000 processor leads out GPIO and UART interfaces, and connects an STC8H series MCU to perform data communication. At the same time, the MCU is used to monitor and control the status of the entire board; and the MCU is connected to an LED status indicator and a reset button, etc. The LED status indicator is used to indicate the working status of the board, and the reset button is input to the MCU, and the reset of the entire module is controlled by the MCU. The state control management unit is implemented by the MCU, which is used to collect the voltage, current status, temperature and power enable control of all power supplies in the board, and monitor the voltage, current and temperature of all power supplies in the board in real time to prevent overvoltage, overcurrent, overtemperature and other abnormalities from causing irreversible damage to the board, thereby improving the reliability and stability of the board. At the same time, the MCU reserves an I2C interface to lead out to P0 of the VPX, access the system's IPMB health management, realize system health status management, and greatly improve the stability and reliability of the system and equipment.

[0037] In this embodiment, the Feiteng D2000 processor used in the mainboard effectively improves the data transmission and information processing capabilities, meets the standard 6U VPX specification, and ensures that the functional performance meets the requirements. The board size is as small as possible and meets the specification requirements. At the same time, the internal memory and storage unit are used to provide sufficient space and environment for the data processing of the module to meet the needs of more scenarios. Among them, the mainboard includes a health management unit, which mainly realizes the detection and monitoring of the temperature, power supply voltage and current inside the module, and performs real-time and effective monitoring of the board state itself, preventing the module from working in overtemperature or extreme working conditions for a long time, avoiding atypical damage and aging of the module, improving the safety and reliability of the module when it is used, and extending the service life of the module. At the same time, the mainboard adopts a 6U reinforced structure design, and a reinforced cold plate is installed on the front of the module to conduct and diffuse the heat generated by the heating chip (Feiteng D1000 processor, X100 bridge chip, power chip, Gigabit and 10 Gigabit Ethernet chip) to the reinforced cold plate, and then conduct it to the chassis through the cold plate for heat dissipation to ensure that the module works at a normal working temperature.

[0038] The motherboard design uses domestic components, with a localization rate of 100%, reducing the risk of information security leakage when using imported components; based on the national design of hardware and software, on the basis of ensuring functional performance, it fully meets the independent and controllable design requirements from the hardware and software levels, ensuring information security and breaking through the foreign chip ban to a certain extent. In addition, it is adapted to the domestic Galaxy Kirin V10 operating system. All drivers and applications in the board are based on the Galaxy Kirin V10 operating system, compatible with a variety of domestic interface chips, stable and reliable, and highly applicable. At the same time, the reliability is improved, specifically including: a. Dual redundant network. When one network interface has an abnormality, it can immediately switch to another network port, and the switching time is within 90ms; b. The two 10 Gigabit network ports back up each other. When one of the 10 Gigabit optical ports has a communication abnormality, the other backup optical port can be used for communication; c. The board integrates multiple temperature sensors, current and voltage sensors to monitor the temperature and all power supplies in the board. When overtemperature, overvoltage or overcurrent occurs, the abnormal power supply is cut off in time to avoid irreversible damage to the board and slow down the aging of components; d. All status information in the board is saved in the EEPROM log file external to the MCU of the status control management unit. When an abnormality occurs, it is convenient to assist in analyzing the cause of the abnormality.

[0039] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the utility model, rather than to limit it. Although the utility model has been described in detail with reference to the aforementioned embodiments, ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not make the essence of the corresponding technical solution deviate from the scope of the technical solution of the embodiments of the utility model.

Claims

1. A domestically produced VPX motherboard based on Feiteng D2000 processor, characterized in that: include: The minimum system consists of Feiteng D2000 processor and X100 chipset, dual redundant Gigabit Ethernet and 10 Gigabit Ethernet units, SRIO interface conversion unit and status control management unit.

2. The domestically produced VPX motherboard based on the Feiteng D2000 processor as claimed in claim 1, characterized in that: The Feiteng D2000 processor is connected to 8 DDR4 particles and 1 QSPI NOR FLASH.

3. The domestically produced VPX motherboard based on the Feiteng D2000 processor as claimed in claim 1, characterized in that: As an EP device, the X100 chip set is interconnected with the Feiteng D2000 through a PCIe×16 interface, with DDR4 particles and Flash mounted externally, and PCIE interface, SATA interface, display interface, and USB interface exposed externally.

4. The domestically produced VPX motherboard based on the Feiteng D2000 processor as claimed in claim 3, characterized in that: The X100 chip set expands the mSATA interface to accommodate a 64GB SSD.

5. The domestically produced VPX motherboard based on the Feiteng D2000 processor as claimed in claim 3, characterized in that: The dual redundant Gigabit Ethernet and 10 Gigabit Ethernet units include the WX1860AL2 chip, which is connected to the 1-way PCIE×2 interface extended by the X100 chip set, converts 2-way Gigabit Ethernet interfaces, and configures the 2-way network ports as dual redundant Ethernet interfaces.

6. The domestically produced VPX motherboard based on the Feiteng D2000 processor as claimed in claim 1, characterized in that: The dual redundant Gigabit Ethernet and 10 Gigabit Ethernet units include the PHY chip YT8521, which is connected to the 1-way RGMII interface of the Feiteng D2000 processor, and leads out a 1000BASE-T interface, which is led out to the front panel of the module through RJ45 for module and system debugging.

7. The domestically produced VPX motherboard based on the Feiteng D2000 processor as claimed in claim 1, characterized in that: The dual redundant Gigabit Ethernet and 10 Gigabit Ethernet units include WX1820, which is connected to the 1 PCIE×8 interface of the Feiteng D2000 processor to realize the conversion of PCIE to 2 10 Gigabit electrical port signals, and is connected to the optical module HTA8525-MD-003SA to convert 2 10 Gigabit electrical signals into 2 optical signals of MT interface, which are led out to P6 of the mixed VPX connector and connected to the external MT optical port.

8. The domestically produced VPX motherboard based on the Feiteng D2000 processor as claimed in claim 1, characterized in that: The SRIO interface conversion unit includes the PRB0400 chip, which is connected to the 1-way PCIE×4 interface of the Feiteng D2000 processor, converts the 1-way PCIE×4 signal into 1-way SRIO×4 signal at a rate of 5Gbps, and leads it out to P1 of the VPX connector.

9. The domestically produced VPX motherboard based on the Feiteng D2000 processor as claimed in claim 1, characterized in that: The state control management unit includes an STC8H series MCU, and the periphery includes an EEPROM, a temperature sensor, a current sensor, and a voltage detector. The STC8H series MCU and the Feiteng D2000 processor lead out GPIO and UART interfaces to the outside to collect the voltage, current status, temperature, and power enable control information of all power supplies in the board.

10. The domestically produced VPX motherboard based on the Feiteng D2000 processor as claimed in claim 9, characterized in that: One I2C interface of the MCU is connected to P0 of the VPX and accessed to the IPMB health management of the system.

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