Power management circuit

Abstract

A power management circuit disclosed by the present application comprises a power management chip, a power switch circuit, a conversion input and output circuit, a current detection circuit and a voltage detection circuit which are electrically connected in sequence, the conversion input and output circuit comprises a first DC-DC converter, a second DC-DC converter, an MOS tube QP4, an MOS tube QP5, an MOS tube QP6 and an MOS tube QP7, the first DC-DC converter is connected with the MOS tube QP4 and the MOS tube QP5, and the second DC-DC converter is connected with the MOS tube QP6 and the MOS tube QP7. The second DC-DC converter is connected with the MOS tube QP6 and the MOS tube QP7, the current detection circuit detects the current magnitude of the conversion input and output circuit and feeds back the current magnitude to the power management chip, and the voltage detection circuit detects the voltage magnitude of the conversion input and output circuit and feeds back the voltage magnitude to the power management chip. The working efficiency of the power supply is improved, the problems of maintenance and the like caused by scheme reasons are reduced, and the cost is reduced.

Description

Technical Field

[0001] The utility model relates to the technical field of electronic information, in particular to a power management circuit capable of improving the efficiency of power supply in use. Background Art

[0002] Mobile devices such as cell phones, portable devices, and laptops all require dedicated power management control chips to manage the charging and discharging of their batteries. Due to efficiency and heat dissipation considerations, these power management chips are increasingly adopting switching modes with higher conversion efficiency. Existing power management chips suffer from power instability and interference caused by irregular designs. Therefore, there is an urgent need to address the poor power stability and high interference issues of existing technologies. Utility Model Content

[0003] In view of the above technical problems, the present invention provides a power management circuit that can improve the efficiency of power supply in use.

[0004] An embodiment of the present utility model provides a power management circuit, comprising a power management chip, a power switch circuit, a conversion input-output circuit, a current detection circuit, and a voltage detection circuit electrically connected in sequence. The conversion input-output circuit comprises a first DC-DC converter, a second DC-DC converter, MOS transistors QP4, QP5, QP6, and QP7. The first DC-DC converter is connected to MOS transistors QP4 and QP5, and the second DC-DC converter is connected to MOS transistors QP6 and QP7. The current detection circuit detects the current of the conversion input-output circuit and feeds it back to the power management chip. The voltage detection circuit detects the voltage of the conversion input-output circuit and feeds it back to the power management chip.

[0005] Optionally, the circuit also includes a power supply circuit, which includes a 5V power supply, a resistor RP8, a capacitor CP26, a resistor RP3, a resistor RP9, capacitors CP27, CP28, and a resistor RP4. One end of the resistor RP8 is connected to the 5V power supply, and the other end is respectively connected to one end of the capacitor CP26 and the VCC pin of the power management chip. The other end of the capacitor CP26 is grounded. One end of the resistor RP4 is connected to the 5V power supply, and the other end is respectively connected to the resistor RP4, the capacitor CP27 and the VSYS pin of the power management chip. One end of the resistor RP9 is connected to the 5V power supply, and the other end is respectively connected to the capacitor CP28 and the VIN pin of the power management chip.

[0006] Optionally, the first DC-DC converter and the second DC-DC converter use RT9610 chips.

[0007] Optionally, the voltage detection circuit includes a resistor RP939, a resistor RP43, a resistor CP946, a capacitor CP964, a capacitor CP965 and a capacitor CP966, one end of the resistor RP939 is connected to the voltage detection end, and the other end is connected to one end of the capacitor CP964, and the other end of the capacitor CP964 is grounded through the resistor CP946; one end of the resistor RP43 is connected to the voltage detection end, and the other end is respectively connected to one end of the capacitor CP965 and one end of the capacitor CP966, and the other ends of the capacitor CP965 and the capacitor CP966 are grounded.

[0008] Optionally, the power switch circuit includes an inductor LP3 , one end of the inductor LP3 is connected to the PHASE pin of the first DC-DC converter, and the other end is connected to the capacitor CP109 and the capacitor CP110 .

[0009] Optionally, the current further includes a temperature detection circuit, and the current detection circuit is used to detect the temperature on both sides of the inductor LP3 and transmit the temperature to the power management chip.

[0010] Optionally, the power switch circuit further includes a resistor RP57 and a resistor RP58, one end of the resistor RP57 is connected to the UGGATE pin of the first DC-DC converter, and the other end is connected to the gate of the MOS transistor QP4, and one end of the resistor RP58 is connected to the LGATE pin of the first DC-DC converter, and the other end is connected to the gate of the MOS transistor QP5.

[0011] Optionally, the power switch circuit further includes a resistor RP62 and a resistor RP63, one end of the resistor RP62 is connected to the UGGATE pin of the second DC-DC converter, and the other end is connected to the gate of the MOS transistor QP6, and one end of the resistor RP63 is connected to the LGATE pin of the second DC-DC converter, and the other end is connected to the gate of the MOS transistor QP7.

[0012] Optionally, the power switch circuit further includes a capacitor CP35, a capacitor CP36, a capacitor CP37, a capacitor CP22 and a capacitor CP23, one end of each of the capacitors CP35, CP36, CP37, CP22 and CP23 is connected to the drain of the MOS transistor QP4, and the other ends are grounded respectively.

[0013] Preferably, the power switch circuit further includes capacitors CP44, CP45 and CP46, one ends of which are connected to the drain of the MOS transistor QP6 and the inductor LP21 respectively, and the other ends are grounded respectively.

[0014] The technical solution provided in the embodiment of the present utility model includes a power management chip, a power switch circuit, a conversion input and output circuit, a current detection circuit and a voltage detection circuit that are electrically connected in sequence. The current detection circuit detects the current size of the conversion input and output circuit and feeds back to the power management chip. The voltage detection circuit detects the voltage size of the conversion input and output circuit and feeds back to the power management chip. Compared with the existing technology, the present utility model reduces the instability of the power supply, improves the anti-interference performance, obtains the highest power supply ratio, improves the power supply working efficiency, reduces maintenance and other problems caused by the solution, and reduces costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 This is a schematic diagram of the overall circuit of a power management circuit of the present utility model.

[0016] Figure 2 This is a circuit diagram of the power switch circuit of the utility model.

[0017] Figure 3 This is a circuit diagram of the input-output conversion circuit of the utility model.

[0018] Figure 4 This is a circuit diagram of the voltage detection circuit of the utility model. DETAILED DESCRIPTION

[0019] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative efforts shall fall within the scope of protection of the present invention.

[0020] It should be noted that, when an element is described as being “connected” or “connected to” another element, it may be directly connected to the other element, or one or more intervening elements may exist therebetween.

[0021] This utility model provides a power management circuit, please refer to Figure 1-Figure 2As shown, the circuit includes a power management chip 10, a power switch circuit 20, a conversion input-output circuit 30, a current detection circuit 40, and a voltage detection circuit 50 electrically connected in sequence. The conversion input-output circuit 30 includes a first DC-DC converter, a second DC-DC converter, a MOS transistor QP4, a MOS transistor QP5, a MOS transistor QP6, and a MOS transistor QP7. The first DC-DC converter is connected to the MOS transistor QP4 and the MOS transistor QP5, and the second DC-DC converter is connected to the MOS transistor QP6 and the MOS transistor QP7. The current detection circuit 40 detects the current of the conversion input-output circuit 30 and feeds it back to the power management chip 10. The voltage detection circuit 50 detects the voltage of the conversion input-output circuit 30 and feeds it back to the power management chip 10.

[0022] Please refer to Figure 2 As shown, the power switch circuit 20 also includes a power supply circuit 21, which includes a 5V power supply, a resistor RP8, a capacitor CP26, a resistor RP3, a resistor RP9, capacitors CP27, CP28, and a resistor RP4. One end of the resistor RP8 is connected to the 5V power supply, and the other end is respectively connected to one end of the capacitor CP26 and the VCC pin of the power management chip 10. The other end of the capacitor CP26 is grounded. One end of the resistor RP3 is connected to the 5V power supply, and the other end is respectively connected to one end of the resistor RP4, one end of the capacitor CP27, and the VSYS pin of the power management chip. The other end of the resistor RP4 is grounded, and the other end of the capacitor CP27 is grounded. One end of the resistor RP9 is connected to the 5V power supply, and the other end is respectively connected to one end of the capacitor CP28 and the VIN pin of the power management chip. The other end of the capacitor CP28 is grounded.

[0023] In one embodiment of the present invention, the first DC-DC converter and the second DC-DC converter use RT9610 chips.

[0024] The power switch circuit 20 further includes a power input / output and configuration circuit 22 , which includes an inductor LP3 , one end of which is connected to the PHASE pin of the first DC-DC converter, and the other end of which is connected to capacitors CP109 and CP110 , respectively.

[0025] The power switch circuit 20 also includes a resistor RP57 and a resistor RP58. One end of the resistor RP57 is connected to the UGGATE pin of the first DC-DC converter, and the other end is connected to the gate of the MOS transistor QP4. One end of the resistor RP58 is connected to the LGATE pin of the first DC-DC converter, and the other end is connected to the gate of the MOS transistor QP5. The MOS transistor QP4 uses the MDU1514 chip, and the MOS transistor QP5 uses the MDU1517 chip. The gate of the MOS transistor QP5 is also grounded via a capacitor CP40. The gate of the MOS transistor QP4 is connected to one end of the resistor RP54, and the other end of the resistor RP54 is connected to the PHASE pin of the power management chip 10.

[0026] The power switch circuit 20 also includes resistors RP62 and RP63. Resistor RP62 has one end connected to the UGGATE pin of the second DC-DC converter and the other end connected to the gate of MOS transistor QP6. Resistor RP63 has one end connected to the LGATE pin of the second DC-DC converter and the other end connected to the gate of MOS transistor QP7. MOS transistor QP6 utilizes the MDU1516 chip, while MOS transistor QP7 utilizes the MDU1514 chip. The gate of MOS transistor QP7 is also grounded via capacitor CP53. The gate of MOS transistor QP6 is connected to one end of resistor RP52, the other end of which is connected to the PHASE pin of the power management chip 10.

[0027] The power switch circuit 20 further includes capacitors CP35, CP36, CP37, CP22, and CP23. One ends of the capacitors CP35, CP36, CP37, CP22, and CP23 are connected to the drain of the MOS transistor QP4, and the other ends are grounded.

[0028] The power switch circuit 20 further includes capacitors CP44, CP45 and CP46. One ends of the capacitors CP44, CP45 and CP46 are connected to the drain of the MOS transistor QP6 and the inductor LP21 respectively, and the other ends are grounded respectively.

[0029] In the power management circuit described in the present invention, the power circuit 21 should be placed near the power management chip 10 and close to the pins to reduce attenuation. The power input / output and configuration circuit 22 should be placed near the first DC-DC converter U19, with resistors RP57, RP58, RP54, capacitors CP40, CP35, CP36, CP37, CP22, CP23, and inductor LP3 placed near MOS transistors QP4 and QP5. No other traces should be placed near inductor LP3 to prevent interference. MOS transistors QP6 and QP7 should be placed near the second DC-DC converter U20, with related resistors RP62, RP52, RP63, capacitors CP53, CP44, CP45, CP46, and inductors placed near MOS transistors QP6 and QP6 to achieve a better output of a set of power supplies.

[0030] Please refer to Figure 3 The figure shows a circuit diagram of the input-output conversion circuit of the present invention, which includes an input power supply 31, which is the power supply input to the power management chip 10, including capacitors CP92, CP93, and CP94. These capacitors are sorted by size, and the closer they are to the power management chip 10, the smaller the capacitance value is, and they need to be placed close to the IC; the input-output conversion circuit 30 also includes an output part 32 of the power management chip, through the inductor LP10. The capacitors are sorted by size, and the farther they are from the IC, the smaller the capacitance is. At the same time, the inductor LP10 and the capacitors need to be close to the IC chip. Such placement is conducive to the stability of the circuit, plays a protective role, and provides better filtering.

[0031] The voltage detection circuit includes a resistor RP939, a resistor RP43, a resistor CP946, a capacitor CP964, a capacitor CP965 and a capacitor CP966. One end of the resistor RP939 is connected to the voltage detection end, and the other end is connected to one end of the capacitor CP964. The other end of the capacitor CP964 is grounded through the resistor CP946. One end of the resistor RP43 is connected to the voltage detection end, and the other end is respectively connected to one end of the capacitor CP965 and one end of the capacitor CP966. The other ends of the capacitor CP965 and the capacitor CP966 are grounded.

[0032] Please refer to Figure 4 The figure shows a circuit diagram of the voltage detection circuit of the present invention. The SENSE signal needs to be placed close to the power management chip 10. The shorter the path, the better. At the same time, the measurement point of the voltage detection circuit should be connected to the terminal capacitor of the output circuit. This is the best way to reflect whether the voltage of this power supply is stable and has reached the rated value. The power management chip 10 can make real-time compensation to improve the power quality.

[0033] The current also includes a temperature detection circuit, which needs to be placed close to the inductor to monitor the inductor temperature in real time and transmit it to the power management chip 10 to prevent damage caused by ultra-high temperature components. The SP2 and SP1 devices are power sensing points and need to be attached to the inductor. The current detection circuit is used to detect the temperature on both sides of the inductor LP3 and transmit it to the power management chip.

[0034] The utility model reduces the unstable power supply, improves the anti-interference performance, obtains the highest power supply ratio, improves the power supply working efficiency, reduces the maintenance problems caused by the scheme, and reduces the cost.

[0035] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments can still be modified, or some of the technical features thereof can be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A power management circuit, characterized in that: The circuit includes a power management chip, a power switch circuit, a conversion input-output circuit, a current detection circuit and a voltage detection circuit which are electrically connected in sequence. The conversion input-output circuit includes a first DC-DC converter, a second DC-DC converter, a MOS transistor QP4, a MOS transistor QP5, a MOS transistor QP6 and a MOS transistor QP7. The first DC-DC converter is connected to the MOS transistor QP4 and the MOS transistor QP5, and the second DC-DC converter is connected to the MOS transistor QP6 and the MOS transistor QP7. The current detection circuit detects the current size of the conversion input-output circuit and feeds it back to the power management chip. The voltage detection circuit detects the voltage size of the conversion input-output circuit and feeds it back to the power management chip.

2. The power management circuit according to claim 1, characterized in that: The circuit also includes a power supply circuit, which includes a 5V power supply, a resistor RP8, a capacitor CP26, a resistor RP3, a resistor RP9, capacitors CP27, CP28, and a resistor RP4. One end of the resistor RP8 is connected to the 5V power supply, and the other end is respectively connected to one end of the capacitor CP26 and the VCC pin of the power management chip. The other end of the capacitor CP26 is grounded. One end of the resistor RP3 is connected to the 5V power supply, and the other end is respectively connected to the resistor RP4, the capacitor CP27, and the VSYS pin of the power management chip. One end of the resistor RP9 is connected to the 5V power supply, and the other end is respectively connected to the capacitor CP28 and the VIN pin of the power management chip.

3. The power management circuit according to claim 2, characterized in that: The first DC-DC converter and the second DC-DC converter use RT9610 chip.

4. The power management circuit according to claim 1, characterized in that: The voltage detection circuit includes a resistor RP939, a resistor RP43, a resistor CP946, a capacitor CP964, a capacitor CP965 and a capacitor CP966. One end of the resistor RP939 is connected to the voltage detection end, and the other end is connected to one end of the capacitor CP964. The other end of the capacitor CP964 is grounded through the resistor CP946. One end of the resistor RP43 is connected to the voltage detection end, and the other end is respectively connected to one end of the capacitor CP965 and one end of the capacitor CP966. The other ends of the capacitor CP965 and the capacitor CP966 are grounded.

5. The power management circuit according to claim 1, characterized in that: The power switch circuit includes an inductor LP3, one end of the inductor LP3 is connected to the PHASE pin of the first DC-DC converter, and the other end of the inductor LP3 is connected to the capacitor CP109 and the capacitor CP110 respectively.

6. The power management circuit according to claim 5, characterized in that: The current also includes a temperature detection circuit, which is used to detect the temperature on both sides of the inductor LP3 and transmit it to the power management chip.

7. The power management circuit according to claim 1, characterized in that: The power switch circuit also includes a resistor RP57 and a resistor RP58, one end of the resistor RP57 is connected to the UGGATE pin of the first DC-DC converter, and the other end is connected to the gate of the MOS tube QP4, one end of the resistor RP58 is connected to the LGATE pin of the first DC-DC converter, and the other end is connected to the gate of the MOS tube QP5.

8. The power management circuit according to claim 7, characterized in that: The power switch circuit also includes a resistor RP62 and a resistor RP63, one end of the resistor RP62 is connected to the UGGATE pin of the second DC-DC converter, and the other end is connected to the gate of the MOS transistor QP6, one end of the resistor RP63 is connected to the LGATE pin of the second DC-DC converter, and the other end is connected to the gate of the MOS transistor QP7.

9. The power management circuit according to claim 8, characterized in that: The power switch circuit further includes capacitor CP35, capacitor CP36, capacitor CP37, capacitor CP22 and capacitor CP23, one end of each of the capacitors CP35, capacitor CP36, capacitor CP37, capacitor CP22 and capacitor CP23 is connected to the drain of the MOS tube QP4, and the other ends are grounded respectively.

10. The power management circuit according to claim 9, characterized in that: The power switch circuit further includes capacitors CP44, CP45 and CP46. One ends of the capacitors CP44, CP45 and CP46 are respectively connected to the drain of the MOS tube QP6 and the inductor LP21, and the other ends are respectively grounded.

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