Radio frequency amplifier and radio frequency front-end module

By designing the inhibitory unit of the inductance and capacitance connected in the radio frequency amplifier, it is set in the second harmonic frequency band of Kisper to solve the problem of signal loss caused by excessive inductance value in the LC series resonance network. Low insertion loss and higher inductance quality factor improved the efficiency of RF amplifier.

CN222423637UActive Publication Date: 2025-01-28RADROCK (SHENZHEN) SEMICONDUCTOR LTD
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Patent Information

Application Number
CN202420720840.4
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-04-09
Publication Date
2025-01-28
Estimated Expiration
2034-04-09

AI Technical Summary

Technical Problem

In existing RF amplifiers, when LC series resonant networks are used to suppress second harmonic signals, smaller capacitance values ​​and larger inductance values ​​are required, resulting in unfavorable reduction of signal loss.

Method used

Design a radio frequency amplifier. Its harmonic inhibitory circuit includes the first inductance and first capacitor connected to the connection. The resonance frequency is set in the second harmonic frequency band of the Kisper. The parallel resonance network is processed on the second -order harmonic to reduce the inductance value and improve the quality factor.

Benefits of technology

Effectively reduce the insertion loss in the radio frequency amplifier, improve the quality factor of the inductance, and enhance the work efficiency of the RF amplifier.

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Abstract

The utility model relates to the technical field of integrated circuits, in particular to a radio frequency amplifier and a radio frequency front-end module. The radio frequency amplifier comprises a power amplification circuit and a harmonic suppression circuit, the harmonic suppression circuit comprises an input end, an output end and a first harmonic suppression unit connected between the input end and the output end, and the resonant frequency of the first harmonic suppression unit is within a second harmonic frequency band of fundamental waves; the first harmonic suppression unit comprises a first inductor and a first capacitor which are connected in parallel, the first inductor and the first capacitor are respectively connected in series between the input end and the output end, and the first harmonic suppression unit formed by connecting the first inductor and the first capacitor in parallel is connected in series between the input end and the output end of the harmonic suppression circuit; and the harmonic frequency of the first harmonic suppression unit is set to enable the second-order harmonic to be open-circuited, so that the impedance of the second-order harmonic is more convergent, the insertion loss of the first harmonic suppression unit is reduced, and the working efficiency of the radio frequency amplifier is improved.
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Description

Technical Field

[0001] The present application relates to the field of integrated circuit technology, and in particular to a radio frequency amplifier and a radio frequency front-end module. Background Art

[0002] At present, after the radio frequency signal is amplified by the power amplifier circuit, harmonics are usually generated. At the output end of the power amplifier circuit, a harmonic suppression circuit is usually required. In the background technology, an LC series resonant network is usually set between the output end and the ground end of the power amplifier circuit to suppress the second harmonic signal. The above-mentioned LC series resonant network needs to have a higher impedance to the transmitted signal. Therefore, the capacitance value of the capacitor included in the above-mentioned LC series resonant network needs to be set small enough, resulting in the inductance value of the inductor included in the above-mentioned LC series resonant network needing to be set large enough, which is not conducive to reducing the signal loss. Utility Model Content

[0003] In view of the above problems, the embodiments of the present application provide a radio frequency amplifier and a radio frequency front-end module to solve the above technical problems.

[0004] In a first aspect, an embodiment of the present application provides a radio frequency amplifier, comprising a power amplifier circuit and a harmonic suppression circuit connected to the power amplifier circuit, wherein the harmonic suppression circuit comprises an input end, an output end, and a first harmonic suppression unit connected between the input end and the output end, wherein a resonant frequency of the first harmonic suppression unit is within a second harmonic frequency band of a fundamental wave;

[0005] The first harmonic suppression unit includes a first inductor and a first capacitor connected in parallel, and the first inductor and the first capacitor are respectively connected in series between the input end and the output end.

[0006] Optionally, the first inductor is arranged on a circuit substrate; the first capacitor is integrated into a chip and connected to the first inductor via a bonding wire or a bump; or, the first capacitor and the first inductor are both arranged on the circuit substrate.

[0007] Optionally, the first inductor is a coil wound on the circuit substrate or an SMD component mounted on the surface of the circuit substrate.

[0008] Optionally, the capacitance value of the first capacitor is 5 to 10 pF, and the inductance value of the first inductor is 0.9 to 1.3 nanohenry.

[0009] Optionally, the harmonic suppression circuit further includes a second harmonic suppression unit connected between the first harmonic suppression unit and the output end, the resonant frequency of the second harmonic suppression unit is within the third harmonic frequency band or the higher harmonic frequency band of the fundamental wave, and the higher harmonic frequency band is higher than the third harmonic frequency band;

[0010] The second harmonic suppression unit includes a second inductor and a second capacitor connected in series, one end of the second harmonic suppression unit is connected to the output node of the first harmonic suppression unit, and the other end of the second harmonic suppression unit is grounded.

[0011] Optionally, the second inductor and the second capacitor are arranged on the circuit substrate.

[0012] Optionally, the capacitance value of the second capacitor is 13-18 pF, and the inductance value of the second inductor is 0.05-0.3 nanohenry.

[0013] Optionally, the second capacitor is an SMD component mounted on the surface of the circuit substrate, and the second inductor includes a grounding wire connected between the second capacitor and a ground terminal.

[0014] Optionally, the harmonic suppression circuit further includes a third harmonic suppression unit connected between the second harmonic suppression unit and the output end, the third harmonic suppression unit includes a third inductor and a third capacitor connected in parallel, and the third inductor and the third capacitor are respectively connected in series between the output node of the second harmonic suppression unit and the output end;

[0015] The resonant frequency of the second harmonic suppression unit is within the third harmonic frequency band, and the resonant frequency of the third harmonic suppression unit is within the higher harmonic frequency band; or, the resonant frequency of the second harmonic suppression unit is within the higher harmonic frequency band, and the resonant frequency of the third harmonic suppression unit is within the third harmonic frequency band.

[0016] Optionally, the third inductor and the third capacitor are arranged on the circuit substrate.

[0017] Optionally, the harmonic suppression circuit also includes a fourth capacitor connected between the output end of the power amplifier circuit and the first harmonic suppression unit, one end of the fourth capacitor is connected to the input end of the harmonic suppression circuit, and the other end of the fourth capacitor is grounded.

[0018] Optionally, the fourth capacitor is integrated into the chip.

[0019] Optionally, the radio frequency amplifier further includes a power port and a fourth inductor connected between the power port and an input end of the harmonic suppression circuit.

[0020] Optionally, the fourth inductor is disposed on the circuit substrate.

[0021] Optionally, the radio frequency amplifier is a class E power amplifier.

[0022] In a second aspect, an embodiment of the present application provides a radio frequency front-end module, comprising the above-mentioned radio frequency amplifier.

[0023] The RF amplifier and RF front-end module provided in the embodiment of the present application include a power amplifier circuit and a harmonic suppression circuit connected to the power amplifier circuit, the harmonic suppression circuit includes an input end, an output end, and a first harmonic suppression unit connected between the input end and the output end, the resonant frequency of the first harmonic suppression unit is within the second harmonic frequency band of the fundamental wave; the first harmonic suppression unit includes a first inductor and a first capacitor connected in parallel, the first inductor and the first capacitor are respectively connected in series between the input end and the output end, through the above method, the first harmonic suppression unit formed by the first inductor and the first capacitor connected in parallel is connected in series between the input end and the output end of the harmonic suppression circuit, and the harmonic frequency of the first harmonic suppression unit is set to make the second-order harmonic open circuit, which can reduce the inductance value, is conducive to improving the quality factor of the inductor, reducing the insertion loss of the first harmonic suppression unit, and improving the working efficiency of the RF amplifier. These aspects or other aspects of the present application will be more concise and easy to understand in the description of the following embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 A schematic diagram of the structure of a radio frequency amplifier provided in an embodiment of the present application is shown.

[0025] Figure 2 A diagram showing the simulation effect of the second-order harmonic impedance of the harmonic suppression circuit in the radio frequency amplifier provided in an embodiment of the present application is shown.

[0026] Figure 3 A loss simulation effect diagram of a harmonic suppression circuit in a radio frequency amplifier provided in an embodiment of the present application is shown.

[0027] Figure 4 A schematic diagram of the structure of a radio frequency amplifier provided in an embodiment of the present application is shown.

[0028] Figure 5 A schematic diagram of the structure of a radio frequency amplifier provided in an embodiment of the present application is shown.

[0029] Figure 6 A schematic diagram of the structure of a radio frequency amplifier provided in an embodiment of the present application is shown.

[0030] Figure 7 A schematic diagram of the structure of the radio frequency front-end module provided in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0031] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and cannot be understood as limiting the present application.

[0032] In order to enable those skilled in the art to better understand the solutions of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present application.

[0033] In the embodiments of the present application, it should be noted that, in this article, relational terms such as first and second, etc. are merely used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations.

[0034] Moreover, the terms "comprises," "comprising," or any other variation thereof are intended to encompass non-exclusive inclusion, such that a process, method, article, or apparatus that includes a list of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes the element.

[0035] In the description of the embodiments of the present application, words such as "example" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "example" or "for example" in the embodiments of the present application is not to be interpreted as being more preferred or having more advantages than another embodiment or design. The use of words such as "example" or "for example" is intended to present relative concepts in a clear manner.

[0036] In addition, the "plurality" in the embodiments of the present application refers to two or more than two. In view of this, in the embodiments of the present application, "plurality" can also be understood as "at least two". "At least one" can be understood as one or more, for example, one, two or more. For example, including at least one means including one, two or more, and there is no limit on which ones are included. For example, including at least one of A, B and C, then A, B, C, A and B, A and C, B and C, or A, B and C can be included.

[0037] It should be noted that, in the embodiments of the present application, "and / or" describes the association relationship of the associated objects, indicating that three relationships may exist. For example, A and / or B may represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / ", unless otherwise specified, generally indicates that the associated objects before and after are in an "or" relationship.

[0038] It should be noted that in the embodiments of the present application, "connection" can be understood as electrical connection, and the connection between two electrical components can be a direct or indirect connection between the two electrical components. For example, the connection between A and B can be either a direct connection between A and B or an indirect connection between A and B through one or more other electrical components.

[0039] An embodiment of the present application provides a radio frequency amplifier. Figure 1 As shown, the RF amplifier 100 includes a power amplifier circuit 10 and a harmonic suppression circuit 20 connected to the power amplifier circuit 10, the harmonic suppression circuit 20 includes an input terminal 21, an output terminal 22 and a first harmonic suppression unit 23, and the first harmonic suppression unit 23 is connected between the input terminal 21 and the output terminal 22. The RF signal to be transmitted is power amplified by the power amplifier circuit 10 to obtain a power amplified signal, and the power amplified signal includes a fundamental signal and a harmonic signal, wherein the fundamental signal is a signal in the power amplified signal whose frequency is the same as the frequency of the RF signal to be transmitted, and the harmonic signal is a signal in the power amplified signal whose frequency is an integer multiple of the frequency of the RF signal to be transmitted, for example, the frequency of the second-order harmonic signal is twice the frequency of the RF signal to be transmitted, and the frequency of the third-order harmonic signal is three times the frequency of the RF signal to be transmitted. In order to make the RF system work stably and reliably, the present application transmits the power amplified signal obtained after amplification by the power amplifier circuit 10 to the harmonic suppression circuit 20 for harmonic suppression.

[0040] The resonance frequency of the first harmonic suppression unit 23 is within the second harmonic frequency band of the fundamental wave; the first harmonic suppression unit 23 includes a first inductor L1 and a first capacitor C1 connected in parallel, and the first inductor L1 and the first capacitor C1 are respectively connected in series between the input terminal 21 and the output terminal 22 .

[0041] Among them, for the signal near the resonant frequency of the first harmonic suppression unit 23, the parallel resonant network formed by the first inductor L1 and the first capacitor C1 presents a high impedance to it, and the resonant frequency f1 of the first harmonic suppression unit 23 is set in the second harmonic frequency band of the fundamental wave, so that the first harmonic suppression unit 23 presents an open circuit to the second-order harmonic. Assuming that the fundamental signal band is fmin~fmax (the center frequency f0 of the fundamental signal band), the resonant frequency f1 of the first harmonic suppression unit 23 is set in the second harmonic frequency band of the fundamental wave, so that the resonant frequency f1 of the first harmonic suppression unit 23 can be located in the frequency range 2fmin~2fmax of the second-order harmonic of the fundamental signal, and the first harmonic suppression unit can open the second-order harmonic. In this embodiment, the resonant frequency of the first harmonic suppression unit is selected from the frequency range of the second-order harmonic, which can improve the suppression effect of the second-order harmonic. Exemplarily, the resonant frequency f1 of the first harmonic suppression unit 23 can be set to twice the center frequency f0 of the fundamental signal band.

[0042] The first harmonic suppression unit 23 suppresses the second-order harmonics through a parallel resonant network, presenting a larger impedance for each frequency point in the second-order harmonics, which can make the second-order harmonic impedance more convergent, and is conducive to improving the suppression effect of the second-order harmonics. Figure 2 As shown, for signals with a second-order harmonic frequency band of 2fmin~2fmax of 1.320GHz~1.830GHz, curve S1 is the simulation result of the second-order harmonic impedance based on the embodiment of the present application, and curve S2 is the simulation result of the second-order harmonic impedance when the LC series resonant circuit is used as the second-order harmonic suppression circuit according to the relevant technology. The lines in the Smith chart represent the second-order harmonic impedance. It can be seen that curve S1 is closer to the open circuit point than curve S2. The first harmonic suppression unit 23 of the embodiment of the present application has a larger impedance to the signal with a frequency in the range of 2fmin~2fmax, and the impedance distribution of different frequency points in 2fmin~2fmax is more concentrated, achieving a better open circuit effect of the second-order harmonic.

[0043] The resonant frequency of the first harmonic suppression unit 23 is negatively correlated with the capacitance value of the first capacitor C1 and the inductance value of the first inductor L1. By reasonably setting the capacitance value of the first capacitor C1 and the inductance value of the first inductor L1, the resonant frequency of the first harmonic suppression unit 23 can be within the second harmonic frequency band of the fundamental wave. In addition, by setting the capacitance value of the first capacitor C1 to be sufficiently large, the inductance value of the first inductor L1 can be reduced, which is beneficial to improving the quality factor of the first inductor L1 and reducing the insertion loss of the first harmonic suppression unit 23, thereby improving the working efficiency of the RF amplifier.

[0044] The following is an example in which the first inductor L1 is wound around a circuit substrate. Under the same installation area, reducing the inductance value of the first inductor L1 can increase the line width of the first inductor L1 and reduce the number of windings of the first inductor L1, thereby improving the quality factor of the first inductor L1 and reducing the loss of the fundamental signal when passing through the first inductor L1, that is, reducing the insertion loss of the first harmonic suppression unit 23.

[0045] In this embodiment, a first harmonic suppression unit formed by connecting the first inductor L1 and the first capacitor C1 in parallel is connected in series between the input and output ends of the harmonic suppression circuit, and the harmonic frequency of the first harmonic suppression unit is set to make the second-order harmonic open-circuited, which can make the second-order harmonic impedance more convergent and reduce the inductance value, which is beneficial to improving the quality factor of the inductor, reducing the loss of the power amplified signal when passing through the first harmonic suppression unit, and improving the working efficiency of the RF amplifier.

[0046] In some embodiments, the resonant frequency f1 of the first harmonic suppression unit 23 can be set to the difference between twice the center frequency f0 of the fundamental signal frequency band and the first offset or the sum of twice the center frequency f0 of the fundamental signal frequency band and the first offset to achieve impedance adjustment or adjustment of the loss of the power amplification signal, wherein the first offset is less than or equal to 5%×2f0.

[0047] As an implementation mode, the first inductor L1 is arranged on the circuit substrate; the first capacitor C1 is integrated in the chip and connected to the first inductor L1 through bonding wires or bumps. Alternatively, the first inductor L1 and the first capacitor C1 are both arranged on the circuit substrate. In this implementation mode, since the impedance of the input terminal 21 is small and the current is large, the quality factor of the first harmonic suppression unit 23 is required to be high. Compared with being integrated in the chip, the first inductor L1 is arranged on the circuit substrate, which is conducive to improving the quality factor and reducing the loss of the fundamental signal.

[0048] In some embodiments, the first inductor L1 is a coil wound on a circuit substrate. In this embodiment, by winding the coil, the required inductance of the first inductor L1 can be more easily achieved, thereby reducing the difficulty of setting the first inductor L1.

[0049] In some embodiments, the first inductor L1 is a SMD component mounted on the surface of the circuit substrate. In this embodiment, by mounting, the area occupied by the first harmonic suppression unit 23 can be further reduced while ensuring that the loss of the first harmonic suppression unit 23 is small.

[0050] In some embodiments, the first capacitor C1 and the first inductor L1 in the first harmonic suppression unit 23 participate in impedance matching at the same time. For example, the capacitance value of the first capacitor C1 can be set according to the impedance matching requirement, and then the inductance value of the first inductor L1 can be set according to the frequency band of the second-order harmonic and the capacitance value of the first capacitor C1.

[0051] In some embodiments, the capacitance of the first capacitor C1 is 5 to 10 pF, and the inductance of the first inductor L1 is 0.9 to 1.3 nanohenries. Optionally, the capacitance of the first capacitor C1 is 7 to 10 pF, and the inductance of the first inductor L1 is 1.05 to 1.15 nanohenries. Exemplarily, the inductance of the first inductor L1 is 1.1 nanohenries. This can effectively reduce the insertion loss of the first harmonic suppression unit 23. Please refer to Figure 3 As shown, curve S3 is the simulation result of the insertion loss when the first capacitor C1 in the first harmonic suppression unit 23 is set to 7pF and the first inductor L1 is set to 1.1nH based on the embodiment of the present application, and curve S4 is the simulation result of the insertion loss of the second-order harmonic suppression circuit according to the related art. It can be seen from the figure that based on the embodiment of the present application, the insertion loss of the first harmonic suppression unit 23 is as low as 0.68db, while in the related art, the insertion loss of the second-order harmonic suppression unit is usually not less than 0.74db. It can be seen that the present application can effectively reduce the insertion loss of the first harmonic suppression unit 23 and improve the working efficiency of the RF amplifier.

[0052] In the RF amplifier, the class E power amplifier generally uses a high-order reactance network to provide sufficient degrees of freedom to change the waveform of the switch voltage so that its value and slope are both zero when the switch is turned on, thereby reducing the loss of the switch. The power amplifier generally has high requirements for second harmonic suppression, and the second harmonic of the class E power amplifier is usually required to be high impedance. In this embodiment, the first harmonic suppression unit 23 for the second-order harmonic open circuit can better adapt to the requirements of the class E power amplifier for second harmonic suppression. Of course, the power amplifier circuit in the present RF amplifier can also be other types of power amplifier circuits, such as class F or inverse class F power amplifier circuits.

[0053] As an implementation, see Figure 4As shown, the harmonic suppression circuit 20 also includes a second harmonic suppression unit 24, which is connected between the first harmonic suppression unit 23 and the output terminal 22, and the resonant frequency of the second harmonic suppression unit 24 is within the third harmonic frequency band or the higher harmonic frequency band of the fundamental wave. The higher harmonics are harmonics higher than the third harmonics, including but not limited to at least one of the fourth harmonics and the fifth harmonics. The lower frequency limit of the higher harmonic frequency band is higher than the upper frequency limit of the third harmonic. The second harmonic suppression unit 24 includes a second inductor L2 and a second capacitor C2 connected in series, one end of the second harmonic suppression unit 24 is connected to the output node of the first harmonic suppression unit 23, and the other end of the second harmonic suppression unit 24 is grounded.

[0054] In this embodiment, for the signal near the resonant frequency of the second harmonic suppression unit 24, the series resonant network formed by the second inductor L2 and the second capacitor C2 presents a low impedance to it, and the resonant frequency f2 of the second harmonic suppression unit 24 is set within the third harmonic frequency band or the higher harmonic frequency band of the fundamental wave, so that the second harmonic suppression unit 24 short-circuits the third-order harmonic or the higher harmonic. By reasonably setting the capacitance value of the second capacitor C2 and the inductance value of the second inductor L2, the resonant frequency of the second harmonic suppression unit 24 can be within the third harmonic frequency band or the higher harmonic frequency band of the fundamental wave. In this embodiment, a series resonant network is used to short-circuit the third-order harmonic, and while achieving third-order harmonic suppression, the mutual interference between the first harmonic suppression unit 23 and the second harmonic suppression unit 24 is reduced.

[0055] In some embodiments, the resonant frequency f2 of the second harmonic suppression unit 24 is set within the third harmonic frequency band of the fundamental wave, so that the resonant frequency f2 of the second harmonic suppression unit 24 is located in the frequency range 3fmin~3fmax of the third-order harmonic of the fundamental signal, and the second harmonic suppression unit can short-circuit the third-order harmonic to the ground, thereby filtering out the third-order harmonic. In this embodiment, the resonant frequency of the second harmonic suppression unit is selected from the frequency range of the third-order harmonic, which can improve the suppression effect of the third-order harmonic. Exemplarily, the resonant frequency f2 of the second harmonic suppression unit 24 can be set to three times the center frequency f0 of the fundamental signal frequency band.

[0056] In some embodiments, the resonant frequency f2 of the second harmonic suppression unit 24 is set within the higher harmonic frequency band of the fundamental wave, so that the resonant frequency f2 of the second harmonic suppression unit 24 can be located in the frequency range N*fmin~N*fmax of the higher-order harmonics of the fundamental signal, and the second harmonic suppression unit can short-circuit the higher-order harmonics to the ground, thereby filtering out the higher-order harmonics. In this embodiment, the resonant frequency of the second harmonic suppression unit is selected from the frequency range of the higher-order harmonics, which can improve the suppression effect of the higher-order harmonics. Exemplarily, the resonant frequency f2 of the second harmonic suppression unit 24 can be set to three times or N times the center frequency f0 of the fundamental signal frequency band, where N is an integer greater than 3.

[0057] Taking the second harmonic suppression unit 24 for suppressing third-order harmonics as an example, in some embodiments, the resonant frequency f2 of the second harmonic suppression unit 24 can be set to the difference between three times the center frequency f0 of the fundamental signal frequency band and the second offset or the sum of three times the center frequency f0 of the fundamental signal frequency band and the second offset to achieve impedance adjustment or adjustment of the loss of the power amplification signal, wherein the second offset is less than or equal to 5%×3f0.

[0058] In some embodiments, the second inductor L2 and the second capacitor C2 are disposed on a circuit substrate. In this embodiment, the second inductor and the second capacitor are placed on the circuit substrate respectively to facilitate wiring.

[0059] In some embodiments, the second inductor L2 is a coil wound on a circuit substrate. In this embodiment, the quality factor of the second inductor can be further improved by winding the coil.

[0060] In some embodiments, the second inductor L2 is an SMD component mounted on the surface of the circuit substrate. In this embodiment, by mounting, the second harmonic suppression unit 24 can further reduce the area occupied by the second harmonic suppression unit 24 while ensuring a good harmonic suppression effect.

[0061] In some embodiments, the capacitance of the second capacitor C2 is 13-18 pF, and the inductance of the second inductor L2 is 0.05-0.3 nanohenry. Optionally, the capacitance of the second capacitor C2 is 15.5-16.5 pF, and the inductance of the second inductor L2 is 0.1-0.2 nanohenry. Exemplarily, the capacitance of the second capacitor C2 is 16 pF.

[0062] In some embodiments, the second capacitor C2 is an SMD component mounted on the surface of the circuit substrate, and the second inductor L2 includes a grounding wire connected between the second capacitor C2 and the ground terminal. In this embodiment, the second capacitor uses a capacitor SMD component, and the grounding wire used to connect the second capacitor to the ground can achieve the above-mentioned inductance of 0.05 to 0.3 nanohenry. The grounding wire can be used as the second inductor without the need to additionally set an inductor SMD component.

[0063] In some embodiments, the second capacitor C2 and the second inductor L2 in the second harmonic suppression unit 24 participate in impedance matching at the same time. For example, the capacitance value of the second capacitor C2 can be set according to the impedance matching requirement, and then the inductance value of the second inductor L2 can be set according to the frequency band of the third-order harmonic and the capacitance value of the second capacitor C2.

[0064] In this embodiment, through the combination of the first harmonic suppression unit 23 and the second harmonic suppression unit 24, the second-order harmonic signal and the third-order harmonic signal / higher-order harmonic can be suppressed simultaneously, thereby further improving the working efficiency of the radio frequency amplifier.

[0065] As an implementation, please continue to see Figure 5 As shown, the harmonic suppression circuit 20 further includes a third harmonic suppression unit 25, which is connected between the second harmonic suppression unit 24 and the output terminal 22. The third harmonic suppression unit 25 includes a third inductor L3 and a third capacitor C3 connected in parallel, and the third inductor L3 and the third capacitor C3 are respectively connected in series between the output node of the second harmonic suppression unit 24 and the output terminal 22.

[0066] The resonant frequency of the second harmonic suppression unit is within the third harmonic frequency band, and the resonant frequency of the third harmonic suppression unit is within the higher harmonic frequency band; or, the resonant frequency of the second harmonic suppression unit is within the higher harmonic frequency band, and the resonant frequency of the third harmonic suppression unit is within the third harmonic frequency band. By suppressing the third-order harmonic signal and the N-order harmonic signal through the second harmonic suppression unit and the third harmonic suppression unit, the working efficiency of the RF amplifier can be further improved.

[0067] When the third harmonic suppression unit 25 is used to suppress high-order harmonics, illustratively, the high-order harmonics may be fourth harmonics or fifth harmonics, and the resonant frequency of the third harmonic suppression unit 25 is within the fourth harmonic frequency band of the fundamental wave or within the fifth harmonic frequency band of the fundamental wave; the third harmonic suppression unit 25 makes the fourth-order harmonic or the fifth-order harmonic open-circuited.

[0068] In this embodiment, for the signal near the resonant frequency of the third harmonic suppression unit 25, the parallel resonant network formed by the third inductor L3 and the third capacitor C3 presents a high impedance to it, and the resonant frequency f3 of the third harmonic suppression unit 25 is set within the Nth harmonic frequency band of the fundamental wave, and N is 4 or 5, so that the third harmonic suppression unit 25 can be open to the Nth order harmonic. By adaptively setting the capacitance value of the third capacitor C3 and the inductance value of the third inductor L3, the resonant frequency of the third harmonic suppression unit 25 can be within the Nth harmonic frequency band of the fundamental wave. In this embodiment, a parallel resonant network is used to open the Nth order harmonic, and while achieving Nth order harmonic suppression, the mutual interference between the third harmonic suppression unit 25 and the second harmonic suppression unit 24 is reduced.

[0069] In some embodiments, the resonant frequency f3 of the third harmonic suppression unit 25 is set within the Nth harmonic frequency band of the fundamental wave, so that the resonant frequency f3 of the third harmonic suppression unit 25 is located in the frequency range of the Nth harmonic of the fundamental signal, N×fmin~N×fmax, and the third harmonic suppression unit can open the Nth harmonic. In this embodiment, the resonant frequency of the third harmonic suppression unit is selected from the frequency range of the Nth harmonic, which can improve the suppression effect of the Nth harmonic. Exemplarily, the resonant frequency f3 of the third harmonic suppression unit 25 can be set to N times the center frequency f0 of the fundamental signal frequency band.

[0070] In some embodiments, the resonant frequency f3 of the third harmonic suppression unit 25 can be set to the difference between N times the center frequency f0 of the fundamental signal frequency band and the third offset or the sum of N times the center frequency f0 of the fundamental signal frequency band and the third offset to achieve impedance adjustment or adjustment of the loss of the power amplification signal, wherein the third offset is less than or equal to 5%×N×f0.

[0071] In some embodiments, the resonant frequency of the second harmonic suppression unit is within the higher harmonic frequency band, and the resonant frequency of the third harmonic suppression unit is within the third harmonic frequency band. The resonant frequency f3 of the third harmonic suppression unit 25 is set within the third harmonic frequency band of the fundamental wave, so that the resonant frequency f3 of the third harmonic suppression unit 25 is located in the frequency range 3fmin~3fmax of the Nth order harmonic of the fundamental signal, and the third harmonic suppression unit can make the third order harmonic open-circuited. The resonant frequency f2 of the second harmonic suppression unit 24 is set within the Nth harmonic frequency band of the fundamental wave, so that the resonant frequency f2 of the second harmonic suppression unit 24 is located in the frequency range N*fmin~N*fmax of the Nth order harmonic of the fundamental signal, and the second harmonic suppression unit 24 can make the Nth order harmonic open-circuited.

[0072] In some implementations, the third inductor L3 and the third capacitor C3 are disposed on a circuit substrate. In this implementation, the third inductor L3 and the third capacitor C3 are respectively placed on the circuit substrate to facilitate wiring.

[0073] In some embodiments, the third inductor L3 is a coil wound on a circuit substrate. In this embodiment, the quality factor of the second inductor can be further improved by winding the coil.

[0074] In some embodiments, the third inductor L3 is an SMD component mounted on the surface of the circuit substrate. In this embodiment, by mounting, the third harmonic suppression unit 25 can further reduce the area occupied by the third harmonic suppression unit 25 while ensuring a good harmonic suppression effect.

[0075] In some implementations, the capacitance of the third capacitor C3 is 3.6 pF, and the inductance of the third inductor L3 is 0.4 nH.

[0076] In some embodiments, the third capacitor C3 and the third inductor L3 in the third harmonic suppression unit 25 participate in impedance matching at the same time. For example, the capacitance value of the third capacitor C3 can be set according to the impedance matching requirement, and then the inductance value of the third inductor L3 can be set according to the frequency band of the N-order harmonic and the capacitance value of the third capacitor C3.

[0077] In this embodiment, the combination of the first harmonic suppression unit 23, the second harmonic suppression unit 24 and the third harmonic suppression unit 25 can simultaneously suppress the second-order harmonic signal, the third-order harmonic signal and the N-order harmonic signal, further improving the working efficiency of the RF amplifier.

[0078] As an implementation, please continue to see Figure 5 and Figure 6 As shown, the harmonic suppression circuit 20 further includes a fourth capacitor C4, which is connected between the output end of the power amplifier circuit 10 and the first harmonic suppression unit 23, one end of the fourth capacitor C4 is connected to the input end 21 of the harmonic suppression circuit 20, and the other end of the fourth capacitor C4 is grounded. In this embodiment, by setting the fourth capacitor C4, the impedance of the first harmonic suppression unit 23 to the second-order harmonic can be further increased.

[0079] In some implementations, the fourth capacitor C4 is integrated into the chip. In this implementation, the configuration of placing the fourth capacitor C4 inside the chip is conducive to miniaturization of the circuit.

[0080] As an implementation, please continue to see Figure 5As shown, the RF amplifier 100 of this embodiment further includes a power port Vcc and a fourth inductor L4, and the fourth inductor L4 is connected between the power port Vcc and the input terminal 21 of the harmonic suppression circuit 20. In this embodiment, the fourth inductor L4 is provided between the power port Vcc and the power amplifier circuit 10, so that the power amplifier circuit 10 can be isolated from the power port Vcc to prevent the RF signal from leaking to the power port Vcc.

[0081] In some embodiments, the fourth inductor L4 is disposed on the circuit substrate. In this embodiment, compared with being integrated in the chip, disposing the fourth inductor L4 on the circuit substrate is beneficial to improving the quality factor.

[0082] In some embodiments, the fourth inductor L4 is a coil wound on a circuit substrate. In this embodiment, the fourth inductor L4 is arranged in a winding manner, so that the quality factor of the fourth inductor can be further improved.

[0083] In some embodiments, the fourth inductor L4 is an SMD component mounted on the surface of the circuit substrate. In this embodiment, by mounting, the fourth inductor L4 can further reduce the area occupied by the fourth inductor L4 while ensuring a good isolation effect.

[0084] In some implementations, the fourth capacitor C4 and the fourth inductor L4 also participate in impedance matching.

[0085] In this embodiment, a harmonic suppression circuit capable of reducing the insertion loss of the fundamental signal is adopted, and the second harmonic impedance is more convergent, which can further improve the working efficiency of the PA. As an implementation method, the RF amplifier of this embodiment is a class E power amplifier. Class E power amplifiers are a better choice for 5G communications due to their high efficiency, high linearity and wide bandwidth characteristics, and can improve the quality of 5G communications.

[0086] An embodiment of the present application provides a radio frequency front-end module, see Figure 7 As shown, the RF front-end module 200 includes the above-mentioned RF amplifier 100.

[0087] In this embodiment, a first harmonic suppression unit formed by connecting a first inductor and a first capacitor in parallel is connected in series between the input and output ends of the harmonic suppression circuit, and the harmonic frequency of the first harmonic suppression unit is set to make the second-order harmonic open-circuited, which can reduce the inductance value, is beneficial to improving the quality factor of the inductor, reducing the insertion loss of the first harmonic suppression unit, and improving the working efficiency of the RF front-end module.

[0088] The above is only an implementation method of the present application. It should be pointed out that a person skilled in the art can make improvements without departing from the inventive concept of the present application, but these improvements are within the scope of protection of the present application.

Claims

1. A radio frequency amplifier, characterized in that: It comprises a power amplifier circuit and a harmonic suppression circuit connected to the power amplifier circuit, wherein the harmonic suppression circuit comprises an input end, an output end, and a first harmonic suppression unit connected between the input end and the output end, and the resonance frequency of the first harmonic suppression unit is within the second harmonic frequency band of the fundamental wave; The first harmonic suppression unit includes a first inductor and a first capacitor connected in parallel, and the first inductor and the first capacitor are respectively connected in series between the input end and the output end.

2. The radio frequency amplifier according to claim 1, characterized in that: The first inductor is arranged on the circuit substrate; the first capacitor is integrated into the chip and connected to the first inductor through a bonding wire or a bump; or, the first capacitor and the first inductor are both arranged on the circuit substrate.

3. The radio frequency amplifier according to claim 2, characterized in that: The first inductor is a coil wound on the circuit substrate or a SMD component mounted on the surface of the circuit substrate.

4. The radio frequency amplifier according to claim 1, characterized in that: The capacitance value of the first capacitor is 5 to 10 pF, and the inductance value of the first inductor is 0.9 to 1.3 nanohenry.

5. The radio frequency amplifier according to claim 1, characterized in that: The harmonic suppression circuit further includes a second harmonic suppression unit connected between the first harmonic suppression unit and the output end, the resonant frequency of the second harmonic suppression unit is within the third harmonic frequency band or the higher harmonic frequency band of the fundamental wave, and the lower frequency limit value of the higher harmonic frequency band is higher than the upper frequency limit value of the third harmonic frequency band; The second harmonic suppression unit includes a second inductor and a second capacitor connected in series, one end of the second harmonic suppression unit is connected to the output node of the first harmonic suppression unit, and the other end of the second harmonic suppression unit is grounded.

6. The radio frequency amplifier according to claim 5, characterized in that: The second inductor and the second capacitor are arranged on a circuit substrate.

7. The radio frequency amplifier according to claim 5, characterized in that: The capacitance value of the second capacitor is 13 to 18 pF, and the inductance value of the second inductor is 0.05 to 0.3 nanohenry.

8. The radio frequency amplifier according to claim 5, characterized in that: The second capacitor is an SMD component mounted on the surface of the circuit substrate, and the second inductor includes a grounding wire connected between the second capacitor and a ground terminal.

9. The radio frequency amplifier according to claim 5, characterized in that: The harmonic suppression circuit further includes a third harmonic suppression unit connected between the second harmonic suppression unit and the output end, the third harmonic suppression unit includes a third inductor and a third capacitor connected in parallel, and the third inductor and the third capacitor are respectively connected in series between the output node of the second harmonic suppression unit and the output end; The resonant frequency of the second harmonic suppression unit is within the third harmonic frequency band, and the resonant frequency of the third harmonic suppression unit is within the higher harmonic frequency band; or, the resonant frequency of the second harmonic suppression unit is within the higher harmonic frequency band, and the resonant frequency of the third harmonic suppression unit is within the third harmonic frequency band.

10. The radio frequency amplifier according to claim 9, characterized in that: The third inductor and the third capacitor are arranged on a circuit substrate.

11. The radio frequency amplifier according to claim 1, characterized in that: The harmonic suppression circuit also includes a fourth capacitor connected between the output end of the power amplifier circuit and the first harmonic suppression unit, one end of the fourth capacitor is connected to the input end of the harmonic suppression circuit, and the other end of the fourth capacitor is grounded.

12. The radio frequency amplifier according to claim 11, characterized in that: The fourth capacitor is integrated into the chip.

13. The radio frequency amplifier according to claim 1, characterized in that: The radio frequency amplifier further includes a power port and a fourth inductor connected between the power port and an input end of the harmonic suppression circuit.

14. The radio frequency amplifier according to claim 13, characterized in that: The fourth inductor is arranged on the circuit substrate.

15. The radio frequency amplifier according to claim 1, characterized in that: The radio frequency amplifier is a class E power amplifier.

16. A radio frequency front-end module, characterized in that: It comprises the radio frequency amplifier as claimed in any one of claims 1 to 15.