Image sensor

Abstract

The utility model provides an image sensor, which comprises a plurality of pixel blocks arranged in an array according to rows and columns, a photosensitive unit and an overflow unit are coupled to a transmission node, a reset unit and a readout unit are coupled to a floating diffusion node, and a transmission control unit is coupled between the transmission node and the floating diffusion node. The light sensing unit converts a received light signal into charge signals including a first charge signal and a second charge signal; the transmission control unit is used for performing on-off control on a transfer path between the transmission node and the floating diffusion node so as to transfer a second charge signal to the overflow unit through the transmission node in an exposure stage and read out the first charge signal and the second charge signal based on the floating diffusion node in a quantization stage; the reset unit resets the transmission node and the floating diffusion node, and the read-out unit at least reads out the first charge signal and the second charge signal. According to the utility model, the problem of poor image quality caused by pixel black spots easily caused by the existing image sensor is solved.

Description

Technical Field

[0001] The utility model relates to the technical field of image sensors, in particular to an image sensor. Background Art

[0002] Image sensors have been widely used in digital cameras, mobile phones, medical devices, automobiles and other applications. With the rapid development of CMOS (complementary metal oxide semiconductor) image sensor technology, people have higher and higher requirements on the image quality of image sensors.

[0003] The basic function of an image sensor is to expose, store, and transfer charges. During the exposure and storage process, the potential well of the photosensitive element has a limited capacity to hold charges. Once the potential well is filled with charges, an overflow will occur. The overflowing charges are stored via the floating diffusion node FD, which will inevitably lower the potential of the floating diffusion node FD. Once the potential of the floating diffusion node FD is too low, abnormalities will occur in the transistors near it, causing black spots in pixels (black sun), resulting in poor image quality.

[0004] Therefore, how to avoid causing pixel black spots and improve image quality is a technical problem that technicians in this field are eager to solve. Utility Model Content

[0005] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide an image sensor for solving the problem of poor image quality caused by easy occurrence of pixel black spots in the prior art image sensors.

[0006] To achieve the above-mentioned purpose and other related purposes, the utility model provides an image sensor, comprising a plurality of pixel blocks arranged in an array, wherein the pixel blocks include:

[0007] A photosensitive unit, an overflow unit, a transmission control unit, a reset unit and a readout unit; wherein the photosensitive unit and the overflow unit are respectively coupled to a transmission node, the reset unit and the readout unit are respectively coupled to a floating diffusion node, and the transmission control unit is coupled between the transmission node and the floating diffusion node;

[0008] The photosensitive unit is used to convert the received light signal into a charge signal, and the charge signal includes a first charge signal and a second charge signal;

[0009] The transmission control unit is used to control the on-off of the transfer path between the transmission node and the floating diffusion node, so as to transfer the second charge signal to the overflow unit via the transmission node in the exposure phase, and read out the first charge signal and the second charge signal based on the floating diffusion node in the quantization phase;

[0010] The reset unit is used to reset the transmission node and the floating diffusion node, and the readout unit is used to read out at least the first charge signal and the second charge signal.

[0011] Optionally, the photosensitive unit includes at least one photosensitive element and a transmission transistor corresponding thereto, wherein a control end of the transmission transistor receives a first transmission control signal, a first end is coupled to the transmission node, and a second end is coupled to a first reference potential via the photosensitive element;

[0012] And / or, the transmission control unit comprises a transmission control transistor, a control end of which receives a second transmission control signal, a first end of which is coupled to the transmission node, and a second end of which is coupled to the floating diffusion node;

[0013] And / or, the overflow unit includes an overflow transistor and an overflow capacitor, the control end of the overflow transistor receives an overflow control signal, the first end is coupled to the transmission node, and the second end is coupled to the second reference potential via the overflow capacitor.

[0014] Optionally, when the overflow capacitor exists, the overflow capacitor corresponds to a first wiring, and the reset unit corresponds to a second wiring, wherein one plate of the overflow capacitor receives the second reference potential via the first wiring, and the other plate of the overflow capacitor receives the first power supply potential via the second wiring, so as to reset the overflow capacitor by simultaneously receiving the second reference potential and the first power supply potential.

[0015] Optionally, the reset unit comprises a reset transistor, a control terminal receiving a reset control signal, a first terminal coupled to a first power supply potential, and a second terminal coupled to the floating diffusion node;

[0016] And / or, the readout unit includes a source follower transistor and a selection transistor, the control terminal of the source follower transistor is coupled to the floating diffusion node, the first terminal is coupled to the second power supply potential, the second terminal is coupled to the first terminal of the selection transistor, the control terminal of the selection transistor receives a selection control signal, and the second terminal is coupled to the column line;

[0017] And / or, the pixel block also includes a gain unit, coupled between the reset unit and the floating diffusion node, for switching different conversion gains, the gain unit includes a gain transistor, a control end receiving a gain control signal, a first end coupled to the reset unit, and a second end coupled to the floating diffusion node.

[0018] Optionally, the pixel block includes a first device area and a second device area, the first device area includes the photosensitive unit, and the second device area includes the overflow unit, the transmission control unit, the reset unit and the readout unit, wherein the first device area and the second device area of ​​the same pixel block are arranged along a first direction, and the first device area and the second device area of ​​different pixel blocks are arranged along a second direction, and there is an angle between the first direction and the second direction.

[0019] Optionally, in the second device area, the overflow unit extends from the first device area via the transmission node along the second direction, the transmission control unit extends from the first device area via the transmission node along the first direction, and the readout unit and the transmission control unit are arranged along the second direction and arranged with the overflow unit along the first direction.

[0020] Optionally, the pixel block includes a third device area and a fourth device area that are adjacent to each other, the third device area includes the photosensitive unit, and the fourth device area includes the overflow unit, the transmission control unit, the reset unit and the readout unit, wherein the overflow unit and the transmission control unit extend from the third device area and are symmetrically arranged on both sides of the first center axis of the fourth device area.

[0021] Optionally, the arrangement of the pixel blocks includes:

[0022] The readout unit is arranged on a side of the overflow unit and the transmission control unit away from the third device area and corresponding to the first central axis; and / or, the overflow unit extends along a third direction having a first angle with the row direction, the transmission control unit extends along a fourth direction having a second angle with the row direction, the readout unit extends along the row direction, and when the pixel block includes a gain unit, the gain unit extends from the transmission control unit along the fourth direction, and the reset unit extends along the fourth direction and has a spacing between the gain unit; and / or, the storage element of the overflow unit is at least arranged in the substrate ; and / or, the third device area has a second central axis, and the photosensitive unit includes a first sub-transmission element and a second sub-transmission element symmetrically distributed on both sides of the second central axis; and / or, the photosensitive unit includes a first sub-photosensitive element and a second sub-photosensitive element distributed on the left and right sides of the third device area, and the overflow unit and the reset unit of the fourth device area are correspondingly distributed on the left and right sides, so as to realize overflow signal acquisition based on the first sub-photosensitive element and realize conversion signal acquisition based on the second sub-photosensitive element; and / or, the transmission element of the photosensitive unit includes a vertical transmission gate, and the pixel block includes a square structure.

[0023] Optionally, the charge storage capacity corresponding to the overflow unit: the charge storage capacity corresponding to the transmission node ranges from (10-50): (0.01-0.5); when the pixel block also includes a gain unit, the low conversion gain charge storage capacity corresponding to the gain unit: the charge storage capacity corresponding to the transmission node ranges from (1-20): (0.01-0.5), the high conversion gain charge storage capacity corresponding to the gain unit: the charge storage capacity corresponding to the transmission node ranges from (0.5-2): (0.01-0.5).

[0024] As described above, an image sensor of the utility model, through the design of a transmission control unit, adds a transmission node on the basis of a floating diffusion node. Since the charge storage capacity of the transmission node is very small, even if charge overflow occurs, the charge stored in the transmission node has little effect on the potential of the floating diffusion node during quantization readout, which greatly reduces the possibility of causing pixel black spots. If, in order to avoid causing pixel black spots, the charge stored in the transmission node is cleared before quantization readout, the cleared charge has little effect on the accuracy of the quantization readout of the overflow charge. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 Shown is a schematic diagram of the structure of the image sensor in Example 1.

[0026] Figure 2 The display is a timing diagram corresponding to the control method of the image sensor in the first embodiment.

[0027] Figure 3 Another timing diagram corresponding to the control method of the image sensor in the first embodiment is shown.

[0028] Figure 4 It shows another timing diagram corresponding to the control method of the image sensor in the first embodiment.

[0029] Figure 5 Shown is a schematic diagram of the structure of the image sensor in the second embodiment.

[0030] Figure 6 The display is a timing diagram corresponding to the control method of the image sensor in the second embodiment.

[0031] Figure 7 Another timing diagram corresponding to the control method of the image sensor in the second embodiment is shown.

[0032] Figure 8 It shows another timing diagram corresponding to the control method of the image sensor in the second embodiment.

[0033] Fig. 9The figure shows a signal-to-noise ratio curve corresponding to whether the image sensor is designed with a transmission control unit in the second embodiment.

[0034] Fig.10 Shown is a schematic diagram of a device arrangement of an image sensor in Example 3.

[0035] Fig.11 Shown is another schematic diagram of device arrangement of the image sensor in the third embodiment.

[0036] Component number description

[0037] 100 pixel blocks

[0038] 110 Photosensitive unit

[0039] 120 Overflow Unit

[0040] 130 Transmission control unit

[0041] 140 Reset unit

[0042] 150 Readout unit

[0043] 160 Gain Unit DETAILED DESCRIPTION

[0044] The following is an explanation of the implementation of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific implementations, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0045] See also Figures 1 to 11 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the utility model in a schematic manner, and the illustrations only show the components related to the utility model rather than the number, shape and size of the components in actual implementation. The form, quantity and proportion of each component in actual implementation may be changed arbitrarily, and the component layout may also be more complicated.

[0046] Embodiment 1

[0047] like Figure 1 As shown, this embodiment provides an image sensor, which includes a plurality of pixel blocks 100 arranged in an array, such as a plurality of pixel blocks 100 arranged in an array in rows and columns; wherein the pixel block 100 includes a photosensitive unit 110, an overflow unit 120, a transmission control unit 130, a reset unit 140 and a readout unit 150.

[0048] The photosensitive unit 110 is coupled to the transmission node TXN, and is used to convert the received light signal into a charge signal, wherein the charge signal includes a first charge signal and a second charge signal.

[0049] In combination with actual application scenarios, the first charge signal refers to the charge signal corresponding to the potential well portion, and the second charge signal refers to the charge signal corresponding to the overflow portion after the charge exceeds the potential well; when the amount of charge sensed by the photosensitive unit 110 does not reach the overflow state, the converted charge signal only includes the first charge signal, which is stored in the photosensitive unit 110. At this time, it can be considered that the second charge signal is zero; when the amount of charge sensed by the photosensitive unit 110 reaches the overflow state, the converted charge signal includes the first charge signal and the second charge signal, wherein the first charge signal is stored in the photosensitive unit 110, and the second charge signal overflows the photosensitive unit 110 and is stored in the overflow unit 120. In some embodiments, the first charge signal can also be defined as a potential well charge signal, and the second charge signal can be defined as an overflow charge signal.

[0050] As an example, the photosensitive unit 110 includes at least one photosensitive element PD and a corresponding transfer transistor M1, the control end of the transfer transistor M1 receives a first control signal TX1, the first end is coupled to the transfer node TXN, and the second end is coupled to a first reference potential via the photosensitive element PD, such as, the second end of the transfer transistor M1 is coupled to the first end of the photosensitive element PD, and the second end of the photosensitive element PD is coupled to the first reference potential.

[0051] The photosensitive element PD may be any one of a photodiode, a grating or a photoconductor, and the transmission transistor M1 may be any one of an NMOS tube or a PMOS tube. In this embodiment, the photosensitive element PD is a photodiode, such as a pin-type photodiode, and the transmission transistor M1 is an NMOS tube; at this time, the gate of the transmission transistor M1 receives the first transmission control signal TX1, the drain is connected to the transmission node TXN, the source is connected to the first end of the photosensitive element PD (such as the N-type ion doping region), and the second end of the photosensitive element PD (such as the P-type ion doping region) is connected to the first reference potential.

[0052] In practical applications, the number of photosensitive elements PD and transmission transistors M1 included in the photosensitive unit 110 can be designed according to specific needs. For example, the photosensitive element PD can be one, or a shared structure formed by two, four, eight, etc., and this embodiment does not limit this. In addition, the first reference potential is usually a reference ground potential. Of course, in other embodiments, the first reference potential can also be a negative potential.

[0053] The overflow unit 120 is coupled to the transmission node TXN, and is used to store the second charge signal when the charge amount sensed by the photosensitive unit 110 reaches the overflow state. It should be noted that when the charge amount sensed by the photosensitive unit 110 does not reach the overflow state, the converted charge signal only includes the first charge signal, and no second charge signal is stored in the overflow unit 120.

[0054] In this embodiment, the charge storage capacity corresponding to the overflow unit 120: the charge storage capacity corresponding to the transmission node TXN includes a range of (10-50): (0.01-0.5); as an optional scheme, the charge storage capacity corresponding to the overflow unit 120: the charge storage capacity corresponding to the transmission node TXN includes a range of (20-22): (0.08-0.10), for example, the charge storage capacity corresponding to the overflow unit 120: the charge storage capacity corresponding to the transmission node TXN can be 45:0.15, 40:0.1, 30:1.5, 22:0.09, 21:0.08, 15:0.05. Of course, other numerical ratios are also feasible, and this embodiment does not impose any restrictions on this.

[0055] The charge storage capacity corresponding to the transmission node TXN is designed to be very small. After overflow occurs, even if no additional reset operation is performed on the transmission node TXN, the amount of charge stored thereon will become smaller after being averaged with the floating diffusion node FD in the subsequent quantization stage, and will have almost no effect on the potential of the floating diffusion node FD. The voltage drop of the floating diffusion node FD can be achieved to not exceed 5%, thereby reducing the possibility of causing pixel black spots.

[0056] As an example, the overflow unit 120 includes an overflow transistor M2 and an overflow capacitor COF. The control end of the overflow transistor M2 receives an overflow control signal OF_CTL, a first end is coupled to the transmission node TXN, and a second end is coupled to the second reference potential via the overflow capacitor COF.

[0057] Among them, the overflow transistor M2 can be any one of an NMOS tube or a PMOS tube. In this embodiment, the overflow transistor M2 is an NMOS tube; at this time, the gate of the overflow transistor M2 receives the overflow control signal OF_CTL, the drain is connected to the transmission node TXN, and the source is connected to the second reference potential via the overflow capacitor COF.

[0058] In one embodiment, the overflow capacitor COF corresponds to the first wiring, and the reset unit 140 corresponds to the second wiring, wherein one plate of the overflow capacitor COF receives the second reference potential via the first wiring, and the other plate of the overflow capacitor COF receives the first power supply potential via the second wiring, so as to achieve rapid reset of the overflow capacitor COF by simultaneously receiving the second reference potential and the first power supply potential. For example, the second reference potential is the reference ground potential, and the first power supply potential is the operating voltage potential VDD. Different reset state signals are provided through different wirings, and rapid reset of the overflow capacitor can be achieved based on the ground driving force, which is conducive to better accepting more charge overflow through the overflow capacitor, and can be better applied to strong light signals to improve image quality.

[0059] The transmission control unit 130 is coupled between the transmission node TXN and the floating diffusion node FD, and is used to control the on-off of the transfer path between the transmission node TXN and the floating diffusion node FD.

[0060] As an example, the transmission control unit 130 includes a transmission control transistor M3 , a control terminal of which receives the second transmission control signal TX2 , a first terminal of which is coupled to the transmission node TXN, and a second terminal of which is coupled to the floating diffusion node FD.

[0061] Among them, the transmission control transistor M3 can be any one of an NMOS tube or a PMOS tube. In this embodiment, the transmission control transistor M3 is an NMOS tube; at this time, the gate of the transmission control transistor M3 receives the second transmission control signal TX2, the drain is connected to the transmission node TXN, and the source is connected to the floating diffusion node FD.

[0062] In the exposure stage, the transmission control transistor M3 is turned off, cutting off the transfer path between the transmission node TXN and the floating diffusion node FD, so as to transfer the second charge signal to the overflow unit 120 via the transmission node TXN; in the quantization stage, the transmission control transistor M3 is turned on, connecting the transfer path between the transmission node TXN and the floating diffusion node FD, so as to read out the first charge signal and the second charge signal based on the floating diffusion node FD, such as transferring the first charge signal and the second charge signal to the floating diffusion node FD via the transmission node TXN and performing quantized readout.

[0063] The reset unit 140 is coupled to the floating diffusion node FD, and is used to reset the transmission node TXN and the floating diffusion node FD.

[0064] As an example, the reset unit 140 includes a reset transistor M4 , a control terminal of which receives a reset control signal RST, a first terminal of which is coupled to a first power supply potential, and a second terminal of which is coupled to a floating diffusion node FD.

[0065] Among them, the reset transistor M4 can be any one of an NMOS tube or a PMOS tube. In this embodiment, the reset transistor M4 is an NMOS tube; at this time, the gate of the reset transistor M4 receives the reset control signal RST, the drain is connected to the first power supply potential, and the source is connected to the floating diffusion node FD. In practical applications, the first power supply potential is usually the potential of the working voltage and is always a high potential. Of course, in some other applications, it can be set to a variable potential according to the pixel selection transistor configuration.

[0066] The readout unit 150 is coupled to the floating diffusion node FD and is configured to read out at least the first charge signal and the second charge signal.

[0067] As an example, the readout unit 150 includes a source follower transistor M5 and a selection transistor M6, the control end of the source follower transistor M5 is coupled to the floating diffusion node FD, the first end is coupled to the second power supply potential, the second end is coupled to the first end of the selection transistor M6, the control end of the selection transistor M6 receives the selection control signal SEL, and the second end is coupled to the column line BL.

[0068] The source follower transistor M5 can be any one of an NMOS transistor or a PMOS transistor, and the selection transistor M6 can be any one of an NMOS transistor or a PMOS transistor; in this embodiment, the source follower transistor M5 and the selection transistor M6 are both NMOS transistors; at this time, the gate of the source follower transistor M5 is connected to the floating diffusion node FD, the drain is connected to the second power supply potential, the source is connected to the drain of the selection transistor M6, the gate of the selection transistor M6 receives the selection control signal SEL, and the source is connected to the column line BL. In practical applications, the second power supply potential is usually the same as the first power supply potential, both are working voltage potentials, for example, always high potential.

[0069] Correspondingly, such as Figure 2 As shown, this embodiment also provides a control method for an image sensor, the control method includes a reset phase and an exposure phase; further, it also includes a quantization phase. The image sensor is implemented using the circuit structure described above.

[0070] Reset phase: Perform the first reset operation on the transmission node TXN, the floating diffusion node FD and the photosensitive element PD.

[0071] Specifically, the transfer transistor M1 in the photosensitive unit 110, the overflow transistor M2 in the overflow unit 120 and the transfer control transistor M3 in the transfer control unit 130 are controlled to be turned on, and the reset transistor M4 in the reset unit 140 is controlled to be turned on, and the charge of the transmission node TXN, the floating diffusion node FD and the photosensitive element PD is cleared to achieve signal reset, completing the first reset operation; thereafter, the transfer transistor M1, the transfer control transistor M3 and the reset transistor M4 are controlled to be turned off.

[0072] Exposure phase: the overflow unit 120 is turned on, and the transfer path between the transmission node TXN and the floating diffusion node FD is cut off by the transfer control unit 130, so that the second charge signal is transferred to the overflow unit 120 via the transmission node TXN.

[0073] Specifically, the overflow transistor M2 in the overflow unit 120 is in an open state, and the transfer control transistor M3 in the transmission control unit 130 is in a closed state to cut off the transfer path between the transmission node TXN and the floating diffusion node FD, so that when the amount of charge sensed by the photosensitive unit 110 reaches an overflow state, the second charge signal can be transferred and stored in the overflow capacitor COF via the transmission node TXN without passing through the floating diffusion node FD.

[0074] When the amount of charge sensed by the photosensitive unit 110 has not reached the overflow state, the converted charge signal only includes the first charge signal, which is stored on the photosensitive element PD in the photosensitive unit 110. At this time, although the overflow transistor M2 is in the open state, there is no second charge signal transferred via the transmission node TXN and stored in the overflow capacitor COF. It can be considered that the corresponding second charge signal in this process is zero.

[0075] When the amount of charge sensed by the photosensitive unit 110 reaches an overflow state, the converted charge signal includes a first charge signal and a second charge signal, wherein the first charge signal is stored on the photosensitive element PD in the photosensitive unit 110, and the second charge signal is transferred via the transmission node TXN and stored in the overflow capacitor COF.

[0076] Quantization stage: the overflow unit 120 is closed, and the transfer path between the transmission node TXN and the floating diffusion node FD is connected through the transmission control unit 130 to perform quantization reading of the first charge signal based on the floating diffusion node FD; and the overflow unit 120 is opened to perform quantization reading of the second charge signal based on the transmission node TXN and the floating diffusion node FD. It should be noted that when the charge amount sensed by the photosensitive unit 110 does not reach the overflow state, the result of the quantization reading of the second charge signal after the overflow unit 120 is opened in this stage is zero.

[0077] Furthermore, before the first charge signal is quantized and read out, this stage also quantizes and reads out the first reset signal based on the floating diffusion node FD to achieve correlated double sampling of the first charge signal; after the second charge signal is quantized and read out, this stage also performs a second reset operation on the transmission node TXN and the floating diffusion node FD to quantize and read out the second reset signal based on the floating diffusion node FD to achieve non-true correlated double sampling of the second charge signal.

[0078] In one implementation, in the quantization phase: the first charge signal and the first reset signal are read prior to the second charge signal and the second reset signal, wherein the first reset signal is read prior to the first charge signal, and the second charge signal is read prior to the second reset signal, so as to perform quantization readout based on the floating diffusion node FD. In a possible implementation, after the exposure phase ends and the quantization phase begins, the transfer control transistor M3 in the transfer control unit 130 is turned on, and the transfer control transistor M3 is kept turned on during the entire quantization process.

[0079] For the first reset signal and the first charge signal:

[0080] Control the overflow transistor M2 in the overflow unit 120 to be turned off, and control the transfer control transistor M3 in the transfer control unit 130 to be turned on, so as to perform quantization reading of the first reset signal (ie, RST) based on the floating diffusion node FD;

[0081] In one example, during the quantization stage, the selection transistor M6 in the readout unit 150 is first controlled to be turned on, and the closing of the overflow transistor M2 and the opening of the control transistor M3 occur after the opening of the selection transistor M6. In a further optional example, the overflow transistor M2 is first closed and then the control transistor M3 is opened. Of course, in other implementations, the closing of the overflow transistor M2 and the opening of the control transistor M3 may be performed simultaneously.

[0082] Afterwards, the transfer transistor M1 in the photosensitive unit 110 is controlled to be turned on and then turned off, and the first charge signal (ie, SIG) stored in the photosensitive element PD is transferred to the floating diffusion node FD via the transmission node TXN and quantized and read out.

[0083] In one example, in the process of turning on and then off the transmission transistor M1, the selection transistor M6 is turned off and then turned on. In a further optional example, the interval in which the selection transistor M6 is turned off covers the interval in which the transmission transistor M1 is turned on. Figure 2 The corresponding interval of the high level of the first transmission transistor M1 and the low level of the selection transistor M6 in the middle quantization stage.

[0084] For the second charge signal and the second reset signal:

[0085] The overflow transistor M2 in the overflow unit 120 is controlled to be turned on, and the second charge signal (ie, OF_SIG) stored in the overflow capacitor COF is transferred to the floating diffusion node FD via the transmission node TXN and is quantized and read out.

[0086] In one example, when reading out the quantized second charge signal, the transfer transistor M1 in the photosensitive unit 110 is controlled to be turned on and then turned off, and the selection transistor M6 in the readout unit 150 is controlled to be turned off and then turned on. In a further optional example, after the overflow transistor M2 in the overflow unit 120 is controlled to be turned on, the transfer transistor M1 is controlled to be turned on and then turned off. In another further optional example, the interval in which the selection transistor M6 is turned off covers the interval in which the transfer transistor M1 is turned on, which can be seen in FIG. Figure 2 The corresponding interval of the high level of the second transmission transistor M1 and the low level of the selection transistor M6 in the middle quantization stage.

[0087] Afterwards, the reset transistor M4 in the reset unit 140 is controlled to be turned on and then turned off, and a reset operation is performed on the transmission node TXN and the floating diffusion node FD, so as to perform quantization readout of the second reset signal (ie, OF_RST) based on the floating diffusion node FD.

[0088] In one example, the process of turning on and then off the reset transistor M4 corresponds to the operation of turning off and then turning on the selection transistor M6 in the readout unit 150. In a further example, the reset transistor M4 is turned off during the turning-off period of the selection transistor M6, that is, the turning on of the reset transistor M4 precedes the turning off of the selection transistor M6, and the turning off of the reset transistor M4 precedes the turning on of the selection transistor M6. For the specific operation correspondence, please refer to Figure 2 The operation process corresponding to the second reset signal acquisition.

[0089] In another implementation, Figure 3 As shown, before the quantization readout of the signal in the exposure stage, an additional reset operation is performed on the transmission node TXN and the floating diffusion node FD to clear part of the charge stored on the transmission node TXN during the overflow process, so as to avoid the influence of this part of the charge on the potential of the floating diffusion node FD during the subsequent quantization readout of the signal, thereby avoiding the occurrence of pixel black spots; although clearing this part of the charge will affect the subsequent quantization readout of the second charge signal, the amount of charge stored on the transmission node TXN is very small, so the influence on the accuracy of the signal is relatively small.

[0090] Specifically, the overflow transistor M2 in the overflow unit 120 is in a closed state, the transmission control transistor M3 in the transmission control unit 130 is in an open state, the reset transistor M4 in the control reset unit 140 is turned on and then turned off, and the charge of the transmission node TXN and the floating diffusion node FD is cleared to achieve signal reset, thereby completing the additional reset operation.

[0091] In one example, first, the selection transistor M6 in the read-out unit 150 is controlled to be turned on; then, the closing of the overflow transistor M2 and the opening of the control transistor M3 occur after the opening of the selection transistor M6. In an optional example, the overflow transistor M2 is first closed and then the control transistor M3 is opened; finally, after the overflow transistor M2 is closed and the control transistor M3 is opened, the above-mentioned additional reset operation is performed, such as opening and closing the reset transistor M4 once.

[0092] In other implementations, such as Figure 4 As shown, the second charge signal and the second reset signal are read prior to the first charge signal and the first reset signal, wherein the second reset signal is read prior to the second charge signal and the first reset signal is read prior to the first charge signal, so as to perform quantized readout based on the floating diffusion node FD.

[0093] In this implementation, after the exposure is completed, the overflow transistor M2 remains open to read the signal of the overflow part first. First, when the control transistor M3 is closed, it is reset through the reset transistor M4 to obtain the second reset signal (i.e., OF_RST); then, the control transistor M3 is turned on and then closed to obtain the potential of the second charge signal corresponding to the overflow unit to obtain the second charge signal (i.e., OF_SIG) to achieve the true correlated double sampling of the overflow signal; then, the overflow transistor M2 is closed and the control transistor M3 is opened to obtain the first reset signal (i.e., RST) and the first charge signal (i.e., SIG).

[0094] The acquisition of the second charge signal (ie OF_SIG) can also be performed when the pass-control transistor M3 is turned on. Figure 4 As shown by the dotted line in the figure, this example preferably adopts the reading when the pass control transistor M3 is turned off, which is conducive to keeping the reset signal consistent with the charge signal acquisition state. Other similar features in this embodiment refer to the above description and are not repeated here.

[0095] Embodiment 2

[0096] like Figure 5 As shown, compared with the image sensor described in the first embodiment, the pixel block 100 of the image sensor in this embodiment further includes a gain unit 160. The description of the relevant structure and operation can be found in the first embodiment, and will not be repeated here.

[0097] The gain unit 160 is coupled between the reset unit 140 and the floating diffusion node FD for switching between different conversion gains.

[0098] As an example, the gain unit 160 includes a gain transistor M7 , a control terminal of which receives a gain control signal DCG, a first terminal of which is coupled to the reset unit 140 , and a second terminal of which is coupled to the floating diffusion node FD.

[0099] Among them, the gain transistor M7 can be any one of an NMOS tube or a PMOS tube. In this embodiment, the gain transistor M7 is an NMOS tube; at this time, the gate of the gain transistor M7 receives the gain control signal DCG, the drain is connected to the source of the reset transistor M4, and the source is connected to the floating diffusion node FD.

[0100] When switching the conversion gain, if the gain transistor M7 is turned on, the image sensor composed of the pixel block 100 operates in a low conversion gain (LCG) mode; if the gain transistor M7 is turned off, the image sensor composed of the pixel block 100 operates in a high conversion gain (HCG) mode.

[0101] In this embodiment, the low conversion gain charge storage capacity corresponding to the gain unit 160: the charge storage capacity corresponding to the transmission node ranges from (1-20): (0.01-0.5), and the high conversion gain charge storage capacity corresponding to the gain unit 160: the charge storage capacity corresponding to the transmission node ranges from (0.5-2): (0.01-0.5).

[0102] It should be noted that the low conversion gain charge storage capacity corresponding to the gain unit 160 can be considered as the sum of the capacitances of the corresponding related nodes when the image sensor operates in a low conversion gain mode (such as when the gain transistor M7 is turned on) (such as the sum of the capacitance of the floating diffusion node FD and the capacitance corresponding to the gain unit 160). Similarly, the high conversion gain charge storage capacity corresponding to the gain unit 160 can be considered as the sum of the capacitances of the corresponding related nodes when the image sensor operates in a high conversion gain mode (such as when the gain transistor M7 is turned off) (such as the capacitance of the floating diffusion node FD).

[0103] As an optional scheme, the low conversion gain charge storage capacity corresponding to the gain unit 160: the charge storage capacity corresponding to the transmission node TXN includes a range of (5-10): (0.1-0.2), for example, the low conversion gain charge storage capacity corresponding to the gain unit 160: the charge storage capacity corresponding to the transmission node TXN is 8:0.15, 5:0.12, 4:0.1, 3:0.08, 2:0.05.

[0104] The high conversion gain charge storage capacity corresponding to the gain unit 160: the charge storage capacity corresponding to the transmission node TXN ranges from (0.8-1.5):(0.1-0.2), for example, the high conversion gain charge storage capacity corresponding to the gain unit 160: the charge storage capacity corresponding to the transmission node TXN is 1.6:0.15, 1.2:0.12, 0.8:0.1, 0.6:0.08, 0.5:0.05.

[0105] In a feasible implementation manner, the ratio of the charge storage capacity of the nodes in the second embodiment and the first embodiment can be prepared into a specific absolute value of the charge storage capacity corresponding to femtofarads. For example, in one example, the high conversion gain charge storage capacity corresponding to the gain unit 160: the charge storage capacity corresponding to the transmission node TXN is 0.8:0.1, 0.5:0.05. In this feasible implementation manner, the high conversion gain charge storage capacity corresponding to the gain unit 160 is 0.8 femtofarads, and the charge storage capacity corresponding to the transmission node TXN is 0.1 femtofarads. Alternatively, the high conversion gain charge storage capacity corresponding to the gain unit 160 is 0.5 femtofarads, and the charge storage capacity corresponding to the transmission node TXN is 0.05 femtofarads. Other ratios are similar and will not be described in detail here.

[0106] Correspondingly, such as Figure 6 As shown, this embodiment also provides a control method for an image sensor, the control method includes a reset phase and an exposure phase; further, it also includes a quantization phase. The image sensor is implemented using the circuit structure described above.

[0107] Reset phase: reset the transmission node TXN, floating diffusion node FD and photosensitive element PD.

[0108] Specifically, the transfer transistor M1 in the photosensitive unit 110, the overflow transistor M2 in the overflow unit 120, the transfer control transistor M3 in the transfer control unit 130 and the gain control transistor M7 in the gain unit 160 are controlled to be turned on, and the reset transistor M4 in the reset unit 140 is controlled to be turned on, and the charge of the transmission node TXN, the floating diffusion node FD and the photosensitive element PD is cleared to achieve signal reset, completing the first reset operation; thereafter, the transfer transistor M1, the transfer control transistor M3 and the reset transistor M4 are controlled to be turned off.

[0109] Exposure phase: the overflow unit 120 is turned on, and the transfer path between the transmission node TXN and the floating diffusion node FD is cut off by the transfer control unit 130, so that the second charge signal is transferred to the overflow unit 120 via the transmission node TXN.

[0110] Specifically, the overflow transistor M2 in the overflow unit 120 is in an open state, and the transfer control transistor M3 in the transmission control unit 130 is in a closed state to cut off the transfer path between the transmission node TXN and the floating diffusion node FD, so that when the amount of charge sensed by the photosensitive unit 110 reaches an overflow state, the second charge signal can be transferred and stored in the overflow capacitor COF via the transmission node TXN without passing through the floating diffusion node FD.

[0111] When the amount of charge sensed by the photosensitive unit 110 has not reached the overflow state, the converted charge signal only includes the first charge signal, which is stored on the photosensitive element PD in the photosensitive unit 110. At this time, although the overflow transistor M2 is in the open state, there is no second charge signal transferred through the transmission node TXN and stored in the overflow capacitor COF.

[0112] When the amount of charge sensed by the photosensitive unit 110 reaches an overflow state, the converted charge signal includes a first charge signal and a second charge signal, wherein the first charge signal is stored on the photosensitive element PD in the photosensitive unit 110, and the second charge signal is transferred via the transmission node TXN and stored in the overflow capacitor COF.

[0113] In one example, the gain transistor M7 is kept in an open state during the exposure phase. Preferably, the gain transistor M7 is not closed after the first reset, and is kept in an open state throughout the exposure phase, which is beneficial to reducing noise.

[0114] Quantization stage: turn off the overflow unit 120, and connect the transfer path between the transmission node TXN and the floating diffusion node FD through the transmission control unit 130, and control the gain unit 160 to turn off and on to perform quantized reading of the first charge signal under different conversion gains based on the floating diffusion node FD; and turn on the overflow unit 120 to perform quantized reading of the second charge signal based on the transmission node TXN and the floating diffusion node FD.

[0115] It should be noted that when the charge amount sensed by the photosensitive unit 110 has not reached the overflow state, the result of the quantization readout of the second charge signal after the overflow unit 120 is turned on in this stage is zero.

[0116] Furthermore, before the first charge signal under different conversion gains is quantized and read out, the gain unit 160 is controlled to open and close operations, so as to quantize and read out the first reset signal under different conversion gains based on the floating diffusion node FD, thereby realizing correlated double sampling of the first charge signal under different conversion gains;

[0117] After the second charge signal is quantized and read out, the transmission node TXN and the floating diffusion node FD are reset for the second time in this stage to quantize and read out the second reset signal based on the floating diffusion node FD, thereby realizing non-true correlated double sampling of the second charge signal.

[0118] In one implementation, in the quantization stage: the reading of the first charge signal and the first reset signal precedes the reading of the second charge signal and the second reset signal, wherein the first reset signal is read before the first charge signal, and the second charge signal is read before the second reset signal, so as to perform quantization readout based on the floating diffusion node FD.

[0119] For the first reset signal and the first charge signal:

[0120] The overflow transistor M2 in the overflow unit 120 is controlled to be turned off, and the transfer control transistor M3 in the transfer control unit 130 is controlled to be turned on. Since the gain transistor M7 in the gain unit 160 is in an on state, the image sensor operates in a low conversion gain mode, and a first reset signal (L_RST) of a low conversion gain is quantized and read out based on the floating diffusion node FD;

[0121] Afterwards, the gain transistor M7 in the control gain unit 160 is turned off, the image sensor switches to the high conversion gain mode, and the first reset signal (ie, H_RST) of the high conversion gain is quantized and read out based on the transmission node TXN and the floating diffusion node FD;

[0122] Then, the transmission transistor M1 in the photosensitive unit 110 is controlled to be turned on and then turned off, and the first charge signal (ie, H_SIG) with a high conversion gain is quantized and read out via the transmission node TXN and the floating diffusion node FD;

[0123] Finally, the gain control transistor M7 in the control gain unit 160 is turned on, the image sensor is switched to the low conversion gain mode, the transfer transistor M1 in the control photosensitive unit 110 is turned on and then turned off, and the first charge signal (i.e., L_SIG) with low conversion gain is quantized and read out via the transmission node TXN and the floating diffusion node FD.

[0124] In this embodiment, the transfer process of the first charge signal corresponding to the high conversion gain and the first charge signal corresponding to the low conversion gain both performs the opening and closing operation of the transfer transistor M1. In a further example, the process corresponds to the closing process of the selection transistor M6. For details, see Figure 6 The first two times during the quantization stage, the transfer transistor M1 is turned on to transfer the charge.

[0125] For the second charge signal and the second reset signal:

[0126] Control the overflow transistor M2 in the overflow unit 120 to turn on, transfer the second charge signal (ie, OF_SIG) stored in the overflow capacitor COF to the floating diffusion node FD via the transmission node TXN and perform quantization readout;

[0127] Afterwards, the reset transistor M4 in the reset unit 140 is controlled to be turned on and then turned off, and a reset operation is performed on the transmission node TXN and the floating diffusion node FD, so as to perform quantization reading of the second reset signal (ie, OF_RST) based on the floating diffusion node FD;

[0128] Of course, when quantizing and reading out the second charge signal, it is also feasible to control the transfer transistor M1 in the photosensitive unit 110 to be turned on and then turned off, which has no substantial impact on this embodiment.

[0129] In another implementation, Figure 7 As shown, before the quantization readout of the signal in the exposure stage, an additional reset operation is performed on the transmission node TXN and the floating diffusion node FD to clear part of the charge stored on the transmission node TXN during the overflow process, so as to avoid the influence of this part of the charge on the potential of the floating diffusion node FD during the subsequent quantization readout of the signal, and to avoid causing pixel black spots; although clearing this part of the charge will affect the subsequent quantization readout of the second charge signal, since the amount of charge stored on the transmission node TXN is very small, the impact on the accuracy of the second charge signal is relatively small.

[0130] Specifically, the overflow transistor M2 in the overflow unit 120 is in a closed state, and the transmission control transistor M3 in the transmission control unit 130 is in an open state. In a further example, in this process, the gain control transistor M7 is kept in an open state since the first reset operation. At this time, the reset transistor M4 in the reset unit 140 is controlled to be turned on and then turned off, and the charge of the transmission node TXN and the floating diffusion node FD is cleared to achieve signal resetting, thereby completing the additional reset operation.

[0131] In other implementations, such as Figure 8 As shown, the second charge signal and the second reset signal are read prior to the first charge signal and the first reset signal, wherein the second reset signal is read prior to the second charge signal and the first reset signal is read prior to the first charge signal, so as to perform quantized readout based on the floating diffusion node FD.

[0132] In this implementation, after the exposure is completed, the overflow transistor M2 remains open to first read the signal of the overflow part. First, when the transmission control transistor M3 is closed, the reset transistor M4 is used for reset to obtain the second reset signal (i.e., OF_RST); then, the transmission control transistor M3 is opened and then closed to obtain the potential of the second charge signal corresponding to the overflow unit to obtain the second charge signal (i.e., OF_SIG) to achieve true correlated double sampling of the overflow signal; then, the overflow transistor M2 is closed and the transmission control transistor M3 is opened to obtain the first reset signal and the first charge signal, including the first reset signal (L_RST) of low conversion gain, the first reset signal (H_RST) of high conversion gain, the first charge signal (i.e., H_SIG) of high conversion gain, and the first charge signal (i.e., L_SIG) of low conversion gain.

[0133] The acquisition of the second charge signal (ie OF_SIG) can also be performed when the pass-control transistor M3 is turned on. Figure 8 As shown by the dotted line in the figure. In this example, it is preferred to read the signal when the control transistor M3 is turned off, which is conducive to keeping the reset signal consistent with the charge signal acquisition state. Other features of this embodiment are described above and will not be repeated here.

[0134] For the image sensor of this embodiment, when the transmission control unit is not designed (such as not adding the transmission control transistor M3) and the transmission control unit is designed (such as adding the transmission control transistor M3), the corresponding signal-to-noise ratio curves obtained by testing are as follows: Fig. 9 As shown, curve ① is the signal-to-noise ratio curve obtained when the transmission control unit is not designed, and curve ② is the signal-to-noise ratio curve obtained when the transmission control unit is designed. Fig. 9 It can be seen that, compared with not designing a transmission control unit, after designing the transmission control unit, the signal-to-noise ratio curve is smoother, the signal connection is better, and it is more conducive to the overall improvement of the signal-to-noise ratio performance of the image sensor.

[0135] In the above two embodiments, the closing of the transmission transistor M1 before the quantization stage actually refers to half-closing, so as to facilitate the charge overflow in the exposure stage, and the closing in the quantization stage refers to full closing, so as to facilitate the charge transfer and avoid the influence of the additional reset operation on the charge amount in the photosensitive element PD. The closing of other transistors in each stage refers to full closing; the opening of all transistors in each stage refers to full opening. Among them, the transmission transistor M1 can be put into a half-closed state through process preparation or subthreshold state switch control, and charges can pass through at this time, that is, when the charge amount reaches the overflow state, it can be transferred to the transmission node TXN, which can be understood by those skilled in the art.

[0136] Embodiment 3

[0137] like Fig.10 As shown, this embodiment provides an image sensor, which includes a plurality of pixel blocks 100 arranged in an array in rows and columns; the pixel block 100 includes a photosensitive unit 110, an overflow unit 120, a transmission control unit 130, a reset unit 140 and a readout unit 150, and further includes a gain unit 160. The photosensitive unit 110 includes at least one photosensitive element PD and a corresponding transmission transistor M1, the overflow unit 120 includes an overflow transistor M2 and an overflow capacitor COF, the transmission control unit 130 includes a transmission control transistor M3, the reset unit 140 includes a reset transistor M4, the readout unit 150 includes a source follower transistor M5 and a selection transistor M6, and the gain unit 160 includes a gain transistor M7. For related circuit connections, see Figure 1 and Figure 5 , I will not go into details here.

[0138] In one possible implementation, Fig.10 As shown, the pixel block 100 includes a first device area and a second device area, the first device area includes a photosensitive unit 110, and the second device area includes an overflow unit 120, a transmission control unit 130, a reset unit 140, and a readout unit 150, wherein the first device area and the second device area of ​​the same pixel block 100 are arranged along a first direction, and the first device area and the second device area of ​​different pixel blocks 100 are arranged along a second direction, and there is an angle between the first direction and the second direction. In practical applications, the first direction is a row direction, and the second direction is a column direction, and there is an angle of 90° between the two.

[0139] It should be noted that although the first device area and the second device area of ​​the same pixel block 100 are arranged along the first direction, they also have a certain distance between them in the second direction; and although the first device area and the second device area of ​​different pixel blocks 100 are arranged along the second direction, they also have a certain distance between them in the first direction; in this way, the device areas can be arranged closely, which is conducive to reducing the area.

[0140] As an optional solution, in the second device region, the overflow unit 120 extends from the first device region via the transmission node TXN along the second direction (see Fig.10 The transmission control unit 130 extends from the first device region through the transmission node TXN along the first direction (see Fig.10 The readout unit 150 and the transmission control unit 130 are arranged along the second direction and the overflow unit 120 is arranged along the first direction (see Fig.10 Further, the reset unit 140 and the transmission control unit 130 are arranged along the first direction, and the reset unit 140 is arranged on a side of the transmission control unit 130 away from the first device region (see Fig.10 Furthermore, when the pixel block 100 further includes a gain unit 160, the gain unit 160 is arranged in the second device region and between the transmission control unit 130 and the reset unit 140 (see Fig.10 According to the above arrangement, the devices in the pixel block 100 can be arranged regularly in the first direction and the second direction, which is conducive to metal routing in a straight line, the routing is simple and can avoid mutual crosstalk. Among them, the overflow capacitor can be a MIM capacitor.

[0141] In another possible implementation, Fig.11As shown, the pixel block 100 includes a third device area and a fourth device area which are adjacently arranged, the third device area includes a photosensitive unit 110, and the fourth device area includes an overflow unit 120, a transmission control unit 130, a reset unit 140 and a readout unit 150, wherein the overflow unit 120 and the transmission control unit 130 extend from the third device area and are symmetrically arranged on both sides of the first center axis of the fourth device area.

[0142] As an optional solution, the overflow unit 120 extends along a third direction having a first angle with the row direction (see Fig.11 The transmission control unit 130 extends along a fourth direction having a second angle with the row direction (see Fig.11 In one example, the readout unit 150 is arranged on a side of the overflow unit 120 and the transmission control unit 130 away from the third device region and corresponds to the first central axis (see Fig.11 Further, when the pixel block 100 further includes a gain unit 160, the gain unit 160 extends from the transmission control unit 130 along the fourth direction (see Fig.11 The reset unit 140 extends along the fourth direction and has a spacing between the gain unit 160 (see Fig.11 According to the above arrangement, the devices in the pixel block 100 can be arranged on both sides of the first central axis in an approximately symmetrical manner, which is conducive to reducing the influence of parasitic parameters.

[0143] In addition, the third device region has a second central axis, and the photosensitive unit 110 includes a first sub-transmission element and a second sub-transmission element symmetrically distributed on both sides of the second central axis (see Fig.11 wherein the transmission element of the photosensitive unit 110 includes a vertical transmission gate and the pixel block 100 includes a square structure.

[0144] Continue to see Fig.11 As shown, in one embodiment, the photosensitive unit includes a first sub-photosensitive element and a second sub-photosensitive element distributed on the left and right sides of the third device area, and the overflow unit (corresponding to the distribution of M2 and COF) and the reset unit (corresponding to the distribution of M4) of the fourth device area are distributed on the left and right sides respectively, so as to realize overflow signal acquisition based on the first sub-photosensitive element and realize conversion signal acquisition based on the second sub-photosensitive element. The first sub-photosensitive element and the second sub-photosensitive element correspond to the first sub-transmission element and the second sub-transmission element respectively (see Fig.11The arrangement of M1_1 and M1_2 in the figure), the existing isolation method can be used to isolate the PD in the figure to obtain the first sub-photosensitive element and the second sub-photosensitive element. Preferably, the two are symmetrically distributed about the second central axis. Furthermore, a reflectivity-reducing structure can be provided on the first sub-photosensitive element. In addition, the transmission control unit (corresponding to M3 in the figure) and the gain unit (corresponding to M7 in the figure) correspond to the distribution of the second sub-photosensitive element. In this example, low sensitivity can be achieved based on the first photosensitive sub-element, and the overflow signal can be collected through the overflow unit to obtain a high-brightness signal or an LED flashing signal. High sensitivity can be achieved based on the second photosensitive sub-element, and the second photosensitive sub-element can further be a gain control unit to obtain its own conversion signal, obtain a low-brightness signal, and improve the overall image quality.

[0145] In the above two possible implementations, the storage element of the gain unit 160 is at least arranged in the substrate, which can be implemented by using MOS capacitors, etc. Of course, it can also be implemented by connecting MIM capacitors or using MOS and MIM capacitors at the same time.

[0146] In summary, the image sensor of the utility model, through the design of the transmission control unit, adds a transmission node on the basis of the floating diffusion node. Since the charge storage capacity of the transmission node is very small, even if charge overflow occurs, the charge stored in the transmission node has little effect on the potential of the floating diffusion node during quantization readout, which greatly reduces the possibility of causing pixel black spots; if the charge stored in the transmission node is cleared before quantization readout in order to avoid causing pixel black spots, the cleared charge has little effect on the accuracy of the quantization readout of the overflow charge. Therefore, the utility model effectively overcomes various shortcomings in the prior art and has a high industrial utilization value.

[0147] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the technology may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed in the present invention shall still be covered by the claims of the present invention.

Claims

1. An image sensor, characterized in that: The method comprises a plurality of pixel blocks arranged in an array, wherein the pixel blocks include: A photosensitive unit, an overflow unit, a transmission control unit, a reset unit and a readout unit; wherein the photosensitive unit and the overflow unit are respectively coupled to a transmission node, the reset unit and the readout unit are respectively coupled to a floating diffusion node, and the transmission control unit is coupled between the transmission node and the floating diffusion node; The photosensitive unit is used to convert the received light signal into a charge signal, and the charge signal includes a first charge signal and a second charge signal; The transmission control unit is used to control the on-off of the transfer path between the transmission node and the floating diffusion node, so as to transfer the second charge signal to the overflow unit via the transmission node in the exposure phase, and read out the first charge signal and the second charge signal based on the floating diffusion node in the quantization phase; The reset unit is used to reset the transmission node and the floating diffusion node, and the readout unit is used to read out at least the first charge signal and the second charge signal.

2. The image sensor according to claim 1, characterized in that The photosensitive unit includes at least one photosensitive element and a transmission transistor corresponding thereto, wherein a control end of the transmission transistor receives a first transmission control signal, a first end is coupled to the transmission node, and a second end is coupled to a first reference potential via the photosensitive element; And / or, the transmission control unit comprises a transmission control transistor, a control end of which receives a second transmission control signal, a first end of which is coupled to the transmission node, and a second end of which is coupled to the floating diffusion node; And / or, the overflow unit includes an overflow transistor and an overflow capacitor, the control end of the overflow transistor receives an overflow control signal, the first end is coupled to the transmission node, and the second end is coupled to the second reference potential via the overflow capacitor.

3. The image sensor according to claim 2, characterized in that When an overflow capacitor exists, the overflow capacitor corresponds to a first wiring, and the reset unit corresponds to a second wiring, wherein one plate of the overflow capacitor receives a second reference potential via the first wiring, and the other plate of the overflow capacitor receives a first power supply potential via the second wiring, so as to reset the overflow capacitor by simultaneously receiving the second reference potential and the first power supply potential.

4. The image sensor according to claim 1, characterized in that The reset unit comprises a reset transistor, a control terminal receiving a reset control signal, a first terminal coupled to a first power supply potential, and a second terminal coupled to the floating diffusion node; And / or, the readout unit includes a source follower transistor and a selection transistor, the control terminal of the source follower transistor is coupled to the floating diffusion node, the first terminal is coupled to the second power supply potential, the second terminal is coupled to the first terminal of the selection transistor, the control terminal of the selection transistor receives a selection control signal, and the second terminal is coupled to the column line; And / or, the pixel block also includes a gain unit, coupled between the reset unit and the floating diffusion node, for switching different conversion gains, the gain unit includes a gain transistor, a control end receiving a gain control signal, a first end coupled to the reset unit, and a second end coupled to the floating diffusion node.

5. The image sensor according to claim 1, characterized in that The pixel block includes a first device area and a second device area, the first device area includes the photosensitive unit, and the second device area includes the overflow unit, the transmission control unit, the reset unit and the readout unit, wherein the first device area and the second device area of ​​the same pixel block are arranged along a first direction, and the first device area and the second device area of ​​different pixel blocks are arranged along a second direction, and there is an angle between the first direction and the second direction.

6. The image sensor according to claim 5, characterized in that In the second device area, the overflow unit extends from the first device area via the transmission node along the second direction, the transmission control unit extends from the first device area via the transmission node along the first direction, and the readout unit and the transmission control unit are arranged along the second direction and arranged with the overflow unit along the first direction.

7. The image sensor according to claim 1, characterized in that: The pixel block includes a third device area and a fourth device area which are adjacently arranged, the third device area includes the photosensitive unit, and the fourth device area includes the overflow unit, the transmission control unit, the reset unit and the readout unit, wherein the overflow unit and the transmission control unit extend from the third device area and are symmetrically arranged on both sides of the first central axis of the fourth device area.

8. The image sensor according to claim 7, characterized in that: The arrangement of the pixel blocks includes: The readout unit is arranged on a side of the overflow unit and the transmission control unit away from the third device area and corresponding to the first central axis; and / or, the overflow unit extends along a third direction having a first angle with the row direction, the transmission control unit extends along a fourth direction having a second angle with the row direction, the readout unit extends along the row direction, and when the pixel block includes a gain unit, the gain unit extends from the transmission control unit along the fourth direction, and the reset unit extends along the fourth direction and has a spacing between the gain unit; and / or, the storage element of the overflow unit is at least arranged in the substrate ; and / or, the third device area has a second central axis, and the photosensitive unit includes a first sub-transmission element and a second sub-transmission element symmetrically distributed on both sides of the second central axis; and / or, the photosensitive unit includes a first sub-photosensitive element and a second sub-photosensitive element distributed on the left and right sides of the third device area, and the overflow unit and the reset unit of the fourth device area are correspondingly distributed on the left and right sides, so as to realize overflow signal acquisition based on the first sub-photosensitive element and realize conversion signal acquisition based on the second sub-photosensitive element; and / or, the transmission element of the photosensitive unit includes a vertical transmission gate, and the pixel block includes a square structure.

9. The image sensor according to any one of claims 1 to 8, characterized in that: The charge storage capacity corresponding to the overflow unit: the charge storage capacity corresponding to the transmission node ranges from (10-50): (0.01-0.5); when the pixel block also includes a gain unit, the low conversion gain charge storage capacity corresponding to the gain unit: the charge storage capacity corresponding to the transmission node ranges from (1-20): (0.01-0.5), the high conversion gain charge storage capacity corresponding to the gain unit: the charge storage capacity corresponding to the transmission node ranges from (0.5-2): (0.01-0.5).

Images