Packaging structure of IGBT (Insulated Gate Bipolar Translator) series module

Through the packaging structure of the IGBT series module, the design of multi-layered copper substrate and reverse bonding wires is solved, and the problem of difficulty in reducing the opening delay and parasitic inductance in the existing technology is achieved, thus achieving lower load impedance and faster switching delays.

CN222530428UActive Publication Date: 2025-02-25CHONGQING YUNTONG CAR CORE ELECTRONIC TECH CO LTD
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Patent Information

Application Number
CN202420401216.8
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-03-01
Publication Date
2025-02-25
Estimated Expiration
2034-03-01

AI Technical Summary

Technical Problem

The existing IGBT packaging method is difficult to further reduce the activation delay and parasitic inductance.

Method used

Using the package structure of the IGBT series module, a plurality of semi-finished units are laminated in the shell. Each semi-finished unit includes a copper substrate, an IGBT chip and a FRD chip. The high and low settings of the first bond wire and the second bond wire are formed. The reverse bonded wire is used to offset the magnetic field, shorten the wire length and increase the cross-sectional area.

Benefits of technology

It effectively reduces the switching delay and parasitic inductance of IGBT, while improving the density and volume utilization of the package.

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Abstract

The utility model provides a packaging structure of an IGBT series module. The packaging structure comprises a housing; the semi-finished product units are stacked in the shell, each semi-finished product unit comprises a copper substrate, an IGBT chip and an FRD chip, the IGBT chip and the FRD chip are in bonding connection through a first bonding wire, the copper substrate is provided with a first welding surface, a second welding surface, a pin and an electrode, the first welding surface and the second welding surface are arranged oppositely, the pin and the electrode are connected, the IGBT chip and the FRD chip are located on the first welding surface, and the second welding surface is located on the second welding surface. The IGBT chip is in bonding connection with the pin through a second bonding wire; wherein the first bonding wires and the second bonding wires are arranged in a high-low mode, so that when the multiple copper substrates are stacked, the first bonding wires are partially connected to the second welding faces adjacent to the first bonding wires. According to the utility model, the technical problem that the turn-on delay and the parasitic inductance of the traditional packaging structure are difficult to further reduce is solved.
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Description

Technical Field

[0001] The utility model relates to the technical field of IGBT packaging, in particular to a packaging structure of an IGBT series module. Background Art

[0002] As IGBT applications become more and more widespread, the current mainstream packaging method is difficult to further reduce its turn-on delay and parasitic inductance due to its structural limitations. That is, the existing IGBT packaging method usually solders the IGBT on the copper-clad surface layer of the DBC, and achieves circuit overlap by etching grooves in the copper-clad layer and using bonding wires. In this packaging method, the arc formed by the bonding wire will produce a large parasitic inductance, and the long connection lines between the planarly arranged IGBT chips will also produce a large turn-on delay. Utility Model Content

[0003] In view of the deficiencies in the prior art, the utility model provides a packaging structure for an IGBT series module to solve the technical problem in the related art that it is difficult to further reduce the turn-on delay and parasitic inductance of the traditional packaging structure.

[0004] The utility model provides a packaging structure of an IGBT series module, comprising:

[0005] shell;

[0006] A plurality of semi-finished units are stacked in the housing, each of the semi-finished units comprises a copper substrate, and an IGBT chip and an FRD chip bonded and connected by a first bonding wire, the copper substrate has a first welding surface and a second welding surface disposed opposite to each other, and connected pins and electrodes, the IGBT chip and the FRD chip are located on the first welding surface, and the IGBT chip is bonded and connected to the pins by a second bonding wire;

[0007] The first bonding wire and the second bonding wire are arranged in a high and low position, so that when a plurality of the copper substrates are stacked, a portion of the first bonding wire is connected to a second welding surface adjacent thereto.

[0008] Furthermore, the second welding surface is recessed upward to form a tin-containing groove, and each of the first bonding wires is connected to a corresponding tin-containing groove.

[0009] Furthermore, a soldering sheet is provided in the tin-containing bath for connecting the corresponding first bonding wire.

[0010] Furthermore, a connection point is formed at the connection between the first bonding wire and the soldering sheet, which is used to split the first bonding wire and form two bonding wires with opposite magnetic field directions.

[0011] Further, the first bonding wire and / or the second bonding wire is in a bent structure.

[0012] Furthermore, the first welding surface protrudes upward to form a chip welding area for fixing the IGBT chip and the FRD chip.

[0013] Furthermore, the pins are suspended relative to the copper substrate.

[0014] Furthermore, the electrode and the lead are detachably connected via a connecting rib.

[0015] Furthermore, the connecting rib protrudes outside the shell.

[0016] Furthermore, a silicone layer is provided between the shell and the copper substrate.

[0017] Compared with the prior art, the utility model has the following beneficial effects: multiple copper substrates are stacked so that the first bonding wire on the chip can be directly connected to the next-level copper substrate through soldering, and a section of the first bonding wire is split into two sections of reverse bonding wires. The magnetic fields generated by the two reverse bonding wires are in opposite directions and cancel each other out, thereby reducing parasitic inductance; at the same time, the wire length is shortened and the wire cross-sectional area is increased to reduce load impedance, thereby reducing the switching delay of the IGBT. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 This is a schematic diagram of the structure of a copper substrate in one embodiment of the utility model;

[0019] Figure 2 for Figure 1 Side view of

[0020] Figure 3 It is a structural schematic diagram of a single semi-finished product unit in an embodiment of the utility model;

[0021] Figure 4 for Figure 3 A schematic diagram of the structure from another angle;

[0022] Figure 5 for Figure 3 Side view of

[0023] Figure 6 It is a schematic diagram of the structure after a plurality of semi-finished product units are stacked in one embodiment of the utility model;

[0024] Figure 7 for Figure 6 A schematic diagram of the structure from another angle;

[0025] Figure 8 It is a structural schematic diagram of a packaging structure in an embodiment of the utility model;

[0026] Fig. 9It is a structural schematic diagram of the packaging structure after the connecting ribs are removed in one embodiment of the utility model.

[0027] Description of Figure Numbers:

[0028] 1. Shell; 2. Copper substrate; 201. Tin bath; 202. Chip welding area; 3. Pins; 4. Electrodes; 5. IGBT chip; 6. FRD chip; 7. First bonding wire; 8. Second bonding wire; 9. Connecting ribs; 10. Silicone layer.

[0029] The realization of the purpose, functional features and advantages of the utility model will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0030] In order to make the purpose, technical solution and beneficial effects of the utility model more clear, the technical solution of the utility model is further described below in conjunction with the drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the utility model and are not used to limit the utility model.

[0031] In the embodiment of the present utility model, Figure 1-Figure 9 As shown, the packaging structure of the IGBT series module includes a housing 1 and a plurality of semi-finished units; the plurality of semi-finished units are stacked in the housing 1, each of the semi-finished units includes a copper substrate 2, and an IGBT chip 5 and an FRD chip 6 bonded to each other via a first bonding wire 7, the copper substrate 2 has a first welding surface and a second welding surface disposed opposite to each other, and connected pins 3 and electrodes 4, the IGBT chip 5 and the FRD chip 6 are located on the first welding surface, and the IGBT chip 5 is bonded to the pin 3 via a second bonding wire 8;

[0032] The first bonding wire 7 and the second bonding wire 8 are arranged in a high and low position, so that when a plurality of the copper substrates 2 are stacked, a portion of the first bonding wire 7 is connected to the second welding surface adjacent thereto.

[0033] Specifically, in the embodiment of the present invention, the housing 1 is a metal housing 1 having a groove therein for accommodating a plurality of semi-finished units.

[0034] In the embodiment of the utility model, a plurality of semi-finished units are stacked from top to bottom, with stacking gaps formed therebetween. This structure has a low turn-on delay because the connection line between two adjacent units is very short. Specifically, each semi-finished unit includes a copper substrate 2, an IGBT chip 5, and an FRD chip 6; wherein the copper substrate 2 is formed with a first welding surface and a second welding surface disposed opposite to each other, the first welding surface is used to fix the IGBT chip 5 and the FRD chip 6, and a pin 3 and an electrode 4 (such as Figure 1As shown, the number of pins 3 is two, and they are arranged at intervals. A wire-binding PAD is arranged at one end of the pin 3 close to the first welding surface, that is, two wire-binding PADs are connected by two pins 3 respectively, and the two pins 3 are connected to the same electrode 4); the connection method is as follows: the IGBT chip 5 and the FRD chip 6 are welded to the above-mentioned first welding surface by melting tin soldering, and the two chips are bonded to the upper surface thereof by a first bonding wire 7 (copper wire), and the G pole and the E pole of the IGBT chip 5 are respectively connected to the two wire-binding PAD areas on the copper substrate 2 by two second bonding wires 8, so that the first bonding wire 7 and the second bonding wire 8 can form two vertices of high and low dislocation; in this way, when each copper substrate 2 is in a stacked state, since the vertex of the first bonding wire 7 is higher than the vertex of the second bonding wire 8, the vertex of the first bonding wire 7 can be connected to the second welding surface of the next-level copper substrate 2, and the multi-layer stacking is then furnace-welded and reflowed. Of course, the number of stacking layers of the above semi-finished product units depends on the number of series connection levels of the circuit, which will not be described in detail here. After welding of multiple semi-finished units is completed, the highest bonding point of the first bonding wire 7 during stacking welding is directly connected to the next-level copper substrate 2 through solder, forming two bonding wires with opposite magnetic field directions. The magnetic fields generated by the two reverse circuits are in opposite directions and cancel each other out, thereby reducing parasitic inductance, shortening the wire length and increasing the wire cross-sectional area to reduce load impedance, thereby reducing the switching delay of the IGBT.

[0035] When the utility model is operated, a single semi-finished unit is connected according to the above connection method, and then the semi-finished unit is turned over so that the second welding surface of the copper substrate 2 is placed on the top, and the remaining copper substrates 2 are stacked one by one, so that the first bonding wire 7 of one of the two adjacent copper substrates 2 is welded and fixed to the second welding surface of the other copper substrate 2, and finally the above-mentioned entire semi-finished product and the shell 1 are fixed by using a tool, and the above-mentioned entire semi-finished product is stacked and welded in the middle of the groove of the shell 1, and then silicone is poured into the groove and solidified, and the connection part of the pin 3 and the electrode 4 on each copper substrate 2 is cut off, so that the pin 3 and the electrode 4 are independent of each other, and the packaging operation can be completed.

[0036] The utility model shortens the connection line between two adjacent layers by stacking, thereby reducing the turn-on delay; furthermore, the vertex of the first bonding wire 7 is connected to the second welding surface of the next-level copper substrate 2, so as to split the original bonding wire into two opposite bonding wires, and make the two bonding wires generate opposite magnetic fields and cancel each other, thereby reducing parasitic inductance, shortening the wire length and increasing the wire cross-sectional area to reduce load impedance, thereby reducing the switching delay of the IGBT. In addition, the packaged structure has a smaller volume and a higher chip density.

[0037] like Figure 7As shown, in one embodiment, the second welding surface is recessed upward to form a tin-containing groove 201, and each of the first bonding wires 7 is connected to the corresponding tin-containing groove 201. Specifically, in order to reduce both parasitic inductance and turn-on delay, this embodiment provides a tin-containing groove 201 on the second welding surface so that the copper substrate 2 with grooves and the first bonding wire 7 can be welded, so that the vertex of the first bonding wire 7 above the chip can be directly welded to the next-level copper substrate 2 to complete the circuit connection.

[0038] Further, a soldering piece is provided in the tin-containing bath 201 for connecting the corresponding first bonding wire 7. The melting point of the soldering piece is lower than the melting point of all the tin pieces in the previous layer welding. Preferably, a connection point is formed at the connection between the first bonding wire 7 and the soldering piece, which is used to split the first bonding wire 7 and form two bonding wires with opposite magnetic field directions. Preferably, the first bonding wire 7 and the second bonding wire 8 are in a curved structure. Specifically, in order to reduce parasitic inductance, this embodiment sets the first bonding wire 7 and the second bonding wire 8 as a curved structure, that is, an arc, and the two arc-shaped bonding wires can form two vertices, which are arranged in high and low positions, so that only the vertex of the first bonding wire 7 can be connected to the soldering piece of the tin-containing bath 201 of the next level, which not only does not affect the connection of the second bonding wire 8, but also can split the original semicircular arc circuit into two reverse 1 / 4 arc circuits, and the circuits formed by the two 1 / 4 arcs generate magnetic fields in opposite directions, which are used to offset each other, thereby reducing parasitic inductance.

[0039] like Figure 1 , Figure 3 As shown, in one embodiment, the first welding surface protrudes upward to form a chip welding area 202 for fixing the IGBT chip 5 and the FRD chip 6 .

[0040] like Figure 1 As shown, in one embodiment, the pin 3 is suspended relative to the copper substrate 2; further, the electrode 4 and the pin 3 are detachably connected via a connecting rib 9. Specifically, in order to facilitate the separation of the pin 3 and the electrode 4 after the packaging is completed, the pin 3 is suspended in this embodiment, and the two pins 3 are connected to the electrode 4 via the same connecting rib 9; preferably, the connecting rib 9 protrudes from the outer shell 1, that is, the outer shell 1 wraps the tin tank 201 and the two chips therein, and leaves the pin 3 and the electrode 4 outside, so as to facilitate the shearing of the connecting rib 9, so that the pin 3 and the electrode 4 are independent.

[0041] like Figure 8 , Fig. 9 As shown, in one embodiment, a silicone layer 10 is provided between the housing 1 and the copper substrate 2, and the silicone layer 10 is poured into the housing 1 to fix the copper substrates 2 and the chip to complete the overall packaging.

[0042] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the utility model rather than to limit it. Although the utility model has been described in detail with reference to the preferred embodiments, ordinary technicians in the field should understand that the technical solution of the utility model can be modified or replaced by equivalents without departing from the purpose and scope of the technical solution of the utility model, which should be included in the scope of the claims of the utility model.

Claims

1. The packaging structure of the IGBT series module is characterized by: include: shell; A plurality of semi-finished units are stacked in the housing, each of the semi-finished units comprises a copper substrate, and an IGBT chip and an FRD chip bonded and connected by a first bonding wire, the copper substrate has a first welding surface and a second welding surface disposed opposite to each other, and connected pins and electrodes, the IGBT chip and the FRD chip are located on the first welding surface, and the IGBT chip is bonded and connected to the pins by a second bonding wire; The first bonding wire and the second bonding wire are arranged in a high and low position, so that when a plurality of the copper substrates are stacked, a portion of the first bonding wire is connected to a second welding surface adjacent thereto.

2. The packaging structure of the IGBT series module according to claim 1, characterized in that: The second welding surface is recessed upward to form a tin-containing groove, and each of the first bonding wires is connected to a corresponding tin-containing groove.

3. The packaging structure of the IGBT series module according to claim 2, characterized in that: A soldering sheet is arranged in the tin-containing bath for connecting the corresponding first bonding wire.

4. The packaging structure of the IGBT series module according to claim 3, characterized in that: A connection point is formed at the connection between the first bonding wire and the soldering sheet, which is used to split the first bonding wire and form two sections of bonding wires with opposite magnetic field directions.

5. The packaging structure of the IGBT series module according to any one of claims 1 to 4, characterized in that: The first bonding wire and / or the second bonding wire is in a bent structure.

6. The packaging structure of the IGBT series module according to any one of claims 1 to 4, characterized in that: The first welding surface protrudes upward to form a chip welding area for fixing the IGBT chip and the FRD chip.

7. The packaging structure of the IGBT series module according to claim 1, characterized in that: The pins are suspended relative to the copper substrate.

8. The packaging structure of the IGBT series module according to claim 7, characterized in that: The electrode and the lead are detachably connected via a connecting rib.

9. The packaging structure of the IGBT series module according to claim 8, characterized in that: The connecting ribs protrude from the outer shell.

10. The packaging structure of the IGBT series module according to claim 1, characterized in that: A silica gel layer is provided between the shell and the copper substrate.